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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38bf3221761sm14008914f8f.22.2025.01.21.11.03.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Jan 2025 11:03:40 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH] linux-user: Constify target_shmlba() argument Date: Tue, 21 Jan 2025 20:03:38 +0100 Message-ID: <20250121190339.58223-1-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Returning target segment low boundary address multiple shouldn't need to modify the CPU env. Make it const. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- linux-user/arm/target_syscall.h | 2 +- linux-user/mips/target_syscall.h | 2 +- linux-user/mips64/target_syscall.h | 2 +- linux-user/sh4/target_syscall.h | 2 +- linux-user/sparc/target_syscall.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/linux-user/arm/target_syscall.h b/linux-user/arm/target_syscall.h index 412ad434cfc..de5661c296b 100644 --- a/linux-user/arm/target_syscall.h +++ b/linux-user/arm/target_syscall.h @@ -35,7 +35,7 @@ struct target_pt_regs { #define TARGET_FORCE_SHMLBA -static inline abi_ulong target_shmlba(CPUARMState *env) +static inline abi_ulong target_shmlba(const CPUARMState *env) { return 4 * 4096; } diff --git a/linux-user/mips/target_syscall.h b/linux-user/mips/target_syscall.h index 08ead678104..7aade628645 100644 --- a/linux-user/mips/target_syscall.h +++ b/linux-user/mips/target_syscall.h @@ -30,7 +30,7 @@ struct target_pt_regs { #define TARGET_FORCE_SHMLBA -static inline abi_ulong target_shmlba(CPUMIPSState *env) +static inline abi_ulong target_shmlba(const CPUMIPSState *env) { return 0x40000; } diff --git a/linux-user/mips64/target_syscall.h b/linux-user/mips64/target_syscall.h index 358dc2d64c9..c4d54bda1d6 100644 --- a/linux-user/mips64/target_syscall.h +++ b/linux-user/mips64/target_syscall.h @@ -27,7 +27,7 @@ struct target_pt_regs { #define TARGET_FORCE_SHMLBA -static inline abi_ulong target_shmlba(CPUMIPSState *env) +static inline abi_ulong target_shmlba(const CPUMIPSState *env) { return 0x40000; } diff --git a/linux-user/sh4/target_syscall.h b/linux-user/sh4/target_syscall.h index 148398855df..8fd504fff1b 100644 --- a/linux-user/sh4/target_syscall.h +++ b/linux-user/sh4/target_syscall.h @@ -21,7 +21,7 @@ struct target_pt_regs { #define TARGET_FORCE_SHMLBA -static inline abi_ulong target_shmlba(CPUSH4State *env) +static inline abi_ulong target_shmlba(const CPUSH4State *env) { return 0x4000; } diff --git a/linux-user/sparc/target_syscall.h b/linux-user/sparc/target_syscall.h index e4211653574..6ab47102045 100644 --- a/linux-user/sparc/target_syscall.h +++ b/linux-user/sparc/target_syscall.h @@ -45,7 +45,7 @@ struct target_pt_regs { */ #define TARGET_FORCE_SHMLBA -static inline abi_ulong target_shmlba(CPUSPARCState *env) +static inline abi_ulong target_shmlba(const CPUSPARCState *env) { #ifdef TARGET_SPARC64 return MAX(TARGET_PAGE_SIZE, 16 * 1024);