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Fri, 20 Dec 2019 16:15:23 -0800 (PST) Received: from apollo.hsd1.ca.comcast.net ([2601:646:9200:4e0::36e9]) by smtp.gmail.com with ESMTPSA id 65sm15001784pfu.140.2019.12.20.16.15.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Dec 2019 16:15:22 -0800 (PST) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Fri, 20 Dec 2019 16:14:57 -0800 Message-Id: <20191221001459.1630195-1-raj.khem@gmail.com> X-Mailer: git-send-email 2.24.1 MIME-Version: 1.0 Subject: [OE-core] [PATCH 1/3] siteinfo: Recognize 64bit PPC LE X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org Signed-off-by: Khem Raj --- meta/classes/siteinfo.bbclass | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) -- 2.24.1 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/classes/siteinfo.bbclass b/meta/classes/siteinfo.bbclass index 411e70478e..d62aaac0f0 100644 --- a/meta/classes/siteinfo.bbclass +++ b/meta/classes/siteinfo.bbclass @@ -48,6 +48,7 @@ def siteinfo_data_for_machine(arch, os, d): "powerpc": "endian-big bit-32 powerpc-common", "nios2": "endian-little bit-32 nios2-common", "powerpc64": "endian-big bit-64 powerpc-common", + "powerpc64le": "endian-little bit-64 powerpc-common", "ppc": "endian-big bit-32 powerpc-common", "ppc64": "endian-big bit-64 powerpc-common", "ppc64le" : "endian-little bit-64 powerpc-common", @@ -106,8 +107,10 @@ def siteinfo_data_for_machine(arch, os, d): "powerpc-linux-muslspe": "powerpc-linux powerpc32-linux", "powerpc64-linux-gnuspe": "powerpc-linux powerpc64-linux", "powerpc64-linux-muslspe": "powerpc-linux powerpc64-linux", - "powerpc64-linux": "powerpc-linux", - "powerpc64-linux-musl": "powerpc-linux", + "powerpc64-linux": "powerpc-linux powerpc64-linux", + "powerpc64-linux-musl": "powerpc-linux powerpc64-linux", + "powerpc64le-linux": "powerpc-linux powerpc64-linux", + "powerpc64le-linux-musl": "powerpc-linux powerpc64-linux", "riscv32-linux": "riscv32-linux", "riscv32-linux-musl": "riscv32-linux", "riscv64-linux": "riscv64-linux", From patchwork Sat Dec 21 00:14:58 2019 Content-Type: text/plain; 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Fri, 20 Dec 2019 16:15:24 -0800 (PST) Received: from apollo.hsd1.ca.comcast.net ([2601:646:9200:4e0::36e9]) by smtp.gmail.com with ESMTPSA id 65sm15001784pfu.140.2019.12.20.16.15.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Dec 2019 16:15:24 -0800 (PST) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Fri, 20 Dec 2019 16:14:58 -0800 Message-Id: <20191221001459.1630195-2-raj.khem@gmail.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20191221001459.1630195-1-raj.khem@gmail.com> References: <20191221001459.1630195-1-raj.khem@gmail.com> MIME-Version: 1.0 Subject: [OE-core] [PATCH 2/3] powerpc, powerpc64: Append little-endianness to tune arch X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org This helps in constructing right arch for target tuple name for Little-endian ppc Signed-off-by: Khem Raj --- meta/conf/machine/include/powerpc/arch-powerpc.inc | 3 ++- meta/conf/machine/include/powerpc/arch-powerpc64.inc | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) -- 2.24.1 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/conf/machine/include/powerpc/arch-powerpc.inc b/meta/conf/machine/include/powerpc/arch-powerpc.inc index 8c0c943044..ef18e9ac8b 100644 --- a/meta/conf/machine/include/powerpc/arch-powerpc.inc +++ b/meta/conf/machine/include/powerpc/arch-powerpc.inc @@ -15,7 +15,8 @@ TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "bigendian", " -mbig-endia TUNEVALID[m32] = "Power ELF32 standard ABI" TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'm32', ' -m32', '', d)}" -TUNE_ARCH .= "${@bb.utils.contains('TUNE_FEATURES', 'm32', 'powerpc', '', d)}" +TUNE_ARCH .= "${@bb.utils.contains('TUNE_FEATURES', 'm32', 'powerpc${ENDIAN_SFX}', '', d)}" +ENDIAN_SFX = "${@bb.utils.contains('TUNE_FEATURES', 'bigendian', '', 'le', d)}" TUNEVALID[fpu-hard] = "Use hardware FPU." TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'fpu-hard', ' -mhard-float', '', d)}" diff --git a/meta/conf/machine/include/powerpc/arch-powerpc64.inc b/meta/conf/machine/include/powerpc/arch-powerpc64.inc index 4bc5983087..cf5c3ef8e6 100644 --- a/meta/conf/machine/include/powerpc/arch-powerpc64.inc +++ b/meta/conf/machine/include/powerpc/arch-powerpc64.inc @@ -5,7 +5,7 @@ require conf/machine/include/powerpc/arch-powerpc.inc TUNEVALID[m64] = "Power ELF64 standard ABI" TUNECONFLICTS[m64] = "m32 nf" TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'm64', ' -m64', '', d)}" -TUNE_ARCH .= "${@bb.utils.contains('TUNE_FEATURES', [ 'm64' ], 'powerpc64', '', d)}" +TUNE_ARCH .= "${@bb.utils.contains('TUNE_FEATURES', [ 'm64' ], 'powerpc64${ENDIAN_SFX}', '', d)}" # musl only supports elfv2 ABI for ppc64 TUNE_CCARGS .= "${@['', ' -mabi=elfv2']['libc-musl' in d.getVar('OVERRIDES').split(':')]}" From patchwork Sat Dec 21 00:14:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Khem Raj X-Patchwork-Id: 182348 Delivered-To: patch@linaro.org Received: by 2002:a92:1f98:0:0:0:0:0 with SMTP id f24csp1209106ilf; Fri, 20 Dec 2019 16:15:54 -0800 (PST) X-Google-Smtp-Source: APXvYqy2SAvRi0p8+TaxZBjcBuq4DBqHmQOMvE5+5ygQJxgLd53/d/V2NplmxPxFX+4kYZRZxbL/ X-Received: by 2002:a63:5525:: with SMTP id j37mr17528968pgb.180.1576887354404; Fri, 20 Dec 2019 16:15:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576887354; cv=none; d=google.com; s=arc-20160816; b=ZkhkoCpOP/1a7DbJ06shS+k4GJGziGIofqWdPovIbFVf7DZrqMqjJWy4IT7+gvO8Ww OsHSHnrg4YKbJfxBx8+VaEbGf6Tbsp/sIeEb8+OrZ97zOY5rwGpc93wkO6AB4IX45C5l uc1W5ktBt1UDaCEDpjU8s9UD/J6312DptL7jP5Pm6MDTpt9REMOSs6npKOb23VWXtqPD JwY5N5a/U8KdtsOO8uIKDucQvvCEUCEX5w4ohb7zYnzI1j0mw2REhRmjHdsiQgDbaoT3 vcMQfVf1LvMcfIQZ9D6ZSaL81AFY/J2eFH2kfzy5buHi4+rCKVrPzABCjoFHlD2dI+Gz /N8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:sender:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :mime-version:references:in-reply-to:message-id:date:to:from :dkim-signature:delivered-to; bh=CZrZszbJT7ikkB8seyx8pLuk3FP+3/UGE1L82c+7fPQ=; b=yz5tXkMMk2W6qSYwk86bZkUSbSZlQKocguDZ0DpZ8zf0CI7v9KqhVnuqLchwX6LlxM JN5qrF7iAcu1YRGt+99OixQuIHdsw6rIT/3dV/KPfdHMUQtR3KpO6cr1PzCgHNpR0aM7 bdCM5kdJIVEU8RTppb7tJ761RU0xvVhqYQMAK9wZ8cuXBK/fc2CiRzqlzUuKSPGyC4P5 HXJhvgZDpPTdUnwqKeG0qwkem7OE6JvZX8/6dqD28Y6xF92UyevcxlvUgw2lz5bGaW3t pdh3enBqWmYSHmANWQXQSUwo8sRVvf576qqwV70VWye3tZ/Jwj5QUgdKn0zXFMNiiOEK Bb3Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@gmail.com header.s=20161025 header.b=mDxjmVOo; spf=pass (google.com: best guess record for domain of openembedded-core-bounces@lists.openembedded.org designates 140.211.169.62 as permitted sender) smtp.mailfrom=openembedded-core-bounces@lists.openembedded.org; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from mail.openembedded.org (mail.openembedded.org. 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Fri, 20 Dec 2019 16:15:25 -0800 (PST) Received: from apollo.hsd1.ca.comcast.net ([2601:646:9200:4e0::36e9]) by smtp.gmail.com with ESMTPSA id 65sm15001784pfu.140.2019.12.20.16.15.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Dec 2019 16:15:24 -0800 (PST) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Fri, 20 Dec 2019 16:14:59 -0800 Message-Id: <20191221001459.1630195-3-raj.khem@gmail.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20191221001459.1630195-1-raj.khem@gmail.com> References: <20191221001459.1630195-1-raj.khem@gmail.com> MIME-Version: 1.0 Subject: [OE-core] [PATCH 3/3] tune-power9: Add power9 tunings X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org Add Little/big Endian, 32bit/64bit Signed-off-by: Khem Raj --- meta/conf/machine/include/tune-power9.inc | 35 +++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 meta/conf/machine/include/tune-power9.inc -- 2.24.1 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/conf/machine/include/tune-power9.inc b/meta/conf/machine/include/tune-power9.inc new file mode 100644 index 0000000000..81d6e8e9bf --- /dev/null +++ b/meta/conf/machine/include/tune-power9.inc @@ -0,0 +1,35 @@ +DEFAULTTUNE ?= "ppc64p9le" + +require conf/machine/include/powerpc/arch-powerpc64.inc + +TUNEVALID[power9] = "Enable IBM Power9 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'power9', ' -mcpu=power9', '', d)}" + +AVAILTUNES += "ppcp9 ppc64p9 ppcp9le ppc64p9le" + +TUNE_FEATURES_tune-ppcp9 = "m32 fpu-hard power9 altivec bigendian" +BASE_LIB_tune-ppcp9 = "lib" +TUNE_PKGARCH_tune-ppcp9 = "ppcp9" +PACKAGE_EXTRA_ARCHS_tune-ppcp9 = "${PACKAGE_EXTRA_ARCHS_tune-powerpc} ppcp9" + +TUNE_FEATURES_tune-ppc64p9 = "m64 fpu-hard power9 altivec bigendian" +BASE_LIB_tune-ppc64p9 = "lib64" +TUNE_PKGARCH_tune-ppc64p9 = "ppc64p9" +PACKAGE_EXTRA_ARCHS_tune-ppc64p9 = "${PACKAGE_EXTRA_ARCHS_tune-powerpc64} ppc64p9" + +TUNE_FEATURES_tune-ppcp9le = "m32 fpu-hard power9 altivec" +BASE_LIB_tune-ppcp9le = "lib" +TUNE_PKGARCH_tune-ppcp9le = "ppcp9le" +PACKAGE_EXTRA_ARCHS_tune-ppcp9le = "${PACKAGE_EXTRA_ARCHS_tune-powerpcle} ppcp9le" + +TUNE_FEATURES_tune-ppc64p9le = "m64 fpu-hard power9 altivec" +BASE_LIB_tune-ppc64p9le = "lib64" +TUNE_PKGARCH_tune-ppc64p9le = "ppc64p9le" +PACKAGE_EXTRA_ARCHS_tune-ppc64p9le = "${PACKAGE_EXTRA_ARCHS_tune-powerpc64le} ppc64p9le" + +# glibc configure options to get power9 specific library +GLIBC_EXTRA_OECONF_powerpc64 += "${@bb.utils.contains('TUNE_FEATURES', 'power9', '--with-cpu=power9', '', d)}" +GLIBC_EXTRA_OECONF_powerpc += "${@bb.utils.contains('TUNE_FEATURES', 'power9', '--with-cpu=power9', '', d)}" + +# QEMU usermode fails with invalid instruction error +MACHINE_FEATURES_BACKFILL_CONSIDERED_append = "${@bb.utils.contains('TUNE_FEATURES', 'power9', ' qemu-usermode', '', d)}"