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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a8e37d0casm10891447f8f.11.2025.01.12.16.47.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:47:56 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 01/23] hw/mips/cps: Keep reference of vCPUs in MIPSCPSState Date: Mon, 13 Jan 2025 01:47:26 +0100 Message-ID: <20250113004748.41658-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When a QOM object create children with object_new(), it is better to keep reference to them for further use. In particular, this allow to remove one global &first_cpu use. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/mips/cps.h | 1 + hw/mips/cps.c | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h index 05ef9f76b74..0968b57c5a0 100644 --- a/include/hw/mips/cps.h +++ b/include/hw/mips/cps.h @@ -40,6 +40,7 @@ struct MIPSCPSState { char *cpu_type; bool cpu_is_bigendian; + MIPSCPU **cpus; MemoryRegion container; MIPSGCRState gcr; MIPSGICState gic; diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 293b405b965..494213b2ab6 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -73,6 +73,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) return; } + s->cpus = g_new(MIPSCPU *, s->num_vp); for (int i = 0; i < s->num_vp; i++) { MIPSCPU *cpu = MIPS_CPU(object_new(s->cpu_type)); CPUMIPSState *env = &cpu->env; @@ -91,6 +92,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) if (!qdev_realize_and_unref(DEVICE(cpu), NULL, errp)) { return; } + s->cpus[i] = cpu; /* Init internal devices */ cpu_mips_irq_init_cpu(cpu); @@ -146,7 +148,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gic), 0)); /* Global Configuration Registers */ - gcr_base = MIPS_CPU(first_cpu)->env.CP0_CMGCRBase << 4; + gcr_base = s->cpus[0]->env.CP0_CMGCRBase << 4; object_initialize_child(OBJECT(dev), "gcr", &s->gcr, TYPE_MIPS_GCR); object_property_set_uint(OBJECT(&s->gcr), "num-vp", s->num_vp, From patchwork Mon Jan 13 00:47:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856902 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1213422wrc; Sun, 12 Jan 2025 16:49:56 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWuQbjOUoyDJUyODxgmm6Sq3l3mRvV5cFlWztfr2phZqCZ5HtzZSHmfc5cmrmbHR8GjHx4WBA==@linaro.org X-Google-Smtp-Source: AGHT+IGecHLvKz6koByiJ+3UWSGzEWG+/qsVsYKWchwfhGUZX9kq64IjxTuCsdoJzf3JA1kHTjne X-Received: by 2002:ac8:5557:0:b0:46c:7152:317e with SMTP id d75a77b69052e-46c7152318bmr234458161cf.42.1736729396000; Sun, 12 Jan 2025 16:49:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729395; cv=none; d=google.com; s=arc-20240605; b=Km7zkMeYBhjvAF2tnKm3eHCSD8xz+nCoCDR9hzlRw0AE0JNVnIIQUNgFFjaTciSsYG 9Q8bF7HvxuCxBaTSVjFxyaPHnSx3Jlv89mQdA6+QZdbQzYjfTEhcNbBUIR2+XNYN1Pvs kuBqpzQicP18uanpWQ/bGYJNaz0yj3CE6ZkvTgPah3QzT4H4tD0QRtJe/QpUX4eM+jiu NAt1pKR8i8VpAGvtdNrFka088jIgrMJcKjlJpeoTXs2XQ47w91anOZHTqY20obQOM7w3 aB/jlNkdcV9bZ4qpKKkp8fKfPMmYYdAcQWuybNrJmYxJhb76hvgvgySonizQsxg2ke72 fB9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wTM7kJDrHWUpg1IPISR4zuSM03kjMUv0Xm2Dmwxq0M8=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=VkRB8DKt+vpgSIOGnKIVv7tzvBgZl+6m0+LgLTLFBSOs42svukXPkyUu2rrpH0A3TD oMomrCitV2JlyjPBkTG63t3V9+t5c0opaSEUiHZXu7jg/+N6maZjZ456Ns9mvvYnWtSR ekSh0hImLMy3ckrwAcnNBorenb/vx1ErgDUnihwgMJXZLe2/2aSvVWVacjbNzWjhkkQi vEtnmVDmP12PmjUkJ4DKkge91o2EyEF/qDdicDTL29VUrMytjA0UuIyv4CISuLnZ9Ggw 1Xiy0UDy0tcPYBGBSubwRzZ9r/ONIBDY0b35XN5uNmYFzPjtDqf4EBy10A8jYgx1tz7B XJ4Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="I94hz7W/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2e8bea5sm160710605e9.31.2025.01.12.16.48.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:48:03 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 02/23] hw/mips/malta: Check CPU index instead of using &first_cpu Date: Mon, 13 Jan 2025 01:47:27 +0100 Message-ID: <20250113004748.41658-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since create_cpu_without_cps() creates the vCPUs iterating up to the machine SMP count, it knows the first CPU is created upon the first iteration, at index #0 :) Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/malta.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 4e9cccaa347..37be2330eda 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1042,12 +1042,13 @@ static void create_cpu_without_cps(MachineState *ms, MaltaState *s, cpu_mips_irq_init_cpu(cpu); cpu_mips_clock_init(cpu); qemu_register_reset(main_cpu_reset, cpu); - } - cpu = MIPS_CPU(first_cpu); - env = &cpu->env; - *i8259_irq = env->irq[2]; - *cbus_irq = env->irq[4]; + if (i == 0) { + env = &cpu->env; + *i8259_irq = env->irq[2]; + *cbus_irq = env->irq[4]; + } + } } static void create_cps(MachineState *ms, MaltaState *s, From patchwork Mon Jan 13 00:47:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856900 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1213316wrc; Sun, 12 Jan 2025 16:49:19 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVeclSmDc84nvudNS+3n4CEPTWzJip7CwXqWKuKo/cc5qtJ5zUU15h3O9gaCUEOlnnpu72gEw==@linaro.org X-Google-Smtp-Source: AGHT+IGVsyT0ZiUMjv2d4Qmhcaoeihrz+CCVCcnlcfPP1op6Ofu4P6QCbeJTbL6n7M5xvTu6h0yc X-Received: by 2002:a05:620a:2807:b0:7b6:cb3c:d52c with SMTP id af79cd13be357-7bcd97acbbcmr904838185a.38.1736729359221; Sun, 12 Jan 2025 16:49:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729359; cv=none; d=google.com; s=arc-20240605; b=Bc+SBww18QfihvMzVDnv+VydldLF3x/0xHsZGiRQW1MLWYuZ+ePY0P6DN+0iVUXahY oreCeinTmerbZFOimDAhg/qXXoS7JgRp0uYWb5W/saFh4xN2tP2iXPAk1UppQAvbUNjT tT4eTBiYv2xeW1c4SDwWvE/V1iFmDQhl62oZVLVCRFJydWWCMsG2r21IguD3+or74FT5 Hf3YSQZBpm0wQw4CbxSDrJ4npbmhiUVvNxDbsLitW/0sbNORv7dO02UYtGHkvSBhid1e Ndun2V+6W3grqAe6qTYr8LI2f3uvPzFmVGruLf+31gOmExER1oYB50oMY78qVY0B/F1q 0xwA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=raovzkxW4bgEPUiYxpxT8OAVJQxeHZnj+ixMLAGuiZ0=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=BIbIAKt80Ju7huCD/8yZEXCS2kwP0ina6aEAwSZDLhEiWbwWnGCUDMJxzdeJ8WyheV lgEpux+WYoY6LftkLUXHuH2kyG5vc3smnzWYuKbB1+ywra1IKAC3xqPsllRsDD1EAYsW vWA+HmxVG4Keb04h7dpMXmDZI3jNii2rzK9y8FLOrQzK3ghyhkXU4k2BCBW1sPWKYGy5 GJ6CwdMHJcYgIS3v78mFnw/EEnaLp/3T0QNzQjZu4FIlDq4tOkXLxJykKfeqgLUE+nHE WPH2lv+nM7ZRADkIZJB2LNZFBmOpAPf4GtjdBiJ0nM5u9tcYsqRCCXUsIDZxj9huJUQh VAXQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="rxsyiU/p"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2e8bea5sm160712395e9.31.2025.01.12.16.48.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:48:09 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 03/23] hw/mips/boston: Replace bl_gen_write_ulong() -> bl_gen_write_u64() Date: Mon, 13 Jan 2025 01:47:28 +0100 Message-ID: <20250113004748.41658-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "exec/hwaddr.h" defines: typedef uint64_t hwaddr; typedef struct MemMapEntry { hwaddr base; hwaddr size; } MemMapEntry; Since MemMapEntry::base is always of type uint64_t, we can directly use bl_gen_write_u64(). Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/boston.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 67044af962a..63dc654192a 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -329,20 +329,20 @@ static void gen_firmware(void *p, hwaddr kernel_entry, hwaddr fdt_addr) /* Move CM GCRs */ regaddr = cpu_mips_phys_to_kseg1(NULL, GCR_BASE_ADDR + GCR_BASE_OFS), - bl_gen_write_ulong(&p, regaddr, - boston_memmap[BOSTON_CM].base); + bl_gen_write_u64(&p, regaddr, + boston_memmap[BOSTON_CM].base); /* Move & enable GIC GCRs */ regaddr = cpu_mips_phys_to_kseg1(NULL, boston_memmap[BOSTON_CM].base + GCR_GIC_BASE_OFS), - bl_gen_write_ulong(&p, regaddr, - boston_memmap[BOSTON_GIC].base | GCR_GIC_BASE_GICEN_MSK); + bl_gen_write_u64(&p, regaddr, + boston_memmap[BOSTON_GIC].base | GCR_GIC_BASE_GICEN_MSK); /* Move & enable CPC GCRs */ regaddr = cpu_mips_phys_to_kseg1(NULL, boston_memmap[BOSTON_CM].base + GCR_CPC_BASE_OFS), - bl_gen_write_ulong(&p, regaddr, - boston_memmap[BOSTON_CPC].base | GCR_CPC_BASE_CPCEN_MSK); + bl_gen_write_u64(&p, regaddr, + boston_memmap[BOSTON_CPC].base | GCR_CPC_BASE_CPCEN_MSK); /* * Setup argument registers to follow the UHI boot protocol: From patchwork Mon Jan 13 00:47:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856899 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1213299wrc; Sun, 12 Jan 2025 16:49:13 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUOEPwiocfWlZmMs/C9RXtY9EtUNlXvNudcPO4lHHnPDHWbITCs9PIIBlK6K8A8qqczg8gSxg==@linaro.org X-Google-Smtp-Source: AGHT+IFH3BWf1gfeZD3Nej+A83B/FXAWvpE5ReMyG0jZ5BOKMoMqFyRnqJYuSllp3c3dvs3fhcwK X-Received: by 2002:ac8:7f0f:0:b0:467:5734:d08b with SMTP id d75a77b69052e-46c7102cc4cmr332256261cf.31.1736729353096; Sun, 12 Jan 2025 16:49:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729353; cv=none; d=google.com; s=arc-20240605; b=TxtgByLUf0SF6t7oAnndtlBv0uqVPKO1CXU4gX3oXPT7+ldYnmjiGgGTYY6sKadYqp 3TFk9m0guM/MFXsPdq4jBqptebzhXcWX8M+gN/m4ltY5H1ZRGUm2/s6DH07iF0Lc8ajo 7KtPtBg1AfdMZ7xEr5qAfwHFAErqWuckbophtnVpEsxkCOJMzLgJRQCuPBVHqb1ZDNC6 Ta7OS0jP0qLARe01IX9SIvcVMFvCfPuZBeNRLu28mwQft8fxlwcctagoey2eg/EBtQBe YS5HFiu4au+KNo8GXwaRK8QMm2BdA6z1wSy31gxWe3vvPT65MylAadK7jYRLy38Szdo8 Ezxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=RaLd62FWqL+hLOLg3wMqHXBcHhygEQ6lOnbn557VnfU=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=F6GdQBrzt+PM+BiC/2oCy2FnbXx+h9CSj+TGJ2Aq0OqUPo7KfAwqcrGhEBOgcQzZok M7ciruJPrgOlHnlr7Qbvqs8DV8R7RqgR3Dk/Lr+A/Ywd95kfznFHW7nPQZpbGskQV/P+ gS2BMuC3dGgp/2Qz0VQhXNyuQkqqCqgQQKY+Dfw1wJt+fPZztlgYAr+n2XwUKkhoJ58D xi2+Pe0i1731rIUjxF1KbIg+Y9A9papxVpYjgY2tEZvFTbnVCXbb+fzuXRxVZf2bhHPi kUUbbyFQqY3BhCsXQE8jWQyew6Ck6htXCiuXo8NSAUonJ3vaXKV9E1jQvIUMg1ZMolo2 1C1g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Bln4nT2g; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a8e4b8299sm10825477f8f.74.2025.01.12.16.48.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:48:15 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 04/23] hw/mips/bootloader: Propagate CPU env to bootcpu_supports_isa() Date: Mon, 13 Jan 2025 01:47:29 +0100 Message-ID: <20250113004748.41658-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target specific CPU env to the locally declared bootcpu_supports_isa() function. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/bootloader.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 1dd6ef20968..918ce7795c4 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -49,9 +49,9 @@ typedef enum bl_reg { BL_REG_RA = 31, } bl_reg; -static bool bootcpu_supports_isa(uint64_t isa_mask) +static bool bootcpu_supports_isa(const CPUMIPSState *env, uint64_t isa_mask) { - return cpu_supports_isa(&MIPS_CPU(first_cpu)->env, isa_mask); + return cpu_supports_isa(env, isa_mask); } static void st_nm32_p(void **ptr, uint32_t insn) @@ -69,7 +69,7 @@ static void st_nm32_p(void **ptr, uint32_t insn) /* Base types */ static void bl_gen_nop(void **ptr) { - if (bootcpu_supports_isa(ISA_NANOMIPS32)) { + if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_NANOMIPS32)) { st_nm32_p(ptr, 0x8000c000); } else { uint32_t *p = *ptr; @@ -120,7 +120,7 @@ static void bl_gen_i_type(void **ptr, uint8_t opcode, /* Single instructions */ static void bl_gen_dsll(void **p, bl_reg rd, bl_reg rt, uint8_t sa) { - if (bootcpu_supports_isa(ISA_MIPS3)) { + if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { bl_gen_r_type(p, 0, 0, rt, rd, sa, 0x38); } else { g_assert_not_reached(); /* unsupported */ @@ -129,7 +129,7 @@ static void bl_gen_dsll(void **p, bl_reg rd, bl_reg rt, uint8_t sa) static void bl_gen_jalr(void **p, bl_reg rs) { - if (bootcpu_supports_isa(ISA_NANOMIPS32)) { + if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_NANOMIPS32)) { uint32_t insn = 0; insn = deposit32(insn, 26, 6, 0b010010); /* JALRC */ @@ -196,7 +196,7 @@ static void bl_gen_sw_nm(void **ptr, bl_reg rt, uint8_t rs, uint16_t ofs12) static void bl_gen_sw(void **p, bl_reg rt, uint8_t base, uint16_t offset) { - if (bootcpu_supports_isa(ISA_NANOMIPS32)) { + if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_NANOMIPS32)) { bl_gen_sw_nm(p, rt, base, offset); } else { bl_gen_i_type(p, 0x2b, base, rt, offset); @@ -205,7 +205,7 @@ static void bl_gen_sw(void **p, bl_reg rt, uint8_t base, uint16_t offset) static void bl_gen_sd(void **p, bl_reg rt, uint8_t base, uint16_t offset) { - if (bootcpu_supports_isa(ISA_MIPS3)) { + if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { bl_gen_i_type(p, 0x3f, base, rt, offset); } else { g_assert_not_reached(); /* unsupported */ @@ -215,7 +215,7 @@ static void bl_gen_sd(void **p, bl_reg rt, uint8_t base, uint16_t offset) /* Pseudo instructions */ static void bl_gen_li(void **p, bl_reg rt, uint32_t imm) { - if (bootcpu_supports_isa(ISA_NANOMIPS32)) { + if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_NANOMIPS32)) { bl_gen_lui_nm(p, rt, extract32(imm, 12, 20)); bl_gen_ori_nm(p, rt, rt, extract32(imm, 0, 12)); } else { @@ -235,7 +235,7 @@ static void bl_gen_dli(void **p, bl_reg rt, uint64_t imm) static void bl_gen_load_ulong(void **p, bl_reg rt, target_ulong imm) { - if (bootcpu_supports_isa(ISA_MIPS3)) { + if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { bl_gen_dli(p, rt, imm); /* 64bit */ } else { bl_gen_li(p, rt, imm); /* 32bit */ @@ -281,7 +281,7 @@ void bl_gen_write_ulong(void **p, target_ulong addr, target_ulong val) { bl_gen_load_ulong(p, BL_REG_K0, val); bl_gen_load_ulong(p, BL_REG_K1, addr); - if (bootcpu_supports_isa(ISA_MIPS3)) { + if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { bl_gen_sd(p, BL_REG_K0, BL_REG_K1, 0x0); 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Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/bootloader.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 918ce7795c4..b2be9267516 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -67,9 +67,9 @@ static void st_nm32_p(void **ptr, uint32_t insn) } /* Base types */ -static void bl_gen_nop(void **ptr) +static void bl_gen_nop(const CPUMIPSState *env, void **ptr) { - if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_NANOMIPS32)) { + if (bootcpu_supports_isa(env, ISA_NANOMIPS32)) { st_nm32_p(ptr, 0x8000c000); } else { uint32_t *p = *ptr; @@ -247,7 +247,7 @@ void bl_gen_jump_to(void **p, target_ulong jump_addr) { bl_gen_load_ulong(p, BL_REG_T9, jump_addr); bl_gen_jalr(p, BL_REG_T9); - bl_gen_nop(p); /* delay slot */ + bl_gen_nop(&MIPS_CPU(first_cpu)->env, p); /* delay slot */ } void bl_gen_jump_kernel(void **p, From patchwork Mon Jan 13 00:47:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856897 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1213232wrc; Sun, 12 Jan 2025 16:48:52 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVthXRmPzQXyAqhpLaXpcHpu0Ic0aUpATa/9TrvZi6o1/5J2Vl/xyjevLn2eF9OszLdCoF5dQ==@linaro.org X-Google-Smtp-Source: AGHT+IHTde2JU3+TcPa5Ei9FgqYjtp7z/McHczqp7TQZ0jx+zm73BRugHq0vSGhcWpnOQicdKslk X-Received: by 2002:a05:620a:d85:b0:7b6:d998:4fcd with SMTP id af79cd13be357-7bcd9760bc9mr3324060285a.25.1736729332603; Sun, 12 Jan 2025 16:48:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729332; cv=none; d=google.com; s=arc-20240605; b=BqORHalLOYlqs+A8wAwhD4UvV1IhistRzlgvpaVkP3Qcad2gOc49tgs5kPMO+KhGJI Ad2IZtPVc7k/cyQnv9okchOxUyMDvfWkbPwa6d+KAVGbZURtwyNCptczJYRZwEDq1Zu3 IF15hTm07UQtDDc2etCr2yd3KZvBA09ESInoMWL6BQDzjDMKKXuMoW1WG3Bmr6T9Yx0V exZ4a/pz0PTxd3yt72YLtLly4asqet6z/XDwcxUhH5jDi1ELKfKZ7tJihLdITMPToB7P vmGCD26oSlJHG81dG1F0uUwJjhmvLdB44+cg6UQGt5EfRNstDV0LObOwDCU9DMdsYE4K AxnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ukhH1iiiSXOet6r1KeHPOcyBDqXGlGqoY2zWACEw3zE=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=BpVZceG09rGHdAY9USmA0tFhtGeEE0JMwCOKukAnJf/iRaQBrIMfV8KIEGfLyqKAGZ vLpNx1H5cgNi3nzw4XwrZB4srHfH1TiXCwMn7u7xTEUmG4Uuso51lYAlmMNtFkI/1wm6 84g6dtxTTV6TKZk5bg3AgsGuHp0P9427uTFoJyET5HJlryng2OJ/jbHrVhUxUWvpkl2w N+ZNMutJho/Xn9RVOmPtN+ZfaHRWdRs+djMWdS1IOhvmfhc2Gvss7e1tsn2OtBGrSOhi aa0mOUab2n6meLyu44ayyKPi6FCnw85mwwZiaLSvgbKjgUFe6e7YSTfJOmt68jPLS533 QxuQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nc6YSx+5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/bootloader.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index b2be9267516..7cf1f01d225 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -118,9 +118,10 @@ static void bl_gen_i_type(void **ptr, uint8_t opcode, } /* Single instructions */ -static void bl_gen_dsll(void **p, bl_reg rd, bl_reg rt, uint8_t sa) +static void bl_gen_dsll(const CPUMIPSState *env, void **p, + bl_reg rd, bl_reg rt, uint8_t sa) { - if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { + if (bootcpu_supports_isa(env, ISA_MIPS3)) { bl_gen_r_type(p, 0, 0, rt, rd, sa, 0x38); } else { g_assert_not_reached(); /* unsupported */ @@ -227,9 +228,9 @@ static void bl_gen_li(void **p, bl_reg rt, uint32_t imm) static void bl_gen_dli(void **p, bl_reg rt, uint64_t imm) { bl_gen_li(p, rt, extract64(imm, 32, 32)); - bl_gen_dsll(p, rt, rt, 16); + bl_gen_dsll(&MIPS_CPU(first_cpu)->env, p, rt, rt, 16); bl_gen_ori(p, rt, rt, extract64(imm, 16, 16)); - bl_gen_dsll(p, rt, rt, 16); + bl_gen_dsll(&MIPS_CPU(first_cpu)->env, p, rt, rt, 16); bl_gen_ori(p, rt, rt, extract64(imm, 0, 16)); } From patchwork Mon Jan 13 00:47:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856915 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1214354wrc; Sun, 12 Jan 2025 16:54:41 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVYoLmNRVum7+UKperYPLaWxstRQWzmXSXLJMxyxNYBHb7vh0hf1QauVQX1OOw72d+9EHQ5Mw==@linaro.org X-Google-Smtp-Source: AGHT+IGzZxejZqy67FnuxE/txMYiSpHlodWG6ai+K9ECUCK/W5/+wxND0Oy9pne3V7QOwMIA4PWI X-Received: by 2002:a05:620a:2892:b0:7b6:6d99:ecfc with SMTP id af79cd13be357-7bcd9612ea9mr2295189685a.0.1736729681313; Sun, 12 Jan 2025 16:54:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729681; cv=none; d=google.com; s=arc-20240605; b=KYMYhvRo5O9Qrw7FPzGDKqOifTd21tXhDw4NqXgvPSs8zKOwXSmtCvkGuTZvH+STJF +ilUOoGktVi469i5m8RsDV+fNl+wuMj4Iz66aOGb2uobblnpGDAMdvj/THTjUDznIoPA ymgdjKsbB7Gpcv8swqgjEvYpd/Q8Tp3KARMQypKdB4DADOgKSGgQpxH/M26VpU8Qzwad /Istgdqghsm38FiDRi1yFNghveH20GcbUIpac+6N/cFHPLY2taeTbMk2bLZ6FVYtAm6G RUhVbqN7PMnfn/84m15zyTA/H3abLMtLtQjvmAkj8zVY7rfRZGvmsNfO/Ay2sZ1/H+ly CpFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=qoCXQwiSZHcZTwdJr/g1JL9VhUwkxRIR68QUTMcGTac=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=ay8vOqO9RpwNZVL3qQYP1byutQkEYyUHQ0UYbJ3ovkBdOHibIL8P3UzU+i9AtOqncx 8s9sbj/LiJXIVUctDxE8QPlvit+hFv23XQ68APhD+HO0Lx4qtsUZjX36yDwuJsjap755 dPDBW/RRWAM15bRjob23zyE0HTMY2z2VDUv8p1oCQnlMiiZr+PP1eQgUOSXiTrzIbtCs z8903IGM67VZ8GvXPIBR3tP4LuBvk9MvzUoHrxB6mR0YIROQoa9/veE4S8b7bfAmM8mv NCrOMIWO8qD/4xK38zHl01ySYOJMcKNo3LJQNjyFUFgvmU84wNc8RWNJAvhCuxLuOtBe iBkQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TMILdDMP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a8e37d154sm11057172f8f.10.2025.01.12.16.48.31 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:48:32 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 07/23] hw/mips/bootloader: Propagate CPU env to bl_gen_jalr() Date: Mon, 13 Jan 2025 01:47:32 +0100 Message-ID: <20250113004748.41658-8-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target specific CPU env to the locally declared bl_gen_jalr() function. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/bootloader.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 7cf1f01d225..9f35b23653a 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -128,9 +128,9 @@ static void bl_gen_dsll(const CPUMIPSState *env, void **p, } } -static void bl_gen_jalr(void **p, bl_reg rs) +static void bl_gen_jalr(const CPUMIPSState *env, void **p, bl_reg rs) { - if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_NANOMIPS32)) { + if (bootcpu_supports_isa(env, ISA_NANOMIPS32)) { uint32_t insn = 0; insn = deposit32(insn, 26, 6, 0b010010); /* JALRC */ @@ -247,7 +247,7 @@ static void bl_gen_load_ulong(void **p, bl_reg rt, target_ulong imm) void bl_gen_jump_to(void **p, target_ulong jump_addr) { bl_gen_load_ulong(p, BL_REG_T9, jump_addr); - bl_gen_jalr(p, BL_REG_T9); + bl_gen_jalr(&MIPS_CPU(first_cpu)->env, p, BL_REG_T9); bl_gen_nop(&MIPS_CPU(first_cpu)->env, p); /* delay slot */ } From patchwork Mon Jan 13 00:47:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856903 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1213429wrc; Sun, 12 Jan 2025 16:49:57 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVC7fB/YYgwGZctR+jYSjnO1d5cEyp1wiphjnpWiRNHe8LaJ/+EUJtnSTRycaxpP3/YfjPrzA==@linaro.org X-Google-Smtp-Source: AGHT+IGr1ZE2aVhZfGZbhcGteLp3kNzl6b19NZR6JR5o4rDzf35MHKK5weGyeLE0LSj5KYtk1mEC X-Received: by 2002:ac8:4644:0:b0:466:8e3a:e6cb with SMTP id d75a77b69052e-46c7102c9f3mr222282531cf.29.1736729397439; Sun, 12 Jan 2025 16:49:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729397; cv=none; d=google.com; s=arc-20240605; b=cUhw4RnECSrkolzdPlqY5AVjSh88Sl+yIVIVTaCjs3ltQqFJl2ru3ZxitxSi/iXFTL bPaqiH0jLV9D2t+99iM/Yv4UJgxEcWOoem7Iny5chj8N7k04oofUouKrFIg1GUDV44R/ Hl44Yb8fEi12rCQLGJkxlSYsaR2C6FBJwVo43UIV1iRNUS7Y/Bces3YuK2FL9Ef9Dv5m 78abE2HQIs5y8fS6sqCfatHfdqm3KvDkj74nVqBNFVasjuBhfoE/TwmfrN7gQ1WR/soz HPq7iwc/dyfQk5sb0BxJ2awUyFYphODgLeXu10EuUjyO01q5RC8i+OzYW4zezdFAllGM ZPkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=v6Clg/N9h/uY9sG75mKmNN87S01issR08U/shM6098E=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=aeyYyDAKMIFHxAoPfrfeUDyAtBGwYo1sPom2Gevqia/Mq5LD3+bJhiFY563TDHfQmI B7nLdpO6j9IMESApXdTZz1SUyfwZYQsOzovAi401tEA0ReNX/x7DLSWKQR+8Tz/+SNSq QKPFgvLs6YyLNm6KawRG7Gwvm7qKcql7khooX3dP0FQbYGyZcDFrgIz+BXn6xiHShxxc zvcWY7fD18bDVM3mS4ZQ1Y9dMB2pKIeeFn0w04EZPVl6xi80Zey2oOwOdrBTrrfiJF0l NtPDohVvQo2fRnMTfqykK5lD5KOwwX6CHbX2klDu85cpRa45pzYy/rfQUxOiblLeL2Nx HJ7g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="qHxs/dOe"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e9d26a7bsm130244375e9.0.2025.01.12.16.48.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:48:38 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 08/23] hw/mips/bootloader: Propagate CPU env to bl_gen_sw() Date: Mon, 13 Jan 2025 01:47:33 +0100 Message-ID: <20250113004748.41658-9-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target specific CPU env to the locally declared bl_gen_sw() function. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/bootloader.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 9f35b23653a..30e6422d331 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -195,9 +195,10 @@ static void bl_gen_sw_nm(void **ptr, bl_reg rt, uint8_t rs, uint16_t ofs12) st_nm32_p(ptr, insn); } -static void bl_gen_sw(void **p, bl_reg rt, uint8_t base, uint16_t offset) +static void bl_gen_sw(const CPUMIPSState *env, void **p, + bl_reg rt, uint8_t base, uint16_t offset) { - if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_NANOMIPS32)) { + if (bootcpu_supports_isa(env, ISA_NANOMIPS32)) { bl_gen_sw_nm(p, rt, base, offset); } else { bl_gen_i_type(p, 0x2b, base, rt, offset); @@ -285,7 +286,7 @@ void bl_gen_write_ulong(void **p, target_ulong addr, target_ulong val) if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { bl_gen_sd(p, BL_REG_K0, BL_REG_K1, 0x0); } else { - bl_gen_sw(p, BL_REG_K0, BL_REG_K1, 0x0); + bl_gen_sw(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); } } @@ -293,7 +294,7 @@ void bl_gen_write_u32(void **p, target_ulong addr, uint32_t val) { bl_gen_li(p, BL_REG_K0, val); bl_gen_load_ulong(p, BL_REG_K1, addr); - bl_gen_sw(p, BL_REG_K0, BL_REG_K1, 0x0); + bl_gen_sw(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); } void bl_gen_write_u64(void **p, target_ulong addr, uint64_t val) From patchwork Mon Jan 13 00:47:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856912 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1214064wrc; Sun, 12 Jan 2025 16:53:17 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUJ6sUa7awxKiG9LvgbL7Wm/5EQGpBX8MqgarygxHbzqbI5MLbwsLKEUKVtoK96H1wEs8WZtQ==@linaro.org X-Google-Smtp-Source: AGHT+IEcI2ook+0C28DmEU9Nc+KViHkqAgvLidTKKmaD5bbH94sQCnpIcMgC3yDYUnmezxcmIK05 X-Received: by 2002:a05:620a:45a6:b0:7b6:e207:c8a2 with SMTP id af79cd13be357-7bcd97d5673mr3278877985a.55.1736729596901; Sun, 12 Jan 2025 16:53:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729596; cv=none; d=google.com; s=arc-20240605; b=ctsQfZikcOtwCR03EuJETXQFlzpK9kxoTmKkc3w3uIgv0DJsn1+MC5xM5tVW8tI458 ACMfs+I9hp1DjnO931ilX+rOg9ZnANh082dSVcadxo7psCGu40W+0YXksDm+I8saexQV Lp+z5rRkMUauq/yIBvlNAbPW5VoGfeytkg8myaX0fdz5ijyo2fugjME1lEZbQGnspNi3 ysg3x0lt5fsjE1BpXkYZw1RqqIzHzrYjNdFeW2FmBGlpk+7jNvIgrUVeB0pPxOw0Nitr CZMUX/7W7GAy7Y2I/3oeQVdeEPsPQRRahiwGacAGa+0ZMAAeH8N199Gsjyd5eGd2ptXg riaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Ff+NOtJyQbo2r4PRwy1cOlEv+D/dc6it23d0jmpFRLY=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=gzKkcTc0NQwcToE37rbitf4C4Z9wUmxzmkhlBSgKaPq3NhBW2TU9T4ClJhB9fYqYnR nnRviZL+OUIu7tRwudJ2kCZ63qCF48usTT7x8WWuYYsKGtY2n7ddC1ThIBN4ZoSHlGmA T2Lx0vhBL1Kgx3ChhJ1gAo+KX14a9/ucPV/aKyUHRKUyLW2z37yM0QhmKK6jFjyQo+Ij YrHqcsH1gJsu/qqMzlwW9xoLSSrYuYa2qD/I6vS9E/nBfTCZhsSyFVf3pEJSBT62YKXq Pk0A8tAvBYhVXQVIuMSh1H2ATwIvoJcKh3WtNMk2y8GIKghwkc0Y7gZ0raN3PyRdk3kR iazA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ANnQ192c; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a8e38428bsm10836435f8f.37.2025.01.12.16.48.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:48:43 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 09/23] hw/mips/bootloader: Propagate CPU env to bl_gen_sd() Date: Mon, 13 Jan 2025 01:47:34 +0100 Message-ID: <20250113004748.41658-10-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target specific CPU env to the locally declared bl_gen_sd() function. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/bootloader.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 30e6422d331..34c3043a563 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -205,9 +205,10 @@ static void bl_gen_sw(const CPUMIPSState *env, void **p, } } -static void bl_gen_sd(void **p, bl_reg rt, uint8_t base, uint16_t offset) +static void bl_gen_sd(const CPUMIPSState *env, void **p, + bl_reg rt, uint8_t base, uint16_t offset) { - if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { + if (bootcpu_supports_isa(env, ISA_MIPS3)) { bl_gen_i_type(p, 0x3f, base, rt, offset); } else { g_assert_not_reached(); /* unsupported */ @@ -284,7 +285,7 @@ void bl_gen_write_ulong(void **p, target_ulong addr, target_ulong val) bl_gen_load_ulong(p, BL_REG_K0, val); bl_gen_load_ulong(p, BL_REG_K1, addr); if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { - bl_gen_sd(p, BL_REG_K0, BL_REG_K1, 0x0); + bl_gen_sd(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); } else { bl_gen_sw(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); } @@ -301,5 +302,5 @@ void bl_gen_write_u64(void **p, target_ulong addr, uint64_t val) { bl_gen_dli(p, BL_REG_K0, val); bl_gen_load_ulong(p, BL_REG_K1, addr); - bl_gen_sd(p, BL_REG_K0, BL_REG_K1, 0x0); + bl_gen_sd(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); } From patchwork Mon Jan 13 00:47:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856913 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1214077wrc; Sun, 12 Jan 2025 16:53:19 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXumOY06y3TlxAgzsKLmtmA7IHfUeoBZmkcgEgehIWr5Lq/611W+B8hH+zO/uEbgsD6Y2ssmA==@linaro.org X-Google-Smtp-Source: AGHT+IHm8eLamrnxnYk/Z0E6J42hW/99bKFPWZTHtVAFVurRrtzcemDixCCCbHxjTUp3c5ibegeq X-Received: by 2002:a05:6214:4304:b0:6d8:f0d2:f472 with SMTP id 6a1803df08f44-6dfa3a13bb8mr246487336d6.10.1736729599557; Sun, 12 Jan 2025 16:53:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729599; cv=none; d=google.com; s=arc-20240605; b=k+HDKXC1OdaP1/Xj5Q+rbsut4y3BfJXWakJ9jiFlD+MhLfXqqQmHfw2mZxLA6LiZjo S+H9T1rz6hIAVcFcAxRi+4UD1hCtflThYEaUyxKH8LF3SwbH6zCFzppe+xjRyZ+zuhlF OJOhIusTSYxj+HGHq/k9V2AnaVTwmcg2buCw/Kv2p3hniYn/viwrSui9xjiMcS6PikTq R+8AQyPdA5c2/8ySqoCkHfBAoVzqFzIAPKWlQObSpg7hiQZpSLvALlBtbo9HUGKCrMXa 5ch+WZCRvUfMF4wGuwaV03MoSplyzcdTJM/Cpg0/JrLqdc+6AjSvHMwCFgs0OgxHG4ky j9lA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=v8B+FcmJQl4fLmWFGHFzifMbuw+jhH3ih5yJZ9fzjY8=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=ervu510aeuq8h0VKquSaRyeF+FLt2Jz0qFKunIlbq5wWnA9xtUfNP6Ptt7wz8h7GEg NQS/rR+SlKjhKCkTJW3rsqQx6DSO0s5anTUOwFWg9Yaup8G6NBosp4CUK1f0wyxPLnd4 2TCytnYZx0MXZwvnAhtImp3BQDxfYzbfBY5ZMVt69rFwDKO9gqr8fazGjr1CSZF3PJaX Rf9S8xsmeRNbV1SVTm2sZL/7STTyKxz08X/GCQd2GYTOisI0ohBX2B1ISLCL7Ll+pUm6 f2EBYBQj4FqYw29D4n/umFZkHO5rXvbJYzEhD6mH0lOIBGg44Os8w4l0o9TAbvIwQTqV Slzw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YxbSsF2D; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2dc0babsm160519945e9.14.2025.01.12.16.48.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:48:48 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 10/23] hw/mips/bootloader: Propagate CPU env to bl_gen_li() Date: Mon, 13 Jan 2025 01:47:35 +0100 Message-ID: <20250113004748.41658-11-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target specific CPU env to the locally declared bl_gen_li() function. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/bootloader.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 34c3043a563..32811e48cdd 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -216,9 +216,10 @@ static void bl_gen_sd(const CPUMIPSState *env, void **p, } /* Pseudo instructions */ -static void bl_gen_li(void **p, bl_reg rt, uint32_t imm) +static void bl_gen_li(const CPUMIPSState *env, void **p, + bl_reg rt, uint32_t imm) { - if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_NANOMIPS32)) { + if (bootcpu_supports_isa(env, ISA_NANOMIPS32)) { bl_gen_lui_nm(p, rt, extract32(imm, 12, 20)); bl_gen_ori_nm(p, rt, rt, extract32(imm, 0, 12)); } else { @@ -229,7 +230,7 @@ static void bl_gen_li(void **p, bl_reg rt, uint32_t imm) static void bl_gen_dli(void **p, bl_reg rt, uint64_t imm) { - bl_gen_li(p, rt, extract64(imm, 32, 32)); + bl_gen_li(&MIPS_CPU(first_cpu)->env, p, rt, extract64(imm, 32, 32)); bl_gen_dsll(&MIPS_CPU(first_cpu)->env, p, rt, rt, 16); bl_gen_ori(p, rt, rt, extract64(imm, 16, 16)); bl_gen_dsll(&MIPS_CPU(first_cpu)->env, p, rt, rt, 16); @@ -241,7 +242,7 @@ static void bl_gen_load_ulong(void **p, bl_reg rt, target_ulong imm) if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { bl_gen_dli(p, rt, imm); /* 64bit */ } else { - bl_gen_li(p, rt, imm); /* 32bit */ + bl_gen_li(&MIPS_CPU(first_cpu)->env, p, rt, imm); /* 32bit */ } } @@ -293,7 +294,7 @@ void bl_gen_write_ulong(void **p, target_ulong addr, target_ulong val) void bl_gen_write_u32(void **p, target_ulong addr, uint32_t val) { - bl_gen_li(p, BL_REG_K0, val); + bl_gen_li(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, val); bl_gen_load_ulong(p, BL_REG_K1, addr); bl_gen_sw(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); } From patchwork Mon Jan 13 00:47:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856906 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1213942wrc; Sun, 12 Jan 2025 16:52:38 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVu1juWLCMhb2AmfnRsMwY/KwLBRnQjAaTN3U6QwLOvu30RrQpuUy916XnhuPObY65uBi+67w==@linaro.org X-Google-Smtp-Source: AGHT+IH5getuo3vaVtegnV2wwni9+R4Ocd9eHvHL7lVdDSxfSqa9IqXwmC1iPTraWoHUqnTcdnqO X-Received: by 2002:a05:6214:300e:b0:6d8:95c9:af2b with SMTP id 6a1803df08f44-6df9b2adae6mr293239016d6.35.1736729558135; Sun, 12 Jan 2025 16:52:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729558; cv=none; d=google.com; s=arc-20240605; b=B9lMtGzh8+3bqSN03WOl3TWyEcSR0DQGQXuBbD0LTj5WEL6N4+RxE4O5QtrVXcQEPs asggETIVw1vYQLQAd/cC6EtS/NxRGABf8FQJfKtjgZvsneLWoUH78GGPaaKccApQtwA/ tUqQX0eXkFHJIIUP29FryFBlRZ4X20F2e8BPAbZiYKJ7zRZdmEkKdeB1Rw0893R2BwkK zmkKZjlqwEsoenEGkvJLQgIFO5W7fAJjM9ISVds/BQqLWCHDiDD5RUFFUYk2axf5dAL2 xoMwngiBr3pBFqLAPDXFZSWxCzi5uCvjVa2e/M5IlAmSaEz9r3AqcBGeTsTlyQat31QP Pybw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=qjcLIqHjS0KwZ5g9pteWJiKRnJ/jUR3zkxQLD75pUx0=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=DrzE1W2Gy1YI5IsjL9W5e8cI8M+vNa2vE5j8Zav8ZIiEHqnCVijqj1PjaMP/EG3t2Z mYPgxUl6m4edR9cIb/y5ExDZCkeSiMSBI0FHspEtyOjYX8TtOps9NjcHP8bR/w/bAzDu Ve0C/h9Of92vQaKFnpHZ1zbAxnsiOORSAMYwxzCxjcAt/i0/3Qyfk6v/p75h796W5cWL upvt+ULBGFZQky2FFf789frf/lk1W9b0k23ckCcInVg54YTA2URv6PWbkDwUqvRjVgqA 1l1I0ss6tT42pqSrQ7G3OVFDnQnZ/gK3Sr9Vpno8YdBbhPsNcKuVoeDxXZeXW1+3HzMX bTnA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=o0LWr3Jg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a8e38bd0dsm10735862f8f.45.2025.01.12.16.48.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:48:54 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 11/23] hw/mips/bootloader: Propagate CPU env to bl_gen_dli() Date: Mon, 13 Jan 2025 01:47:36 +0100 Message-ID: <20250113004748.41658-12-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target specific CPU env to the locally declared bl_gen_dli() function. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/bootloader.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 32811e48cdd..95ee59f33c9 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -228,19 +228,20 @@ static void bl_gen_li(const CPUMIPSState *env, void **p, } } -static void bl_gen_dli(void **p, bl_reg rt, uint64_t imm) +static void bl_gen_dli(const CPUMIPSState *env, void **p, + bl_reg rt, uint64_t imm) { - bl_gen_li(&MIPS_CPU(first_cpu)->env, p, rt, extract64(imm, 32, 32)); - bl_gen_dsll(&MIPS_CPU(first_cpu)->env, p, rt, rt, 16); + bl_gen_li(env, p, rt, extract64(imm, 32, 32)); + bl_gen_dsll(env, p, rt, rt, 16); bl_gen_ori(p, rt, rt, extract64(imm, 16, 16)); - bl_gen_dsll(&MIPS_CPU(first_cpu)->env, p, rt, rt, 16); + bl_gen_dsll(env, p, rt, rt, 16); bl_gen_ori(p, rt, rt, extract64(imm, 0, 16)); } static void bl_gen_load_ulong(void **p, bl_reg rt, target_ulong imm) { if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { - bl_gen_dli(p, rt, imm); /* 64bit */ + bl_gen_dli(&MIPS_CPU(first_cpu)->env, p, rt, imm); /* 64bit */ } else { bl_gen_li(&MIPS_CPU(first_cpu)->env, p, rt, imm); /* 32bit */ } @@ -301,7 +302,7 @@ void bl_gen_write_u32(void **p, target_ulong addr, uint32_t val) void bl_gen_write_u64(void **p, target_ulong addr, uint64_t val) { - bl_gen_dli(p, BL_REG_K0, val); + bl_gen_dli(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, val); bl_gen_load_ulong(p, BL_REG_K1, addr); bl_gen_sd(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); } From patchwork Mon Jan 13 00:47:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856904 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1213516wrc; Sun, 12 Jan 2025 16:50:18 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUJQeI9V1yedlnJ/JCH1sdvAxRwwFrjrwBxjqik6xHH5Ick3cVvseMGOieM+m7/ia4lfAYukw==@linaro.org X-Google-Smtp-Source: AGHT+IET1gOkljLfsrQydlVcB66DrAd86RbvIC5bZjBSgNFJtdr5RYf6z47iwREF2jiXJ00TAwNF X-Received: by 2002:a05:622a:1911:b0:466:9861:3e9c with SMTP id d75a77b69052e-46c71030790mr284530201cf.31.1736729418587; Sun, 12 Jan 2025 16:50:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729418; cv=none; d=google.com; s=arc-20240605; b=aV+32gKQU0fgHQUz327fUnbprvwYcDvWi6dtYdRsMUjjEZSx5yySojW/wKEjrPWhEL UgpnfjY1nciWS9HRXHwNVCb46Q75OuNdUzx3RJtLz2VPS8/D/Qu9d0vEYJUConh1j0jE wnqLKPqlADX410TMtcbEMOoyu6h0M+l/TsgBAw1M8d0WUHOGQOO+tP2mEaQ799sJR6/a uwtOJaM06K/xD5/z5IqDAWhGs8dW2o8itkg2khyeD/gXdJ5MQO+qxfa5AUk3xZwupVX1 Rkh36F84vVSfpz7PIgNKEiWE4nHmzPtmRhdArm5SkVUqP8CS8/TJr+Wika7HiznaOgNh D95g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=hxBO2LM7TvF6Z9ULUfgrFZWB9JLE9hlbq/zhhRtO/AA=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=dHeQR2CmtQnBbz8bQps+WKv2YrGvznTQ+qgdVtogngDTqgLq29nY1GYzX58n5Fex5D G2GPtJZ3QbSUM7DtZ9UZkzPgoOI8nsYBNLCi8CGXTz6AVxBDgcdNP7R9/AU57ZLgk/l7 J+YkU2fQ9qJVGurdxby1fQuXRIHhcPIG7mlZBlqloy59om1b/wkEvQ5pLZxfphoF73dp a+qV5hhW8RqaoHW2zWJgcglIe9zIgpk16f5ioFHeh5xlNUNaYBAAEnXe8RFyGYH6Cej0 VTuqpKAjPDwfPdCaICTMUfvj/vyVLExUYt3muW00A389lI216ADHnGYUyWrKNSd4k/qB HqdQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KeEnAnvT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2dc08eesm162988605e9.10.2025.01.12.16.48.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:00 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 12/23] hw/mips/bootloader: Propagate CPU env to bl_gen_load_ulong() Date: Mon, 13 Jan 2025 01:47:37 +0100 Message-ID: <20250113004748.41658-13-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target specific CPU env to the locally declared bl_gen_load_ulong() function. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/bootloader.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 95ee59f33c9..e29eb5e92f3 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -238,19 +238,20 @@ static void bl_gen_dli(const CPUMIPSState *env, void **p, bl_gen_ori(p, rt, rt, extract64(imm, 0, 16)); } -static void bl_gen_load_ulong(void **p, bl_reg rt, target_ulong imm) +static void bl_gen_load_ulong(const CPUMIPSState *env, void **p, + bl_reg rt, target_ulong imm) { - if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { - bl_gen_dli(&MIPS_CPU(first_cpu)->env, p, rt, imm); /* 64bit */ + if (bootcpu_supports_isa(env, ISA_MIPS3)) { + bl_gen_dli(env, p, rt, imm); /* 64bit */ } else { - bl_gen_li(&MIPS_CPU(first_cpu)->env, p, rt, imm); /* 32bit */ + bl_gen_li(env, p, rt, imm); /* 32bit */ } } /* Helpers */ void bl_gen_jump_to(void **p, target_ulong jump_addr) { - bl_gen_load_ulong(p, BL_REG_T9, jump_addr); + bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_T9, jump_addr); bl_gen_jalr(&MIPS_CPU(first_cpu)->env, p, BL_REG_T9); bl_gen_nop(&MIPS_CPU(first_cpu)->env, p); /* delay slot */ } @@ -264,19 +265,19 @@ void bl_gen_jump_kernel(void **p, target_ulong kernel_addr) { if (set_sp) { - bl_gen_load_ulong(p, BL_REG_SP, sp); + bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_SP, sp); } if (set_a0) { - bl_gen_load_ulong(p, BL_REG_A0, a0); + bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_A0, a0); } if (set_a1) { - bl_gen_load_ulong(p, BL_REG_A1, a1); + bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_A1, a1); } if (set_a2) { - bl_gen_load_ulong(p, BL_REG_A2, a2); + bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_A2, a2); } if (set_a3) { - bl_gen_load_ulong(p, BL_REG_A3, a3); + bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_A3, a3); } bl_gen_jump_to(p, kernel_addr); @@ -284,8 +285,8 @@ void bl_gen_jump_kernel(void **p, void bl_gen_write_ulong(void **p, target_ulong addr, target_ulong val) { - bl_gen_load_ulong(p, BL_REG_K0, val); - bl_gen_load_ulong(p, BL_REG_K1, addr); + bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, val); + bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_K1, addr); if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { bl_gen_sd(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); } else { @@ -296,13 +297,13 @@ void bl_gen_write_ulong(void **p, target_ulong addr, target_ulong val) void bl_gen_write_u32(void **p, target_ulong addr, uint32_t val) { bl_gen_li(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, val); - bl_gen_load_ulong(p, BL_REG_K1, addr); + bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_K1, addr); bl_gen_sw(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); } void bl_gen_write_u64(void **p, target_ulong addr, uint64_t val) { bl_gen_dli(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, val); - bl_gen_load_ulong(p, BL_REG_K1, addr); + bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_K1, addr); bl_gen_sd(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436f04df606sm94008945e9.12.2025.01.12.16.49.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:05 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 13/23] hw/mips/bootloader: Propagate CPU to bl_gen_jump_to() Date: Mon, 13 Jan 2025 01:47:38 +0100 Message-ID: <20250113004748.41658-14-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target agnostic CPU pointer to the publicly declared bl_gen_jump_to() function. Include "target/mips/cpu-qom.h" to get MIPSCPU typedef. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/mips/bootloader.h | 3 ++- hw/mips/bootloader.c | 10 +++++----- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/include/hw/mips/bootloader.h b/include/hw/mips/bootloader.h index c32f6c28356..daa2b92e249 100644 --- a/include/hw/mips/bootloader.h +++ b/include/hw/mips/bootloader.h @@ -10,8 +10,9 @@ #define HW_MIPS_BOOTLOADER_H #include "exec/cpu-defs.h" +#include "target/mips/cpu-qom.h" -void bl_gen_jump_to(void **ptr, target_ulong jump_addr); +void bl_gen_jump_to(const MIPSCPU *cpu, void **ptr, target_ulong jump_addr); void bl_gen_jump_kernel(void **ptr, bool set_sp, target_ulong sp, bool set_a0, target_ulong a0, diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index e29eb5e92f3..6f055228392 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -249,11 +249,11 @@ static void bl_gen_load_ulong(const CPUMIPSState *env, void **p, } /* Helpers */ -void bl_gen_jump_to(void **p, target_ulong jump_addr) +void bl_gen_jump_to(const MIPSCPU *cpu, void **p, target_ulong jump_addr) { - bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_T9, jump_addr); - bl_gen_jalr(&MIPS_CPU(first_cpu)->env, p, BL_REG_T9); - bl_gen_nop(&MIPS_CPU(first_cpu)->env, p); /* delay slot */ + bl_gen_load_ulong(&cpu->env, p, BL_REG_T9, jump_addr); + bl_gen_jalr(&cpu->env, p, BL_REG_T9); + bl_gen_nop(&cpu->env, p); /* delay slot */ } void bl_gen_jump_kernel(void **p, @@ -280,7 +280,7 @@ void bl_gen_jump_kernel(void **p, bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_A3, a3); } - bl_gen_jump_to(p, kernel_addr); + bl_gen_jump_to(MIPS_CPU(first_cpu), p, kernel_addr); } void bl_gen_write_ulong(void **p, target_ulong addr, target_ulong val) From patchwork Mon Jan 13 00:47:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856905 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1213811wrc; Sun, 12 Jan 2025 16:51:52 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXK/Avv7shRAt+oIu3LkOYWZdTg96+GxX7jrst3o8JFn6z3Jd23fUmNfcr6F0JMdq3nrTNCAw==@linaro.org X-Google-Smtp-Source: AGHT+IFQkTwKMlvjgHVym/q7WgODup2mu9st2IL8ga16xk6s/rZNpDWrta3H9IROZXqFQRxbtTzn X-Received: by 2002:a05:622a:15c8:b0:467:67db:ef72 with SMTP id d75a77b69052e-46c71028f78mr335353301cf.27.1736729511835; Sun, 12 Jan 2025 16:51:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729511; cv=none; d=google.com; s=arc-20240605; b=ACcYF4w/7HYLYUnEZkrt1om+opnwf+TseVWuIszCs422hI1CvY1Dqb7D85nlitr90z IIxBT6cTJeCtPLZhQAsWZf37zJf5DzsVFiL6c5hXJ2w1qRN0lIJAO5x695nl8M+QMm2x cRlPYBrisxNAtmtueEalHdZFglufzv+SbNPwbKvuDDmokFmzkaXeGMGFujDN2d0I3VkB rE6LK7kx+wXG0Wf+sJ3qy78tos/Jusll8FDE9nEXYePPDLnkK5BtH7Kbqj3jdVZwnSrY OmvCR7y9YHeVLjI6+3GGZKWgJJoyMWYw+kM4z3B3g94xZOYZAEDa5XeOZv15MHiKKYMw BLMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=zLpUfFvaCy7mLELhl3n8PPeN1TDF+RaDGuZ4JtW2qZE=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=h6rs6iGmJyhigMAv/9KyrROBO2u3aygAQuW92G8jGx2RYjX6lEatzViiIVY6SVeg34 +wkHluMSoK4mr7QFt9Csske2/Uj4yLR0Xl9PplDu7ALTUl3+I9Izz3ZX85ZC8a/kBmOH CV9FAZ1/mdaojsfOUMXF/9j/qtQlDTmVuA2CQupQpTPLSWPhsdIfigzOtPCL4SEtHGUw 5nuo+r0li2LTO55fDvrccn5NoO3aypbpQkx92y6e07G9xPfvW9EyAmX/WduKFOHud9dT QL+Jms4AVBCvjyu2Ed3+lKlM4aFpTWMGLAaFzcOtNq8uepB1nVD0OuJiuvgtu+TeB3Zy hdDw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UvFUxL2h; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e9d8fc51sm127732735e9.7.2025.01.12.16.49.09 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:09 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 14/23] hw/mips/bootloader: Propagate CPU to bl_gen_jump_kernel() Date: Mon, 13 Jan 2025 01:47:39 +0100 Message-ID: <20250113004748.41658-15-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target agnostic CPU pointer to the publicly declared bl_gen_jump_kernel() function. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/mips/bootloader.h | 2 +- hw/mips/bootloader.c | 14 +++++++------- hw/mips/boston.c | 2 +- hw/mips/fuloong2e.c | 2 +- hw/mips/malta.c | 2 +- 5 files changed, 11 insertions(+), 11 deletions(-) diff --git a/include/hw/mips/bootloader.h b/include/hw/mips/bootloader.h index daa2b92e249..6b58eafb8bc 100644 --- a/include/hw/mips/bootloader.h +++ b/include/hw/mips/bootloader.h @@ -13,7 +13,7 @@ #include "target/mips/cpu-qom.h" void bl_gen_jump_to(const MIPSCPU *cpu, void **ptr, target_ulong jump_addr); -void bl_gen_jump_kernel(void **ptr, +void bl_gen_jump_kernel(const MIPSCPU *cpu, void **ptr, bool set_sp, target_ulong sp, bool set_a0, target_ulong a0, bool set_a1, target_ulong a1, diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 6f055228392..9804051ab2d 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -256,7 +256,7 @@ void bl_gen_jump_to(const MIPSCPU *cpu, void **p, target_ulong jump_addr) bl_gen_nop(&cpu->env, p); /* delay slot */ } -void bl_gen_jump_kernel(void **p, +void bl_gen_jump_kernel(const MIPSCPU *cpu, void **p, bool set_sp, target_ulong sp, bool set_a0, target_ulong a0, bool set_a1, target_ulong a1, @@ -265,22 +265,22 @@ void bl_gen_jump_kernel(void **p, target_ulong kernel_addr) { if (set_sp) { - bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_SP, sp); + bl_gen_load_ulong(&cpu->env, p, BL_REG_SP, sp); } if (set_a0) { - bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_A0, a0); + bl_gen_load_ulong(&cpu->env, p, BL_REG_A0, a0); } if (set_a1) { - bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_A1, a1); + bl_gen_load_ulong(&cpu->env, p, BL_REG_A1, a1); } if (set_a2) { - bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_A2, a2); + bl_gen_load_ulong(&cpu->env, p, BL_REG_A2, a2); } if (set_a3) { - bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_A3, a3); + bl_gen_load_ulong(&cpu->env, p, BL_REG_A3, a3); } - bl_gen_jump_to(MIPS_CPU(first_cpu), p, kernel_addr); + bl_gen_jump_to(cpu, p, kernel_addr); } void bl_gen_write_ulong(void **p, target_ulong addr, target_ulong val) diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 63dc654192a..3a06b776fe8 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -352,7 +352,7 @@ static void gen_firmware(void *p, hwaddr kernel_entry, hwaddr fdt_addr) * a2/$6 = 0 * a3/$7 = 0 */ - bl_gen_jump_kernel(&p, + bl_gen_jump_kernel(MIPS_CPU(first_cpu), &p, true, 0, true, (int32_t)-2, true, fdt_addr, true, 0, true, 0, kernel_entry); diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index 16b6a5129e7..b87622ee6e3 100644 --- a/hw/mips/fuloong2e.c +++ b/hw/mips/fuloong2e.c @@ -179,7 +179,7 @@ static void write_bootloader(CPUMIPSState *env, uint8_t *base, /* Second part of the bootloader */ p = (uint32_t *)(base + 0x040); - bl_gen_jump_kernel((void **)&p, + bl_gen_jump_kernel(MIPS_CPU(first_cpu), (void **)&p, true, ENVP_VADDR - 64, true, 2, true, ENVP_VADDR, true, ENVP_VADDR + 8, diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 37be2330eda..fe9e06f48f4 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -678,7 +678,7 @@ static void bl_setup_gt64120_jump_kernel(void **p, uint64_t run_addr, cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0xcfc), tswap32(ldl_be_p(pci_pins_cfg))); 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a8e4b82a4sm10918902f8f.72.2025.01.12.16.49.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:15 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 15/23] hw/mips/bootloader: Propagate CPU to bl_gen_write_ulong() Date: Mon, 13 Jan 2025 01:47:40 +0100 Message-ID: <20250113004748.41658-16-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target agnostic CPU pointer to the publicly declared bl_gen_write_ulong() function. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/mips/bootloader.h | 3 ++- hw/mips/bootloader.c | 13 +++++++------ 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/include/hw/mips/bootloader.h b/include/hw/mips/bootloader.h index 6b58eafb8bc..a7f174e16bc 100644 --- a/include/hw/mips/bootloader.h +++ b/include/hw/mips/bootloader.h @@ -20,7 +20,8 @@ void bl_gen_jump_kernel(const MIPSCPU *cpu, void **ptr, bool set_a2, target_ulong a2, bool set_a3, target_ulong a3, target_ulong kernel_addr); -void bl_gen_write_ulong(void **ptr, target_ulong addr, target_ulong val); +void bl_gen_write_ulong(const MIPSCPU *cpu, void **ptr, + target_ulong addr, target_ulong val); void bl_gen_write_u32(void **ptr, target_ulong addr, uint32_t val); void bl_gen_write_u64(void **ptr, target_ulong addr, uint64_t val); diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 9804051ab2d..c4fd85b9f42 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -283,14 +283,15 @@ void bl_gen_jump_kernel(const MIPSCPU *cpu, void **p, bl_gen_jump_to(cpu, p, kernel_addr); } -void bl_gen_write_ulong(void **p, target_ulong addr, target_ulong val) +void bl_gen_write_ulong(const MIPSCPU *cpu, void **p, + target_ulong addr, target_ulong val) { - bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, val); - bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_K1, addr); - if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) { - bl_gen_sd(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); + bl_gen_load_ulong(&cpu->env, p, BL_REG_K0, val); + bl_gen_load_ulong(&cpu->env, p, BL_REG_K1, addr); + if (bootcpu_supports_isa(&cpu->env, ISA_MIPS3)) { + bl_gen_sd(&cpu->env, p, BL_REG_K0, BL_REG_K1, 0x0); } else { - bl_gen_sw(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); + bl_gen_sw(&cpu->env, p, BL_REG_K0, BL_REG_K1, 0x0); } } From patchwork Mon Jan 13 00:47:41 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856917 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1214365wrc; Sun, 12 Jan 2025 16:54:45 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCU3Da2cYMvY8rRQhQKd9+wa3znb0Kos9+qnTMrHXxhQUwShZHUXTjHqz4RgQVUctkPPyQEgNw==@linaro.org X-Google-Smtp-Source: AGHT+IHFLzFsLv4NYXXdcQx82jOTcj3P0mmIomg1I/S61SPShfVj1ZNaYmMkpAe5JqRkqlac7eGi X-Received: by 2002:ad4:5ca1:0:b0:6d8:a69c:875e with SMTP id 6a1803df08f44-6df9b2c6af2mr291988476d6.42.1736729684940; Sun, 12 Jan 2025 16:54:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729684; cv=none; d=google.com; s=arc-20240605; b=RZw0qKw8ujcZGlJi6y0XOlQ8nCHPNI9oFqogbfTZfmYcrA6bchqZC1MQMKH9TIPBmY NRAWaVHnsPNAVoYgoF1wLdr6xqUp9Cnsx3RcQmcf4KIdGIFisYn60hcAfaGEE34X9W2J NuChLtYk6BwKLu7utckvqqIWtjSzRP/EvYUC3N8CxKmglLaAitL9sHBJkTcYZMnklTeJ UanQG5HjWC8BxWHfR86dZGHfvMN6GDHd0oJRs5Y2TlJMZ69utc596XvQr4zwrhX3kR2D SnsNN9XqnGYTXU3F4SRUTdfRwI2oCUq1/aCIIid+anpKpsWa/4NiPWVgQzOTOW1FdaEl Xdfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=DnTQGGFB/yJvM735W+46gpi1tDgppAHE7XXXP07EEYQ=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=RHwOnLh/gC+NflA15DPui+iY4Cru8SiD+W3SkKMTz11mMQJXGOsLigvJP/clpqFhPL bnpckXxmXa6wGepfmH0dGCzRj1XBircXmDVHHHkCOLQYJta+UrcDz+UvF39PVxAcmlDZ nFbigdLxYOE3KmN3hzi4aYxCP1tR1EjKu1QkgQBmcMiMnBbRxdtPHGUVAQEWlSHA5K1F +ksxzHeDk5QYVf5F+0DrsfL7wfSmZ/QPPVko8w4D7iwAO2QcmsdO/W/rMzMuMBAPUtYT q3kFDfYownL+zkS1S/HiTaU6kMSyxtd7sddoud1g/69EtlX+RrTIuo0SatuYzGuacCBt kD7A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mWH1Fht0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a8e4c1b44sm10901970f8f.90.2025.01.12.16.49.20 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:21 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 16/23] hw/mips/bootloader: Propagate CPU to bl_gen_write_u32() Date: Mon, 13 Jan 2025 01:47:41 +0100 Message-ID: <20250113004748.41658-17-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target agnostic CPU pointer to the publicly declared bl_gen_write_u32() function. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/mips/bootloader.h | 3 ++- hw/mips/bootloader.c | 9 +++++---- hw/mips/malta.c | 18 +++++++++--------- 3 files changed, 16 insertions(+), 14 deletions(-) diff --git a/include/hw/mips/bootloader.h b/include/hw/mips/bootloader.h index a7f174e16bc..cc2ffe3ab2c 100644 --- a/include/hw/mips/bootloader.h +++ b/include/hw/mips/bootloader.h @@ -22,7 +22,8 @@ void bl_gen_jump_kernel(const MIPSCPU *cpu, void **ptr, target_ulong kernel_addr); void bl_gen_write_ulong(const MIPSCPU *cpu, void **ptr, target_ulong addr, target_ulong val); -void bl_gen_write_u32(void **ptr, target_ulong addr, uint32_t val); +void bl_gen_write_u32(const MIPSCPU *cpu, void **ptr, + target_ulong addr, uint32_t val); void bl_gen_write_u64(void **ptr, target_ulong addr, uint64_t val); #endif diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index c4fd85b9f42..6f0222faf48 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -295,11 +295,12 @@ void bl_gen_write_ulong(const MIPSCPU *cpu, void **p, } } -void bl_gen_write_u32(void **p, target_ulong addr, uint32_t val) +void bl_gen_write_u32(const MIPSCPU *cpu, void **p, + target_ulong addr, uint32_t val) { - bl_gen_li(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, val); - bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_K1, addr); - bl_gen_sw(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); + bl_gen_li(&cpu->env, p, BL_REG_K0, val); + bl_gen_load_ulong(&cpu->env, p, BL_REG_K1, addr); + bl_gen_sw(&cpu->env, p, BL_REG_K0, BL_REG_K1, 0x0); } void bl_gen_write_u64(void **p, target_ulong addr, uint64_t val) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index fe9e06f48f4..5ccff2cb0c1 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -636,29 +636,29 @@ static void bl_setup_gt64120_jump_kernel(void **p, uint64_t run_addr, /* setup MEM-to-PCI0 mapping as done by YAMON */ /* move GT64120 registers from 0x14000000 to 0x1be00000 */ - bl_gen_write_u32(p, /* GT_ISD */ + bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_ISD */ cpu_mips_phys_to_kseg1(NULL, 0x14000000 + 0x68), cpu_to_gt32(0x1be00000 << 3)); /* setup PCI0 io window to 0x18000000-0x181fffff */ - bl_gen_write_u32(p, /* GT_PCI0IOLD */ + bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0IOLD */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x48), cpu_to_gt32(0x18000000 << 3)); - bl_gen_write_u32(p, /* GT_PCI0IOHD */ + bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0IOHD */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x50), cpu_to_gt32(0x08000000 << 3)); /* setup PCI0 mem windows */ - bl_gen_write_u32(p, /* GT_PCI0M0LD */ + bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0M0LD */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x58), cpu_to_gt32(0x10000000 << 3)); - bl_gen_write_u32(p, /* GT_PCI0M0HD */ + bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0M0HD */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x60), cpu_to_gt32(0x07e00000 << 3)); - bl_gen_write_u32(p, /* GT_PCI0M1LD */ + bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0M1LD */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x80), cpu_to_gt32(0x18200000 << 3)); - bl_gen_write_u32(p, /* GT_PCI0M1HD */ + bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0M1HD */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x88), cpu_to_gt32(0x0bc00000 << 3)); @@ -669,12 +669,12 @@ static void bl_setup_gt64120_jump_kernel(void **p, uint64_t run_addr, * Load the PIIX IRQC[A:D] routing config address, then * write routing configuration to the config data register. */ - bl_gen_write_u32(p, /* GT_PCI0_CFGADDR */ + bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0_CFGADDR */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0xcf8), tswap32((1 << 31) /* ConfigEn */ | PCI_BUILD_BDF(0, PIIX4_PCI_DEVFN) << 8 | PIIX_PIRQCA)); - bl_gen_write_u32(p, /* GT_PCI0_CFGDATA */ + bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0_CFGDATA */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0xcfc), tswap32(ldl_be_p(pci_pins_cfg))); From patchwork Mon Jan 13 00:47:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856910 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1213982wrc; Sun, 12 Jan 2025 16:52:52 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXPi1UMJS6MSaP/zNessqWsXgLXHBrXPNB/7/jenbnJZ5PGslBhmWITiBQFPJCXe8FzoDJJqA==@linaro.org X-Google-Smtp-Source: AGHT+IE7PXnPtMXOwOpU6gwaUZ4lIpPW+Wu9LOC9gVExOBisoRfurj43zwn2SBxuV0trJs27le0d X-Received: by 2002:a05:620a:d87:b0:7b6:d632:37cf with SMTP id af79cd13be357-7bcd9729affmr2768681385a.3.1736729572659; Sun, 12 Jan 2025 16:52:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729572; cv=none; d=google.com; s=arc-20240605; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a8e38325esm10765264f8f.27.2025.01.12.16.49.26 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:27 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 17/23] hw/mips/bootloader: Propagate CPU to bl_gen_write_u64() Date: Mon, 13 Jan 2025 01:47:42 +0100 Message-ID: <20250113004748.41658-18-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate the target agnostic CPU pointer to the publicly declared bl_gen_write_u64() function. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/mips/bootloader.h | 3 ++- hw/mips/bootloader.c | 9 +++++---- hw/mips/boston.c | 6 +++--- 3 files changed, 10 insertions(+), 8 deletions(-) diff --git a/include/hw/mips/bootloader.h b/include/hw/mips/bootloader.h index cc2ffe3ab2c..946580f6f5c 100644 --- a/include/hw/mips/bootloader.h +++ b/include/hw/mips/bootloader.h @@ -24,6 +24,7 @@ void bl_gen_write_ulong(const MIPSCPU *cpu, void **ptr, target_ulong addr, target_ulong val); void bl_gen_write_u32(const MIPSCPU *cpu, void **ptr, target_ulong addr, uint32_t val); -void bl_gen_write_u64(void **ptr, target_ulong addr, uint64_t val); +void bl_gen_write_u64(const MIPSCPU *cpu, void **ptr, + target_ulong addr, uint64_t val); #endif diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c index 6f0222faf48..c5bad03b528 100644 --- a/hw/mips/bootloader.c +++ b/hw/mips/bootloader.c @@ -303,9 +303,10 @@ void bl_gen_write_u32(const MIPSCPU *cpu, void **p, bl_gen_sw(&cpu->env, p, BL_REG_K0, BL_REG_K1, 0x0); } -void bl_gen_write_u64(void **p, target_ulong addr, uint64_t val) +void bl_gen_write_u64(const MIPSCPU *cpu, void **p, + target_ulong addr, uint64_t val) { - bl_gen_dli(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, val); - bl_gen_load_ulong(&MIPS_CPU(first_cpu)->env, p, BL_REG_K1, addr); - bl_gen_sd(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0); + bl_gen_dli(&cpu->env, p, BL_REG_K0, val); + bl_gen_load_ulong(&cpu->env, p, BL_REG_K1, addr); + bl_gen_sd(&cpu->env, p, BL_REG_K0, BL_REG_K1, 0x0); } diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 3a06b776fe8..09c4dfade12 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -329,19 +329,19 @@ static void gen_firmware(void *p, hwaddr kernel_entry, hwaddr fdt_addr) /* Move CM GCRs */ regaddr = cpu_mips_phys_to_kseg1(NULL, GCR_BASE_ADDR + GCR_BASE_OFS), - bl_gen_write_u64(&p, regaddr, + bl_gen_write_u64(MIPS_CPU(first_cpu), &p, regaddr, boston_memmap[BOSTON_CM].base); /* Move & enable GIC GCRs */ regaddr = cpu_mips_phys_to_kseg1(NULL, boston_memmap[BOSTON_CM].base + GCR_GIC_BASE_OFS), - bl_gen_write_u64(&p, regaddr, + bl_gen_write_u64(MIPS_CPU(first_cpu), &p, regaddr, boston_memmap[BOSTON_GIC].base | GCR_GIC_BASE_GICEN_MSK); /* Move & enable CPC GCRs */ regaddr = cpu_mips_phys_to_kseg1(NULL, boston_memmap[BOSTON_CM].base + GCR_CPC_BASE_OFS), - bl_gen_write_u64(&p, regaddr, + bl_gen_write_u64(MIPS_CPU(first_cpu), &p, regaddr, boston_memmap[BOSTON_CPC].base | GCR_CPC_BASE_CPCEN_MSK); /* From patchwork Mon Jan 13 00:47:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856908 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1213972wrc; Sun, 12 Jan 2025 16:52:49 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUrYsif0NaSPTXeqG8s1lOpMTq16cUZ+9LP75NY6qWain9UZJEZQB3XFdxZi5DrjNeN698F4A==@linaro.org X-Google-Smtp-Source: AGHT+IEFlKnJW3uTfEf+qwcogklb7/GwA30gQj5g+kzas+7thhQu6VAd0SzG0bK3MiCIsJFPKnVm X-Received: by 2002:ac8:7d8f:0:b0:466:9197:b4fb with SMTP id d75a77b69052e-46c7109e81emr316902291cf.47.1736729568950; Sun, 12 Jan 2025 16:52:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729568; cv=none; d=google.com; s=arc-20240605; b=dvIknmt8ahKH3CvQUOxQCdoznyQqlkkrDb1FZch7KfGldebIhzAJ3bHgrXsZNNRhOL 9CNGzuslB6/ay+W4h3/TaBGbMzzSCGKVspzVsNS58/O/qRS6nWLLom+IejrxifpWXqC5 sz0HiMYE8lRojn2HwBNzWoBWse4idrM7TTfwi2h+tXZS0Z6hK4w/9AVrJ4bPsNVGF89P JP3/y4qFsthSwrbRZh8Lx8yfBAp55Sbd3/Hg642ZRvqojueH7Fhmdh4OBUTQjFb6LZgy RUDiSUwzdA9a4b/qXhs/vUkzsQwzwBZu9kKmYkyh798hF5ga/KEIsY1fmyl41dkc+kVh RwDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=yiNeuarA8r14N/udmX2Ti0NAodknr96nxpHCBqLhgpc=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=g9wt8hZCcK/7ZpkLizyfAGqkZOQQpW88HV+Crf6y+3L9OcZLXA4pcJZ049c3B0iV9I LDPlYllWNMBlGFPB3iRGQa1FAfpCQ19I1OlwrLnxeNlw0kEPSRxh0Do4QV2j5YU/Ggsi BxKyic0yz2sdcKYROyLOzG3V7rz+/AKeBpM09xx7qOIqznSq/e8tulI/kE8qyGDQPz4J pLbU/rC1P3PzheKUBydpBKSuAO+EDyJGtbQDFmqH9voFnAOsi7dnD5qWTQjmX1cDKdfY 9+3pX8nWtZbbstQk3dDoBZwRSwb461h1FrX8LWnRVrhYE8TZ2EcB0q36aVMc+H2FGbEC UtJw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="oBB/VBv/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e9dc8802sm125761915e9.10.2025.01.12.16.49.32 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:32 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 18/23] hw/mips/boston: Propagate CPU to gen_firmware() Date: Mon, 13 Jan 2025 01:47:43 +0100 Message-ID: <20250113004748.41658-19-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In boston_mach_init(), resolves the first CPU from the CPS container using the QOM "cpu[0]" path. Propagate it to gen_firmware(), removing the &first_cpu use. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/boston.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 09c4dfade12..f2c0e335e73 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -323,25 +323,26 @@ static void boston_register_types(void) } type_init(boston_register_types) -static void gen_firmware(void *p, hwaddr kernel_entry, hwaddr fdt_addr) +static void gen_firmware(const MIPSCPU *cpu, void *p, + hwaddr kernel_entry, hwaddr fdt_addr) { uint64_t regaddr; /* Move CM GCRs */ regaddr = cpu_mips_phys_to_kseg1(NULL, GCR_BASE_ADDR + GCR_BASE_OFS), - bl_gen_write_u64(MIPS_CPU(first_cpu), &p, regaddr, + bl_gen_write_u64(cpu, &p, regaddr, boston_memmap[BOSTON_CM].base); /* Move & enable GIC GCRs */ regaddr = cpu_mips_phys_to_kseg1(NULL, boston_memmap[BOSTON_CM].base + GCR_GIC_BASE_OFS), - bl_gen_write_u64(MIPS_CPU(first_cpu), &p, regaddr, + bl_gen_write_u64(cpu, &p, regaddr, boston_memmap[BOSTON_GIC].base | GCR_GIC_BASE_GICEN_MSK); /* Move & enable CPC GCRs */ regaddr = cpu_mips_phys_to_kseg1(NULL, boston_memmap[BOSTON_CM].base + GCR_CPC_BASE_OFS), - bl_gen_write_u64(MIPS_CPU(first_cpu), &p, regaddr, + bl_gen_write_u64(cpu, &p, regaddr, boston_memmap[BOSTON_CPC].base | GCR_CPC_BASE_CPCEN_MSK); /* @@ -352,7 +353,7 @@ static void gen_firmware(void *p, hwaddr kernel_entry, hwaddr fdt_addr) * a2/$6 = 0 * a3/$7 = 0 */ - bl_gen_jump_kernel(MIPS_CPU(first_cpu), &p, + bl_gen_jump_kernel(cpu, &p, true, 0, true, (int32_t)-2, true, fdt_addr, true, 0, true, 0, kernel_entry); @@ -825,7 +826,9 @@ static void boston_mach_init(MachineState *machine) } } - gen_firmware(memory_region_get_ram_ptr(flash) + 0x7c00000, + gen_firmware(MIPS_CPU(object_resolve_path_component(OBJECT(&s->cps), + "cpu[0]")), + memory_region_get_ram_ptr(flash) + 0x7c00000, s->kernel_entry, s->fdt_base); } else if (!qtest_enabled()) { error_report("Please provide either a -kernel or -bios argument"); From patchwork Mon Jan 13 00:47:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856916 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1214364wrc; Sun, 12 Jan 2025 16:54:45 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXeY1BynYMrFRJtPXYMocDDggo/8UVWXp7hsej0cQpo9Qf08MhY120whEJ73rjTI9LtIsuHKA==@linaro.org X-Google-Smtp-Source: AGHT+IHMwFtdo7E3TWHLdjGdVr3TPlPzKdoTKr2JgxUnGBJxG186YLIEw+aexgaiASF5+gZBJ4vW X-Received: by 2002:a05:622a:4207:b0:46c:72b7:2f12 with SMTP id d75a77b69052e-46c72b72f49mr286550831cf.48.1736729684878; Sun, 12 Jan 2025 16:54:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729684; cv=none; d=google.com; s=arc-20240605; b=SvAblCmm72xHl5kdJ40b34ADSg1Ig6a4xIDLh9IraZyiP27UyrvsnLr1pHWCBkqGGx 9Eh4QL3inys68czyaLMtMCc3zjInw471dIqWO1TMChpNqRH7Fww8nJEuf176tUcCGqNo 2zfEGIszJxP415UXilG6q1DEDMcUZ30HhoY0E3h+n9OR36vA9OYFxhpeRYQODOHt3Qz3 N+2RFVQWFRpk4kx1pHrqsJCGYZZFLljxsGqLBorH3njYC4IYNd2YALkDJslmKoyHPAR1 vhOmJvD5ozmF1mASFMsripgveOe/zgKf/ofe5RlA7HPLVTM1Mfrd0PBbhu1AY2f5gwVz xr0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=OTZEKKLS4PrCy1H2BI5piTVs8fWWFd13d+VvsRM6L5Y=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=NeRsF0mvIBdn6HIb19yTwiOP3tz7MRV12+UbknbkCZT8aDaCqR4kOcfqbYIySRoubl tRbtSMRGDptZro9k13E87zFvkXVZp6XLEtVpYm0F+wdUKUjZpPXhZAqTr98gf6GBb55p d0eGugV7tizcNjtz376IAhMOMMBAposBgy79mw3QjfpajZo3bbHZUzxbZzQ7J5RiPodY OTz1s1fBj+NpXAieM3Obu1+qqBb6d8bJIWG6+StOQGFwCLKngiS5uLQz0p3HuYM6nYSA OS33F7U/ylGhCnskI6dzU2VqYY9mT6F6XjTdO+araoZRwBWcl768Rrtcw2It9fhGtmVw S61A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uuPd5TJQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a8e37d0casm10893890f8f.11.2025.01.12.16.49.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:37 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 19/23] hw/mips/fuloong: Propagate CPU to write_bootloader() Date: Mon, 13 Jan 2025 01:47:44 +0100 Message-ID: <20250113004748.41658-20-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org mips_fuloong2e_init() created the vCPU so has its reference, propagate it to write_bootloader(), removing the &first_cpu use. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/fuloong2e.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index b87622ee6e3..1e55adacdd2 100644 --- a/hw/mips/fuloong2e.c +++ b/hw/mips/fuloong2e.c @@ -163,7 +163,7 @@ static uint64_t load_kernel(MIPSCPU *cpu) return kernel_entry; } -static void write_bootloader(CPUMIPSState *env, uint8_t *base, +static void write_bootloader(const MIPSCPU *cpu, uint8_t *base, uint64_t kernel_addr) { uint32_t *p; @@ -179,7 +179,7 @@ static void write_bootloader(CPUMIPSState *env, uint8_t *base, /* Second part of the bootloader */ p = (uint32_t *)(base + 0x040); - bl_gen_jump_kernel(MIPS_CPU(first_cpu), (void **)&p, + bl_gen_jump_kernel(cpu, (void **)&p, true, ENVP_VADDR - 64, true, 2, true, ENVP_VADDR, true, ENVP_VADDR + 8, @@ -258,7 +258,7 @@ static void mips_fuloong2e_init(MachineState *machine) loaderparams.kernel_cmdline = kernel_cmdline; loaderparams.initrd_filename = initrd_filename; kernel_entry = load_kernel(cpu); - write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); + write_bootloader(cpu, memory_region_get_ram_ptr(bios), kernel_entry); } else { filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, machine->firmware ?: FULOONG_BIOSNAME); From patchwork Mon Jan 13 00:47:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856918 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1214372wrc; Sun, 12 Jan 2025 16:54:49 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVagSbEr5EMVmpj6TKKjNErcloeTqw6QCzS/7zaM/Nz3MAgFOSlKmdetrSRe1Dryg4huKPxog==@linaro.org X-Google-Smtp-Source: AGHT+IHBe/7IsIgJgPCWrQsOWT4VXj1m/jUaPw2wIMZUjhW8obmwLLZCwIDU+mN2MdBHGhpIVKfY X-Received: by 2002:a05:620a:269a:b0:7b6:73de:f340 with SMTP id af79cd13be357-7bcd9727ba3mr2791794085a.12.1736729688797; Sun, 12 Jan 2025 16:54:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729688; cv=none; d=google.com; s=arc-20240605; b=hHaRm03Ux65lgzxUXx4zTZuRzAvCOUKCvNHV5uXf1qiMRNx8NeYokwAp7o2qlPLhD/ Tg28Odr83dqeGek3TzeSXh1+pO/7RX4k6hf/7JaOmL+l36LLSNZqlyG0YIswp4wcfb57 f6cRD5+c4E6Owdz1DpjQcV2tKHZ+niIdPlR0zNqtWdehyfEQma9jYq2M4cLGWj0Pkk59 Xv7gnFHkdu7Am5oWJX9nTnpCMovdtxCoVvRw7q0xr1RR4VQ85Yk6jl2a/0bkzsBQBeKA HUW6Ao60aa3kgJv3pnKYiBaRz/PTlVh0dlC/MeaGp6KyNxAs2qmFAz4O12NpRw4B8Esz KOUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=KxFKXXK5VzgQk+VMHxLlV5NbZtRQAbvkWoWKwyBHWBc=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=hpWQ+enZ2j5j6/Oba/KnKpLUAZ17f9pX9vGWVcCsDkWKzfRc5mVMQHKIlRjBAfTj9n UUuGJkbgWeztbTaH7bb/sbx3ZPhM0MSfYjjTfPjB/Is1j3qP0cwV1n9HG++CMkQgAZ0o bun7dRi2dW70jnLOsrgCdUO3KuDdxTaOqFyj0DnQn4YH0dPEPb7bfz4R/TtnP2oVmtSm VPVBvIVutWG3zUjjgf1843WKFPlmszkq1M3KYpTjODACIsYkXLKirw/ylmmTEw5jThsE Z2osJhRFemK0OFvNJPYprlWF3zkuOcT58x/k3/nS/U0DyjuxognvsODY9GIw0PiM5t9U /wxA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bDRnCsCT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e9e03f8bsm125389885e9.23.2025.01.12.16.49.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:44 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 20/23] hw/mips/malta: Keep reference of vCPUs in MaltaState Date: Mon, 13 Jan 2025 01:47:45 +0100 Message-ID: <20250113004748.41658-21-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When a QOM object create children with object_new(), it is better to keep reference to them for further use. This will be helpful to remove &first_cpu uses in few commits. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/malta.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 5ccff2cb0c1..a037ec2cc8d 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -107,6 +107,7 @@ struct MaltaState { SysBusDevice parent_obj; Clock *cpuclk; + MIPSCPU **cpus; MIPSCPSState cps; }; @@ -1037,6 +1038,7 @@ static void create_cpu_without_cps(MachineState *ms, MaltaState *s, for (i = 0; i < ms->smp.cpus; i++) { cpu = mips_cpu_create_with_clock(ms->cpu_type, s->cpuclk, TARGET_BIG_ENDIAN); + s->cpus[i] = cpu; /* Init internal devices */ cpu_mips_irq_init_cpu(cpu); @@ -1063,6 +1065,7 @@ static void create_cps(MachineState *ms, MaltaState *s, &error_fatal); qdev_connect_clock_in(DEVICE(&s->cps), "clk-in", s->cpuclk); sysbus_realize(SYS_BUS_DEVICE(&s->cps), &error_fatal); + memcpy(s->cpus, s->cps.cpus, ms->smp.cpus * sizeof(MIPSCPU *)); sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1); @@ -1070,9 +1073,11 @@ static void create_cps(MachineState *ms, MaltaState *s, *cbus_irq = NULL; } -static void mips_create_cpu(MachineState *ms, MaltaState *s, - qemu_irq *cbus_irq, qemu_irq *i8259_irq) +/* Initialize MaltaState::cpus[] */ +static void mips_create_cpus(MachineState *ms, MaltaState *s, + qemu_irq *cbus_irq, qemu_irq *i8259_irq) { + s->cpus = g_new(MIPSCPU *, ms->smp.cpus); if ((ms->smp.cpus > 1) && cpu_type_supports_cps_smp(ms->cpu_type)) { create_cps(ms, s, cbus_irq, i8259_irq); } else { @@ -1111,7 +1116,7 @@ void mips_malta_init(MachineState *machine) sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal); /* create CPU */ - mips_create_cpu(machine, s, &cbus_irq, &i8259_irq); + mips_create_cpus(machine, s, &cbus_irq, &i8259_irq); /* allocate RAM */ if (ram_size > 2 * GiB) { From patchwork Mon Jan 13 00:47:46 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856919 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1214378wrc; Sun, 12 Jan 2025 16:54:52 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUrL1zSqLAI9GSA3j5UDNBhlxY72f7SLwQ/b7qiuuO29FtXdBwI/LOU4mHxPg4EhrFCe7CEzA==@linaro.org X-Google-Smtp-Source: AGHT+IFxdypIEWw47g8rN1dq4i2p3HiEH+uFneeuJSOjYiPE2keJu3lnS5WwBzTkKBPOkFUBfF5a X-Received: by 2002:a05:622a:302:b0:467:63fb:68d7 with SMTP id d75a77b69052e-46c7109eaf9mr327195451cf.50.1736729692151; Sun, 12 Jan 2025 16:54:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729692; cv=none; d=google.com; s=arc-20240605; b=CnG4UBNpqE4NnLqrjBzu8fF/h4DEJsmo2EP7HQiFo6SqUuPst+cltJMJ+OPfjtDx7M +ymEeO2ogI+YhNX6FSEza2jTfienaByuz2MeyVQ2qKhItuNOuEFT5ZCczyXULfLLqA7W ZUPyWfAb+9DYrtKGirBXSoNdRL3tlPdXioGbiBn+Ss0ncTIrBkT0yhUiHGInkzHRBCUI CFiFt93LLLpkw7sEbOR2Roo7qUoo8du0Kf5YhixG9pdDkG9vowH3DJZwsqGy73Rt3sgk qDRL/bPm7cfZ0ufoAb00fJoMEihbw+tokJoODDL/CLL4GPEPNeAKvj4guXBc/MKV0kmI 27Yg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=5t7LN/wKZvE1noLloA1ScY9xrm7gHXj/oUl+gXuqqpU=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=Ejkf0BPzLVxf0mwFLVUpsPWIQ5tZ7m2tCQHbYYdtJHj7EdRQIoiFh8cHUL3JnRBkSI HJn6Dl05ZhAPTedMKSVFG40vRxP9TArbKrLpfty3jjMpQLLxmuXLkaC45aIEc/Za04B6 VZs9t00MOb41g4HG0BjTYTNtFTxuk0tw+7i3h/lcqS5PSX67W1JEBQ6RvLpRqmYaKKWh gedcF3zo4vYw8ZfmQWuG0yYRBHWbZTnmHExvIN8of5QfWkpETvI0xUhL/kR3bcHzm472 pVRlPFhVy2atydiHdg8libwZubazv7mopFSQfOXgcoRwKKJ1ZTJXniXQj13m0EZl6glB WgAQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sntkCroI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e9d8fd03sm129722785e9.6.2025.01.12.16.49.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:49 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 21/23] hw/mips/malta: Propagate MaltaState to write_bootloader() Date: Mon, 13 Jan 2025 01:47:46 +0100 Message-ID: <20250113004748.41658-22-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Pass MaltaState as argument to write_bootloader() so next commit can propagate it to bl_setup_gt64120_jump_kernel(). Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/malta.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index a037ec2cc8d..589e1a07e47 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -692,7 +692,8 @@ static void bl_setup_gt64120_jump_kernel(void **p, uint64_t run_addr, kernel_entry); } -static void write_bootloader_nanomips(uint8_t *base, uint64_t run_addr, +static void write_bootloader_nanomips(MaltaState *s, + uint8_t *base, uint64_t run_addr, uint64_t kernel_entry) { uint16_t *p; @@ -744,7 +745,8 @@ static void write_bootloader_nanomips(uint8_t *base, uint64_t run_addr, * a2 - 32-bit address of the environment variables table * a3 - RAM size in bytes */ -static void write_bootloader(uint8_t *base, uint64_t run_addr, +static void write_bootloader(MaltaState *s, + uint8_t *base, uint64_t run_addr, uint64_t kernel_entry) { uint32_t *p; @@ -1172,10 +1174,10 @@ void mips_malta_init(MachineState *machine) kernel_entry = load_kernel(); if (!cpu_type_supports_isa(machine->cpu_type, ISA_NANOMIPS32)) { - write_bootloader(memory_region_get_ram_ptr(bios), + write_bootloader(s, memory_region_get_ram_ptr(bios), bootloader_run_addr, kernel_entry); } else { - write_bootloader_nanomips(memory_region_get_ram_ptr(bios), + write_bootloader_nanomips(s, memory_region_get_ram_ptr(bios), bootloader_run_addr, kernel_entry); } } else { From patchwork Mon Jan 13 00:47:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856909 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1213977wrc; Sun, 12 Jan 2025 16:52:51 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCX+e66jzwOVzySISA/JQvkjAjMBajNkbxl3MApvVRw2l4YY35gDUpwTAk41qtF45GnANGFTRw==@linaro.org X-Google-Smtp-Source: AGHT+IFuzUVtRXghXhHfeg/P27jgaenpRFdQAEZr0UV6Isl32rjk5/EQnxJ/6lBT3uUzA+V9mNoL X-Received: by 2002:a05:622a:e:b0:467:5d5d:fabf with SMTP id d75a77b69052e-46c71026369mr267299531cf.25.1736729571015; Sun, 12 Jan 2025 16:52:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729570; cv=none; d=google.com; s=arc-20240605; b=ROspRv0G1TuQV1tXMWSQZ/9MUZb1y1b5fLM3Cqh6cUwmwr2tZjW4y0Vg8lURgWvscv m1zsQq77I4VQXItkxnC+Xpvq1X3Sf+gd9NnVZC3Cvlw8kNqskY/qkOKVLUN5VAxq5teH IPfTdgTaUtWSduwpurz+/uBdmXTsOhzO4EBcv7fQoylRMSZKRfhH/HklMlTq25s//V7B vIRc+v37rExNwvHQ2WiF8WX0BseTvAbRfwyoRk2S1d064l099HoC/XkMEEqBp54IAITd 35BCcT86NEYj1q2/43T6ZsING0CBRLYX25Nn5aSCAtK8YG1/cyfyjSrXM/gdzRRgv9ku v4dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=+QUcPQTSLIyjkEu3IRNgiae9ESabUrMs06G5+aRxsH0=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=cPwQ8gZzGC+cBDjeuxMat8gKYAxAIei/ASzWnJcV/ZnbwpnhCeHnAx46Z2Cu7AzjtS BKuRpfl5fCH6V8bO7NLF77bpXEsa6Yy0C+BYAZdepSHTzbE56OxI5xoAHdFRFRoqWB71 uy9JfRa4X3fkjSBVNhmnE/s9hGX7XObKRs2d9F4R/H47n5tsGIPZ2/8iuZT49nNLjxAz k0lTyHR31p0AE7YHTDs3Jv6GvbvD+yRoL/YkmwQ/UywF+jDQAvDrr+q5H7czniGOxmny yNz9R/tMVJs7inqhWrw3OyFe5MSIp/+DAy/dJskIXMaVYZ2wvhA3vbWHNx4ZaPhirz8x u+/w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lM6VgTrQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e9dc895esm125348935e9.13.2025.01.12.16.49.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:54 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 22/23] hw/mips/malta: Propagate MaltaState to bl_setup_gt64120_jump_kernel() Date: Mon, 13 Jan 2025 01:47:47 +0100 Message-ID: <20250113004748.41658-23-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Propagate MaltaState to bl_setup_gt64120_jump_kernel() so it can access the MaltaState::cpus[] array. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/malta.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 589e1a07e47..61b47b0dcbb 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -620,7 +620,8 @@ static void network_init(PCIBus *pci_bus) pci_init_nic_devices(pci_bus, "pcnet"); } -static void bl_setup_gt64120_jump_kernel(void **p, uint64_t run_addr, +static void bl_setup_gt64120_jump_kernel(MaltaState *s, void **p, + uint64_t run_addr, uint64_t kernel_entry) { static const char pci_pins_cfg[PCI_NUM_PINS] = { @@ -720,7 +721,7 @@ static void write_bootloader_nanomips(MaltaState *s, /* to_here: */ - bl_setup_gt64120_jump_kernel((void **)&p, run_addr, kernel_entry); + bl_setup_gt64120_jump_kernel(s, (void **)&p, run_addr, kernel_entry); } /* @@ -786,7 +787,7 @@ static void write_bootloader(MaltaState *s, * */ - bl_setup_gt64120_jump_kernel((void **)&p, run_addr, kernel_entry); + bl_setup_gt64120_jump_kernel(s, (void **)&p, run_addr, kernel_entry); /* YAMON subroutines */ p = (uint32_t *) (base + 0x800); From patchwork Mon Jan 13 00:47:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 856914 Delivered-To: patch@linaro.org Received: by 2002:a5d:525c:0:b0:385:e875:8a9e with SMTP id k28csp1214105wrc; Sun, 12 Jan 2025 16:53:30 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUbPoJfijZiEnnKUyQ9DD3390b+G1LJH55oh+b3KaWUJ/K8huN1nnHL8t/AW47kptxGxumadw==@linaro.org X-Google-Smtp-Source: AGHT+IEzPlIkPrsLAaoIBdo6KFAvUPn3w4ZP+nf8UOk5cDyj2CwqyFutHBO0hdEWTIFohki41EUF X-Received: by 2002:ac8:5a86:0:b0:467:6833:e30c with SMTP id d75a77b69052e-46c7102ce55mr286878041cf.30.1736729610237; Sun, 12 Jan 2025 16:53:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1736729610; cv=none; d=google.com; s=arc-20240605; b=MP0jscblTiRxauOpg9Z2vi+z8uC6m660BQX7tJwY1V4pCTsrkHBA6/WvSSyEk4SwdL iTdOpyjXR/hHgEUEFgec7SmX//q6krhS4ail3uErTCec4bviAN4UXIwM4nRlZ079dFi/ C7FarAsYx4fUdgeSUzM2RrSb24XWOK3JCgzW5ZX2m55/ZqPXDeermQrF8NnWLu51aX8n Y2ANccx9wFZLuSWPc1JvlEcO+biliPOAJ8r+MgJoZM5UqkqL6+LXIeWPPRdb8vUdoA+4 A983PlwadWgL7qJvWw0Z6mbOwLqb7YIXkYwoYbJDAI4lt1hKOSGDt+QYUwZziM1dJODH pxTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=nkJ53c1g/A3oVfRH9YrVVOx2OwtqwRGMfXxog5aOHSQ=; fh=NAziacGX1oLRG5aXR1KEGKyZTrl+lhslKvmHcMEZt5Y=; b=fM8agiq8jposb1u/l3mZ5tJ2e0rnHcXW/1Y8eJbsbNcYeZIZufyncDmLzJaz25dg+O dZLxJurtxcoOPJWyUfj3E2q95QWRqj16+2peO5SlCEDyw5bQd476tWMNc8ss2YW26DOp kuOdWj1hZU7oA3mEnhvp/BpiK4wfSljiPMCSqBBbtdkkfGYlOtnrToMTwX6ZHC7HPyp0 kBJjmy1UEKKh7SOhKZdHGv2yn+dKRsP8Jt5JUUsfi7Qg0Cxd3t/hMaqs5ZGgmZxhUGDe mJk2EDqIvznLIZvg1vdzgQm62jidu69gZ94ZCOkCdu/n7aio4upDA+amwfCzXOv7iTdJ bIiQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Qkx3EAKx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436dd11ddfdsm122124485e9.1.2025.01.12.16.49.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:50:00 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 23/23] hw/mips/malta: Remove all uses of &first_cpu global Date: Mon, 13 Jan 2025 01:47:48 +0100 Message-ID: <20250113004748.41658-24-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Now than bl_setup_gt64120_jump_kernel() has access to the MaltaState::cpus[] array, it doesn't need the &first_cpu global anymore. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/malta.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 61b47b0dcbb..9622e122b4a 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -638,29 +638,29 @@ static void bl_setup_gt64120_jump_kernel(MaltaState *s, void **p, /* setup MEM-to-PCI0 mapping as done by YAMON */ /* move GT64120 registers from 0x14000000 to 0x1be00000 */ - bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_ISD */ + bl_gen_write_u32(s->cpus[0], p, /* GT_ISD */ cpu_mips_phys_to_kseg1(NULL, 0x14000000 + 0x68), cpu_to_gt32(0x1be00000 << 3)); /* setup PCI0 io window to 0x18000000-0x181fffff */ - bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0IOLD */ + bl_gen_write_u32(s->cpus[0], p, /* GT_PCI0IOLD */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x48), cpu_to_gt32(0x18000000 << 3)); - bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0IOHD */ + bl_gen_write_u32(s->cpus[0], p, /* GT_PCI0IOHD */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x50), cpu_to_gt32(0x08000000 << 3)); /* setup PCI0 mem windows */ - bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0M0LD */ + bl_gen_write_u32(s->cpus[0], p, /* GT_PCI0M0LD */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x58), cpu_to_gt32(0x10000000 << 3)); - bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0M0HD */ + bl_gen_write_u32(s->cpus[0], p, /* GT_PCI0M0HD */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x60), cpu_to_gt32(0x07e00000 << 3)); - bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0M1LD */ + bl_gen_write_u32(s->cpus[0], p, /* GT_PCI0M1LD */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x80), cpu_to_gt32(0x18200000 << 3)); - bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0M1HD */ + bl_gen_write_u32(s->cpus[0], p, /* GT_PCI0M1HD */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x88), cpu_to_gt32(0x0bc00000 << 3)); @@ -671,16 +671,16 @@ static void bl_setup_gt64120_jump_kernel(MaltaState *s, void **p, * Load the PIIX IRQC[A:D] routing config address, then * write routing configuration to the config data register. */ - bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0_CFGADDR */ + bl_gen_write_u32(s->cpus[0], p, /* GT_PCI0_CFGADDR */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0xcf8), tswap32((1 << 31) /* ConfigEn */ | PCI_BUILD_BDF(0, PIIX4_PCI_DEVFN) << 8 | PIIX_PIRQCA)); - bl_gen_write_u32(MIPS_CPU(first_cpu), p, /* GT_PCI0_CFGDATA */ + bl_gen_write_u32(s->cpus[0], p, /* GT_PCI0_CFGDATA */ cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0xcfc), tswap32(ldl_be_p(pci_pins_cfg))); - bl_gen_jump_kernel(MIPS_CPU(first_cpu), p, + bl_gen_jump_kernel(s->cpus[0], p, true, ENVP_VADDR - 64, /* * If semihosting is used, arguments have already