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Wed, 08 Jan 2025 06:22:43 -0800 (PST) Received: from lion.caleb.rex.connolly.tech ([2a02:8109:888d:ff00:ca7f:54ff:fe52:4519]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5d806fedbbasm26220346a12.71.2025.01.08.06.22.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jan 2025 06:22:42 -0800 (PST) From: Caleb Connolly To: Andre Przywara , Caleb Connolly , Marc Zyngier , Neil Armstrong , Patrick Rudolph , Peter Hoyes , =?utf-8?q?Pierre-Cl=C3=A9ment_Tosi?= , Simon Glass , Sumit Garg , Tom Rini Cc: u-boot-qcom@groups.io, Ilias Apalodimas , u-boot@lists.denx.de Subject: [PATCH] armv8: mmu: don't switch to emergency tlb when adding a dynamic mapping Date: Wed, 8 Jan 2025 15:22:24 +0100 Message-ID: <20250108142235.1194640-1-caleb.connolly@linaro.org> X-Mailer: git-send-email 2.47.0 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This seems to cause crashes on a bunch of Qualcomm platforms. It's safer to just update the live table and flush it. Signed-off-by: Caleb Connolly --- arch/arm/cpu/armv8/cache_v8.c | 11 ++--------- arch/arm/include/asm/system.h | 3 +-- drivers/soc/qcom/cmd-db.c | 2 +- 3 files changed, 4 insertions(+), 12 deletions(-) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index e6be6359c5d9..43051d156122 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -338,9 +338,9 @@ static void map_range(u64 virt, u64 phys, u64 size, int level, size -= next_size; } } -void mmu_map_region(phys_addr_t addr, u64 size, bool emergency) +void mmu_map_region(phys_addr_t addr, u64 size) { u64 va_bits; int level = 0; u64 attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE; @@ -350,19 +350,12 @@ void mmu_map_region(phys_addr_t addr, u64 size, bool emergency) get_tcr(NULL, &va_bits); if (va_bits < 39) level = 1; - if (emergency) - map_range(addr, addr, size, level, - (u64 *)gd->arch.tlb_emerg, attrs); - - /* Switch pagetables while we update the primary one */ - __asm_switch_ttbr(gd->arch.tlb_emerg); - map_range(addr, addr, size, level, (u64 *)gd->arch.tlb_addr, attrs); - __asm_switch_ttbr(gd->arch.tlb_addr); + flush_dcache_range(gd->arch.tlb_addr, gd->arch.tlb_size); } static void add_map(struct mm_region *map) { diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 52f6c9b934d7..475ca97c5c82 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -283,11 +283,10 @@ void flush_l3_cache(void); * Will be mapped MT_NORMAL & PTE_BLOCK_INNER_SHARE. * * @start: Start address of the region * @size: Size of the region - * @emerg: Also map the region in the emergency table */ -void mmu_map_region(phys_addr_t start, u64 size, bool emerg); +void mmu_map_region(phys_addr_t start, u64 size); void mmu_change_region_attr(phys_addr_t start, size_t size, u64 attrs); /* * smc_call() - issue a secure monitor call diff --git a/drivers/soc/qcom/cmd-db.c b/drivers/soc/qcom/cmd-db.c index 67be18e89f4d..4c8bd9abda23 100644 --- a/drivers/soc/qcom/cmd-db.c +++ b/drivers/soc/qcom/cmd-db.c @@ -202,9 +202,9 @@ static int cmd_db_bind(struct udevice *dev) return -ENOENT; } /* On SM8550/SM8650 and newer SoCs cmd-db might not be mapped */ - mmu_map_region((phys_addr_t)base, (phys_size_t)size, false); + mmu_map_region((phys_addr_t)base, (phys_size_t)size); cmd_db_header = base; if (!cmd_db_magic_matches(cmd_db_header)) { log_err("%s: Invalid Command DB Magic\n", __func__);