From patchwork Tue Jan 7 16:07:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 855543 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D52C11F2C25; Tue, 7 Jan 2025 16:08:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736266120; cv=none; b=rwSgCziiTKBtGy89kf0MXzRXViAjVPptEfH3faFJqtWNF9eciyacUWHUcuXRu/b0vtm65RNT3vZq/4YI1oNRRf/ZU9rCoxxg1cd175qpEBE3/kJPGVafxTjh4tCOQsUs028ut7QgijNqIOFwcu9bsGZhBLK/pXQHHOFvFI1F8eA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736266120; c=relaxed/simple; bh=VUT45XGlDSMQNHusgz0mY/5e3jHIdDXBnlb8O2girPc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=qSHdpW4ur92q2AIGSB9AamHe8XH+TAZ1as0z2sEerfEXVmJoQdm1QNPt9Y0Jq7Hhz9vKY5lMrgktmpaIHBD6i4vhFLUE402W7U+P6/LMsiyBT1E7/souN6u69GK1wtz+Fu/VxQrGmnc0U3fX9ZtK4y6ZpPPpQo4Yug5OiVVjwIo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=nEUN+74p; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="nEUN+74p" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1736266116; x=1767802116; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VUT45XGlDSMQNHusgz0mY/5e3jHIdDXBnlb8O2girPc=; b=nEUN+74pvOXonDQfXpNQf4/Emp04hsHpm1RVa9ci+77C8THylixBfkHE QsrPT/lC/qn/QIhesy0o/CJ6SBR4E7EHnx4KVjCS3gjrPEx6+1uCB9XCa AcHyVtu5pO13UdK9YKtR0zN/B3//iR4GMLGEkzrfMBhjJNbhffZ8ao6pP TByFby3REkZCg6v5AGjlhcHoA5hYqwgqAhqRjeATu141X59du3pouSFdC Pb1Q0T0p79gRI67/1IUn9MGRLMwvAAMVojApmJLR8dQaya2IY2bybGdIx jv33Le3CI28HAMPZyrgO2Ub7CP8Sli75CFTvlqleEPeTql2ZunNVaO4Hm g==; X-CSE-ConnectionGUID: lqpfnJzJQpCXzb9QKpQeRA== X-CSE-MsgGUID: qZ8ajRtFTXKuCSFks2gq8Q== X-IronPort-AV: E=Sophos;i="6.12,296,1728975600"; d="scan'208";a="40091248" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 07 Jan 2025 09:08:24 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 7 Jan 2025 09:08:17 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 7 Jan 2025 09:08:17 -0700 From: To: , , , , , , , , CC: , , , , , , , , , , , , Conor Dooley Subject: [PATCH v5 1/5] dt-bindings: ARM: at91: Document Microchip SAMA7D65 Curiosity Date: Tue, 7 Jan 2025 09:07:23 -0700 Message-ID: <20250107160850.120537-2-Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250107160850.120537-1-Ryan.Wanner@microchip.com> References: <20250107160850.120537-1-Ryan.Wanner@microchip.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Romain Sioen Document device tree binding of the Microchip SAMA7D65 Curiosity board. Signed-off-by: Romain Sioen Acked-by: Nicolas Ferre Signed-off-by: Dharma Balasubiramani Signed-off-by: Ryan Wanner Acked-by: Conor Dooley Reviewed-by: Claudiu Beznea --- Documentation/devicetree/bindings/arm/atmel-at91.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml index 7160ec80ac1b..0ec29366e6c2 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.yaml +++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml @@ -180,6 +180,13 @@ properties: - const: atmel,sama5d4 - const: atmel,sama5 + - description: Microchip SAMA7D65 Curiosity Board + items: + - const: microchip,sama7d65-curiosity + - const: microchip,sama7d65 + - const: microchip,sama7d6 + - const: microchip,sama7 + - items: - const: microchip,sama7g5ek # SAMA7G5 Evaluation Kit - const: microchip,sama7g5 From patchwork Tue Jan 7 16:07:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 855542 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FEA11F4712; Tue, 7 Jan 2025 16:08:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736266123; cv=none; b=a16GeEr1x7Y1Wncrv0cIXC5G5htppqEJfeZcwnc49vR7TC8mxjNFbHkJmVlzhOT+JK90gTPZcISpSKTG24nLa9ZPBoqnGr3sunVMIrG2Q4Pl0tOm8bvHg8ubcfU2tcprekQ6VEAvcDXTVAwetKvdw99SeuqDsHthCExmuBPXzpM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736266123; c=relaxed/simple; bh=PvMZTBsd/zyFDw280jKFb87067d4CpMhzJa4SZI+9ds=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=YANvBZ0oq/n2aIa8HhVX3IOovGYyPs+AA9zm45eoFOJvRpKH5TCU2xgn81/vAe5eLaPuTQBZKRe+0QwgWcknX2PepP29zyjD/rm0SR+TkXn0rzlWAmrLw0Vi4bIiFrVnUA1YR71wRbIMsMiUoA4H/YLYPFNJiTJI3+hkuT+epK8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=rkBYUO8r; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="rkBYUO8r" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1736266120; x=1767802120; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PvMZTBsd/zyFDw280jKFb87067d4CpMhzJa4SZI+9ds=; b=rkBYUO8rQh5bCExjn0gw3wRoyA2bqGF5wLI9nhokLRkXW8i9t4deGE9A c7xuVAAuyAGaDDGMTocXNtt3XT+1MFRhljRV7fhxA0lHgec4+RFgz4fnQ cv6c6HANJPoW1tiOvE+Du42iKhGN9ZkiesVom5T0DMkdRs7omg3jBD9xK ZNMSjCK74VMipqyKzAuLcc/0C1W9ERatVp8o79CwoTsb2SrzETHKQBEt5 4R1PGCZEN91oiLQHJp/obg1hZ7IK1tnmy/F8D1bG/spHiBrJkkXJCyXOy iSXvOUWaunpKBdCsodJpA5gpuninBnevSl+Vi850MiEKoTYQLJc34Pbpz A==; X-CSE-ConnectionGUID: lqpfnJzJQpCXzb9QKpQeRA== X-CSE-MsgGUID: lkEXHdiKQIKQ2alr2emajQ== X-IronPort-AV: E=Sophos;i="6.12,296,1728975600"; d="scan'208";a="40091256" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 07 Jan 2025 09:08:27 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 7 Jan 2025 09:08:18 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 7 Jan 2025 09:08:18 -0700 From: To: , , , , , , , , CC: , , , , , , , , , , , Subject: [PATCH v5 5/5] ARM: dts: microchip: add support for sama7d65_curiosity board Date: Tue, 7 Jan 2025 09:07:27 -0700 Message-ID: <20250107160850.120537-6-Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250107160850.120537-1-Ryan.Wanner@microchip.com> References: <20250107160850.120537-1-Ryan.Wanner@microchip.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Romain Sioen Add device tree support for the SAMA7D65 Curiosity board. Update the Makefile to include the new device tree file. uart6 is related to flexcom6, hence not sorted in alphabetical order. Signed-off-by: Romain Sioen Signed-off-by: Varshini Rajendran Signed-off-by: Ryan Wanner --- arch/arm/boot/dts/microchip/Makefile | 3 + .../dts/microchip/at91-sama7d65_curiosity.dts | 89 +++++++++++++++++++ 2 files changed, 92 insertions(+) create mode 100644 arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts diff --git a/arch/arm/boot/dts/microchip/Makefile b/arch/arm/boot/dts/microchip/Makefile index 470fe46433a9..79cd38fdc7da 100644 --- a/arch/arm/boot/dts/microchip/Makefile +++ b/arch/arm/boot/dts/microchip/Makefile @@ -12,6 +12,7 @@ DTC_FLAGS_at91-sama5d2_xplained := -@ DTC_FLAGS_at91-sama5d3_eds := -@ DTC_FLAGS_at91-sama5d3_xplained := -@ DTC_FLAGS_at91-sama5d4_xplained := -@ +DTC_FLAGS_at91-sama7d65_curiosity := -@ DTC_FLAGS_at91-sama7g54_curiosity := -@ DTC_FLAGS_at91-sama7g5ek := -@ dtb-$(CONFIG_SOC_AT91RM9200) += \ @@ -90,6 +91,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \ at91-sama5d4_xplained.dtb \ at91-sama5d4ek.dtb \ at91-vinco.dtb +dtb-$(CONFIG_SOC_SAMA7D65) += \ + at91-sama7d65_curiosity.dtb dtb-$(CONFIG_SOC_SAMA7G5) += \ at91-sama7g54_curiosity.dtb \ at91-sama7g5ek.dtb diff --git a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts new file mode 100644 index 000000000000..ef6a56db8acb --- /dev/null +++ b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * at91-sama7d65_curiosity.dts - Device Tree file for SAMA7D65 Curiosity board + * + * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries + * + * Author: Romain Sioen + * + */ +/dts-v1/; +#include "sama7d65-pinfunc.h" +#include "sama7d65.dtsi" +#include +#include + +/ { + model = "Microchip SAMA7D65 Curiosity"; + compatible = "microchip,sama7d65-curiosity", "microchip,sama7d65", + "microchip,sama7d6", "microchip,sama7"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &uart6; + }; + + memory@60000000 { + device_type = "memory"; + reg = <0x60000000 0x40000000>; + }; +}; + +&flx6 { + atmel,flexcom-mode = ; + status = "okay"; +}; + +&uart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6_default>; + status = "okay"; +}; + +&main_xtal { + clock-frequency = <24000000>; +}; + +&pioa { + pinctrl_sdmmc1_default: sdmmc1-default { + cmd-data { + pinmux = , + , + , + , + ; + slew-rate = <0>; + bias-disable; + }; + + ck-cd-rstn-vddsel { + pinmux = , + , + , + , + ; + slew-rate = <0>; + bias-disable; + }; + }; + + pinctrl_uart6_default: uart6-default { + pinmux = , + ; + bias-disable; + }; +}; + +&sdmmc1 { + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmmc1_default>; + status = "okay"; +}; + +&slow_xtal { + clock-frequency = <32768>; +};