From patchwork Fri Dec 27 13:00:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban Nallathambi X-Patchwork-Id: 853879 Received: from omta036.useast.a.cloudfilter.net (omta036.useast.a.cloudfilter.net [44.202.169.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A228813C3C2 for ; Fri, 27 Dec 2024 13:01:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=44.202.169.35 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735304494; cv=none; b=AWtCe3ZzwHn4vAxl6VjBaIBE0JAAEvunVwRspq8c/OvuwnoyebzziE1UwBQNv2uBz2m+GZeQK6gMUz0DqT6Nyniv3ANywx5Yeeql2dumGIpftlT3eUjM6+SLIgGLprH+99qn46Jr3oCQKgcUO5XPSWnxJFcfHG8VAQwOsmV2mQs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735304494; c=relaxed/simple; bh=qHYIlw5q2Ro5I852QrjEef3P3GktuZk2GSnSTYiauwE=; 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Signed-off-by: Parthiban Nallathambi --- Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml b/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml index a8409db4a3e3..03176f68485b 100644 --- a/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml @@ -42,7 +42,6 @@ required: - reg - interrupts - clocks - - resets additionalProperties: false From patchwork Fri Dec 27 13:00:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban Nallathambi X-Patchwork-Id: 853878 Received: from omta038.useast.a.cloudfilter.net (omta038.useast.a.cloudfilter.net [44.202.169.37]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D4D491F3D45 for ; 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This is not documents both in user manual and DE 2.0 specification. These changes are mainly from vendor BSP. Signed-off-by: Parthiban Nallathambi --- .../devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml index 70369bd633e4..3e00905b66ca 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml @@ -39,11 +39,13 @@ properties: items: - description: Bus Clock - description: Module Clock + - description: PLL common clock clock-names: items: - const: bus - const: mod + - const: pll-com resets: maxItems: 1 From patchwork Fri Dec 27 13:00:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban Nallathambi X-Patchwork-Id: 853877 Received: from omta34.uswest2.a.cloudfilter.net (omta34.uswest2.a.cloudfilter.net [35.89.44.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 472BE1F4707 for ; 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Add phy property to tcon with generic name 'phy'. Signed-off-by: Parthiban Nallathambi --- .../devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml index 724d93b9193b..6d8ae781c230 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml @@ -115,6 +115,12 @@ properties: - const: edp - const: lvds + phys: + maxItems: 1 + + phy-names: + const: phy + ports: $ref: /schemas/graph.yaml#/properties/ports From patchwork Fri Dec 27 13:00:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban Nallathambi X-Patchwork-Id: 853876 Received: from omta034.useast.a.cloudfilter.net (omta034.useast.a.cloudfilter.net [44.202.169.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D05C01F4E24 for ; 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Fri, 27 Dec 2024 18:31:52 +0530 From: Parthiban Nallathambi Date: Fri, 27 Dec 2024 18:30:56 +0530 Subject: [PATCH RESEND 07/22] dt-bindings: vendor-prefixes: Shenzhen Baijie Technology Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241227-a133-display-support-v1-7-abad35b3579c@linumiz.com> References: <20241227-a133-display-support-v1-0-abad35b3579c@linumiz.com> In-Reply-To: <20241227-a133-display-support-v1-0-abad35b3579c@linumiz.com> To: Joerg Roedel , Will Deacon , Robin Murphy , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Simona Vetter , Michael Turquette , Stephen Boyd , Philipp Zabel , Linus Walleij , Vinod Koul , Kishon Vijay Abraham I Cc: iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-phy@lists.infradead.org, Parthiban Nallathambi X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; 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(deprecated, use snps) deprecated: true + "^szbaijie,.*": + description: Shenzhen Baijie Technology Co., Ltd. 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Get reset control line optionally. Signed-off-by: Parthiban Nallathambi --- drivers/iommu/sun50i-iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c index 8d8f11854676..2ba804d682dc 100644 --- a/drivers/iommu/sun50i-iommu.c +++ b/drivers/iommu/sun50i-iommu.c @@ -1030,7 +1030,7 @@ static int sun50i_iommu_probe(struct platform_device *pdev) goto err_free_cache; } - iommu->reset = devm_reset_control_get(&pdev->dev, NULL); + iommu->reset = devm_reset_control_get_optional(&pdev->dev, NULL); if (IS_ERR(iommu->reset)) { dev_err(&pdev->dev, "Couldn't get our reset line.\n"); ret = PTR_ERR(iommu->reset); From patchwork Fri Dec 27 13:01:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban Nallathambi X-Patchwork-Id: 853874 Received: from omta040.useast.a.cloudfilter.net (omta040.useast.a.cloudfilter.net [44.202.169.39]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 019D01F63DE for ; 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The routing for mixer0 is through tcon0 and connected to LVDS/RGB/MIPI-DSI controller. Signed-off-by: Parthiban Nallathambi --- drivers/gpu/drm/sun4i/sun4i_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index 5eccf58f2e17..e012a6316bba 100644 --- a/drivers/gpu/drm/sun4i/sun4i_drv.c +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c @@ -436,6 +436,7 @@ static const struct of_device_id sun4i_drv_of_table[] = { { .compatible = "allwinner,sun9i-a80-display-engine" }, { .compatible = "allwinner,sun20i-d1-display-engine" }, { .compatible = "allwinner,sun50i-a64-display-engine" }, + { .compatible = "allwinner,sun50i-a100-display-engine" }, { .compatible = "allwinner,sun50i-h6-display-engine" }, { } }; From patchwork Fri Dec 27 13:01:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban Nallathambi X-Patchwork-Id: 853873 Received: from omta036.useast.a.cloudfilter.net (omta036.useast.a.cloudfilter.net [44.202.169.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 29F4A1F667B for ; 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Make tv0 optional by introducing another control similar to tv1 and make existing users with true/present. Signed-off-by: Parthiban Nallathambi --- drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 34 ++++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c index 8adda578c51b..bd9d0840ead7 100644 --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c @@ -16,6 +16,7 @@ #include "sun8i_tcon_top.h" struct sun8i_tcon_top_quirks { + bool has_tcon_tv0; bool has_tcon_tv1; bool has_dsi; }; @@ -191,10 +192,11 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master, * to TVE clock parent. */ i = 0; - clk_data->hws[CLK_TCON_TOP_TV0] = - sun8i_tcon_top_register_gate(dev, "tcon-tv0", regs, - &tcon_top->reg_lock, - TCON_TOP_TCON_TV0_GATE, i++); + if (quirks->has_tcon_tv0) + clk_data->hws[CLK_TCON_TOP_TV0] = + sun8i_tcon_top_register_gate(dev, "tcon-tv0", regs, + &tcon_top->reg_lock, + TCON_TOP_TCON_TV0_GATE, i++); if (quirks->has_tcon_tv1) clk_data->hws[CLK_TCON_TOP_TV1] = @@ -208,16 +210,18 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master, &tcon_top->reg_lock, TCON_TOP_TCON_DSI_GATE, i++); - for (i = 0; i < CLK_NUM; i++) - if (IS_ERR(clk_data->hws[i])) { - ret = PTR_ERR(clk_data->hws[i]); - goto err_unregister_gates; - } + if (i) { + for (i = 0; i < CLK_NUM; i++) + if (IS_ERR(clk_data->hws[i])) { + ret = PTR_ERR(clk_data->hws[i]); + goto err_unregister_gates; + } - ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get, - clk_data); - if (ret) - goto err_unregister_gates; + ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get, + clk_data); + if (ret) + goto err_unregister_gates; + } dev_set_drvdata(dev, tcon_top); @@ -266,16 +270,18 @@ static void sun8i_tcon_top_remove(struct platform_device *pdev) } static const struct sun8i_tcon_top_quirks sun8i_r40_tcon_top_quirks = { + .has_tcon_tv0 = true, .has_tcon_tv1 = true, .has_dsi = true, }; static const struct sun8i_tcon_top_quirks sun20i_d1_tcon_top_quirks = { + .has_tcon_tv0 = true, .has_dsi = true, }; static const struct sun8i_tcon_top_quirks sun50i_h6_tcon_top_quirks = { - /* Nothing special */ + .has_tcon_tv0 = true, }; /* sun4i_drv uses this list to check if a device node is a TCON TOP */ From patchwork Fri Dec 27 13:01:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban Nallathambi X-Patchwork-Id: 853872 Received: from omta34.uswest2.a.cloudfilter.net (omta34.uswest2.a.cloudfilter.net [35.89.44.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91A0C1E48A for ; Fri, 27 Dec 2024 13:02:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=35.89.44.33 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735304573; cv=none; b=pSySGkGa3sv1t7+rGIQkDKe79TdsDQElTHMQtlJhZZCcz+wDPlkxvUJptmjrjuhfc91DAYwg1UrZA5aOFSX2KkU6mUTi3WPjvWXmxx6PsxFpH1eXOWLq+bgDBm2aebBk7Op63Ct37abbYvEw6NO1v+VesvsXMGr74PqAmXYoYeY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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There is no documentation reference or details in DE 2.0 specification. But these changes are needed to get the display clock to work and this is inherited from the vendor BSP. Signed-off-by: Parthiban Nallathambi --- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c index f2aa71206bc2..3e28c32050e0 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c @@ -241,7 +241,7 @@ static const struct sunxi_ccu_desc sun50i_h5_de2_clk_desc = { static int sunxi_de2_clk_probe(struct platform_device *pdev) { - struct clk *bus_clk, *mod_clk; + struct clk *bus_clk, *mod_clk, *pll_clk; struct reset_control *rstc; void __iomem *reg; const struct sunxi_ccu_desc *ccu_desc; @@ -265,6 +265,11 @@ static int sunxi_de2_clk_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, PTR_ERR(mod_clk), "Couldn't get mod clk\n"); + pll_clk = devm_clk_get_optional(&pdev->dev, "pll-com"); + if (IS_ERR(pll_clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(pll_clk), + "Couldn't get pll clk\n"); + rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); if (IS_ERR(rstc)) return dev_err_probe(&pdev->dev, PTR_ERR(rstc), @@ -283,12 +288,20 @@ static int sunxi_de2_clk_probe(struct platform_device *pdev) goto err_disable_bus_clk; } + if (pll_clk) { + ret = clk_prepare_enable(pll_clk); + if (ret) { + dev_err(&pdev->dev, "Couldn't enable pll clk: %d\n", ret); + goto err_disable_mod_clk; + } + } + /* The reset control needs to be asserted for the controls to work */ ret = reset_control_deassert(rstc); if (ret) { dev_err(&pdev->dev, "Couldn't deassert reset control: %d\n", ret); - goto err_disable_mod_clk; + goto err_disable_pll_clk; } ret = devm_sunxi_ccu_probe(&pdev->dev, reg, ccu_desc); @@ -299,6 +312,8 @@ static int sunxi_de2_clk_probe(struct platform_device *pdev) err_assert_reset: reset_control_assert(rstc); +err_disable_pll_clk: + clk_disable_unprepare(pll_clk); err_disable_mod_clk: clk_disable_unprepare(mod_clk); err_disable_bus_clk: