From patchwork Thu Dec 26 04:58:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Val Packett X-Patchwork-Id: 853801 Received: from out-179.mta0.migadu.com (out-179.mta0.migadu.com [91.218.175.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E52EC14A4E1; Thu, 26 Dec 2024 05:09:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735189744; cv=none; b=Rxsgm+sTFFBuCyT4mAuUL6SZSt7YOgoRPNqX/6cy7n48Ix7m8jkWwptL/zsyqGSfQo4ba+MdEZRWSAgrF9aRf0yNXgShibJTWnEQv37zWMHrocy0JwwROTADPbbnwQYy3QjWc0sVIIDZ8F59noY/jEA84Yc9oN4FmY+jtS7N/uk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735189744; c=relaxed/simple; bh=ZG3E/CjJTpTgTtdD12Q1NielMS0GqVLbTb6vQ26Mo0I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IUxOdspVrOq5K+rucWxg4Q8DjXKhVrEMyLUzXBE3Uzy0jbpRqXytPeUmDsMbSnFvByD+QGeatV8L/yuNd7RfIKiSgSKkML423xbsGMap5RrP4q6NHC/LMIKkvUPorY1BexRKo8ygPXQKHkeH6Ylxox5NXEquUFErvBSk6oHuWZc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=F+SNPbVh; arc=none smtp.client-ip=91.218.175.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="F+SNPbVh" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1735189739; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yZRP9EHYiDMQSE40KS4tBLSjVo3dw24UwSYUpDAW6ko=; b=F+SNPbVh4FdD9yMy1bAbihcAIbPtkt2JBR5WmXnwwuKaAOgpJCkHP5DeoQLyYfTCFWxtQU 0pzScr+1qMK315KnWelMxeL2unZjvukBMFM0No3D4SItsfW4fxkimOGpGBqBsDg2rzdeTl k+VHNc0ImSufNn5nQhvveMQ3tlIej/rqIvSmxZdu+HZ1XTBbH9eI41Cc0+hoyZdru9ZaIE 2e9gjOmiTbDaEyixvKhXX8b9YjTZIYB+gzXLLxNMaYqQp/Xjy6RBN3PxK7xmkTP1wv4aPo KUFWj7a0zRLuNSYWlb8cpoQ3zl701Gsk+AMEG9+jCDFgf2txg+Rxvk+km3EtjQ== From: Val Packett To: Cc: Fabien Parent , Rob Herring , Lee Jones , Dmitry Torokhov , Krzysztof Kozlowski , Conor Dooley , Sen Chu , Sean Wang , Macpaul Lin , Lee Jones , Matthias Brugger , AngeloGioacchino Del Regno , Liam Girdwood , Mark Brown , Eddie Huang , Alexandre Belloni , Val Packett , Javier Carrasco , Yassine Oudjana , Chen Zhong , linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-rtc@vger.kernel.org Subject: [PATCH 1/9] dt-bindings: mfd: mt6397: Add bindings for MT6392 PMIC Date: Thu, 26 Dec 2024 01:58:01 -0300 Message-ID: <20241226050205.30241-2-val@packett.cool> In-Reply-To: <20241226050205.30241-1-val@packett.cool> References: <20241226050205.30241-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT From: Fabien Parent Add the currently supported bindings for the MT6392 PMIC. Signed-off-by: Fabien Parent Reviewed-by: Rob Herring Acked-for-MFD-by: Lee Jones --- Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml index 86451f151a6ae..73103922978f7 100644 --- a/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml +++ b/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml @@ -38,6 +38,7 @@ properties: - mediatek,mt6331 # "mediatek,mt6331" for PMIC MT6331 and MT6332. - mediatek,mt6358 - mediatek,mt6359 + - mediatek,mt6392 - mediatek,mt6397 - items: - enum: @@ -66,6 +67,7 @@ properties: - mediatek,mt6323-rtc - mediatek,mt6331-rtc - mediatek,mt6358-rtc + - mediatek,mt6392-rtc - mediatek,mt6397-rtc - items: - enum: From patchwork Thu Dec 26 04:58:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Val Packett X-Patchwork-Id: 853800 Received: from out-176.mta0.migadu.com (out-176.mta0.migadu.com [91.218.175.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 171C71531D2 for ; Thu, 26 Dec 2024 05:09:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735189801; cv=none; b=siQ6+1DtEUKctgM+mbxmV3OFUjiDx3PmK9uCRGXg9VKhU83vaIb0li4PaX3KHR6NEiDTB5qq90GXRFQAXMMF0Ca+oMn+DMyvFbTcDD7n6+lpgEk6W+Odhyza0oT04NZhrpOSHO/Ey+EdwfL/3nwGDdrXyshHGihL03fUhMGtRho= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735189801; c=relaxed/simple; bh=3wO9k50vCpXwoJN+dC6Ue7uZuUg12IDYSxz5yZF45D8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lR+YChI1xzWrixlGQhARyynX4GyqIdwXcrTihlLW1885TOfwWwLu0M7K/rbOF76L6bn1Vnxp9lem+uKy/WFr5h/FkHjxRjY6b3FG/GWk2A/Rci8qOQOLa4rJ8jMi0WL6C989VkzOG2L4h2Q/qFITMHB1C1IUzYaqL3ikCgBCgq8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=nTTDPQRb; arc=none smtp.client-ip=91.218.175.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="nTTDPQRb" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1735189796; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0D5npsDI8iXbhIUUM/dj63aVNlFAoEQXooWigDRnPe0=; b=nTTDPQRbmBi6Huy14ecpoysSPY0QU5vsc3yBgLkMs7zTd9fhU/gp+OlhYuE3S1sV21tuYf db+UVEBrLbCW2Zb2N6YHhzRUdNDxag8NG6lrlkZ6jCxrR/gOotdLS8F2+MoDbeAdfK78UY gYgLh/mYxQyNrAdi+XfR4rWhBTKEAvAl4eaU02k5asVAasR1OnqqgXmj4HPekrnfbv8py8 F2S3SYbwrBeRn+Fx0VqHiFjpa29vzDLTXBvTdIyRik6u2WQTCi9tnepRVWOh4bUSfwnoBG 53roAP82tp5LtkqV0XjreU2JomJAxbjLv/Ecm/hbjVHK4eXRyoxPgo0RcIJxHg== From: Val Packett To: Cc: Fabien Parent , Rob Herring , Dmitry Torokhov , Krzysztof Kozlowski , Conor Dooley , Sen Chu , Sean Wang , Macpaul Lin , Lee Jones , Matthias Brugger , AngeloGioacchino Del Regno , Liam Girdwood , Mark Brown , Eddie Huang , Alexandre Belloni , Val Packett , Javier Carrasco , Yassine Oudjana , Chen Zhong , linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-rtc@vger.kernel.org Subject: [PATCH 3/9] dt-bindings: input: mtk-pmic-keys: add MT6392 binding definition Date: Thu, 26 Dec 2024 01:58:03 -0300 Message-ID: <20241226050205.30241-4-val@packett.cool> In-Reply-To: <20241226050205.30241-1-val@packett.cool> References: <20241226050205.30241-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT From: Fabien Parent Add the binding documentation of the mtk-pmic-keys for the MT6392 PMICs. Signed-off-by: Fabien Parent Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml b/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml index 60f09caa0e4c7..5da4fbce33970 100644 --- a/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml +++ b/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml @@ -29,6 +29,7 @@ properties: - mediatek,mt6357-keys - mediatek,mt6358-keys - mediatek,mt6359-keys + - mediatek,mt6392-keys - mediatek,mt6397-keys power-off-time-sec: true From patchwork Thu Dec 26 04:58:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Val Packett X-Patchwork-Id: 853799 Received: from out-187.mta0.migadu.com (out-187.mta0.migadu.com [91.218.175.187]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E66814D2A7; Thu, 26 Dec 2024 05:10:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.187 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735189856; cv=none; b=odoCBX7wltV0ShQi5Y5T0ooa/hwsAwyZSL5IEWTUTVnzUe3epSdler/iJvvZYQ1dKQ1S/OzoTAGFV5cvzOms418av9htuL6lUhXQgEElMHEelpTUff3Y65zk7b2OIZkJCLqtLi6rMQW1281SBOLFiG60sBm2hA7Neiqpx6YEWFE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735189856; c=relaxed/simple; bh=ijVMuBSFDdX5Z7CaqO5P/W2hBTKuTaL9cAf+OJqZpDo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=o35Tc5L+8vbxlivgraseKqzNB6YSgzN8VyhL2HnF8bd2QTLVK3E7EMOKtPumOI9Zk+FkhWMDfTDQEIfZ6/cquqJzKxXBc7echQ+8+aiv7nd8gfF5EUSn/twLhK1fxu7dAtv54yBdd+tN5xYMw+koeZcZND5mJwqOYEYqgxO3Nvw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=AIpwEMYN; arc=none smtp.client-ip=91.218.175.187 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="AIpwEMYN" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1735189852; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FCtQxe3UgNrzJxC3+A7Z9vKRxu+sFJgDjgkXCte8ayo=; b=AIpwEMYNmwUWc7IACElrVCsrDkBXvGOVUA6Y/XlseKJ10jyMnKQVnOeDZ7PP8HHUKk3O7E GsQEo+oAJa2q+MAAlwM9AVAcO0VyIfGjGzw+2Q2F7PcEQkqavnrLeuLioE1KNLGuB1ZrLw c4BhT7EgRURwH9N6HoBJGbACifMOjoR05HntRCdJ5dDDWQ74qQUFsMatVra5/JInJfPy3b 6ElOZS+Xn1W3EDlt/OytZUFlOZBONyyp3dAc7a3z8xZP+QsFY6hqPEcGhnCIjm/WYhWY6O yRZaVozrIQgIRhaTnC5cGQ4ZjHy3pb9TkHvjB1apOVSPqRYo+UVsIokr2NGtkA== From: Val Packett To: Cc: Val Packett , Dmitry Torokhov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sen Chu , Sean Wang , Macpaul Lin , Lee Jones , Matthias Brugger , AngeloGioacchino Del Regno , Liam Girdwood , Mark Brown , Eddie Huang , Alexandre Belloni , Javier Carrasco , Fabien Parent , Yassine Oudjana , Chen Zhong , linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-rtc@vger.kernel.org Subject: [PATCH 5/9] soc: mediatek: mtk-pmic-wrap: add compatible for MT6392 PMIC Date: Thu, 26 Dec 2024 01:58:05 -0300 Message-ID: <20241226050205.30241-6-val@packett.cool> In-Reply-To: <20241226050205.30241-1-val@packett.cool> References: <20241226050205.30241-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT The MT6392 PMIC is equivalent to the MT6323 in terms of pwrap. Add the compatible to use the same configuration. Signed-off-by: Val Packett --- drivers/soc/mediatek/mtk-pmic-wrap.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c index 9fdc0ef792026..59611ef0b144f 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -2249,6 +2249,7 @@ static const struct pwrap_slv_type pmic_mt6397 = { static const struct of_device_id of_slave_match_tbl[] = { { .compatible = "mediatek,mt6323", .data = &pmic_mt6323 }, + { .compatible = "mediatek,mt6392", .data = &pmic_mt6323 }, { .compatible = "mediatek,mt6331", .data = &pmic_mt6331 }, { .compatible = "mediatek,mt6351", .data = &pmic_mt6351 }, { .compatible = "mediatek,mt6357", .data = &pmic_mt6357 }, From patchwork Thu Dec 26 04:58:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Val Packett X-Patchwork-Id: 853798 Received: from out-181.mta0.migadu.com (out-181.mta0.migadu.com [91.218.175.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 335BF7711F; Thu, 26 Dec 2024 05:11:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735189910; cv=none; b=me/o3HFLS409RWGXH+XTeYi+rgjcywLQE098dOE5wxA9BCTyH+e+cru89n7wBAI9rQBM8JY/O2gzPusDg8CM7DPGW4rr8zmJJ9AgUVjkSPYVcL3xw68/ZJcM15E+cQ1bWGsGQ8ByXhIBlhNxpbFEgtZ+9vHSyOP3PJ3Ofbp7ZSc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735189910; c=relaxed/simple; bh=+Sb/sJjICe5iy+4s4TZANwNNBw2R+74S7xkHnEfohuA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LOCHjiuYp+OLkbExT6+mJ/Z508B6s9qG/Mdo0+fA9zQVuteHLbxKW8pZ3jec9E1u7K5XBY2OUnlnxYxnRxiqxihhO/6gh/orJGZd/03hxvriinvkTY2xnuMo+gplPAQNP18EBY9I6iKpFNUJ8+zwZP+LBp6QRJKKrFcgiVH9lSQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=fPkCdAQ/; arc=none smtp.client-ip=91.218.175.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="fPkCdAQ/" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1735189907; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vwQ4N1e+TBjnM5P/3WcPIc4WkvpX1QuMyXV+3IuUEkA=; b=fPkCdAQ/vP86/E35KgJIAWs1gu/guAcpRuxfTWJn5tNwJ7CCcAUJ0Cbts08Bk0vsfgLbR3 z9WhpBpo2Wp2QWQP6ixhx2U4DyA2xsePwxYpVvEeS5IhOIXS6vGq0v3yTSQ96U+0NGRLKt L+TmhvpPqKoZNOa6/tr4N7PwJs8Kdi1ODdp13rZYYSMGxg8j0SYRgslr7KyeVCFEfY/dP+ 028JqnX46gNCjCjVwLn0VAoXXKVnZO2UwfEEy4DOLQbLLmZYDy7F1LDdp6AHHj/MeQfEa6 f9shY0qwbm5G0TAlQyAwU6G7+bUIdoXSZw5l4bE1azmhL4wFRyHCFpzGoD276Q== From: Val Packett To: Cc: Val Packett , Dmitry Torokhov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sen Chu , Sean Wang , Macpaul Lin , Lee Jones , Matthias Brugger , AngeloGioacchino Del Regno , Liam Girdwood , Mark Brown , Eddie Huang , Alexandre Belloni , Javier Carrasco , Fabien Parent , Yassine Oudjana , Chen Zhong , linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-rtc@vger.kernel.org Subject: [PATCH 7/9] input: keyboard: mtk-pmic-keys: add MT6392 support Date: Thu, 26 Dec 2024 01:58:07 -0300 Message-ID: <20241226050205.30241-8-val@packett.cool> In-Reply-To: <20241226050205.30241-1-val@packett.cool> References: <20241226050205.30241-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Add support for the MT6392 PMIC to the keys driver. Signed-off-by: Val Packett --- drivers/input/keyboard/mtk-pmic-keys.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboard/mtk-pmic-keys.c index 5ad6be9141603..94fa0f316edc6 100644 --- a/drivers/input/keyboard/mtk-pmic-keys.c +++ b/drivers/input/keyboard/mtk-pmic-keys.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -67,6 +68,17 @@ static const struct mtk_pmic_regs mt6397_regs = { .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, }; +static const struct mtk_pmic_regs mt6392_regs = { + .keys_regs[MTK_PMIC_PWRKEY_INDEX] = + MTK_PMIC_KEYS_REGS(MT6392_CHRSTATUS, + 0x2, MT6392_INT_MISC_CON, 0x10, MTK_PMIC_PWRKEY_RST), + .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = + MTK_PMIC_KEYS_REGS(MT6392_CHRSTATUS, + 0x4, MT6392_INT_MISC_CON, 0x8, MTK_PMIC_HOMEKEY_RST), + .pmic_rst_reg = MT6392_TOP_RST_MISC, + .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, +}; + static const struct mtk_pmic_regs mt6323_regs = { .keys_regs[MTK_PMIC_PWRKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, @@ -284,6 +296,9 @@ static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = { { .compatible = "mediatek,mt6397-keys", .data = &mt6397_regs, + }, { + .compatible = "mediatek,mt6392-keys", + .data = &mt6392_regs, }, { .compatible = "mediatek,mt6323-keys", .data = &mt6323_regs, From patchwork Thu Dec 26 04:58:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Val Packett X-Patchwork-Id: 853797 Received: from out-189.mta0.migadu.com (out-189.mta0.migadu.com [91.218.175.189]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF56C170A19 for ; Thu, 26 Dec 2024 05:12:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.189 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735189965; cv=none; b=p66/kaHdVCUPRk61Q6GsHjCXmyIC0JIUD9yCBBKnIPnBcHZj4XEz0ob78dBFtUfcNEB2s69kLOEpSvKc+2WzDFMWnNV69HwY17zJRrikL19CRLGk5NPQvPmF64U4PVpaqHDYds0H8TjAVMSwoFfC39Eq/kyPC2JEFen1e2axmWg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735189965; c=relaxed/simple; bh=+WwSr9Q+JQSUPt+KYRtDM3j/krPJZTfLhQeR5HvDEF4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HGjTFkHYbv/hoFVf1dMKl06pPAwRUtTUbOr3YPSRKkSficlkHsb1lH4x3IkHrfcYJ7PmW2mvZxbSN/D7Pu7s+xplXpXwYGs+Z6z01tYiYfVgTGNRkZVfR1VTduyVMW0EdV9Sm4NS+SoQko9K9jWSQ2j3hHe/MCs2E4Z5nVNQfuM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=kM45QCbA; arc=none smtp.client-ip=91.218.175.189 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="kM45QCbA" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1735189961; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=upNmjojrv0EXOaMqSxtSK3czavePDk/4Zz+86baEfqk=; b=kM45QCbANPdqx+bNe2Sj8x0De/9ILo/3HbUYMOguKQ/xzFsOpqscGERCDU0NZrxoPpw7kC x8mZE29t7nP/CX3vVzk6qQQ0/plDHWQzSCL3niE5IqX7cMPvpZd57UXBMYg6SLOEjCgAm9 ipRuZvojOjXRc6VxAXgl/jOPKIu+yMJdgLPJFXVJbP/MorZtx5JYwl9ZwZxDtSYzfZoBJM VO/twzik51fSWUjCvavzoNjTYMXAjCeKpDNqxKIWHwfEikyiWEZtAjvDoMu+HSVKIeQixS Owu++K2g52JZpd0UqNGDwjEB6Np8phw0CpIOUg06A+LQaDAMNGS7+8cHLGCkgg== From: Val Packett To: Cc: Val Packett , Dmitry Torokhov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sen Chu , Sean Wang , Macpaul Lin , Lee Jones , Matthias Brugger , AngeloGioacchino Del Regno , Liam Girdwood , Mark Brown , Eddie Huang , Alexandre Belloni , Javier Carrasco , Fabien Parent , Yassine Oudjana , Chen Zhong , linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-rtc@vger.kernel.org Subject: [PATCH 9/9] arm64: dts: mt6392: add mt6392 PMIC dtsi Date: Thu, 26 Dec 2024 01:58:09 -0300 Message-ID: <20241226050205.30241-10-val@packett.cool> In-Reply-To: <20241226050205.30241-1-val@packett.cool> References: <20241226050205.30241-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Add the dts to be included by all boards using the MT6392 PMIC. Signed-off-by: Val Packett --- arch/arm64/boot/dts/mediatek/mt6392.dtsi | 232 +++++++++++++++++++++++ 1 file changed, 232 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt6392.dtsi diff --git a/arch/arm64/boot/dts/mediatek/mt6392.dtsi b/arch/arm64/boot/dts/mediatek/mt6392.dtsi new file mode 100644 index 0000000000000..a7c65dbb043c1 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt6392.dtsi @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 MediaTek Inc. + * Copyright (c) 2024 Val Packett + */ + +#include + +&pwrap { + pmic: mt6392 { + compatible = "mediatek,mt6392"; + interrupt-controller; + #interrupt-cells = <2>; + + regulators { + compatible = "mediatek,mt6392-regulator"; + + mt6392_vproc_reg: buck_vproc { + regulator-name = "buck_vproc"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + regulator-boot-on; + }; + + mt6392_vsys_reg: buck_vsys { + regulator-name = "buck_vsys"; + regulator-min-microvolt = <1400000>; + regulator-max-microvolt = <2987500>; + regulator-ramp-delay = <25000>; + regulator-always-on; + regulator-boot-on; + }; + + mt6392_vcore_reg: buck_vcore { + regulator-name = "buck_vcore"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + regulator-boot-on; + }; + + mt6392_vxo22_reg: ldo_vxo22 { + regulator-name = "ldo_vxo22"; + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + regulator-enable-ramp-delay = <110>; + regulator-always-on; + regulator-boot-on; + }; + + mt6392_vaud22_reg: ldo_vaud22 { + regulator-name = "ldo_vaud22"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2200000>; + regulator-enable-ramp-delay = <264>; + regulator-always-on; + regulator-boot-on; + }; + + mt6392_vcama_reg: ldo_vcama { + regulator-name = "ldo_vcama"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6392_vaud28_reg: ldo_vaud28 { + regulator-name = "ldo_vaud28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + regulator-always-on; + regulator-boot-on; + }; + + mt6392_vadc18_reg: ldo_vadc18 { + regulator-name = "ldo_vadc18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + regulator-always-on; + regulator-boot-on; + }; + + mt6392_vcn35_reg: ldo_vcn35 { + regulator-name = "ldo_vcn35"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6392_vio28_reg: ldo_vio28 { + regulator-name = "ldo_vio28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + regulator-always-on; + regulator-boot-on; + }; + + mt6392_vusb_reg: ldo_vusb { + regulator-name = "ldo_vusb"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <264>; + regulator-always-on; + regulator-boot-on; + }; + + mt6392_vmc_reg: ldo_vmc { + regulator-name = "ldo_vmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <264>; + regulator-boot-on; + }; + + mt6392_vmch_reg: ldo_vmch { + regulator-name = "ldo_vmch"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <264>; + regulator-boot-on; + }; + + mt6392_vemc3v3_reg: ldo_vemc3v3 { + regulator-name = "ldo_vemc3v3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <264>; + regulator-boot-on; + }; + + mt6392_vgp1_reg: ldo_vgp1 { + regulator-name = "ldo_vgp1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6392_vgp2_reg: ldo_vgp2 { + regulator-name = "ldo_vgp2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6392_vcn18_reg: ldo_vcn18 { + regulator-name = "ldo_vcn18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6392_vcamaf_reg: ldo_vcamaf { + regulator-name = "ldo_vcamaf"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6392_vm_reg: ldo_vm { + regulator-name = "ldo_vm"; + regulator-min-microvolt = <1240000>; + regulator-max-microvolt = <1390000>; + regulator-enable-ramp-delay = <264>; + regulator-always-on; + regulator-boot-on; + }; + + mt6392_vio18_reg: ldo_vio18 { + regulator-name = "ldo_vio18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + regulator-always-on; + regulator-boot-on; + }; + + mt6392_vcamd_reg: ldo_vcamd { + regulator-name = "ldo_vcamd"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6392_vcamio_reg: ldo_vcamio { + regulator-name = "ldo_vcamio"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + + mt6392_vm25_reg: ldo_vm25 { + regulator-name = "ldo_vm25"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-enable-ramp-delay = <264>; + regulator-always-on; + regulator-boot-on; + }; + + mt6392_vefuse_reg: ldo_vefuse { + regulator-name = "ldo_vefuse"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-enable-ramp-delay = <264>; + }; + }; + + rtc { + compatible = "mediatek,mt6392-rtc"; + }; + + keys { + compatible = "mediatek,mt6392-keys"; + + key-power { + linux,keycodes = ; + wakeup-source; + }; + + key-home { + linux,keycodes = ; + wakeup-source; + }; + }; + }; +};