From patchwork Wed Dec 4 07:04:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 847457 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 77678161320 for ; Wed, 4 Dec 2024 07:04:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733295863; cv=none; b=RW9uFqtKMOmAE9fIVsI8ki1gWMBrHQq5R/duXwhrBsWQU13/xG4hKKr05KEOtPN9HpAwU0lck7IhKPzuFOrp/8wF3NWQAiaF+1a6IQ2s3Bkj6dIYtJMVauRooxlAOfTcegStxUNomm/+0v7MxpK+Fz9jiHxK2z/6qf8mbOyFlI4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733295863; c=relaxed/simple; bh=nyDFVkb50Sf9nTAtDojrDAOvTiKJVXbM35C8sZBDG6Y=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Yr7kfxaQsQ8aUI4lizrZ0WbPx/F1BxcsVyyo47N2KvbmCTBHdVfsnOINAVCXSikH2PAri73VABmAp7OUvr+yZ5sEOcObVEBZCEtH2drr/93jDrIt3Co9+dq3EoNQS9BqSXbDfrNF1KSwLFcEZ85j/HEdY036E2DPkgygpfgMc9s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=WMMqoAhS; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="WMMqoAhS" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1733295861; x=1764831861; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nyDFVkb50Sf9nTAtDojrDAOvTiKJVXbM35C8sZBDG6Y=; b=WMMqoAhS59fCrYJw300oNLm6dHlGkxHA2QWqUuADmkRlFaJd5JSrtJWU mMq5m1DlrbzdwgLypgC9TM8fugzkffCyV4ePyNCG4tG2wNOoSA/hDxGLw QRSaMemgmEuJ7CNhHrA1nv9Kmw55rCxIAlr+Skkf+ci+fiKDY2+jtkdWk 1aNH4RFf68TaK21WoTgWdLfIHPjS1NPNuWTK+b3d6h4dkb5fSE1yH7jDS Je1gBMwLPV9kQAEkeekn8Bp5qngBo8FlMoTQdyswXurXVr7PMbSYgaIbi VgAtQiMtp/OqaFqK1MHjP5nujTyV1uykDMVBWRqeN5HXfQtZTWLgbfUme w==; X-CSE-ConnectionGUID: kTnva/gsSXShMO4kWIAqDg== X-CSE-MsgGUID: U+wA8zGDSPedBvKG2qOWyw== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44022831" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44022831" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2024 23:04:21 -0800 X-CSE-ConnectionGUID: +5NV/POMT2O49tha6DorvQ== X-CSE-MsgGUID: h4E3flldQ62806i2gPelxg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="94104181" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa007.jf.intel.com with ESMTP; 03 Dec 2024 23:04:17 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 33D54557; Wed, 04 Dec 2024 09:04:16 +0200 (EET) From: Mika Westerberg To: linux-gpio@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij , Bartosz Golaszewski , Alan Borzeszkowski , Shankar Bandal , Mika Westerberg Subject: [PATCH 1/7] gpio: graniterapids: Fix vGPIO driver crash Date: Wed, 4 Dec 2024 09:04:09 +0200 Message-ID: <20241204070415.1034449-2-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> References: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Alan Borzeszkowski Move setting irq_chip.name from probe() function to the initialization of "irq_chip" struct in order to fix vGPIO driver crash during bootup. Crash was caused by unauthorized modification of irq_chip.name field where irq_chip struct was initialized as const. This behavior is a consequence of suboptimal implementation of gpio_irq_chip_set_chip(), which should be changed to avoid casting away const qualifier. Crash log: BUG: unable to handle page fault for address: ffffffffc0ba81c0 /#PF: supervisor write access in kernel mode /#PF: error_code(0x0003) - permissions violation CPU: 33 UID: 0 PID: 1075 Comm: systemd-udevd Not tainted 6.12.0-rc6-00077-g2e1b3cc9d7f7 #1 Hardware name: Intel Corporation Kaseyville RP/Kaseyville RP, BIOS KVLDCRB1.PGS.0026.D73.2410081258 10/08/2024 RIP: 0010:gnr_gpio_probe+0x171/0x220 [gpio_graniterapids] Cc: stable@vger.kernel.org Signed-off-by: Alan Borzeszkowski Signed-off-by: Mika Westerberg --- drivers/gpio/gpio-graniterapids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-graniterapids.c b/drivers/gpio/gpio-graniterapids.c index f2e911a3d2ca..9da2999dc30f 100644 --- a/drivers/gpio/gpio-graniterapids.c +++ b/drivers/gpio/gpio-graniterapids.c @@ -234,6 +234,7 @@ static int gnr_gpio_irq_set_type(struct irq_data *d, unsigned int type) } static const struct irq_chip gnr_gpio_irq_chip = { + .name = "gpio-graniterapids", .irq_ack = gnr_gpio_irq_ack, .irq_mask = gnr_gpio_irq_mask, .irq_unmask = gnr_gpio_irq_unmask, @@ -324,7 +325,6 @@ static int gnr_gpio_probe(struct platform_device *pdev) girq = &priv->gc.irq; gpio_irq_chip_set_chip(girq, &gnr_gpio_irq_chip); - girq->chip->name = dev_name(dev); girq->parent_handler = NULL; girq->num_parents = 0; girq->parents = NULL; From patchwork Wed Dec 4 07:04:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 847456 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC05D1E522 for ; Wed, 4 Dec 2024 07:04:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733295864; cv=none; b=coQRwOlT9OxvV1jOJJPCUeh8C81Umadu14lmUq9b23GMTzCo35B6zFdOeykrRVgl8SGpzT8USqQ9TV8qRMQ8cWx9kFBg2sAyaeDqBUfEW8KwUeNLU9OVXfYSLmE+6IzsZispzg1Q4KucU8pq5K0qKqNLgRB5Nm4yWH1i4DK7wiM= ARC-Message-Signature: i=1; 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d="scan'208";a="94104185" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa007.jf.intel.com with ESMTP; 03 Dec 2024 23:04:17 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 2E6F31EC; Wed, 04 Dec 2024 09:04:16 +0200 (EET) From: Mika Westerberg To: linux-gpio@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij , Bartosz Golaszewski , Alan Borzeszkowski , Shankar Bandal , Mika Westerberg Subject: [PATCH 2/7] gpio: graniterapids: Fix incorrect BAR assignment Date: Wed, 4 Dec 2024 09:04:10 +0200 Message-ID: <20241204070415.1034449-3-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> References: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Alan Borzeszkowski Base Address of vGPIO MMIO register is provided directly by the BIOS instead of using offsets. Update address assignment to reflect this change in driver. Cc: stable@vger.kernel.org Signed-off-by: Alan Borzeszkowski Signed-off-by: Mika Westerberg --- drivers/gpio/gpio-graniterapids.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-graniterapids.c b/drivers/gpio/gpio-graniterapids.c index 9da2999dc30f..d2b542b536b6 100644 --- a/drivers/gpio/gpio-graniterapids.c +++ b/drivers/gpio/gpio-graniterapids.c @@ -32,7 +32,7 @@ #define GNR_PINS_PER_REG 32 #define GNR_NUM_REGS DIV_ROUND_UP(GNR_NUM_PINS, GNR_PINS_PER_REG) -#define GNR_CFG_BAR 0x00 +#define GNR_CFG_PADBAR 0x00 #define GNR_CFG_LOCK_OFFSET 0x04 #define GNR_GPI_STATUS_OFFSET 0x20 #define GNR_GPI_ENABLE_OFFSET 0x24 @@ -50,6 +50,7 @@ * struct gnr_gpio - Intel Granite Rapids-D vGPIO driver state * @gc: GPIO controller interface * @reg_base: base address of the GPIO registers + * @pad_base: base address of the vGPIO pad configuration registers * @ro_bitmap: bitmap of read-only pins * @lock: guard the registers * @pad_backup: backup of the register state for suspend @@ -57,6 +58,7 @@ struct gnr_gpio { struct gpio_chip gc; void __iomem *reg_base; + void __iomem *pad_base; DECLARE_BITMAP(ro_bitmap, GNR_NUM_PINS); raw_spinlock_t lock; u32 pad_backup[]; @@ -65,7 +67,7 @@ struct gnr_gpio { static void __iomem *gnr_gpio_get_padcfg_addr(const struct gnr_gpio *priv, unsigned int gpio) { - return priv->reg_base + gpio * sizeof(u32); + return priv->pad_base + gpio * sizeof(u32); } static int gnr_gpio_configure_line(struct gpio_chip *gc, unsigned int gpio, @@ -292,6 +294,7 @@ static int gnr_gpio_probe(struct platform_device *pdev) struct gnr_gpio *priv; void __iomem *regs; int irq, ret; + u32 offset; priv = devm_kzalloc(dev, struct_size(priv, pad_backup, num_backup_pins), GFP_KERNEL); if (!priv) @@ -303,6 +306,10 @@ static int gnr_gpio_probe(struct platform_device *pdev) if (IS_ERR(regs)) return PTR_ERR(regs); + priv->reg_base = regs; + offset = readl(priv->reg_base + GNR_CFG_PADBAR); + priv->pad_base = priv->reg_base + offset; + irq = platform_get_irq(pdev, 0); if (irq < 0) return irq; @@ -312,8 +319,6 @@ static int gnr_gpio_probe(struct platform_device *pdev) if (ret) return dev_err_probe(dev, ret, "failed to request interrupt\n"); - priv->reg_base = regs + readl(regs + GNR_CFG_BAR); - gnr_gpio_init_pin_ro_bits(dev, priv->reg_base + GNR_CFG_LOCK_OFFSET, priv->ro_bitmap); From patchwork Wed Dec 4 07:04:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 847670 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D6F6188A3B for ; Wed, 4 Dec 2024 07:04:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733295864; cv=none; b=qEl/kf3kaGwmaXS4Q6L9zMmO8lliTCCFVP3qJJhSerYwAmBccblVN7vxOXs4LMAToWtYnoyODMHHwnNBAu7bkBiAV7hvCxIiTfSjC7kYo7YyLPJTTJju21KlJygYK0yFapVVLbwKB03m1xcGsxvb0yqmpumhaBTJ48GBop2lUBs= ARC-Message-Signature: i=1; a=rsa-sha256; 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d="scan'208";a="94104184" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa007.jf.intel.com with ESMTP; 03 Dec 2024 23:04:17 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 39A8942D; Wed, 04 Dec 2024 09:04:16 +0200 (EET) From: Mika Westerberg To: linux-gpio@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij , Bartosz Golaszewski , Alan Borzeszkowski , Shankar Bandal , Mika Westerberg Subject: [PATCH 3/7] gpio: graniterapids: Fix invalid GPI_IS register offset Date: Wed, 4 Dec 2024 09:04:11 +0200 Message-ID: <20241204070415.1034449-4-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> References: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Shankar Bandal Update GPI Interrupt Status register offset to correct value. Cc: stable@vger.kernel.org Signed-off-by: Shankar Bandal Signed-off-by: Alan Borzeszkowski Signed-off-by: Mika Westerberg --- drivers/gpio/gpio-graniterapids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-graniterapids.c b/drivers/gpio/gpio-graniterapids.c index d2b542b536b6..be907784ccdb 100644 --- a/drivers/gpio/gpio-graniterapids.c +++ b/drivers/gpio/gpio-graniterapids.c @@ -34,7 +34,7 @@ #define GNR_CFG_PADBAR 0x00 #define GNR_CFG_LOCK_OFFSET 0x04 -#define GNR_GPI_STATUS_OFFSET 0x20 +#define GNR_GPI_STATUS_OFFSET 0x14 #define GNR_GPI_ENABLE_OFFSET 0x24 #define GNR_CFG_DW_RX_MASK GENMASK(25, 22) From patchwork Wed Dec 4 07:04:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 847671 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B4381186E26 for ; Wed, 4 Dec 2024 07:04:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733295863; cv=none; b=NBJfXCnmxyqpq7U+iexaYKLCdX+1AFVNa4WUwZfMSqaStjzjiTkCSZo+y+PxEjbWDWsiU5uafntoGwgn+S0YIp5J+Yr4e6UjEGSMsks/NCtnGTkYUHqe6Zb4+u4FM6xOZbfqh7XdSRNv+Xu/97w/8tExxhsqknEXnzGTnIFj9o8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733295863; c=relaxed/simple; bh=4DUOg3+DOmrTemCTd/eQ5ogu67PbSP0NdA4Xu+SWdkk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pELd1uZBqGIfYcix3Hlmr6BsrZo/O9bYc0Bdi3CIk2XnjVAr+7DNpT26XAviUNZ+a7JvnTr3nZfn/ALs5az0lR4QdPRHUyqsebo3Ek1+l7GxmStj1WbHU82yPRmeJx3Is3uFcvfISThyz6/srSqUeGGrgnJ1IcbUmDGvrKVov58= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=SuKs6yZO; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="SuKs6yZO" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1733295861; x=1764831861; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4DUOg3+DOmrTemCTd/eQ5ogu67PbSP0NdA4Xu+SWdkk=; b=SuKs6yZOkKoAbQWjYfRvYl0m+hi13TJmoG5abhfqEkAKQwLtlrrpWc2n +xcPT1F2voZJW69rnrgjtmiKXE9PgbEDZQ/RjeXX5WpL1H88Em6zhcZem VFuC02PtKk5tiNJ+KmOViP6ErXQrmV/AppeL/eu41lsCrA2ydjh/XUzaH kv572woaK68HV2RViegnG6nmOaAgdvXK3n83p3RDmKzm7uNjbEevyq/NF 4KSnzZPsdWtqTBVEi8ibdIPmrykwLddFwM7dO6yiJF6gLiTPVNKLwUyfw BaodCHm5aPqMusUDm9HTm3W6TEZ2Wd4OqHMcXWN9t06ewYBlqqoVdb8Iy g==; X-CSE-ConnectionGUID: upz8Rll7R8SD3RPSKYJ5zg== X-CSE-MsgGUID: B7p702FISpWJuKf9oNHmYA== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44573906" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44573906" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2024 23:04:19 -0800 X-CSE-ConnectionGUID: vkSBTZAQScaGki75/mTEew== X-CSE-MsgGUID: V+8MjH4WQKO2b2QwHQX4wQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93540778" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa007.fm.intel.com with ESMTP; 03 Dec 2024 23:04:17 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 43E5F710; Wed, 04 Dec 2024 09:04:16 +0200 (EET) From: Mika Westerberg To: linux-gpio@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij , Bartosz Golaszewski , Alan Borzeszkowski , Shankar Bandal , Mika Westerberg Subject: [PATCH 4/7] gpio: graniterapids: Fix invalid RXEVCFG register bitmask Date: Wed, 4 Dec 2024 09:04:12 +0200 Message-ID: <20241204070415.1034449-5-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> References: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Shankar Bandal Correct RX Level/Edge Configuration register (RXEVCFG) bitmask. Cc: stable@vger.kernel.org Signed-off-by: Shankar Bandal Signed-off-by: Alan Borzeszkowski Signed-off-by: Mika Westerberg --- drivers/gpio/gpio-graniterapids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-graniterapids.c b/drivers/gpio/gpio-graniterapids.c index be907784ccdb..ec2931a65723 100644 --- a/drivers/gpio/gpio-graniterapids.c +++ b/drivers/gpio/gpio-graniterapids.c @@ -37,7 +37,7 @@ #define GNR_GPI_STATUS_OFFSET 0x14 #define GNR_GPI_ENABLE_OFFSET 0x24 -#define GNR_CFG_DW_RX_MASK GENMASK(25, 22) +#define GNR_CFG_DW_RX_MASK GENMASK(23, 22) #define GNR_CFG_DW_RX_DISABLE FIELD_PREP(GNR_CFG_DW_RX_MASK, 2) #define GNR_CFG_DW_RX_EDGE FIELD_PREP(GNR_CFG_DW_RX_MASK, 1) #define GNR_CFG_DW_RX_LEVEL FIELD_PREP(GNR_CFG_DW_RX_MASK, 0) From patchwork Wed Dec 4 07:04:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 847454 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 70E2418A931 for ; Wed, 4 Dec 2024 07:04:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733295865; cv=none; b=ZhrwN1oNGVET4u+UCR2pRa1GrrB0wvpwn6l96vJ/InStTopeBtI5JVwAlox4lhwZXiiR0XMGAvdUKwq8AFHpAau4iVMtiY8qaxwkcwOyb0PuWlM1MFszDLP1EZY6HVSAQLKYISYrjzWJpwKx1JqA1IIR3n/ES0sRrYlCYnsoPCI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733295865; c=relaxed/simple; bh=CHGFAOnFoD0EIBIZTv8JHBvhspTQ+CHXPfquXVOJaBw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=o7Fr24+AKD8LNpOjHnfI9D3zD+kT3pAQ5i/FERuEF1xuEk7hd1p6SIYZboXn+0cKFeLj6wDiKvLGiP2VXg/7AwgHPQSeK/MCCoIuzCzSFgpmtug1yg7cUxPafdQpVm3zP4XwOa3w61rFasgp2DN5Qm5OLg5Df/olBSU9PfZDEyk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ADE6hQCe; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ADE6hQCe" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1733295864; x=1764831864; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=CHGFAOnFoD0EIBIZTv8JHBvhspTQ+CHXPfquXVOJaBw=; b=ADE6hQCe4VEEnXOIrC9NGOzh5Vq2x5HTftpYnhtml1YMzxFb99Uduy+k Dm3KRHCQuHMb+WEqCiXE+/H8sumG68ucX6/fZA09KrJHr17k/2nPGudIA 0aYYIVJjRh7opL02PdGeyIEkb6v+C3tdf7GuXT5TVPH3HHzpQBYvMqrjv Czhu8FGU9gAc8sSW+WF7PuhoJzhe6KN+xNNyVc4QAnUpZOyumZRG9lFhk wG0AnbwgWy6GB07/FUM8K4ENm3I3icUgP8m4Tuu4K1xsQrHVSArPG11kj fl8EKn4ALB6H4ezDO9IoOr5IhAj27dp7sbFljE9jZI6eHK9R8n+iPAjN5 w==; X-CSE-ConnectionGUID: 4/QDMjjXQPeMtxom1eBIWg== X-CSE-MsgGUID: 8AcLwzUgSCeUhVL+p4PBUg== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44022844" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44022844" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2024 23:04:22 -0800 X-CSE-ConnectionGUID: Ndrz+sIyTn+vkm8eEAgzhQ== X-CSE-MsgGUID: whYFQyt8SU6ODnhluq4aqQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="94104204" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa007.jf.intel.com with ESMTP; 03 Dec 2024 23:04:20 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 519CCA86; Wed, 04 Dec 2024 09:04:16 +0200 (EET) From: Mika Westerberg To: linux-gpio@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij , Bartosz Golaszewski , Alan Borzeszkowski , Shankar Bandal , Mika Westerberg Subject: [PATCH 5/7] gpio: graniterapids: Determine if GPIO pad can be used by driver Date: Wed, 4 Dec 2024 09:04:13 +0200 Message-ID: <20241204070415.1034449-6-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> References: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Alan Borzeszkowski Add check of HOSTSW_MODE bit to determine if GPIO pad can be used by the driver. Cc: stable@vger.kernel.org Signed-off-by: Alan Borzeszkowski Signed-off-by: Mika Westerberg --- drivers/gpio/gpio-graniterapids.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpio/gpio-graniterapids.c b/drivers/gpio/gpio-graniterapids.c index ec2931a65723..b12abe77299c 100644 --- a/drivers/gpio/gpio-graniterapids.c +++ b/drivers/gpio/gpio-graniterapids.c @@ -37,6 +37,7 @@ #define GNR_GPI_STATUS_OFFSET 0x14 #define GNR_GPI_ENABLE_OFFSET 0x24 +#define GNR_CFG_DW_HOSTSW_MODE BIT(27) #define GNR_CFG_DW_RX_MASK GENMASK(23, 22) #define GNR_CFG_DW_RX_DISABLE FIELD_PREP(GNR_CFG_DW_RX_MASK, 2) #define GNR_CFG_DW_RX_EDGE FIELD_PREP(GNR_CFG_DW_RX_MASK, 1) @@ -90,6 +91,20 @@ static int gnr_gpio_configure_line(struct gpio_chip *gc, unsigned int gpio, return 0; } +static int gnr_gpio_request(struct gpio_chip *gc, unsigned int gpio) +{ + struct gnr_gpio *priv = gpiochip_get_data(gc); + u32 dw; + + dw = readl(gnr_gpio_get_padcfg_addr(priv, gpio)); + if (!(dw & GNR_CFG_DW_HOSTSW_MODE)) { + dev_warn(gc->parent, "GPIO %u is not owned by host", gpio); + return -EBUSY; + } + + return 0; +} + static int gnr_gpio_get(struct gpio_chip *gc, unsigned int gpio) { const struct gnr_gpio *priv = gpiochip_get_data(gc); @@ -141,6 +156,7 @@ static int gnr_gpio_direction_output(struct gpio_chip *gc, unsigned int gpio, in static const struct gpio_chip gnr_gpio_chip = { .owner = THIS_MODULE, + .request = gnr_gpio_request, .get = gnr_gpio_get, .set = gnr_gpio_set, .get_direction = gnr_gpio_get_direction, From patchwork Wed Dec 4 07:04:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 847455 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 50A21189BA2 for ; Wed, 4 Dec 2024 07:04:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; 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d="scan'208";a="44573912" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2024 23:04:22 -0800 X-CSE-ConnectionGUID: GX292Ts3TTqX37yNsXPCdA== X-CSE-MsgGUID: +FWf/uO4QBOEcYKnH8lYfA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93540788" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa007.fm.intel.com with ESMTP; 03 Dec 2024 23:04:20 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 57F83AAF; Wed, 04 Dec 2024 09:04:16 +0200 (EET) From: Mika Westerberg To: linux-gpio@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij , Bartosz Golaszewski , Alan Borzeszkowski , Shankar Bandal , Mika Westerberg Subject: [PATCH 6/7] gpio: graniterapids: Check if GPIO line can be used for IRQs Date: Wed, 4 Dec 2024 09:04:14 +0200 Message-ID: <20241204070415.1034449-7-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> References: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Alan Borzeszkowski GPIO line can only be used as interrupt if its INTSEL register is programmed by the BIOS. Cc: stable@vger.kernel.org Signed-off-by: Alan Borzeszkowski Signed-off-by: Mika Westerberg --- drivers/gpio/gpio-graniterapids.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-graniterapids.c b/drivers/gpio/gpio-graniterapids.c index b12abe77299c..3a972d460fe2 100644 --- a/drivers/gpio/gpio-graniterapids.c +++ b/drivers/gpio/gpio-graniterapids.c @@ -39,6 +39,7 @@ #define GNR_CFG_DW_HOSTSW_MODE BIT(27) #define GNR_CFG_DW_RX_MASK GENMASK(23, 22) +#define GNR_CFG_DW_INTSEL_MASK GENMASK(21, 14) #define GNR_CFG_DW_RX_DISABLE FIELD_PREP(GNR_CFG_DW_RX_MASK, 2) #define GNR_CFG_DW_RX_EDGE FIELD_PREP(GNR_CFG_DW_RX_MASK, 1) #define GNR_CFG_DW_RX_LEVEL FIELD_PREP(GNR_CFG_DW_RX_MASK, 0) @@ -227,10 +228,18 @@ static void gnr_gpio_irq_unmask(struct irq_data *d) static int gnr_gpio_irq_set_type(struct irq_data *d, unsigned int type) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - irq_hw_number_t pin = irqd_to_hwirq(d); - u32 mask = GNR_CFG_DW_RX_MASK; + struct gnr_gpio *priv = gpiochip_get_data(gc); + irq_hw_number_t hwirq = irqd_to_hwirq(d); + u32 reg; u32 set; + /* Allow interrupts only if Interrupt Select field is non-zero */ + reg = readl(gnr_gpio_get_padcfg_addr(priv, hwirq)); + if (!(reg & GNR_CFG_DW_INTSEL_MASK)) { + dev_dbg(gc->parent, "GPIO %lu cannot be used as IRQ", hwirq); + return -EPERM; + } + /* Falling edge and level low triggers not supported by the GPIO controller */ switch (type) { case IRQ_TYPE_NONE: @@ -248,7 +257,7 @@ static int gnr_gpio_irq_set_type(struct irq_data *d, unsigned int type) return -EINVAL; } - return gnr_gpio_configure_line(gc, pin, mask, set); + return gnr_gpio_configure_line(gc, hwirq, GNR_CFG_DW_RX_MASK, set); } static const struct irq_chip gnr_gpio_irq_chip = { From patchwork Wed Dec 4 07:04:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 847669 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9BB7E186E26 for ; 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X-CSE-ConnectionGUID: T35S7LkKRRO4b5kpbfKG2g== X-CSE-MsgGUID: Q731xYX+RWOgHIrkISJM3Q== X-IronPort-AV: E=McAfee;i="6700,10204,11275"; a="44573916" X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="44573916" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2024 23:04:22 -0800 X-CSE-ConnectionGUID: B7sSSve1S5+BLIOtNljzGg== X-CSE-MsgGUID: YdGYUr//TXeRecz7zJ+Rwg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,207,1728975600"; d="scan'208";a="93540790" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa007.fm.intel.com with ESMTP; 03 Dec 2024 23:04:20 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 5DEA0B97; Wed, 04 Dec 2024 09:04:16 +0200 (EET) From: Mika Westerberg To: linux-gpio@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij , Bartosz Golaszewski , Alan Borzeszkowski , Shankar Bandal , Mika Westerberg Subject: [PATCH 7/7] gpio: graniterapids: Fix GPIO Ack functionality Date: Wed, 4 Dec 2024 09:04:15 +0200 Message-ID: <20241204070415.1034449-8-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> References: <20241204070415.1034449-1-mika.westerberg@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Alan Borzeszkowski Interrupt status (GPI_IS) register is cleared by writing 1 to it, not 0. Cc: stable@vger.kernel.org Signed-off-by: Alan Borzeszkowski Signed-off-by: Mika Westerberg --- drivers/gpio/gpio-graniterapids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-graniterapids.c b/drivers/gpio/gpio-graniterapids.c index 3a972d460fe2..ad6a045fd3d2 100644 --- a/drivers/gpio/gpio-graniterapids.c +++ b/drivers/gpio/gpio-graniterapids.c @@ -185,7 +185,7 @@ static void gnr_gpio_irq_ack(struct irq_data *d) guard(raw_spinlock_irqsave)(&priv->lock); reg = readl(addr); - reg &= ~BIT(bit_idx); + reg |= BIT(bit_idx); writel(reg, addr); }