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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d52a90a2sm34906725e9.36.2024.12.04.12.26.11 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:26:11 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 01/20] exec/tswap: Rename target_words_bigendian -> qemu_binary_is_bigendian Date: Wed, 4 Dec 2024 21:25:43 +0100 Message-ID: <20241204202602.58083-2-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org target_words_bigendian() doesn't return whether a target vCPU expects data in big-endian order, but whether the *binary* has been compiled with big-endian flavor by default. Rename it appropriately to reduce confusion. Mechanical change doing: $ sed -i -e s/target_words_bigendian/qemu_binary_is_bigendian/ \ $(git grep -l target_words_bigendian) Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/tswap.h | 18 +++++++++--------- cpu-target.c | 2 +- disas/disas-common.c | 2 +- hw/core/cpu-sysemu.c | 2 +- hw/core/generic-loader.c | 2 +- hw/display/vga.c | 4 ++-- hw/virtio/virtio.c | 2 +- system/qtest.c | 2 +- 8 files changed, 17 insertions(+), 17 deletions(-) diff --git a/include/exec/tswap.h b/include/exec/tswap.h index ecd4faef015..0113ff88fcc 100644 --- a/include/exec/tswap.h +++ b/include/exec/tswap.h @@ -11,15 +11,15 @@ #include "qemu/bswap.h" /** - * target_words_bigendian: - * Returns true if the (default) endianness of the target is big endian, - * false otherwise. Note that in target-specific code, you can use - * TARGET_BIG_ENDIAN directly instead. On the other hand, common - * code should normally never need to know about the endianness of the - * target, so please do *not* use this function unless you know very well - * what you are doing! + * qemu_binary_is_bigendian: Returns QEMU binary default endianness + * + * Returns whether the QEMU binary is built for big endianness flavor + * by default. + * vCPUs use this flavor by default when their endianness is not specified. + * + * This is not a clear API so please do *not* use this function. */ -bool target_words_bigendian(void); +bool qemu_binary_is_bigendian(void); /* * If we're in target-specific code, we can hard-code the swapping @@ -28,7 +28,7 @@ bool target_words_bigendian(void); #ifdef COMPILING_PER_TARGET #define target_needs_bswap() (HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN) #else -#define target_needs_bswap() (HOST_BIG_ENDIAN != target_words_bigendian()) +#define target_needs_bswap() (HOST_BIG_ENDIAN != qemu_binary_is_bigendian()) #endif /* COMPILING_PER_TARGET */ static inline uint16_t tswap16(uint16_t s) diff --git a/cpu-target.c b/cpu-target.c index 499facf7747..ff8c55a810a 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -463,7 +463,7 @@ out: } #endif -bool target_words_bigendian(void) +bool qemu_binary_is_bigendian(void) { return TARGET_BIG_ENDIAN; } diff --git a/disas/disas-common.c b/disas/disas-common.c index de61f6d8a12..7377de0715c 100644 --- a/disas/disas-common.c +++ b/disas/disas-common.c @@ -61,7 +61,7 @@ void disas_initialize_debug_target(CPUDebug *s, CPUState *cpu) s->cpu = cpu; s->info.print_address_func = print_address; - if (target_words_bigendian()) { + if (qemu_binary_is_bigendian()) { s->info.endian = BFD_ENDIAN_BIG; } else { s->info.endian = BFD_ENDIAN_LITTLE; diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c index 2a9a2a4eb54..4b85face02b 100644 --- a/hw/core/cpu-sysemu.c +++ b/hw/core/cpu-sysemu.c @@ -129,7 +129,7 @@ bool cpu_virtio_is_big_endian(CPUState *cpu) if (cc->sysemu_ops->virtio_is_big_endian) { return cc->sysemu_ops->virtio_is_big_endian(cpu); } - return target_words_bigendian(); + return qemu_binary_is_bigendian(); } GuestPanicInformation *cpu_get_crash_info(CPUState *cpu) diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c index ea8628b8926..abdd4c08a38 100644 --- a/hw/core/generic-loader.c +++ b/hw/core/generic-loader.c @@ -134,7 +134,7 @@ static void generic_loader_realize(DeviceState *dev, Error **errp) s->cpu = first_cpu; } - big_endian = target_words_bigendian(); + big_endian = qemu_binary_is_bigendian(); if (s->file) { AddressSpace *as = s->cpu ? s->cpu->as : NULL; diff --git a/hw/display/vga.c b/hw/display/vga.c index 6dbbbf49073..6be02006000 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -2116,7 +2116,7 @@ static bool vga_endian_state_needed(void *opaque) * default one, thus ensuring backward compatibility for * migration of the common case */ - return s->big_endian_fb != target_words_bigendian(); + return s->big_endian_fb != qemu_binary_is_bigendian(); } static const VMStateDescription vmstate_vga_endian = { @@ -2264,7 +2264,7 @@ bool vga_common_init(VGACommonState *s, Object *obj, Error **errp) * into a device attribute set by the machine/platform to remove * all target endian dependencies from this file. */ - s->big_endian_fb = target_words_bigendian(); + s->big_endian_fb = qemu_binary_is_bigendian(); vga_dirty_log_start(s); diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index f12c4aa81eb..b3dede476ed 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -2248,7 +2248,7 @@ int virtio_set_status(VirtIODevice *vdev, uint8_t val) static enum virtio_device_endian virtio_default_endian(void) { - if (target_words_bigendian()) { + if (qemu_binary_is_bigendian()) { return VIRTIO_DEVICE_ENDIAN_BIG; } else { return VIRTIO_DEVICE_ENDIAN_LITTLE; diff --git a/system/qtest.c b/system/qtest.c index 12703a20455..8675a0bd316 100644 --- a/system/qtest.c +++ b/system/qtest.c @@ -704,7 +704,7 @@ static void qtest_process_command(CharBackend *chr, gchar **words) qtest_send(chr, "OK\n"); } else if (strcmp(words[0], "endianness") == 0) { qtest_send_prefix(chr); - if (target_words_bigendian()) { + if (qemu_binary_is_bigendian()) { qtest_sendf(chr, "OK big\n"); } else { qtest_sendf(chr, "OK little\n"); From patchwork Wed Dec 4 20:25:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847321 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp528822wrr; Wed, 4 Dec 2024 12:28:04 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUhKLXFb5QP3jkk7Um1IDcyHCyyhsuCon5ChKSh4prtjUhVp/5dkNX6z+j7t2F9EvyQWY2gWg==@linaro.org X-Google-Smtp-Source: AGHT+IHh6lpbpiVY2npoXgjrtAoKw31w74teTAi5l+TKFd4BX4AbFVZA9t4qiec8ps+gdzzDu6D/ X-Received: by 2002:a05:620a:801a:b0:7b6:67df:51ee with SMTP id af79cd13be357-7b6a5d542eemr1103550285a.19.1733344084248; Wed, 04 Dec 2024 12:28:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344084; cv=none; d=google.com; s=arc-20240605; b=MwAUJvrL8RoLjX+q7U0DfMTDu1WONuZsPXfn1Prarpz6y3B0Uwl8fnVor3AvOXkoPy QbG4/norNRWdLRU6A1/TmRNYIsHzPr3hMiicAiXlFUaIvRVxt20ZnYxQvW31xLMF05au 3IbdMqhSK+Dfw5YUet3LUNgq7g4dP7Mbz74Cd5JnExyRytlOf9seXqmsoTYWJsCuWJYQ fBWYP24Vr5d0Z/OTVmSAuA21XA/fA5g/41G2YUtKzU2EUFvTc0BFbIPFysGsn/4v5lat xoxjeNJI9iuuTXR3bOBnsSiSy1RAQms8ifPLc18UFfUwuzOaIxgTxaLtkm7kBUjuxx1P JUfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=DPV/ubcrZI2iapAPKTXZkCgfGpvNQPE7G4ysbpy5Jw0=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=LvzWlyBDIMXluzj9oNr32o18QN4MvHKvfpcgpPjmyG7QXD2m9zncMtHkcMnwz8GUM6 KpsUCX2S4zS5cGlxiw2m6AZc7drZdwL90hScv6HIDHgxH6wDNhjWX1JTUkc0lfcGJxzM wCog/pYCaqS/MQ82crl5glvJnGVesL9o4Xx8vB/Mhaqxj0yncI1W0TYAS5Pc6hCvh98N I8LEN2L/Q5uUhg0wr5Bq420BYXCuNXnxwcvxXoShHoYmWNJXiucQLvdH039P8Mf0o+fH 0bTCmEmh/xojMnUWFy+olwUlcY1R0VhJFUSSkh2UzLqdU9o3sbuxL3GzodWN/HWX6e5U 6Sjw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dRqngvAN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385faec0c9dsm6672009f8f.20.2024.12.04.12.26.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:26:17 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 02/20] hw/core/cpu: Introduce CPUClass::datapath_is_big_endian() handler Date: Wed, 4 Dec 2024 21:25:44 +0100 Message-ID: <20241204202602.58083-3-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Introduce the CPUClass::datapath_is_big_endian() handler, which returns whether a vCPU expects data in memory to be in big endian order or not. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index c3ca0babcb3..91c6581f814 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -105,6 +105,8 @@ struct SysemuCPUOps; * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. * @has_work: Callback for checking if there is work to do. + * @datapath_is_big_endian: Callback returning whether the vCPU expects + * memory data in big endian order. * @mmu_index: Callback for choosing softmmu mmu index; * may be used internally by memory_rw_debug without TCG. * @memory_rw_debug: Callback for GDB memory access. @@ -151,6 +153,7 @@ struct CPUClass { ObjectClass *(*class_by_name)(const char *cpu_model); void (*parse_features)(const char *typename, char *str, Error **errp); + bool (*datapath_is_big_endian)(CPUState *cpu); bool (*has_work)(CPUState *cpu); int (*mmu_index)(CPUState *cpu, bool ifetch); int (*memory_rw_debug)(CPUState *cpu, vaddr addr, @@ -750,7 +753,7 @@ int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs); */ bool cpu_virtio_is_big_endian(CPUState *cpu); -#endif /* CONFIG_USER_ONLY */ +#endif /* !CONFIG_USER_ONLY */ /** * cpu_list_add: From patchwork Wed Dec 4 20:25:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847337 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp530555wrr; Wed, 4 Dec 2024 12:32:35 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXVAMgpXn7rFws/gGOIHrVvU/mbZYbGgNIYFZT8psIEUibs27woJTe8Pm5lPWJoZC3iF71E3A==@linaro.org X-Google-Smtp-Source: AGHT+IESeg4AUsKDIAEto+tQcJ3jivfvm0WiDuBBS5bdFn7rcpntGhX8BfXqFYJgVhYQiK0MWR/B X-Received: by 2002:a05:620a:2441:b0:7b6:6acf:d6b0 with SMTP id af79cd13be357-7b6b41f6da8mr129522285a.30.1733344355630; Wed, 04 Dec 2024 12:32:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344355; cv=none; d=google.com; s=arc-20240605; b=f99eQJWvJ7+BsbHRRoYSsDPPEHIz2TBlAggFdhLwZJ/EUwFUtuX1HcxDDUCm6RqAMT aG0gaT7z2isXp0CyxTge+A+Shar0DR53P4EZcAzsf8Rfh1Ev2xXbiDXO4KB/dG3ensRK 5g2OGZw/xu2vKQaO8XURv45XhyPk1OipDk87xgB+jjA0st7q/lSyFnX2UnoJ9fUy9T/a Y8q0h9w4Jiv5R2BH3tfSememqP5wIfNNzxnjj1tmDcPiB52xQuaYJgYQTN5RfEaPJE/m ByS+EArpvK3cSzRLejknjbVPyfknWHBu2lhdqzHFywRWjC1ZINYTHmGjQ+an8Ehprd4Q MoXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=NhKSMfIut/lDTwvjTF8AW4idKBvUZ60ritdW+EWnr7g=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=RLB8CF/Q4RYYtrNEGwdHeIZ3I+XzrHEC8ncwoc5rc34cmcNDr+azwGVwd5ZyZoAieM atR/oAJ/7nzlOSHJ/61aJDVOBZCSAQPgeiU1MdpWn4EvqGkYEpCVR+SLBlJoLT6DWEg3 i+b5PZIycepauob/wz8HJ47sHeig8GjRC7u3UqRXFko96At5SLG8Epx1DDg6TrQ4NzB/ ViAwWywU2fOQVBPjDYhXv9K2EdDpWlPxbzGD1DCGf8IZGgBAksSKnigQbz9/I48hbmj6 ikV1F/u7GWFdqIwl2W7iUwbjfYm9oSSUfpk4kz5NbZG9Lby+xOLXRFEr+VwbWX42UgPB Zz6w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gvOyf5t2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385d7611af2sm17657530f8f.22.2024.12.04.12.26.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:26:22 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 03/20] target/arm: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:45 +0100 Message-ID: <20241204202602.58083-4-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org arm_cpu_virtio_is_big_endian() already returns whether the data path is in big endian. Re-use that. Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 6938161b954..3061b2ac18c 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1132,7 +1132,7 @@ static void arm_cpu_kvm_set_irq(void *opaque, int irq, int level) #endif } -static bool arm_cpu_virtio_is_big_endian(CPUState *cs) +static bool arm_cpu_datapath_is_big_endian(CPUState *cs) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; @@ -2664,7 +2664,7 @@ static const struct SysemuCPUOps arm_sysemu_ops = { .asidx_from_attrs = arm_asidx_from_attrs, .write_elf32_note = arm_cpu_write_elf32_note, .write_elf64_note = arm_cpu_write_elf64_note, - .virtio_is_big_endian = arm_cpu_virtio_is_big_endian, + .virtio_is_big_endian = arm_cpu_datapath_is_big_endian, .legacy_vmsd = &vmstate_arm_cpu, }; #endif @@ -2709,6 +2709,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) &acc->parent_phases); cc->class_by_name = arm_cpu_class_by_name; + cc->datapath_is_big_endian = arm_cpu_datapath_is_big_endian; cc->has_work = arm_cpu_has_work; cc->mmu_index = arm_cpu_mmu_index; cc->dump_state = arm_cpu_dump_state; From patchwork Wed Dec 4 20:25:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847331 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp530227wrr; Wed, 4 Dec 2024 12:31:36 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXWCNEbDG3yH4WmocNjm6i+nrUvvzeKK0Y9RO8DANpZ8mp/JuNncaXD6qM8Hnowm00cld+YIA==@linaro.org X-Google-Smtp-Source: AGHT+IEb2vx+e/tlEmlZQyoxCA7ygu3spULFH7cZOAu3EqGBoMxETQQiKGdYi2BHkRsq4lR5rm29 X-Received: by 2002:a05:620a:2482:b0:7af:cdd7:d6e5 with SMTP id af79cd13be357-7b6a5d51aeemr877894985a.5.1733344296514; Wed, 04 Dec 2024 12:31:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344296; cv=none; d=google.com; s=arc-20240605; b=agDLcgHxBEMhHWSJKN3fT/c/1sVbAFscfKzPtDyQaGHJPcLgCtW/qNVMJYxCT2dkfK 0UkwLCNdQh46SMnoEiqUCgiuTaewgZ9v9BGYsgUazf+79jhm8j3PldxdQcpc3XIcax86 HmIrVtHt+TqsAHwAvz6Ja0pe49JRU0ZD20Xq68hn6qQmNx6jQI7HyyQFtEAsk2zkUULi PQxoyXXvwb1i0jAUqLJ508KqPRj771TQeKw5i25Wxw7IMAn1WQ/5qUx4OIs0WzmpmFCW pAb7ORpzeOX7zPrCov2FgyUFkJy3oUhfdBWDrTq/KRmU0WkyKVLZpnI2+QtTBvg0cx2r 8Skw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=r6SfGh7GwB5WuWE7gr65NVDyXlneJEDYoQOKqsCWiWk=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=MBbuGOlTjVbXaI66hRuKJTUn+03Bgm020qiIoOtxCSW+dHZhcQ4B5hadPSwuD9//jH E2/tHSefUbm+4ZvcQIYJf1nrJC3nkBiNy71q7QxhNSlpKntyN22dU9ewIl0lELx5epdB F+CX+8b1eXLEF7ap17ZqLJeVtie9iLhbBjcxUcSK03wvlnykW8dW23ykgXwVRV7RO7hu yoVgq6w+53qYxqQdosLcfpga2lOnd7YK2ygq+EZzlM7rjwfJ3Vc2O2UyZy/w9Itsip0q atiTAJ9ThYAeWzB7xyn6bvnEJlGX9x3Os2Yo1MK2tM8gno+vfJ8NZlV+vkFPtYFdizzn QyRQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sT0hZJDC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385dfb2d7e0sm16066857f8f.44.2024.12.04.12.26.26 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:26:27 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 04/20] target/ppc: Register CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:46 +0100 Message-ID: <20241204202602.58083-5-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org ppc_cpu_is_big_endian() already returns whether the data path is in big endian. Re-use that, exposing this helper for user emulation. Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/cpu_init.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index efcb80d1c25..9650acb4850 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7285,15 +7285,15 @@ static void ppc_cpu_reset_hold(Object *obj, ResetType type) #endif } -#ifndef CONFIG_USER_ONLY - -static bool ppc_cpu_is_big_endian(CPUState *cs) +static bool ppc_cpu_datapath_is_big_endian(CPUState *cs) { cpu_synchronize_state(cs); return !FIELD_EX64(cpu_env(cs)->msr, MSR, LE); } +#ifndef CONFIG_USER_ONLY + static bool ppc_get_irq_stats(InterruptStatsProvider *obj, uint64_t **irq_counts, unsigned int *nb_irqs) { @@ -7407,7 +7407,7 @@ static const struct SysemuCPUOps ppc_sysemu_ops = { .get_phys_page_debug = ppc_cpu_get_phys_page_debug, .write_elf32_note = ppc32_cpu_write_elf32_note, .write_elf64_note = ppc64_cpu_write_elf64_note, - .virtio_is_big_endian = ppc_cpu_is_big_endian, + .virtio_is_big_endian = ppc_cpu_datapath_is_big_endian, .legacy_vmsd = &vmstate_ppc_cpu, }; #endif @@ -7455,6 +7455,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) &pcc->parent_phases); cc->class_by_name = ppc_cpu_class_by_name; + cc->datapath_is_big_endian = ppc_cpu_datapath_is_big_endian; cc->has_work = ppc_cpu_has_work; cc->mmu_index = ppc_cpu_mmu_index; cc->dump_state = ppc_cpu_dump_state; From patchwork Wed Dec 4 20:25:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847319 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp528726wrr; Wed, 4 Dec 2024 12:27:46 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXKfzmwDshIpmLav6A8Kcaz8+diCf7NdmjNRs0s/n6LIG6MNhPgi3ZPbZIH1Eiaz434xUifrA==@linaro.org X-Google-Smtp-Source: AGHT+IFeBgd+LKMfDEjJladAGCwyVfUdQkgnlzDNFlBZn/qVcVE+UyZY5hOrKsq44ugRU3zl+Jxi X-Received: by 2002:a05:6122:8c01:b0:50a:b5a3:e00c with SMTP id 71dfb90a1353d-515bf29e3ecmr10768896e0c.1.1733344066646; Wed, 04 Dec 2024 12:27:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344066; cv=none; d=google.com; s=arc-20240605; b=FG4HXPBwWd+ntGcPHuuRGElgOi9LT9CccvMz2qwFjzRkyfUJkp5NyyZUxzrEoCdwqR db+7csGaQrNngsE6P9SVE5tc5vgMGn6iohOtzixi8kklbk0msO0cnUQ8WbCZqkIZUPgL +KDtidCk2mQzrc/F7hhGc/ZLleWKFZ6XHZV/lY3n6Y4iF5cD/RN6/PxolF2TscePGsMv 1ikr/X7CxcTSkt5xVzLV7PI5Oak5oaQj04KI/1vBz4gHtGTD7iq1GgmwOg+aNQOJDnpa YcM7af4xV2/sWwSankihf6q9mW8DeV9/+cyOm6MxOqGzKBdFoKjE8dSAjjc3H/DE1kBC E2wA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=WMiVeD+NvW1fa7vIzwk9nB4EqLDwXQxpVEw4CRgejIU=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=DwrXHZ5hDXbLCWy32UhVgQ/SGTmh0FACbjn3ntAktrtHMg2ggNBj6kuHjKXug9EKag lVPQa/xNqrvk8MwqmqgPCaqr81oQB/6hW+igc9aYc53XQb4pNHbZYA61rLW+Cgb5PtGK lzUi6Ek/obkTAzv38+/TCs4ZWt2aPYdeEirCTTsIr1BJK/Oj9QthvVn0ARbTC6AcllaF GoK80T5XTdNBoZoZ5uK2X/dF9qEGA0Homipb/JJY0J69tT+rluQo8rKKtR40q58lPK+1 XH8qCll9WJVWg6K7MTBD/spq9Hp+FMOHh5mHTw/ONByzKBjOCVO5JtEaaaFkx8W9goar 5UxQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YBpmGZDf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385f10a12dbsm10075187f8f.105.2024.12.04.12.26.31 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:26:32 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 05/20] target/rx: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:47 +0100 Message-ID: <20241204202602.58083-6-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org While on RX the endianness can be set at RESET, we do not implement that; only little endianness is used. Signed-off-by: Philippe Mathieu-Daudé --- target/rx/cpu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 65a74ce720f..391f3214168 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -27,6 +27,15 @@ #include "fpu/softfloat.h" #include "tcg/debug-assert.h" +static bool rx_cpu_datapath_is_big_endian(CPUState *cs) +{ + /* + * Endianness is sampled via a pin at reset, + * but we don't implement that yet. + */ + return false; +} + static void rx_cpu_set_pc(CPUState *cs, vaddr value) { RXCPU *cpu = RX_CPU(cs); @@ -217,6 +226,7 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data) &rcc->parent_phases); cc->class_by_name = rx_cpu_class_by_name; + cc->datapath_is_big_endian = rx_cpu_datapath_is_big_endian; cc->has_work = rx_cpu_has_work; cc->mmu_index = riscv_cpu_mmu_index; cc->dump_state = rx_cpu_dump_state; From patchwork Wed Dec 4 20:25:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847326 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp530005wrr; Wed, 4 Dec 2024 12:31:03 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXouqMJzLzoaJlSIlUglcYPt2ZJvasX+fO+PAcKA47GAjx0fEOX+LGsC3aOQSq3gR0NaJy/Aw==@linaro.org X-Google-Smtp-Source: AGHT+IHwa9LRymb+w4mhfNUkhqMJjzoO1zjI10FVQM0Il2piZ6gWYfCV8+7VqCz+TWxaCah/zsdg X-Received: by 2002:ad4:5c49:0:b0:6d8:a70d:5e48 with SMTP id 6a1803df08f44-6d8c46bd175mr87063716d6.30.1733344263060; Wed, 04 Dec 2024 12:31:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344263; cv=none; d=google.com; s=arc-20240605; b=Ff8jeP4A7s2I0MVg5GUSeQhXZoSLfHCKl9iutrexszYOV25ufKwrcXpI3cvS89ao+z CUITXZATE/KzCIf4xSwRyqHbwuqDb5WxzjvUysmGtFdw1igRfAAfs/w5VOMrAW3643Wo npX0p7D1/ymLEt0egj42LVbgy0gtisxVLshWx26xyldZj2z6yiEuGyVpZlWzraWh9IrE Nbd+BqlLzfSBzDYPHwLNqw7+FjodqK57rzgbS8VVrwLTm3amVKPQ9+DI7ECm48O2uhtw WpGhpLcsD1niyW2BuR5osZaNJbdKHyfO9t7sbIBXKOmtySPeFTaDcPx3LmVG51hay+ko 114g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=HcqXxb9hdcFJ7l5TfHoNchwB1oNn7eM/DNMTs0fqYbc=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=WRVEtbiIzSfTblSDJjeb2L4Z1/Tuj8YNGfIDjtBG1hii0xQyvkzwmRoyE+Lpg/js2M XrTOw09WE11lpk7Q4kYXi6wBnQHC8+7Ho4dYYXzSidHpTSBWLcHUGz3Ui7EWx5Bar8+w 5u4s3xsx2pGJyMgU9KzIB4Dtd9JX+gFJ2ofTrxBhqJ8Xauoy92mkqP5dIsEdsjca7JYc fWMljH7trCe9Q7bp6fKwPwTwuiD663tOeRoWB7VHQjPzZrRa1m0H6ynqoNb12OSXD+iB 3845yMuokiVVxkzNhUCdvJgzMbRHSrtudovcnblhsRsfmxsb5qJNSNFWy92D9rgvu//f Mu+w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=huji3LWF; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385df74157asm16690526f8f.0.2024.12.04.12.26.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:26:37 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 06/20] target/sparc: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:48 +0100 Message-ID: <20241204202602.58083-7-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org While the SPARC data endianness can be changed at runtime, we do not implement that; only big endianness is used. Signed-off-by: Philippe Mathieu-Daudé --- target/sparc/cpu.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index dd7af86de73..de0386dbf64 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -688,6 +688,20 @@ static void sparc_cpu_dump_state(CPUState *cs, FILE *f, int flags) qemu_fprintf(f, "\n"); } +static bool sparc_cpu_datapath_is_big_endian(CPUState *cs) +{ +#if defined(TARGET_SPARC64) + /* + * SPARCv9 has a couple of PSTATE bits that set the endianness: + * Current Little Endian (PS_CLE) and Trap Little Endian (PS_TLE). + * We don't implement that yet. + */ + return true; +#else + return true; +#endif +} + static void sparc_cpu_set_pc(CPUState *cs, vaddr value) { SPARCCPU *cpu = SPARC_CPU(cs); @@ -958,6 +972,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = sparc_cpu_class_by_name; cc->parse_features = sparc_cpu_parse_features; + cc->datapath_is_big_endian = sparc_cpu_datapath_is_big_endian; cc->has_work = sparc_cpu_has_work; cc->mmu_index = sparc_cpu_mmu_index; cc->dump_state = sparc_cpu_dump_state; From patchwork Wed Dec 4 20:25:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847324 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp529913wrr; Wed, 4 Dec 2024 12:30:50 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCV1bkBgKbDGH3XMoqYCJjhctFkmUZOL0yagSc21xIUtosGYT2ZcsxB2oRzOcd2+FE52j4ZHPQ==@linaro.org X-Google-Smtp-Source: AGHT+IG2XxQlPItLNDB4M/FC97WvoXyQnCfB1nSbBMVOGYq6WSCxC3DpEisiZseDkBNpk5MLhwXX X-Received: by 2002:a05:6122:520d:10b0:515:daa7:ed0b with SMTP id 71dfb90a1353d-515daa7f282mr2384962e0c.0.1733344249916; Wed, 04 Dec 2024 12:30:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344249; cv=none; d=google.com; s=arc-20240605; b=BdXPntGtYYN03/B16VXV0E2AArTA3d3HAm8r9rfhiXdPo3Wm1w+vZPigqIVPcnkU5z PgixV302t83X5NN/HAVhiK44pcTc3yfsabMnw4amyi6D7JXtpPNb5yKzQChQwaOeOxoo zjnhnB//s6SZbT8z00UobK+ulFcP3IWREjKgKGLk6+t4yd1SObv3dL7R3tvCR3SWL/g2 FDDCY5WWDRU7HBvJEUIoTGa13/W7PIuEQlYoSwctV0TUdyxurSBjCXDdoMM6bmWkEmnR XbLnkOAzO7gg4tu9zYdNqJJ9173JugB+XcZu21OgPcWmN8yyXoZpOEI0aAThomcCY5ci +h6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=CYgcsQiZUJ1Cl6dAvq/NYt2lHMXmmLs9dt69qfBSoSM=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=AnHMmjRLEEWKDUDxMKbHA41/lMCWZFVtsJ2/A9wxe4wFqFTz7nLH3CvX39Al8QOKeZ X1sjjCh2SLvblpO+cKXcoeFy+heUwuA0z+OJzE+tvQfS/2jvsp+uuQJEGcsBj2e0nPCs 7ArcN0hy/0qCYCOfK1QbVIOy43nNv9UmQwtB1VomnZ5O+hBA0F1TW5E3gJqKUwRlVz9O hiykY9PgXNOJRCTqqcddMgNgeUn+XsfiRw6L9DG03/J2XczH9I5VdELwew1y2Gax6Ran gJegiSkkXFe0BRjTPAaStV/pvJh0HVE7dRiLPBB67s1tIGH/Ptd0N5lyoZmuoleHGhaS h51g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=h+JoFZKz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385e49cd788sm13643172f8f.6.2024.12.04.12.27.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:19 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 07/20] target/riscv: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:49 +0100 Message-ID: <20241204202602.58083-8-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org While the RISC-V data endianness can be changed at runtime, we do not implement that. The current translation code assumes little-endian memory accesses (See commit a2f827ff4f4 "target/riscv: accessors to registers upper part and 128-bit load/store"). Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f219f0c3b52..b31b9b3471d 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -60,6 +60,22 @@ bool riscv_cpu_is_32bit(RISCVCPU *cpu) return riscv_cpu_mxl(&cpu->env) == MXL_RV32; } +static bool riscv_cpu_datapath_is_big_endian(CPUState *cs) +{ +#ifndef CONFIG_USER_ONLY + /* + * A couple of bits in MSTATUS set the endianness: + * - MSTATUS_UBE (User-mode), + * - MSTATUS_SBE (Supervisor-mode), + * - MSTATUS_MBE (Machine-mode) + * but we don't implement that yet. + */ + return false; +#else + return false; +#endif +} + /* Hash that stores general user set numeric options */ static GHashTable *general_user_opts; @@ -2764,6 +2780,7 @@ static void riscv_cpu_common_class_init(ObjectClass *c, void *data) &mcc->parent_phases); cc->class_by_name = riscv_cpu_class_by_name; + cc->datapath_is_big_endian = riscv_cpu_datapath_is_big_endian; cc->has_work = riscv_cpu_has_work; cc->mmu_index = riscv_cpu_mmu_index; cc->dump_state = riscv_cpu_dump_state; From patchwork Wed Dec 4 20:25:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847320 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp528745wrr; Wed, 4 Dec 2024 12:27:50 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUaZzuqA2zw3ix/EerFC2eg+32vVeRolZqcjiQfdB/hunRjnJU5UqgeA8YShNGGE/OyWKXdxA==@linaro.org X-Google-Smtp-Source: AGHT+IE+sccKri/+1DyIxwNogMSsiHrQhwS7vAstP5MVdyFEIdjKxUVhMnM9xB90ilaYHFeBxHZJ X-Received: by 2002:a05:620a:1a26:b0:7b1:5143:8d9e with SMTP id af79cd13be357-7b6a61cbff2mr906803185a.47.1733344070155; Wed, 04 Dec 2024 12:27:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344070; cv=none; d=google.com; s=arc-20240605; b=dR5ruUddBjlu5GTFchhRXRRfPtXZoxAl9Yn2T1wwzsxqxd2syreQVRLO/8w1Tipf78 PWONs7FbIq/crdWJDdlkB8iyAkde6kNL9lDtC7EaSMat8SOCVnMIlwEFhg2+6XxaoMNM vorD5fStltr6lKTALROWXjfKiqfpvPwApZRK/R5xjTJH0PFoNuk91tCq8hMYyeTZ+qUk vwFoBTidEDfcbcoBJOWvABPyO4L92pnBezTXkzVUjIJh/Tbc8IQHhnOFMCiiZv+n6mgG kyqlRU0G8vm5ND4bXFN/Ugw3nZo6NdfDWOg/MMkIoc0XJy09nPv6UeBZ9s04SSD9IYrc wm/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=IbFwYvNsoagTIF3RGxGTKY4/+lkaBIKwukflDbrm8ec=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=GWLcXAFe7hDSdI5V2brKepL1ao7b0oI26qSv1LeKrf9BTf6WMgyAu2P0mxftfhDKYn jiR6Tc/nTYswsEY06M9lCig7T3Zj+MZQBM0aV2ohj+Zhpp9K+dt5eOeebWH1syQHzSCA Wnquk3z7tvSV/J4l2Xn2oy4WdG9VeekDf4Vp3JCinMqLtVjp4KqO6tqvurRdlHtB56fW ty7gJmpdjIYV9hO1fU57GJnIlbJTWlpf91cWB8XR7znpdmRr9RF634QRSJf3siHDMTL7 4zLAyW+tHkGzv3tJkOmkiStSr1CH1eP99m+eereOVqcW0NRFvG8HWEQi4JJ0OXWN+Lwv pMaQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oHBrfr6S; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d5272b78sm34941055e9.9.2024.12.04.12.27.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:24 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 08/20] target/sh4: Expose CPUSH4State::little_endian property Date: Wed, 4 Dec 2024 21:25:50 +0100 Message-ID: <20241204202602.58083-9-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org SH4 CPUs endianness is set with an external pin in a power-on reset. Signed-off-by: Philippe Mathieu-Daudé --- target/sh4/cpu.h | 6 ++++++ target/sh4/cpu.c | 8 ++++++++ 2 files changed, 14 insertions(+) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index d928bcf0067..2502ddba102 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -198,6 +198,12 @@ typedef struct CPUArchState { /* Fields from here on are preserved over CPU reset. */ int id; /* CPU model */ + /* + * The endian is set with an external pin in a power-on reset. + * The endian cannot be changed dynamically. + */ + bool little_endian; + /* The features that we should emulate. See sh_features above. */ uint32_t features; diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 8f07261dcfd..f54005644c9 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -23,6 +23,7 @@ #include "qapi/error.h" #include "qemu/qemu-print.h" #include "cpu.h" +#include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "exec/exec-all.h" #include "fpu/softfloat-helpers.h" @@ -231,6 +232,12 @@ static void superh_cpu_initfn(Object *obj) env->movcal_backup_tail = &(env->movcal_backup); } +static Property superh_cpu_properties[] = { + DEFINE_PROP_BOOL("little-endian", SuperHCPU, + env.little_endian, !TARGET_BIG_ENDIAN), + DEFINE_PROP_END_OF_LIST(), +}; + #ifndef CONFIG_USER_ONLY static const VMStateDescription vmstate_sh_cpu = { .name = "cpu", @@ -270,6 +277,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data) device_class_set_parent_realize(dc, superh_cpu_realizefn, &scc->parent_realize); + device_class_set_props(dc, superh_cpu_properties); resettable_class_set_parent_phases(rc, NULL, superh_cpu_reset_hold, NULL, &scc->parent_phases); From patchwork Wed Dec 4 20:25:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847328 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp530112wrr; Wed, 4 Dec 2024 12:31:19 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVLzq7TlTt5wrMLrq0ffQV1PTkpDzTh1j5eguN47LebE+Br8LW8Z54540PE3h7SfKzR6QspwA==@linaro.org X-Google-Smtp-Source: AGHT+IGw7BSgJgaDihJShd/3dhaApKHlKJxTlI1oWMgJZkeR3flA/6PzbqW7/E0Y7wkqgyQA3tCv X-Received: by 2002:a05:6102:f11:b0:4af:5682:975b with SMTP id ada2fe7eead31-4af973ef0cfmr10416706137.24.1733344279654; Wed, 04 Dec 2024 12:31:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344279; cv=none; d=google.com; s=arc-20240605; b=dpi7tNQ9FGyW1mwg/iq3j9nhX/w9eD5466QcKfFzF3UAEzvMV9azfRxkmceA9wthR9 SRWeutAEMB0PLyLT3C5YL8wTGSMQe7xJNwvjgFKtRCEHcEa7oKRoOKY55mowwr46L5VO AwVLFPdHeoO+2yIu/3yvTRPvy00qTFL+Ck4zwu3i6VNgWFrtUvffY/imr3u5woOIV/6v XJhnCPOaIxgstLzAff0C6BqfXftk1cWXvGcHx5DJhXrhCAEfYbt5K/Bnx6rpdwK0MQ3+ IWute/BVVDVPfWpsPCeRv07m25BQhLpjT6iNU76EBj/hkpBGPS79p7XF25AXC1H1gjNV MNCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=0gEXG14yGHmTwK2PkgnJuKn3fmfO28N4tNUnsroDG+o=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=GUJNzyXAn46bL5NIdBuxtNBVvXnAMLVsfe1QDznAP/bcwF3yFxDNXDVNu2uR9y3Fph RXitqs4bKWstL9uMW5ePDn2vPsv4ytVUxE2Ez/RUY0Cq+BtxVeTubdTYbfjOsvHS22ci BIV/GeoxhZyEMgEhqVv+c0mFxlVS3LaVjt4J1EVOaDQaq0SJ2BpiTZqhG1q1QuP1GoSP JPRUvOscW8WTA/d5JoFVz6VUhf4N9xzJeknP6ofJGVHJifVNp9TRgQ0j0Mb836qQptP5 VbFY/qyhdf3bEA4BHebabuOZzrt2QT49boHDU+nRAyPB4qQs6cG6D/4lw1kY4ZhMCIXB 1QRg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Glp+Z1yU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385d80a77a0sm17412914f8f.58.2024.12.04.12.27.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:30 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 09/20] target/sh4: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:51 +0100 Message-ID: <20241204202602.58083-10-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Implement SH4 datapath_is_big_endian() helper, returning the 'little_endian' property set at reset. Signed-off-by: Philippe Mathieu-Daudé --- target/sh4/cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index f54005644c9..69108c1676e 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -29,6 +29,13 @@ #include "fpu/softfloat-helpers.h" #include "tcg/tcg.h" +static bool superh_cpu_datapath_is_big_endian(CPUState *cs) +{ + SuperHCPU *cpu = SUPERH_CPU(cs); + + return !cpu->env.little_endian; +} + static void superh_cpu_set_pc(CPUState *cs, vaddr value) { SuperHCPU *cpu = SUPERH_CPU(cs); @@ -283,6 +290,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data) &scc->parent_phases); cc->class_by_name = superh_cpu_class_by_name; + cc->datapath_is_big_endian = superh_cpu_datapath_is_big_endian; cc->has_work = superh_cpu_has_work; cc->mmu_index = sh4_cpu_mmu_index; cc->dump_state = superh_cpu_dump_state; From patchwork Wed Dec 4 20:25:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847335 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp530520wrr; Wed, 4 Dec 2024 12:32:30 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVdaugwxgLs9Ub7eODfIOcyzdbrzM3JPVkyH3IUpgA3tAcI83x5C3wyAefhL+ok1PsFc/jAgQ==@linaro.org X-Google-Smtp-Source: AGHT+IGRaid2P69I0wAM0RoW2Tb3iWcy4aCPUpc7mnRM3eDGBjJ+uCLnG28zs+fE0fLOSmqWzjiK X-Received: by 2002:a05:622a:cf:b0:466:96ef:90c with SMTP id d75a77b69052e-4670c39a985mr128698851cf.41.1733344350570; Wed, 04 Dec 2024 12:32:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344350; cv=none; d=google.com; s=arc-20240605; b=SLUt8H9XRgXHb32AILpBE2G+JYSl83na5IL6H0gGkqaHxhLWYAKURqvHq8jdSD+0ge /dQ6vRJna5CLYmJn2qxbtxIu/QOjy73Np52d9SMCElP6DKgX0njVoJtW3u1ur1LBeTcb TA5YU/DycewQsu20ZQtAvsmgBFjZ9PvMq5ur/MYzfpU8Zd0RYl2S4dqzyDNX0Df71gzj OhxUXvq1m+XTeKcqVBXNPMFN0Lm2726FFNzYlo6ADk125X6D4SfCdxJ7fSWXCQcah3PV BqF3m4tmMRh9iJ8+INgtJlFLB8hK6ku0IgcWwDurdZyHtak8ELShhRRW+9GIeX5QGcfz 7Oog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=OthQd7angO3Yu/emzCL7LUH+S5aSARcEIzo6mzzFka8=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=UK49t7pBEdQTHH46a4FqwM7685BavcfPom/jt36r2IE0E81NEcMmDLwnqx8tt08+ZC xE7lv06Ty9C/f4XQjqjOGqXEW7Y6IxupwsyOziTtPo9IkXsdtCmWWnrJhqFpdYPL/AKx fiV92sXgDu8fvmGWQ7pgsh50ceLMq21Wu5a2+awbAyoJKo1AtDhpcX0LWHZwm90xbmAF tkALvjg6ngc6JSu4kpWUGBX/csYIm/AueJZ8ZQrGPtJtwwtTeBl1eZNWkELRJVWvLgwG CsTLXwnQyLHuAQEJFNHuKjHEd8/u16FNamBm0/HPeQJsR+kleb5F1Ee4VW4M9YQ2Rz2s kQUQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WELlmwSj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d527eeedsm35050045e9.19.2024.12.04.12.27.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:35 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 10/20] target/microblaze: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:52 +0100 Message-ID: <20241204202602.58083-11-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Implement the MicroBlaze datapath_is_big_endian() handler, returning the value of the ENDI bit. Signed-off-by: Philippe Mathieu-Daudé --- target/microblaze/cpu.h | 2 ++ target/microblaze/cpu.c | 11 +++++++++++ 2 files changed, 13 insertions(+) diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 3e5a3e5c605..dd6b61b34ba 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -412,6 +412,8 @@ void mb_tcg_init(void); /* Ensure there is no overlap between the two masks. */ QEMU_BUILD_BUG_ON(MSR_TB_MASK & IFLAGS_TB_MASK); +bool mb_cpu_datapath_is_big_endian(CPUState *cs); + static inline void cpu_get_tb_cpu_state(CPUMBState *env, vaddr *pc, uint64_t *cs_base, uint32_t *flags) { diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 710eb1146c1..3a0e5713415 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -26,6 +26,7 @@ #include "qapi/error.h" #include "cpu.h" #include "qemu/module.h" +#include "sysemu/hw_accel.h" #include "hw/qdev-properties.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" @@ -119,6 +120,15 @@ static bool mb_cpu_has_work(CPUState *cs) return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); } +bool mb_cpu_datapath_is_big_endian(CPUState *cs) +{ + MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); + + cpu_synchronize_state(cs); + + return !cpu->cfg.endi; +} + static int mb_cpu_mmu_index(CPUState *cs, bool ifetch) { CPUMBState *env = cpu_env(cs); @@ -447,6 +457,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) &mcc->parent_phases); cc->class_by_name = mb_cpu_class_by_name; + cc->datapath_is_big_endian = mb_cpu_datapath_is_big_endian; cc->has_work = mb_cpu_has_work; cc->mmu_index = mb_cpu_mmu_index; cc->dump_state = mb_cpu_dump_state; From patchwork Wed Dec 4 20:25:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847330 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp530166wrr; Wed, 4 Dec 2024 12:31:26 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWgcbtfpqCimPkFJ3zOqPSIBXPp/u7IQBaRyqHBlX8qsOxeiYcaUHToriSrbapNaPBGrT5/+A==@linaro.org X-Google-Smtp-Source: AGHT+IEOPJvHz8QKiTLSMHiwJ8QEOBMRigdc1YAfdC1EjhRV5TWqRwLFFgfAlimMgCV1I8n79wPS X-Received: by 2002:a05:6102:3054:b0:4a4:8d45:6839 with SMTP id ada2fe7eead31-4af97268516mr12043228137.13.1733344286707; Wed, 04 Dec 2024 12:31:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344286; cv=none; d=google.com; s=arc-20240605; b=TvTqV9LD2dTxXpUpUYvuO5IWKlVyKjmEwb98jYJoMQUJu0fQHRt5i/6OlVcY9d7bPW y6om+kiiK9gHNKhIsP0wJtB4luu2cCx89ly8RURztQ5ioF5rO2Irco0/FkGvUNCue2Nw LTtT+S6ofxltF+gk9hdBxUli0XUVOIstUnZUY/2V2HpHd/MxdE94H96LZfANY2OM73cd pBVXTiicaqbn+MvAUV+K07TdHoVtYaYrylo10zRoGRGeD5VunKbPMGn4BxbXIMrCpM+k YVV563OGZMtkK6Ow2qE3aB7eVCXA/Jmq8cL/fRqG9fTEkcE7PX9YBrnJayT7cq/9X7v7 crIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=zWutDH14OyliM2KY1fyQJ86hTSYSkrVk4NaKh8Buzj4=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=jHucqfZT/o64Ldtxw5e8k+t45rRjydl1H/WOnTUdKRGnKJ/gBWpt++fWAD3nZ3pRsA i2lccYiqL5Egk/9fjXWQu3s3ePFIjqbt9dWoHUgMjCbTzKuyzvH/XOPnu+BbfbJHCEPV FJpRA2Ahoz/YpZZm2Ulz8AiGBDY5cYVqVfHnlWs3J91yytumH764mqd1sGPt72O6gYhY Q4nLXbDStrXnCnOqkRXlZGnX/hHqCevdtZsfybJmMRrpcOMM2zw4DFiheOB2yIhuaPxC DQvTE21e4BSYjl1brln/OZxPOthStWaQHGrn9mio/HOttUX0iJx889RhyOZ+jVMhvx2V 6tDg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DqEQNvci; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d52c0dd4sm35612765e9.34.2024.12.04.12.27.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:40 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 11/20] target/mips: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:53 +0100 Message-ID: <20241204202602.58083-12-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Implement MIPS datapath_is_big_endian() handler using the already existing mips_env_is_bigendian() method. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index d0a43b6d5c7..13d0ceaa8af 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -27,6 +27,7 @@ #include "internal.h" #include "kvm_mips.h" #include "qemu/module.h" +#include "sysemu/hw_accel.h" #include "sysemu/kvm.h" #include "sysemu/qtest.h" #include "exec/exec-all.h" @@ -132,6 +133,13 @@ static vaddr mips_cpu_get_pc(CPUState *cs) return cpu->env.active_tc.PC; } +static bool mips_cpu_datapath_is_big_endian(CPUState *cs) +{ + cpu_synchronize_state(cs); + + return mips_env_is_bigendian(cpu_env(cs)); +} + static bool mips_cpu_has_work(CPUState *cs) { CPUMIPSState *env = cpu_env(cs); @@ -581,6 +589,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) &mcc->parent_phases); cc->class_by_name = mips_cpu_class_by_name; + cc->datapath_is_big_endian = mips_cpu_datapath_is_big_endian; cc->has_work = mips_cpu_has_work; cc->mmu_index = mips_cpu_mmu_index; cc->dump_state = mips_cpu_dump_state; From patchwork Wed Dec 4 20:25:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847333 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp530464wrr; Wed, 4 Dec 2024 12:32:19 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWxE8PLPFhYRTXnzSuV8PC81fIPD5jOiVEVHGtDClTCbmzvg6Edfp76G2WQd8L4m5XWA2cmVA==@linaro.org X-Google-Smtp-Source: AGHT+IEu/uPc/vGbNMu7wpwOkmbhA7E4UcWEPceWKzc47SuMbTEB/dN3oEXBEzN4TeGVDkdEvwu0 X-Received: by 2002:a05:6214:2025:b0:6d8:9bbe:392d with SMTP id 6a1803df08f44-6d8b72ec3bbmr131165226d6.6.1733344339121; Wed, 04 Dec 2024 12:32:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344339; cv=none; d=google.com; s=arc-20240605; b=FnExbnXaN1ymmFgdcGZMoDUp3Ei4/xZTnAUlpEBO7J0SwNPlvnqAsPpHreB+1ukNhN jXoyfgxAUWstKZ8rLvyGsQDBxLZrrvmjJN42+ft2QcqL12Nez+jVCfuWelp4UU+m2T4J VvhFOkOayIwhKsn3ALnKQp2MC04voMoNFTFh9ucKYHu4axVwurUuhEamWBzBhiBY62NM 6odAkag3qg5oWw9H6eME6Svatx+3bIC+RD28tEOEkSd5KelNOes2uS2rLbOcv3cPTJaS OmCtHYYT50Eg+07/lJImJeKRqRwVHTdeeYz4GKYo4ibRbxpfTjusLChtYzMZOKBFN7f9 I6XQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=NfTBm75o97Cz8/aU/8hyy/8ZcyfCCBeJMjQXzg2r+cU=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=Jih0LCM23AI/ym4hQrA1FPqpB0RNEu0Ofzb+AjhzB0XGf1GKXIk7W9tJLcpBG8KFjH NroiInh5xbGntaJQHSTA6ayNBMc6nQ2v6kzRDWwJXEEioejXiJypBeT8wA018AvMgkKZ lNtxb9xkGQVbB/Yc8c7qttfYVz67Xi9ZPkek0Cc0MjxKkMrizwPw75rcV4Fq43EQUAuT Amqf40hAs22T95Q4Z3OWt/4KPxjzeTN80SD1Fi3bhGjabDTrRyWMHVrdy9fAfooMIUlS fvXh/CvapeX92kx3eiQsfbE1QH6SbZRQ5XwEwzVzZHhPnbNmpnLKfNidJ43DTxqS2U6z qFIg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SqzBevB8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d52aa0b4sm34940765e9.35.2024.12.04.12.27.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:46 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 12/20] target/xtensa: Implement xtensa_isa_is_big_endian() Date: Wed, 4 Dec 2024 21:25:54 +0100 Message-ID: <20241204202602.58083-13-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Xtensa internal fields are opaque, only accessible by the Xtensa libisa. Implement xtensa_isa_is_big_endian() to get vCPU endianness. This should be implemented in libisa, not QEMU, but I couldn't figure out where to contribute this. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/xtensa/xtensa-isa.h | 1 + target/xtensa/xtensa-isa.c | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/include/hw/xtensa/xtensa-isa.h b/include/hw/xtensa/xtensa-isa.h index a289531bdc8..1cb8e6ccb66 100644 --- a/include/hw/xtensa/xtensa-isa.h +++ b/include/hw/xtensa/xtensa-isa.h @@ -829,6 +829,7 @@ const char *xtensa_funcUnit_name(xtensa_isa isa, xtensa_funcUnit fun); int xtensa_funcUnit_num_copies(xtensa_isa isa, xtensa_funcUnit fun); +bool xtensa_isa_is_big_endian(xtensa_isa isa); #ifdef __cplusplus } diff --git a/target/xtensa/xtensa-isa.c b/target/xtensa/xtensa-isa.c index 630b4f9da1b..36eb4bcf3d4 100644 --- a/target/xtensa/xtensa-isa.c +++ b/target/xtensa/xtensa-isa.c @@ -1741,3 +1741,10 @@ int xtensa_funcUnit_num_copies(xtensa_isa isa, xtensa_funcUnit fun) CHECK_FUNCUNIT(intisa, fun, XTENSA_UNDEFINED); return intisa->funcUnits[fun].num_copies; } + +bool xtensa_isa_is_big_endian(xtensa_isa isa) +{ + xtensa_isa_internal *intisa = (xtensa_isa_internal *)isa; + + return intisa->is_big_endian; +} From patchwork Wed Dec 4 20:25:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847322 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp528917wrr; Wed, 4 Dec 2024 12:28:20 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCV3MQa/9qbUzZpjHGB32liAGCchnjem4wEH0nFP8xKasLuMG5DDlBfKA0sBoq0hriJI+s4jSg==@linaro.org X-Google-Smtp-Source: AGHT+IFJeD86BTl/hfBHId4YzraKqjSdtpQHsGFBBw75pR99IYZ92Eu3cdcpx2ReHTo5qi9Pm4hI X-Received: by 2002:a05:620a:4587:b0:7b1:1524:53fb with SMTP id af79cd13be357-7b6a5d51461mr833891985a.2.1733344100235; Wed, 04 Dec 2024 12:28:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344100; cv=none; d=google.com; s=arc-20240605; b=MFBVS+ZY/lnKcT5Q4QUNZCXnuXzIIXwg/l9iRD+UpCSrax5Y9TdRsS3w5biYd52BTp fkBm7/3XvZvDqxMzv9me2P/O+x0uturxRUGxIHNjAfvcKlr/UqdAXRyyE7ZyRAAG3fOn ifu28W6B5fkoisZDPp3U0Koy8gZWHn9FTxAavXOW3xSRXkebBaMP6ikVKfzplASFk6e1 Pxw3ANKZ7uLlpKyHFnx6v+PQU9aZGvkqeBETrZXH4rceRR2MyijhfL3z5Uk3CKYjnRj0 xAUMQi5T0FAXBoPOtxMpiYdIM7HrJ41dpp8P/wUebpEWL0Xi1dbIVfsl2Lcr86FA8OOX EYPA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9GnnholsvXz5CZtkYpeYGZkC8DvPWibSAfIk7aKacnw=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=jmP2NFSRb0IxVz/2WH0wP4eIVK3rJ9++Rv5f703b0v68wqOHDPXlJwtUB4dueMAtIc 3iZRTVDR1mnMyFpkBFLIRSHje5niJRPy1eG65vBJm9kD5xm4ngcuZ5Y6qXOKh6+ShH6T xBJdHpQHJMrMuE7YC7gGnz7F7ls4gUGyc5gia//ZUluLIL2K0Eqvuga3kA7gVZMqvrsB fHgRi7RwB4HqL/0DGseVjksmP0PRYiQry4N001zKjpjQJMmLa22vYPsVbzyBf3Maud8j uxl4JhayLwbMxcvpYW7nK1miFmI4ag69MrhDKaMrkSxkZCLLIB5/pTpxFXTHff0S//Qg B8zA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uYyGvG58; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385e4617a61sm13704523f8f.3.2024.12.04.12.27.50 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:51 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 13/20] target/xtensa: Implement CPUClass::datapath_is_big_endian Date: Wed, 4 Dec 2024 21:25:55 +0100 Message-ID: <20241204202602.58083-14-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Implement Xtensa datapath_is_big_endian() helper via libisa. Signed-off-by: Philippe Mathieu-Daudé --- Other accesses to xtensa_isa_internal fields don't call cpu_synchronize_state(), and the libisa doesn't provide a way to switch endianness from translation code. Should we add a sync just in case? --- target/xtensa/cpu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 6f9039abaee..7bf792fd0f4 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -40,6 +40,13 @@ #endif +static bool xtensa_cpu_datapath_is_big_endian(CPUState *cs) +{ + CPUXtensaState *env = cpu_env(cs); + + return xtensa_isa_is_big_endian(env->config->isa); +} + static void xtensa_cpu_set_pc(CPUState *cs, vaddr value) { XtensaCPU *cpu = XTENSA_CPU(cs); @@ -256,6 +263,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data) &xcc->parent_phases); cc->class_by_name = xtensa_cpu_class_by_name; + cc->datapath_is_big_endian = xtensa_cpu_datapath_is_big_endian; cc->has_work = xtensa_cpu_has_work; cc->mmu_index = xtensa_cpu_mmu_index; cc->dump_state = xtensa_cpu_dump_state; From patchwork Wed Dec 4 20:25:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847325 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp529957wrr; Wed, 4 Dec 2024 12:30:56 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWh4MhfpcApe7LguRfXiuvuJmg2f8WqFQ3pM4hcB2I+U4aSbqUgNE+rAzZRgaFIpzl3VsGfmA==@linaro.org X-Google-Smtp-Source: AGHT+IGDyVS3rfeVlEZ5G8vwkR59sMGF9mHNu6qsAaB8y5i7DnlDTHAalqO10J04/DNvk+cub8mX X-Received: by 2002:a05:6830:6207:b0:71d:4488:19f1 with SMTP id 46e09a7af769-71dad5f0030mr9922075a34.5.1733344256551; Wed, 04 Dec 2024 12:30:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344256; cv=none; d=google.com; s=arc-20240605; b=lxhIv5y9cwK255TPJZtGCqmAf50tTRQHIATeY88+yXBvAsy47oOooiOPwmmz3CLtd+ njC2+/lR+JtDTDJfKNsORFj75JFR+QcaZ59bGeMiE3k/aeB/QA0ysY23ZtQdSIGHgAAs r/Cu7K9yo11ql4T1ArCR2rmhwnR1lLWGkfuA6+gMhNy5YXLrCaUGc705McvM1o2vuMcD agn8anyDNBVEYKYtBiwz/9uWIBfP/aw5cZAYVX71XWRtiT6LbmXPl2ZPt2abmDQNiDFN J3i3zstbhEBTdYuMQLEQSp8kFfthSrrJ+9t3WHdBjj3bwctIwt+kIei6GYC3iVc9GVDZ zkNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=nkZKIsDoSM+ma8HKWntZmvOsZaSUYdAuJc6HKLqlim0=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=jaCqwyB4XgRjJ2T80La/OO0lVgkjNVTvMrRDspNid7PgoAWiNXzqWtqlu90uWSUt7r Bn+woctIsmRJMrIfJEcMqA9eV8HKP++507JU3QRTNvkivbY46IoACfiWGOjTRcs1cwWn jqf3tB2SKH+FMek/wzHXFRY9Bmps9DCkVGrBOUHR9lfREkMCc4CgYJSA5w7ThIyOZB4Y c3EYpk0qVUQSCORRA32Wx+jAqTCHEWIXtX2v2mLoCSQUEbApJJmG+f6l+v1BiPUMoriw hFszoEhFyiyLUm+cReQnkQhLUXKPeNojZ5teOTj2C5yzxx1MsAK9OSpqoAHSb3m/yPho dOZw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Fuc/JnqI"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d52cbd16sm34950775e9.41.2024.12.04.12.27.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:57 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 14/20] target: Implement CPUClass::datapath_is_big_endian (little-endian) Date: Wed, 4 Dec 2024 21:25:56 +0100 Message-ID: <20241204202602.58083-15-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org For all targets which have endianness architecturally predefined as little endian (built using TARGET_BIG_ENDIAN=n), their datapath_is_big_endian() handler simply returns %false. Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/cpu.c | 6 ++++++ target/avr/cpu.c | 7 ++++++- target/i386/cpu.c | 6 ++++++ target/loongarch/cpu.c | 6 ++++++ target/tricore/cpu.c | 6 ++++++ 5 files changed, 30 insertions(+), 1 deletion(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 5d75c941f7a..ee844a4c455 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -27,6 +27,11 @@ #include "fpu/softfloat.h" +static bool alpha_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + static void alpha_cpu_set_pc(CPUState *cs, vaddr value) { CPUAlphaState *env = cpu_env(cs); @@ -247,6 +252,7 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data) &acc->parent_realize); cc->class_by_name = alpha_cpu_class_by_name; + cc->datapath_is_big_endian = alpha_cpu_datapath_is_big_endian; cc->has_work = alpha_cpu_has_work; cc->mmu_index = alpha_cpu_mmu_index; cc->dump_state = alpha_cpu_dump_state; diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 3132842d565..f32f1bee61f 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -159,6 +159,11 @@ static ObjectClass *avr_cpu_class_by_name(const char *cpu_model) return object_class_by_name(cpu_model); } +static bool avr_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + static void avr_cpu_dump_state(CPUState *cs, FILE *f, int flags) { CPUAVRState *env = cpu_env(cs); @@ -230,7 +235,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) &mcc->parent_phases); cc->class_by_name = avr_cpu_class_by_name; - + cc->datapath_is_big_endian = avr_cpu_datapath_is_big_endian; cc->has_work = avr_cpu_has_work; cc->mmu_index = avr_cpu_mmu_index; cc->dump_state = avr_cpu_dump_state; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 3725dbbc4b3..f783d311579 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2008,6 +2008,11 @@ static char *x86_cpu_class_get_model_name(X86CPUClass *cc) return cpu_model_from_type(class_name); } +static bool x86_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + typedef struct X86CPUVersionDefinition { X86CPUVersion version; const char *alias; @@ -8588,6 +8593,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->class_by_name = x86_cpu_class_by_name; cc->parse_features = x86_cpu_parse_featurestr; + cc->datapath_is_big_endian = x86_cpu_datapath_is_big_endian; cc->has_work = x86_cpu_has_work; cc->mmu_index = x86_cpu_mmu_index; cc->dump_state = x86_cpu_dump_state; diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 57cc4f314bf..b9cf0091546 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -742,6 +742,11 @@ static ObjectClass *loongarch_cpu_class_by_name(const char *cpu_model) return oc; } +static bool loongarch_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags) { CPULoongArchState *env = cpu_env(cs); @@ -836,6 +841,7 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data) &lacc->parent_phases); cc->class_by_name = loongarch_cpu_class_by_name; + cc->datapath_is_big_endian = loongarch_cpu_datapath_is_big_endian; cc->has_work = loongarch_cpu_has_work; cc->mmu_index = loongarch_cpu_mmu_index; cc->dump_state = loongarch_cpu_dump_state; diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 1a261715907..ba53d83f662 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -29,6 +29,11 @@ static inline void set_feature(CPUTriCoreState *env, int feature) env->features |= 1ULL << feature; } +static bool tricore_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + static const gchar *tricore_gdb_arch_name(CPUState *cs) { return "tricore"; @@ -191,6 +196,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data) resettable_class_set_parent_phases(rc, NULL, tricore_cpu_reset_hold, NULL, &mcc->parent_phases); cc->class_by_name = tricore_cpu_class_by_name; + cc->datapath_is_big_endian = tricore_cpu_datapath_is_big_endian; cc->has_work = tricore_cpu_has_work; cc->mmu_index = tricore_cpu_mmu_index; From patchwork Wed Dec 4 20:25:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847323 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp529340wrr; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d526b158sm36718205e9.8.2024.12.04.12.28.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:28:02 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 15/20] target: Implement CPUClass::datapath_is_big_endian (big-endian) Date: Wed, 4 Dec 2024 21:25:57 +0100 Message-ID: <20241204202602.58083-16-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org For all targets which have endianness architecturally predefined as big endian (built using TARGET_BIG_ENDIAN=y), their datapath_is_big_endian() handler simply returns %true. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Brian Cain --- target/hexagon/cpu.c | 6 ++++++ target/hppa/cpu.c | 6 ++++++ target/m68k/cpu.c | 6 ++++++ target/openrisc/cpu.c | 6 ++++++ target/s390x/cpu.c | 6 ++++++ 5 files changed, 30 insertions(+) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 020038fc490..6407ed80c59 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -245,6 +245,11 @@ void hexagon_debug(CPUHexagonState *env) hexagon_dump(env, stdout, CPU_DUMP_FPU); } +static bool hexagon_cpu_datapath_is_big_endian(CPUState *cs) +{ + return true; +} + static void hexagon_cpu_set_pc(CPUState *cs, vaddr value) { cpu_env(cs)->gpr[HEX_REG_PC] = value; @@ -342,6 +347,7 @@ static void hexagon_cpu_class_init(ObjectClass *c, void *data) &mcc->parent_phases); cc->class_by_name = hexagon_cpu_class_by_name; + cc->datapath_is_big_endian = hexagon_cpu_datapath_is_big_endian; cc->has_work = hexagon_cpu_has_work; cc->dump_state = hexagon_dump_state; cc->set_pc = hexagon_cpu_set_pc; diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index c38439c1800..8ccd224f2a4 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -203,6 +203,11 @@ static void hppa_cpu_initfn(Object *obj) cpu_hppa_put_psw(env, PSW_W); } +static bool hppa_cpu_datapath_is_big_endian(CPUState *cs) +{ + return true; +} + static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model) { g_autofree char *typename = g_strconcat(cpu_model, "-cpu", NULL); @@ -245,6 +250,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data) &acc->parent_realize); cc->class_by_name = hppa_cpu_class_by_name; + cc->datapath_is_big_endian = hppa_cpu_datapath_is_big_endian; cc->has_work = hppa_cpu_has_work; cc->mmu_index = hppa_cpu_mmu_index; cc->dump_state = hppa_cpu_dump_state; diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 5fe335558aa..52f8db41d5a 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -24,6 +24,11 @@ #include "migration/vmstate.h" #include "fpu/softfloat.h" +static bool m68k_cpu_datapath_is_big_endian(CPUState *cs) +{ + return true; +} + static void m68k_cpu_set_pc(CPUState *cs, vaddr value) { M68kCPU *cpu = M68K_CPU(cs); @@ -571,6 +576,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) &mcc->parent_phases); cc->class_by_name = m68k_cpu_class_by_name; + cc->datapath_is_big_endian = m68k_cpu_datapath_is_big_endian; cc->has_work = m68k_cpu_has_work; cc->mmu_index = m68k_cpu_mmu_index; cc->dump_state = m68k_cpu_dump_state; diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index b96561d1f26..16e39b43ec4 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -25,6 +25,11 @@ #include "fpu/softfloat-helpers.h" #include "tcg/tcg.h" +static bool openrisc_cpu_datapath_is_big_endian(CPUState *cs) +{ + return true; +} + static void openrisc_cpu_set_pc(CPUState *cs, vaddr value) { OpenRISCCPU *cpu = OPENRISC_CPU(cs); @@ -257,6 +262,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) &occ->parent_phases); cc->class_by_name = openrisc_cpu_class_by_name; + cc->datapath_is_big_endian = openrisc_cpu_datapath_is_big_endian; cc->has_work = openrisc_cpu_has_work; cc->mmu_index = openrisc_cpu_mmu_index; cc->dump_state = openrisc_cpu_dump_state; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 514c70f3010..eda1e3b286f 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -44,6 +44,11 @@ #define CR0_RESET 0xE0UL #define CR14_RESET 0xC2000000UL; +static bool s390_cpu_datapath_is_big_endian(CPUState *cs) +{ + return true; +} + #ifndef CONFIG_USER_ONLY static bool is_early_exception_psw(uint64_t mask, uint64_t addr) { @@ -390,6 +395,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) &scc->parent_phases); cc->class_by_name = s390_cpu_class_by_name, + cc->datapath_is_big_endian = s390_cpu_datapath_is_big_endian; cc->has_work = s390_cpu_has_work; cc->mmu_index = s390x_cpu_mmu_index; cc->dump_state = s390_cpu_dump_state; From patchwork Wed Dec 4 20:25:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847336 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp530534wrr; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d52c0cfdsm36598115e9.33.2024.12.04.12.28.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:28:08 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 16/20] hw/core/cpu: Expose cpu_datapath_is_big_endian() method Date: Wed, 4 Dec 2024 21:25:58 +0100 Message-ID: <20241204202602.58083-17-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All target implement their CPUClass::datapath_is_big_endian() helper, we can expose the generic cpu_datapath_is_big_endian() method. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 8 ++++++++ hw/core/cpu-common.c | 7 +++++++ 2 files changed, 15 insertions(+) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 91c6581f814..5c75fe3a842 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -611,6 +611,14 @@ extern __thread CPUState *current_cpu; extern bool mttcg_enabled; #define qemu_tcg_mttcg_enabled() (mttcg_enabled) +/** + * cpu_datapath_is_big_endian: + * @cpu: The CPU whose state is to be inspected. + * + * Returns: %true if the CPU access data in big endian order, %false otherwise. + */ +bool cpu_datapath_is_big_endian(CPUState *cpu); + /** * cpu_paging_enabled: * @cpu: The CPU whose state is to be inspected. diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 09c79035949..92c0c4c6125 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -66,6 +66,13 @@ CPUState *cpu_create(const char *typename) return cpu; } +bool cpu_datapath_is_big_endian(CPUState *cpu) +{ + CPUClass *cc = CPU_GET_CLASS(cpu); + + return cc->datapath_is_big_endian(cpu); +} + /* Resetting the IRQ comes from across the code base so we take the * BQL here if we need to. cpu_interrupt assumes it is held.*/ void cpu_reset_interrupt(CPUState *cpu, int mask) From patchwork Wed Dec 4 20:25:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847327 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp530083wrr; Wed, 4 Dec 2024 12:31:15 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVlHPiX5cAzfqHbocB+QshYUNMB9fsYLossieVPIOf/lM/g19PVViAGgPVzogcgin9L4he3qQ==@linaro.org X-Google-Smtp-Source: AGHT+IFA5sMirf3Ikon3J1rScZ63ZiAL2uv8OYbIVP2SKdx4/fkqGkDCU/1F2XPf9DRLayaN38m4 X-Received: by 2002:a05:6122:8c01:b0:50a:b5a3:e00c with SMTP id 71dfb90a1353d-515bf29e3ecmr10783819e0c.1.1733344275005; Wed, 04 Dec 2024 12:31:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344274; cv=none; d=google.com; s=arc-20240605; b=dA8Ki1aaFtslyA8HGeAu4YN4LnqAw8Cz++olEoGy7MEJ66Rl7E4GRddTMy9YB1AGfF 35vCI2L8+7KAKw02CmJSDs0t3jIBb4qiI+cTKfEM7FfHOwEaeP5LNJMBCnxOVuSfwwZT y5yp9ouC82ltBVrKToo4CvloSQlKfh3HrRm88N28RwmqK6JldO+tialcG2xcYNFQ6bZt 9iaRdVl0hqWP12kb1oTWev99cGBfyWIv8Qq8qaeg1q373ttm8lkqqGnnJ5c2W7t5E3jB YxBbERLIZu5Zm5nvKysj0Y/Y7KoScz0JVN6/CrDpdYOtYNvy5N5APgWa0IsMiyTzDXKx l42Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ZYu2t8Q4K67n2tT9qceLBDjYsH4wW4eKuLgzo6hScDA=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=QLw0x+w4qAKT4RR8wduQua2csTtV8GJ0CXNpSqyf0YYj9NXmnl3OiP9LXAOFCnJj1i MEh2Cl6mYPTdkjiZMEJFFDUyZ95xSXTtpsY1RgBNa2ELTm58kWVppWn3hf5dBjjzRG8A WxtNj41ygUa0HHhVtXUmwQNSP7MyyQDzx9c9J1W03YYxF9KW2SHqA1eDXO/QjeyH4brd urpTMUrp/oOcGasSCSYxUATjNN7IDnB6fATJ3L7kKWyoWFelN6bfmrNhwp3b38GTnDRY YWY5vC+X8AIVNhopF6YcvDMs+WD+fRYHT7pi3H5i3yKtzuRhbjHEcr6WEOhbMyjYtfOk ilHg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dYzfBRLR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d527e287sm35412065e9.12.2024.12.04.12.28.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:28:14 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 17/20] disas: Use cpu_datapath_is_big_endian() Date: Wed, 4 Dec 2024 21:25:59 +0100 Message-ID: <20241204202602.58083-18-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rather that using the binary endianness, use the vCPU one. Signed-off-by: Philippe Mathieu-Daudé --- disas/disas-common.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/disas/disas-common.c b/disas/disas-common.c index 7377de0715c..ef91c43449e 100644 --- a/disas/disas-common.c +++ b/disas/disas-common.c @@ -7,7 +7,6 @@ #include "disas/disas.h" #include "disas/capstone.h" #include "hw/core/cpu.h" -#include "exec/tswap.h" #include "disas-internal.h" @@ -61,7 +60,7 @@ void disas_initialize_debug_target(CPUDebug *s, CPUState *cpu) s->cpu = cpu; s->info.print_address_func = print_address; - if (qemu_binary_is_bigendian()) { + if (cpu_datapath_is_big_endian(cpu)) { s->info.endian = BFD_ENDIAN_BIG; } else { s->info.endian = BFD_ENDIAN_LITTLE; From patchwork Wed Dec 4 20:26:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847334 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp530488wrr; Wed, 4 Dec 2024 12:32:23 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVhui4nYv6dwA3+Zy4akb3JN6JRT0ab6a54F+ZEVrXqtb/GkkK4NeB2sp3a1VTxkw6Ckt2NkA==@linaro.org X-Google-Smtp-Source: AGHT+IGybaiFKOn7MbtSi8eIOUqXmYzQ5SrvdPlRE73i0AjG8qRUW/qhM+sZvE1cjp9JdRpvjvG8 X-Received: by 2002:ac8:7fd6:0:b0:466:88ba:2023 with SMTP id d75a77b69052e-4670c6fd0e6mr168813461cf.55.1733344342827; Wed, 04 Dec 2024 12:32:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344342; cv=none; d=google.com; s=arc-20240605; b=P3HE5RRO2EYyG9RaQuVBm0fXiR0m+crCMYh/TxqzjQlhqQUfFNZZEcuAhUpSLt5lwa CuSJMdPd5nqAOXkCATZpxVfrexHOrNPdD8b2M97Tct7FcidxfP+A/cl27hmVUgeF3fkP xS+hhusBy2XnFbtXVxJXZixweNCBmy8kakeqLo+revs7eZN2A2zVXmaDXeLD8eHpbCp1 deTtifLWCYMCJSk3yuu1piWWn/JEsgk3YlOd6afv1sYFFUrPKXmWjzxrnskMitXoYE3r AHLTifUwsyXnSZ8Mu/UJVA2pwhLEf3UV7aesmn58i1UfK92pgqZDijvKMH/JOv4Ijz5z CU1A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=+kCFZSFSFl2GPP7FnxAPq5KUTVvEzSw2EnjHpYSMwwc=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=MqlQJ6eveGe4e17sXapzOJNToxNmCysNuDl/9bbVfDMzJZzJmrPq+PIMgqhS7CINyX RsyabQAOiR/Ee5BTG/UVwidfDwsS4yD/QN5jojZSl6Tx/sEuHWZHOBE50VWup3xb+ig8 27kgipIwJyjXbIBBUHoIvpw46nsyk48s9qBy8kSoU9qDwwne78ZXJtmxPZoVsQTzjcyQ 9hLP2ErcehIQwYne1SGD4K+LTxRQ/yR/mR54lHfzpyA2YdYE68aXLNnokR5PyLiNP8Yu kLm9Q+WN0XyFo6VWFxXfgVQmoGooeJebfXapDtyhio236avKe/e3my3v5YdnphVoPY+V cW5g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PTM+th+l; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d526b375sm36220955e9.9.2024.12.04.12.28.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:28:20 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 18/20] hw/core/generic-loader: Use cpu_datapath_is_big_endian() Date: Wed, 4 Dec 2024 21:26:00 +0100 Message-ID: <20241204202602.58083-19-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rather that using the binary endianness, use the vCPU one. Signed-off-by: Philippe Mathieu-Daudé --- hw/core/generic-loader.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c index abdd4c08a38..7b3b5f06565 100644 --- a/hw/core/generic-loader.c +++ b/hw/core/generic-loader.c @@ -31,7 +31,6 @@ */ #include "qemu/osdep.h" -#include "exec/tswap.h" #include "sysemu/dma.h" #include "sysemu/reset.h" #include "hw/boards.h" @@ -66,7 +65,6 @@ static void generic_loader_realize(DeviceState *dev, Error **errp) { GenericLoaderState *s = GENERIC_LOADER(dev); hwaddr entry; - int big_endian; ssize_t size = 0; s->set_pc = false; @@ -134,14 +132,13 @@ static void generic_loader_realize(DeviceState *dev, Error **errp) s->cpu = first_cpu; } - big_endian = qemu_binary_is_bigendian(); - if (s->file) { AddressSpace *as = s->cpu ? s->cpu->as : NULL; if (!s->force_raw) { size = load_elf_as(s->file, NULL, NULL, NULL, &entry, NULL, NULL, - NULL, big_endian, 0, 0, 0, as); + NULL, cpu_datapath_is_big_endian(s->cpu), + 0, 0, 0, as); if (size < 0) { size = load_uimage_as(s->file, &entry, NULL, NULL, NULL, NULL, From patchwork Wed Dec 4 20:26:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847332 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp530280wrr; Wed, 4 Dec 2024 12:31:46 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWG+ebNAupeBaJHK5GdaefnjXaWE9+QtyN80z6M1h/trNwVLN+p7QdqUAjmcHrQ4f3JOhUeig==@linaro.org X-Google-Smtp-Source: AGHT+IE21FoyWzxxcPYXydFNFEwb53+CTiP2NZWjHVcPhyEd9UWexA2TdAv27qNb/eAVTOp+2h7j X-Received: by 2002:a05:6830:6319:b0:71a:4b13:c561 with SMTP id 46e09a7af769-71dad652b59mr9507070a34.16.1733344306487; Wed, 04 Dec 2024 12:31:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344306; cv=none; d=google.com; s=arc-20240605; b=YfQUrIfehQiXsEQ3yY4R6fGEqYiPm5Qp+VkMS5xfN2/49xABe6q+HoxXyZbjUXs/B9 ws5Ly2dzRbPdYfXDi5G/GA1w+IcoYwwrQkW2l039TOo/vhfs0FRCsR1SKq+3ssC9wjIT HpcIUFlksXz+5+a4Sgs7wg/qh+cLqg0lp4v+lyg3+ddwUQjgX3GYZymT8dBSndtlFJB8 ULP6gJ61TOm5c/PWPinRSfE/ZZHKksU8AkFuW0fXr1lXzxTrIBDSwaXnRwDnyvSilcOb hs35oIlL1mOXM+faBea6Dqmfr5Gg6pGUhuxSlLlTiPx99oHztIibCUE62ZUdWOHi13hg dGSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=iGN5RJQrSmW9JWKBkRR1K+I3aJFNDNbHIDvyy4lFcWM=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=aF90IGdnsXV26/oBgAasEbe/tTK0i20vs1oH84QgJl8zurH50upmninHUVfVFKgmQJ vb/Ng72RCb5KuawNhKqJA1/qaAxFLQWzqrb4Wz3AGPxWUu7A+9vmVEnMFbwasv8O+QH6 Izhx6j9q1nc1gxY0iOwp9n3iJYw8UFdBa4e0tXNZbfm7l7yo0lxSW1jjX4LyHIQTtJyd M12YeI7agg9F2yyGNKregej6ck/R9JCflsXNm5hWpAIUKbMqwdUBz5/jvsDk6Hr8xUqI CfFFvwzz5++KgBwjrxYzTIfGCoBZ/19T+DSp8rFFACNx92W6ITAja9htNHPXY2M7RICe 1KhQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pIzrglZt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385dece67dasm16908928f8f.8.2024.12.04.12.28.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:28:25 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [RFC PATCH 19/20] hw/virtio: Use cpu_datapath_is_big_endian() Date: Wed, 4 Dec 2024 21:26:01 +0100 Message-ID: <20241204202602.58083-20-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rather that using the binary endianness, use the vCPU one. The target affected by this change are MIPS, MicroBlaze, SH-4 and Xtensa. SPARC, RISC-V and RX could be affected later if their CPUClass::datapath_is_big_endian() handler is fully implemented. Signed-off-by: Philippe Mathieu-Daudé --- hw/virtio/virtio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index b3dede476ed..c57845a16db 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -2257,7 +2257,7 @@ static enum virtio_device_endian virtio_default_endian(void) static enum virtio_device_endian virtio_current_cpu_endian(void) { - if (cpu_virtio_is_big_endian(current_cpu)) { + if (cpu_datapath_is_big_endian(current_cpu)) { return VIRTIO_DEVICE_ENDIAN_BIG; } else { return VIRTIO_DEVICE_ENDIAN_LITTLE; From patchwork Wed Dec 4 20:26:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 847329 Delivered-To: patch@linaro.org Received: by 2002:a5d:434d:0:b0:385:e875:8a9e with SMTP id u13csp530131wrr; Wed, 4 Dec 2024 12:31:21 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUXcMpecu4fNhINvy0JUPPI/XPmUwF4ACLndjgapwPmR+JxGwtXdXADafpPdqFimk5o8ZQwMw==@linaro.org X-Google-Smtp-Source: AGHT+IGcKjQW2Ov0SnKwxZsCdunhpOeEHpmm0RMICJWrCc1zjdr0KpP61qzXeIgAEINdfk34aKpM X-Received: by 2002:a05:6102:50ab:b0:4af:57df:8697 with SMTP id ada2fe7eead31-4afb9607a5fmr1519456137.10.1733344281641; Wed, 04 Dec 2024 12:31:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733344281; cv=none; d=google.com; s=arc-20240605; b=MQaik+4sd2GTuOdxOg655IHpM9oTwbWnudCzc6f0ViKM7DLqrweB2BYTmWVEpBnl6i N/qux3VZK+BvF7LT+cmGsa2pHsMNUTzjo3niBKx84mmpt5U0GZjuu5bc0KOA3umMQ6ia ezzMz0r57H3aEngiZal5wlRPZIhx9P1sdsMPRzetgFD4Uha3lrZ+c+h3pchdMCjwIY4H pq7lLrP1re0VQgAZcWAm4m2Wyc4BUfyXY1CfYHVGz7QZW0m2iq6WI5bsLpKZJMvy0Otq mdcmPWmJXgSApN15TYssHIfH8njldcZ/GRF5xV6yW0BBMSz6n5TeBbi7teO+s5kHLgAY 58BA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9cBEMnN1TXHS4bt02AxYmkT0i+FxThQSvcImr5g6Wp4=; fh=L8jp5KII9BO+EuE1/Uny/8be6w87XhXr9oO98kXieYU=; b=WcY/9QJ+gDh6jHHX1MU+hJbj/75w6Cy1RCuxAI1Xl7tEnk+BIaDY6TbtqliOexwPAz +/tUb2klaHMwUgo3M0y0U8kF8XvF9Jj1a4aT3jKozHyoiH/HjxlmnoEkmk9bvCGfjsJf JSoQrJ4riAIzbDXD778NqV8wei1zwQ4xoKQBiZ41rQMXbIMnl+h+zP4RDa92R6btUffZ +5CWh0IRsEMP6UdlFH3Me4U04SNsyv6HxW4BcbFunhC4iN2I7B+BKlfCQvk5zT/6tkj0 E5GE9yfQTznwOfURFtR2MxlW33+lvWDkEtxQ5oN9zRTkuf3UgiZC05XVSsUDVOAGbAeD rb8Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=B2fGai38; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d527252bsm36373915e9.2.2024.12.04.12.28.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:28:31 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 20/20] hw/core/cpu: Remove cpu_virtio_is_big_endian() Date: Wed, 4 Dec 2024 21:26:02 +0100 Message-ID: <20241204202602.58083-21-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There are no more calls to cpu_virtio_is_big_endian(). Remove the method and the SysemuCPUOps::virtio_is_big_endian helpers altogether. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 9 --------- include/hw/core/sysemu-cpu-ops.h | 8 -------- hw/core/cpu-sysemu.c | 11 ----------- target/arm/cpu.c | 1 - target/ppc/cpu_init.c | 1 - 5 files changed, 30 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 5c75fe3a842..21b49800f52 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -752,15 +752,6 @@ hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); */ int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs); -/** - * cpu_virtio_is_big_endian: - * @cpu: CPU - - * Returns %true if a CPU which supports runtime configurable endianness - * is currently big-endian. - */ -bool cpu_virtio_is_big_endian(CPUState *cpu); - #endif /* !CONFIG_USER_ONLY */ /** diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-ops.h index 24d003fe041..9806a2b7ecb 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -72,14 +72,6 @@ typedef struct SysemuCPUOps { */ int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, DumpState *s); - /** - * @virtio_is_big_endian: Callback to return %true if a CPU which supports - * runtime configurable endianness is currently big-endian. - * Non-configurable CPUs can use the default implementation of this method. - * This method should not be used by any callers other than the pre-1.0 - * virtio devices. - */ - bool (*virtio_is_big_endian)(CPUState *cpu); /** * @legacy_vmsd: Legacy state for migration. diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c index 4b85face02b..458dde692ec 100644 --- a/hw/core/cpu-sysemu.c +++ b/hw/core/cpu-sysemu.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "qapi/error.h" -#include "exec/tswap.h" #include "hw/core/sysemu-cpu-ops.h" bool cpu_paging_enabled(const CPUState *cpu) @@ -122,16 +121,6 @@ int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, return (*cc->sysemu_ops->write_elf64_note)(f, cpu, cpuid, opaque); } -bool cpu_virtio_is_big_endian(CPUState *cpu) -{ - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (cc->sysemu_ops->virtio_is_big_endian) { - return cc->sysemu_ops->virtio_is_big_endian(cpu); - } - return qemu_binary_is_bigendian(); -} - GuestPanicInformation *cpu_get_crash_info(CPUState *cpu) { CPUClass *cc = CPU_GET_CLASS(cpu); diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 3061b2ac18c..0df6408ee73 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2664,7 +2664,6 @@ static const struct SysemuCPUOps arm_sysemu_ops = { .asidx_from_attrs = arm_asidx_from_attrs, .write_elf32_note = arm_cpu_write_elf32_note, .write_elf64_note = arm_cpu_write_elf64_note, - .virtio_is_big_endian = arm_cpu_datapath_is_big_endian, .legacy_vmsd = &vmstate_arm_cpu, }; #endif diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 9650acb4850..be0eea2ff2e 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7407,7 +7407,6 @@ static const struct SysemuCPUOps ppc_sysemu_ops = { .get_phys_page_debug = ppc_cpu_get_phys_page_debug, .write_elf32_note = ppc32_cpu_write_elf32_note, .write_elf64_note = ppc64_cpu_write_elf64_note, - .virtio_is_big_endian = ppc_cpu_datapath_is_big_endian, .legacy_vmsd = &vmstate_ppc_cpu, }; #endif