From patchwork Thu Dec 12 04:00:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181411 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp388045ile; Wed, 11 Dec 2019 20:03:37 -0800 (PST) X-Google-Smtp-Source: APXvYqxA12pnvOwDuXZmWzoqIIdioBcW/XiqFY5XOPxZ10ZLLqv5Nk8sT86OinZaNgldjf+42ERQ X-Received: by 2002:a05:620a:8d7:: with SMTP id z23mr5884855qkz.15.1576123417055; Wed, 11 Dec 2019 20:03:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123417; cv=none; d=google.com; s=arc-20160816; b=p4TFxvSbbfhYGny2cgr9yMsGtVmXY6vlEuLK38G+Pr8z7H529bJhDI7zjj5JaPdTmQ lcU5Mewb8hHJuFfaSEjtNktYQ0a3qoeJsDkizUqPjbwHy7P9CvAAEs5R3ZjBd9fOzZmK MGZYev+1esV3VII6vy7dMW8v+9xmxqO86e2PRuo5hgWHjgb4WHOGbtoEf25XhSVVI3OF yfMQfwEOcrQ3BT5EuN8CQED1Qbm/VQpQdvRkYQIHlqs++73krEBGU8OKgS/32upSioLP N4o/RmxjvlvbPwpgpBUsC+fFi9VeVGmEnQT+oocnLtf1r2gvz4nzgbG8jkENrxO6x+Hz lHlA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=k7TVKqC6wpnG6/oe5COCiVkS66yxk1gF0iSSBffTaF8=; b=I0SpZDl/ok3n8mAyZ1vmOgNA4x8grniaKBG4LSC9Jv1Bi0G2eQcmB5UGc67c+Ens0A Z24wu6ydarZFgl6T5nvJU7G90b1+0Z1myiNmqaba4Zx0bXnmVU40BY+BIlpGQre45C7u wdHXD7N4htZgLm5EYdL4ZxyRcpBhP/MWFAEU86xRT7X6RSsnQOPrxREVVypwtgr0sy7V AQZYeJp7p0uw/fOM2jkft09ScZd4TgMUJ91OwlCxdOVvJMJqUCshWGRUO0avq3zLYwfp bSCtNdjHruIGGL1tI9qHIPGtuDiZu5s7NAndO2bfESJKHVVT+q/U32/ALxuia7JeTqOy +uSA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=D9ifO4x8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id l63si2100468qkb.57.2019.12.11.20.03.36 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 Dec 2019 20:03:37 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=D9ifO4x8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:53876 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ifFhQ-00047q-7z for patch@linaro.org; Wed, 11 Dec 2019 23:03:36 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:47098) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ifFef-0000mS-Hf for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:00:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ifFee-0003qQ-5X for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:00:45 -0500 Received: from mail-pf1-x443.google.com ([2607:f8b0:4864:20::443]:41156) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ifFed-0003oo-V5 for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:00:44 -0500 Received: by mail-pf1-x443.google.com with SMTP id s18so28492pfd.8 for ; Wed, 11 Dec 2019 20:00:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=k7TVKqC6wpnG6/oe5COCiVkS66yxk1gF0iSSBffTaF8=; b=D9ifO4x8Xh5HI25dUv+e8Tai+TGpxXXG8oTF+hw+0uAvkV8339NGkCvhlnrmwB7+uz dsKQknGzebL//SWhY/XHBrG+0i3oP+RfelBJdxMrQQ6sXpgLxGZtYvHtFVPF904Tn2sN kog5EAb4Z4SzmJzulxyVlSZobBfaueiYwDxo0MQ+UME2ZzE0V/3nHICNpVmOYkW/lQOx qZQ006BJvdBo1jmupk3GV5X30vcXt1ZJuGEUJrU8WdTgnFqqBjXHhv+XQG0E0ls9mg7/ 5seGp49L8aeKUG6X85Uuel+U2ij7bXL/7HxaDyUdUWFBzelhQ3ZbMCmNXhNsNeGJ2Y1D +xeg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=k7TVKqC6wpnG6/oe5COCiVkS66yxk1gF0iSSBffTaF8=; b=hvnPyb7eTMibu5vwREh1vIWkDeZB8eaPCc+V1UUwOuYnXAPmjGatGOH/0MrJZtn+3w gr8P4CwmVfCweResho7UCccowOFbl77jzzTgZBBbfrl+HN41dGRwMe0d1kErcwWYo/vf mGPt5BvOEJbx5VRoQ57ahlWsmYZ4vKNqpqDSYObSF7xDqQyfrZH9Gd8wcPHi5vjQfOw6 MYymlN9um3HbhOyddrmxdw83VTsJSIWQzBN5QKf8lYDgISqP2H6OyF5TP7a4FLbZmTV0 YWJWG/YYazrUgtaYsvumcZuGvqwJSvj8v6zIKt2fMjF0m7PQg82L7tjG2dTmTMW2bLIp SW8Q== X-Gm-Message-State: APjAAAVsl3po1p0GKLwhYwhXiViEuRawBc/3A6CSh9a8c4sESO1q0BM3 t8gN7O3C7nw/aRmcWLXdq6WZpqqSmHU= X-Received: by 2002:a62:33c6:: with SMTP id z189mr7684937pfz.246.1576123242515; Wed, 11 Dec 2019 20:00:42 -0800 (PST) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:41 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 01/28] target/xtensa: Use probe_access for itlb_hit_test Date: Wed, 11 Dec 2019 20:00:12 -0800 Message-Id: <20191212040039.26546-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Received-From: 2607:f8b0:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We don't actually need the result of the read, only to probe that the memory mapping exists. This is exactly what probe_access does. This is also the only user of any cpu_ld*_code_ra function. Removing this allows the interface to be removed shortly. Cc: Max Filippov Signed-off-by: Richard Henderson --- target/xtensa/mmu_helper.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- 2.20.1 Acked-by: Max Filippov diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c index f15bff306f..b01ff9399a 100644 --- a/target/xtensa/mmu_helper.c +++ b/target/xtensa/mmu_helper.c @@ -63,10 +63,11 @@ void HELPER(itlb_hit_test)(CPUXtensaState *env, uint32_t vaddr) { /* - * Attempt the memory load; we don't care about the result but + * Probe the memory; we don't care about the result but * only the side-effects (ie any MMU or other exception) */ - cpu_ldub_code_ra(env, vaddr, GETPC()); + probe_access(env, vaddr, 1, MMU_INST_FETCH, + cpu_mmu_index(env, true), GETPC()); } void HELPER(wsr_rasid)(CPUXtensaState *env, uint32_t v) From patchwork Thu Dec 12 04:00:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181412 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp388113ile; Wed, 11 Dec 2019 20:03:44 -0800 (PST) X-Google-Smtp-Source: APXvYqwmITmlYR0O/3bkpMn8fSuZhsp/huM4NG2zAl5Sem9XRScWIGv86MeFMEn2CZM+HyPPg1ZP X-Received: by 2002:ac8:7699:: with SMTP id g25mr5672660qtr.75.1576123424331; Wed, 11 Dec 2019 20:03:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123424; cv=none; d=google.com; s=arc-20160816; b=u8z2X+pXJDa0OTP+6ssBWx2kIdX+9cgBRJBpHZFPrRu95ud3vwzP53oKR2lLn3WSDu aPNnIYivQL45VsBDJU2dJR6svNuHUUSMr/XmEM408oIgdGlUdhN2yaiAlfbLHgC0tPf9 v0HgR5KhZ5dCv9HQDuBUQ5P5EP0O1dj5AewMNbQ9GJBRETW2sXEC0RAWfvFGuE3uuh9P qqHeWsXFqYDb99JYWfotQF8TVwVpuQFfIvQVzKsfU5u7GRgqkZoo7ruL106dd0x8pq7C 1yWKqsVC7SBznQ46dg3/Mu+HFypelfVB1RNxkpwIIX3+kXlIjFFc36T6WY3Duc8elqZw x/jA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=L1jHeOFQAeKhXPKxXaTdBBGGRizQ9egD6BUcKiL091Y=; b=OZ3rrEXBjU4Bg4k66i8jKUhsORv27Q4JzfrX6MXejjft4Qd7vjSqcsu3VvDn6TnZM+ k8oqYmP5N49AP1/nYluSEQvqjdXygXl6bua7J6TkcK/GD0Ekah2FwjIb9cunqKSGkWOz GnUEhWhNZhqPh0Ig1t9HZU9qT0nqqGTOaTLC1IS2GgbuUzFmQ8cTrHy/ge+XPO6p0jGw h/VXBvrpWO8Ob7W4ZAabolNSsRjFuF1wG9KLAxKVEPqyvVU2rn3TvjCQDMmQ+8uV3NM2 AHODpPxceAGKaJe0HGx9obTO1/LF6MdxF5q7QeZrRVRwP2cSF7uNYarSeHBdUqGOCUPu BF6g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ngvvf0m1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:43 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 02/28] cputlb: Use trace_mem_get_info instead of trace_mem_build_info Date: Wed, 11 Dec 2019 20:00:13 -0800 Message-Id: <20191212040039.26546-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::529 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" In the cpu_ldst templates, we already require a MemOp, and it is cleaner and clearer to pass that instead of 3 separate arguments describing the memory operation. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst_template.h | 22 +++++++++++----------- include/exec/cpu_ldst_useronly_template.h | 12 ++++++------ 2 files changed, 17 insertions(+), 17 deletions(-) -- 2.20.1 diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h index 54b5e858ce..0ad5de3ef9 100644 --- a/include/exec/cpu_ldst_template.h +++ b/include/exec/cpu_ldst_template.h @@ -86,9 +86,9 @@ glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, RES_TYPE res; target_ulong addr; int mmu_idx = CPU_MMU_INDEX; - TCGMemOpIdx oi; + MemOp op = MO_TE | SHIFT; #if !defined(SOFTMMU_CODE_ACCESS) - uint16_t meminfo = trace_mem_build_info(SHIFT, false, MO_TE, false, mmu_idx); + uint16_t meminfo = trace_mem_get_info(op, mmu_idx, false); trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); #endif @@ -96,9 +96,9 @@ glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, entry = tlb_entry(env, mmu_idx, addr); if (unlikely(entry->ADDR_READ != (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - oi = make_memop_idx(SHIFT, mmu_idx); + TCGMemOpIdx oi = make_memop_idx(op, mmu_idx); res = glue(glue(helper_ret_ld, URETSUFFIX), MMUSUFFIX)(env, addr, - oi, retaddr); + oi, retaddr); } else { uintptr_t hostaddr = addr + entry->addend; res = glue(glue(ld, USUFFIX), _p)((uint8_t *)hostaddr); @@ -125,9 +125,9 @@ glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, int res; target_ulong addr; int mmu_idx = CPU_MMU_INDEX; - TCGMemOpIdx oi; -#if !defined(SOFTMMU_CODE_ACCESS) - uint16_t meminfo = trace_mem_build_info(SHIFT, true, MO_TE, false, mmu_idx); + MemOp op = MO_TE | MO_SIGN | SHIFT; +#ifndef SOFTMMU_CODE_ACCESS + uint16_t meminfo = trace_mem_get_info(op, mmu_idx, false); trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); #endif @@ -135,7 +135,7 @@ glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, entry = tlb_entry(env, mmu_idx, addr); if (unlikely(entry->ADDR_READ != (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - oi = make_memop_idx(SHIFT, mmu_idx); + TCGMemOpIdx oi = make_memop_idx(op & ~MO_SIGN, mmu_idx); res = (DATA_STYPE)glue(glue(helper_ret_ld, SRETSUFFIX), MMUSUFFIX)(env, addr, oi, retaddr); } else { @@ -167,9 +167,9 @@ glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, CPUTLBEntry *entry; target_ulong addr; int mmu_idx = CPU_MMU_INDEX; - TCGMemOpIdx oi; + MemOp op = MO_TE | SHIFT; #if !defined(SOFTMMU_CODE_ACCESS) - uint16_t meminfo = trace_mem_build_info(SHIFT, false, MO_TE, true, mmu_idx); + uint16_t meminfo = trace_mem_get_info(op, mmu_idx, true); trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); #endif @@ -177,7 +177,7 @@ glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, entry = tlb_entry(env, mmu_idx, addr); if (unlikely(tlb_addr_write(entry) != (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - oi = make_memop_idx(SHIFT, mmu_idx); + TCGMemOpIdx oi = make_memop_idx(op, mmu_idx); glue(glue(helper_ret_st, SUFFIX), MMUSUFFIX)(env, addr, v, oi, retaddr); } else { diff --git a/include/exec/cpu_ldst_useronly_template.h b/include/exec/cpu_ldst_useronly_template.h index dbdc7a845d..e5a3d1983a 100644 --- a/include/exec/cpu_ldst_useronly_template.h +++ b/include/exec/cpu_ldst_useronly_template.h @@ -70,8 +70,8 @@ glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr) ret = glue(glue(ld, USUFFIX), _p)(g2h(ptr)); clear_helper_retaddr(); #else - uint16_t meminfo = trace_mem_build_info(SHIFT, false, MO_TE, false, - MMU_USER_IDX); + MemOp op = MO_TE | SHIFT; + uint16_t meminfo = trace_mem_get_info(op, MMU_USER_IDX, false); trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); ret = glue(glue(ld, USUFFIX), _p)(g2h(ptr)); #endif @@ -102,8 +102,8 @@ glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr) ret = glue(glue(lds, SUFFIX), _p)(g2h(ptr)); clear_helper_retaddr(); #else - uint16_t meminfo = trace_mem_build_info(SHIFT, true, MO_TE, false, - MMU_USER_IDX); + MemOp op = MO_TE | MO_SIGN | SHIFT; + uint16_t meminfo = trace_mem_get_info(op, MMU_USER_IDX, false); trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); ret = glue(glue(lds, SUFFIX), _p)(g2h(ptr)); qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); @@ -131,8 +131,8 @@ static inline void glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr, RES_TYPE v) { - uint16_t meminfo = trace_mem_build_info(SHIFT, false, MO_TE, true, - MMU_USER_IDX); + MemOp op = MO_TE | SHIFT; + uint16_t meminfo = trace_mem_get_info(op, MMU_USER_IDX, true); trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); glue(glue(st, SUFFIX), _p)(g2h(ptr), v); qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); From patchwork Thu Dec 12 04:00:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181413 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp388153ile; Wed, 11 Dec 2019 20:03:47 -0800 (PST) X-Google-Smtp-Source: APXvYqxVrjH7iIpbHhNukCdD5V8tGMGwyj+LbFZ/ecRMqFrqzmcip/mchGCGZyzKt3GpRJM9cGlR X-Received: by 2002:ac8:534d:: with SMTP id d13mr5844437qto.108.1576123427863; Wed, 11 Dec 2019 20:03:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123427; cv=none; d=google.com; s=arc-20160816; b=e1BHOSvcXi7DYKkTpsPatyItX/SH5cl/RTT6Jzf55t1u2NMKWzTeMU0oIIfL4RBiv7 TacE8hOD4chxYGpSVBUlWiJWCmF1cun+YSvsTcuAXn7pSAyz3wkgbcYJ8iKD+Vsw6SB1 xkXM21GJzKIa0hoS7LAW42w6T01syBV13lzmT+mOELaLmf1V4lh8eS6OVYFhA4H22+oq 5SCsme9vFeCuqG9Ty8IeGe7CSERCqaoJsIdavojLxdPR6wSHk6MCz4hgIYCvfhovsRBF vgTKQRvPrykXqGcsWq6RgvHWzu+amF1aYxw4BkFGZ2RnwRXNgKIBKLTVLQn+Hj/cIFQJ +FgQ== ARC-Message-Signature: i=1; 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:44 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 03/28] trace: Remove trace_mem_build_info_no_se_[bl]e Date: Wed, 11 Dec 2019 20:00:14 -0800 Message-Id: <20191212040039.26546-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::534 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" It is easy for the atomic helpers to use trace_mem_build_info directly, without resorting to symbol pasting. For this usage, we cannot use trace_mem_get_info, because the MemOp does not support 16-byte accesses. Signed-off-by: Richard Henderson --- accel/tcg/atomic_template.h | 67 +++++++++++++------------------------ trace/mem-internal.h | 17 ---------- 2 files changed, 24 insertions(+), 60 deletions(-) -- 2.20.1 diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h index 837676231f..26969487d6 100644 --- a/accel/tcg/atomic_template.h +++ b/accel/tcg/atomic_template.h @@ -64,13 +64,10 @@ the ATOMIC_NAME macro, and redefined below. */ #if DATA_SIZE == 1 # define END -# define MEND _be /* either le or be would be fine */ #elif defined(HOST_WORDS_BIGENDIAN) # define END _be -# define MEND _be #else # define END _le -# define MEND _le #endif ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr, @@ -79,8 +76,8 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr, ATOMIC_MMU_DECLS; DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; DATA_TYPE ret; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, 0, false, + ATOMIC_MMU_IDX); atomic_trace_rmw_pre(env, addr, info); #if DATA_SIZE == 16 @@ -99,8 +96,8 @@ ABI_TYPE ATOMIC_NAME(ld)(CPUArchState *env, target_ulong addr EXTRA_ARGS) { ATOMIC_MMU_DECLS; DATA_TYPE val, *haddr = ATOMIC_MMU_LOOKUP; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, 0, false, + ATOMIC_MMU_IDX); atomic_trace_ld_pre(env, addr, info); val = atomic16_read(haddr); @@ -114,8 +111,8 @@ void ATOMIC_NAME(st)(CPUArchState *env, target_ulong addr, { ATOMIC_MMU_DECLS; DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, true, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, 0, true, + ATOMIC_MMU_IDX); atomic_trace_st_pre(env, addr, info); atomic16_set(haddr, val); @@ -130,8 +127,8 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, target_ulong addr, ATOMIC_MMU_DECLS; DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; DATA_TYPE ret; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, 0, false, + ATOMIC_MMU_IDX); atomic_trace_rmw_pre(env, addr, info); ret = atomic_xchg__nocheck(haddr, val); @@ -147,10 +144,8 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \ ATOMIC_MMU_DECLS; \ DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \ DATA_TYPE ret; \ - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, \ - false, \ - ATOMIC_MMU_IDX); \ - \ + uint16_t info = trace_mem_build_info(SHIFT, false, 0, false, \ + ATOMIC_MMU_IDX); \ atomic_trace_rmw_pre(env, addr, info); \ ret = atomic_##X(haddr, val); \ ATOMIC_MMU_CLEANUP; \ @@ -183,10 +178,8 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \ ATOMIC_MMU_DECLS; \ XDATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \ XDATA_TYPE cmp, old, new, val = xval; \ - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, \ - false, \ - ATOMIC_MMU_IDX); \ - \ + uint16_t info = trace_mem_build_info(SHIFT, false, 0, false, \ + ATOMIC_MMU_IDX); \ atomic_trace_rmw_pre(env, addr, info); \ smp_mb(); \ cmp = atomic_read__nocheck(haddr); \ @@ -213,7 +206,6 @@ GEN_ATOMIC_HELPER_FN(umax_fetch, MAX, DATA_TYPE, new) #endif /* DATA SIZE >= 16 */ #undef END -#undef MEND #if DATA_SIZE > 1 @@ -221,10 +213,8 @@ GEN_ATOMIC_HELPER_FN(umax_fetch, MAX, DATA_TYPE, new) within the ATOMIC_NAME macro. */ #ifdef HOST_WORDS_BIGENDIAN # define END _le -# define MEND _le #else # define END _be -# define MEND _be #endif ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr, @@ -233,9 +223,8 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr, ATOMIC_MMU_DECLS; DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; DATA_TYPE ret; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, - false, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, MO_BSWAP, false, + ATOMIC_MMU_IDX); atomic_trace_rmw_pre(env, addr, info); #if DATA_SIZE == 16 @@ -254,9 +243,8 @@ ABI_TYPE ATOMIC_NAME(ld)(CPUArchState *env, target_ulong addr EXTRA_ARGS) { ATOMIC_MMU_DECLS; DATA_TYPE val, *haddr = ATOMIC_MMU_LOOKUP; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, - false, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, MO_BSWAP, false, + ATOMIC_MMU_IDX); atomic_trace_ld_pre(env, addr, info); val = atomic16_read(haddr); @@ -270,9 +258,8 @@ void ATOMIC_NAME(st)(CPUArchState *env, target_ulong addr, { ATOMIC_MMU_DECLS; DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, - true, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, MO_BSWAP, true, + ATOMIC_MMU_IDX); val = BSWAP(val); atomic_trace_st_pre(env, addr, info); @@ -289,9 +276,8 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, target_ulong addr, ATOMIC_MMU_DECLS; DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; ABI_TYPE ret; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, - false, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, MO_BSWAP, false, + ATOMIC_MMU_IDX); atomic_trace_rmw_pre(env, addr, info); ret = atomic_xchg__nocheck(haddr, BSWAP(val)); @@ -307,10 +293,8 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \ ATOMIC_MMU_DECLS; \ DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \ DATA_TYPE ret; \ - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, \ - false, \ - ATOMIC_MMU_IDX); \ - \ + uint16_t info = trace_mem_build_info(SHIFT, false, MO_BSWAP, \ + false, ATOMIC_MMU_IDX); \ atomic_trace_rmw_pre(env, addr, info); \ ret = atomic_##X(haddr, BSWAP(val)); \ ATOMIC_MMU_CLEANUP; \ @@ -341,10 +325,8 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \ ATOMIC_MMU_DECLS; \ XDATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \ XDATA_TYPE ldo, ldn, old, new, val = xval; \ - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, \ - false, \ - ATOMIC_MMU_IDX); \ - \ + uint16_t info = trace_mem_build_info(SHIFT, false, MO_BSWAP, \ + false, ATOMIC_MMU_IDX); \ atomic_trace_rmw_pre(env, addr, info); \ smp_mb(); \ ldn = atomic_read__nocheck(haddr); \ @@ -378,7 +360,6 @@ GEN_ATOMIC_HELPER_FN(add_fetch, ADD, DATA_TYPE, new) #endif /* DATA_SIZE >= 16 */ #undef END -#undef MEND #endif /* DATA_SIZE > 1 */ #undef BSWAP diff --git a/trace/mem-internal.h b/trace/mem-internal.h index 0a32aa22ca..8b72b678fa 100644 --- a/trace/mem-internal.h +++ b/trace/mem-internal.h @@ -47,21 +47,4 @@ static inline uint16_t trace_mem_get_info(MemOp op, mmu_idx); } -/* Used by the atomic helpers */ -static inline -uint16_t trace_mem_build_info_no_se_be(int size_shift, bool store, - TCGMemOpIdx oi) -{ - return trace_mem_build_info(size_shift, false, MO_BE, store, - get_mmuidx(oi)); -} - -static inline -uint16_t trace_mem_build_info_no_se_le(int size_shift, bool store, - TCGMemOpIdx oi) -{ - return trace_mem_build_info(size_shift, false, MO_LE, store, - get_mmuidx(oi)); -} - #endif /* TRACE__MEM_INTERNAL_H */ From patchwork Thu Dec 12 04:00:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181410 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp386366ile; Wed, 11 Dec 2019 20:01:36 -0800 (PST) X-Google-Smtp-Source: APXvYqxjKxrD+1vOu5q/XPLfMijkkA6xGrMQAJ1PDbjQaB/kryIlRokE+7Ed5fnXcKswIU1D1YtE X-Received: by 2002:a05:6830:4a7:: with SMTP id l7mr5471395otd.372.1576123296358; Wed, 11 Dec 2019 20:01:36 -0800 (PST) ARC-Seal: i=1; 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:45 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 04/28] cputlb: Move body of cpu_ldst_template.h out of line Date: Wed, 11 Dec 2019 20:00:15 -0800 Message-Id: <20191212040039.26546-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" With the tracing hooks, the inline functions are no longer so simple. Once out-of-line, the current tlb_entry lookup is redundant with the one in the main load/store_helper. This also begins the introduction of a new target facing interface, with suffix *_mmuidx_ra. This is not yet official because the interface is not done for user-only. Use abi_ptr instead of target_ulong in preparation for user-only; the two types are identical for softmmu. What remains in cpu_ldst_template.h are the expansions for _code, _data, and MMU_MODE_SUFFIX. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 25 ++++++- include/exec/cpu_ldst_template.h | 125 +++++++------------------------ accel/tcg/cputlb.c | 116 ++++++++++++++++++++++++++++ 3 files changed, 166 insertions(+), 100 deletions(-) -- 2.20.1 diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index fd499f7e2f..cf8af36dbc 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -152,7 +152,7 @@ static inline void clear_helper_retaddr(void) #else -/* The memory helpers for tcg-generated code need tcg_target_long etc. */ +/* Needed for TCG_OVERSIZED_GUEST */ #include "tcg.h" static inline target_ulong tlb_addr_write(const CPUTLBEntry *entry) @@ -185,6 +185,29 @@ static inline CPUTLBEntry *tlb_entry(CPUArchState *env, uintptr_t mmu_idx, return &env_tlb(env)->f[mmu_idx].table[tlb_index(env, mmu_idx, addr)]; } +uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); +uint32_t cpu_lduw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); +uint32_t cpu_ldl_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); +uint64_t cpu_ldq_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); + +int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); +int cpu_ldsw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); + +void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t retaddr); +void cpu_stw_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t retaddr); +void cpu_stl_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t retaddr); +void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, + int mmu_idx, uintptr_t retaddr); + #ifdef MMU_MODE0_SUFFIX #define CPU_MMU_INDEX 0 #define MEMSUFFIX MMU_MODE0_SUFFIX diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h index 0ad5de3ef9..ea39e29c19 100644 --- a/include/exec/cpu_ldst_template.h +++ b/include/exec/cpu_ldst_template.h @@ -24,13 +24,6 @@ * License along with this library; if not, see . */ -#if !defined(SOFTMMU_CODE_ACCESS) -#include "trace-root.h" -#endif - -#include "qemu/plugin.h" -#include "trace/mem.h" - #if DATA_SIZE == 8 #define SUFFIX q #define USUFFIX q @@ -63,56 +56,40 @@ #define RES_TYPE uint32_t #endif +/* generic load/store macros */ + #ifdef SOFTMMU_CODE_ACCESS -#define ADDR_READ addr_code -#define MMUSUFFIX _cmmu -#define URETSUFFIX USUFFIX -#define SRETSUFFIX glue(s, SUFFIX) -#else -#define ADDR_READ addr_read -#define MMUSUFFIX _mmu -#define URETSUFFIX USUFFIX -#define SRETSUFFIX glue(s, SUFFIX) + +static inline RES_TYPE +glue(glue(cpu_ld, USUFFIX), _code)(CPUArchState *env, target_ulong ptr) +{ + TCGMemOpIdx oi = make_memop_idx(MO_TE | SHIFT, CPU_MMU_INDEX); + return glue(glue(helper_ret_ld, USUFFIX), _cmmu)(env, ptr, oi, 0); +} + +#if DATA_SIZE <= 2 +static inline int +glue(glue(cpu_lds, SUFFIX), _code)(CPUArchState *env, target_ulong ptr) +{ + return (DATA_STYPE)glue(glue(cpu_ld, USUFFIX), _code)(env, ptr); +} #endif -/* generic load/store macros */ +#else static inline RES_TYPE glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, target_ulong ptr, uintptr_t retaddr) { - CPUTLBEntry *entry; - RES_TYPE res; - target_ulong addr; - int mmu_idx = CPU_MMU_INDEX; - MemOp op = MO_TE | SHIFT; -#if !defined(SOFTMMU_CODE_ACCESS) - uint16_t meminfo = trace_mem_get_info(op, mmu_idx, false); - trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); -#endif - - addr = ptr; - entry = tlb_entry(env, mmu_idx, addr); - if (unlikely(entry->ADDR_READ != - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - TCGMemOpIdx oi = make_memop_idx(op, mmu_idx); - res = glue(glue(helper_ret_ld, URETSUFFIX), MMUSUFFIX)(env, addr, - oi, retaddr); - } else { - uintptr_t hostaddr = addr + entry->addend; - res = glue(glue(ld, USUFFIX), _p)((uint8_t *)hostaddr); - } -#ifndef SOFTMMU_CODE_ACCESS - qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); -#endif - return res; + return glue(glue(cpu_ld, USUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, + retaddr); } static inline RES_TYPE glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr) { - return glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(env, ptr, 0); + return glue(glue(cpu_ld, USUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, 0); } #if DATA_SIZE <= 2 @@ -121,42 +98,17 @@ glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, target_ulong ptr, uintptr_t retaddr) { - CPUTLBEntry *entry; - int res; - target_ulong addr; - int mmu_idx = CPU_MMU_INDEX; - MemOp op = MO_TE | MO_SIGN | SHIFT; -#ifndef SOFTMMU_CODE_ACCESS - uint16_t meminfo = trace_mem_get_info(op, mmu_idx, false); - trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); -#endif - - addr = ptr; - entry = tlb_entry(env, mmu_idx, addr); - if (unlikely(entry->ADDR_READ != - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - TCGMemOpIdx oi = make_memop_idx(op & ~MO_SIGN, mmu_idx); - res = (DATA_STYPE)glue(glue(helper_ret_ld, SRETSUFFIX), - MMUSUFFIX)(env, addr, oi, retaddr); - } else { - uintptr_t hostaddr = addr + entry->addend; - res = glue(glue(lds, SUFFIX), _p)((uint8_t *)hostaddr); - } -#ifndef SOFTMMU_CODE_ACCESS - qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); -#endif - return res; + return glue(glue(cpu_lds, SUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, + retaddr); } static inline int glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr) { - return glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(env, ptr, 0); + return glue(glue(cpu_lds, SUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, 0); } #endif -#ifndef SOFTMMU_CODE_ACCESS - /* generic store macro */ static inline void @@ -164,36 +116,15 @@ glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, target_ulong ptr, RES_TYPE v, uintptr_t retaddr) { - CPUTLBEntry *entry; - target_ulong addr; - int mmu_idx = CPU_MMU_INDEX; - MemOp op = MO_TE | SHIFT; -#if !defined(SOFTMMU_CODE_ACCESS) - uint16_t meminfo = trace_mem_get_info(op, mmu_idx, true); - trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); -#endif - - addr = ptr; - entry = tlb_entry(env, mmu_idx, addr); - if (unlikely(tlb_addr_write(entry) != - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - TCGMemOpIdx oi = make_memop_idx(op, mmu_idx); - glue(glue(helper_ret_st, SUFFIX), MMUSUFFIX)(env, addr, v, oi, - retaddr); - } else { - uintptr_t hostaddr = addr + entry->addend; - glue(glue(st, SUFFIX), _p)((uint8_t *)hostaddr, v); - } -#ifndef SOFTMMU_CODE_ACCESS - qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); -#endif + glue(glue(cpu_st, SUFFIX), _mmuidx_ra)(env, ptr, v, CPU_MMU_INDEX, + retaddr); } static inline void glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr, RES_TYPE v) { - glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(env, ptr, v, 0); + glue(glue(cpu_st, SUFFIX), _mmuidx_ra)(env, ptr, v, CPU_MMU_INDEX, 0); } #endif /* !SOFTMMU_CODE_ACCESS */ @@ -204,8 +135,4 @@ glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr, #undef SUFFIX #undef USUFFIX #undef DATA_SIZE -#undef MMUSUFFIX -#undef ADDR_READ -#undef URETSUFFIX -#undef SRETSUFFIX #undef SHIFT diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 98221948d6..4d3ec1d35a 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -34,6 +34,9 @@ #include "qemu/atomic.h" #include "qemu/atomic128.h" #include "translate-all.h" +#include "trace-root.h" +#include "qemu/plugin.h" +#include "trace/mem.h" #ifdef CONFIG_PLUGIN #include "qemu/plugin-memory.h" #endif @@ -1625,6 +1628,75 @@ tcg_target_ulong helper_be_ldsl_mmu(CPUArchState *env, target_ulong addr, return (int32_t)helper_be_ldul_mmu(env, addr, oi, retaddr); } +/* + * Load helpers for cpu_ldst.h. + */ + +static inline uint64_t QEMU_ALWAYS_INLINE +cpu_load_helper(CPUArchState *env, abi_ptr addr, int mmu_idx, + uintptr_t retaddr, MemOp op, FullLoadHelper *full_load) +{ + uint16_t meminfo; + TCGMemOpIdx oi; + uint64_t ret; + + meminfo = trace_mem_get_info(op, mmu_idx, false); + trace_guest_mem_before_exec(env_cpu(env), addr, meminfo); + + op &= ~MO_SIGN; + oi = make_memop_idx(op, mmu_idx); + ret = load_helper(env, addr, oi, retaddr, op, false, full_load); + + qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, meminfo); + + return ret; +} + +uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_load_helper(env, addr, mmu_idx, ra, MO_UB, full_ldub_mmu); +} + +int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return (int8_t)cpu_load_helper(env, addr, mmu_idx, ra, MO_SB, + full_ldub_mmu); +} + +uint32_t cpu_lduw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_load_helper(env, addr, mmu_idx, ra, MO_TEUW, + MO_TE == MO_LE + ? full_le_lduw_mmu : full_be_lduw_mmu); +} + +int cpu_ldsw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return (int16_t)cpu_load_helper(env, addr, mmu_idx, ra, MO_TESW, + MO_TE == MO_LE + ? full_le_lduw_mmu : full_be_lduw_mmu); +} + +uint32_t cpu_ldl_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_load_helper(env, addr, mmu_idx, ra, MO_TEUL, + MO_TE == MO_LE + ? full_le_ldul_mmu : full_be_ldul_mmu); +} + +uint64_t cpu_ldq_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_load_helper(env, addr, mmu_idx, ra, MO_TEQ, + MO_TE == MO_LE + ? helper_le_ldq_mmu : helper_be_ldq_mmu); +} + /* * Store Helpers */ @@ -1854,6 +1926,50 @@ void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val, store_helper(env, addr, val, oi, retaddr, MO_BEQ); } +/* + * Store Helpers for cpu_ldst.h + */ + +static inline void QEMU_ALWAYS_INLINE +cpu_store_helper(CPUArchState *env, target_ulong addr, uint64_t val, + int mmu_idx, uintptr_t retaddr, MemOp op) +{ + TCGMemOpIdx oi; + uint16_t meminfo; + + meminfo = trace_mem_get_info(op, mmu_idx, true); + trace_guest_mem_before_exec(env_cpu(env), addr, meminfo); + + oi = make_memop_idx(op, mmu_idx); + store_helper(env, addr, val, oi, retaddr, op); + + qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, meminfo); +} + +void cpu_stb_mmuidx_ra(CPUArchState *env, target_ulong addr, uint32_t val, + int mmu_idx, uintptr_t retaddr) +{ + cpu_store_helper(env, addr, val, mmu_idx, retaddr, MO_UB); +} + +void cpu_stw_mmuidx_ra(CPUArchState *env, target_ulong addr, uint32_t val, + int mmu_idx, uintptr_t retaddr) +{ + cpu_store_helper(env, addr, val, mmu_idx, retaddr, MO_TEUW); +} + +void cpu_stl_mmuidx_ra(CPUArchState *env, target_ulong addr, uint32_t val, + int mmu_idx, uintptr_t retaddr) +{ + cpu_store_helper(env, addr, val, mmu_idx, retaddr, MO_TEUL); +} + +void cpu_stq_mmuidx_ra(CPUArchState *env, target_ulong addr, uint64_t val, + int mmu_idx, uintptr_t retaddr) +{ + cpu_store_helper(env, addr, val, mmu_idx, retaddr, MO_TEQ); +} + /* First set of helpers allows passing in of OI and RETADDR. This makes them callable from other helpers. */ From patchwork Thu Dec 12 04:00:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181414 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp388436ile; Wed, 11 Dec 2019 20:04:12 -0800 (PST) X-Google-Smtp-Source: APXvYqyi/sxa374ybIwKz1ljcQG3syEw1O8G37TDOt/q16ccfDrotnwhCPBjFHoHG5u1XgIYR1JE X-Received: by 2002:a05:620a:139b:: with SMTP id k27mr6267224qki.112.1576123452073; Wed, 11 Dec 2019 20:04:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123452; cv=none; d=google.com; s=arc-20160816; b=qT6eLucvHl5pTRQnTQtdvQLM/Z6+tm50aYqrwqN/w9jyQKY93pBFyiMtbXIhs9ofHJ svvkx++blpDqivWX92BYASG2aXnCelCFvGMsg4mCYIjMEa4yuTbom0vogFx3EOCTaQtf gBEOVXLe6Q+PqzcMzjKhhtwiK24UP0e5znKYfbLha8AC6qmj9Mg1Jz/TeqHumbBMKTX8 mmrWd/9ZXk6FAasKGKbwvtjktIHq9Jaq4X4w3sxe6RnaQdwm+j+5LzpfJe/7bE5Sh3a1 jCV1dsPy5jBBSY9SlKpH482OXj7N8IXso4racpY2kPzRwME8PcNwtxJowgdBn9v/PPzF 3qtg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=LZjfj7f7LiMXr9N5B8njH/lhRDK1JnIrdikl5tdqwbU=; b=OX7dHFuG/VRse2FjK9SavoFUAJ57/4ZygwNtQDtS2CO3QtbDo9+IRZfIJZx+ej3n9D maDrM9JBTix9aGMVmIn83QTODbaYWmuRZhN2QupnsjhlDQ0pIP7Byy6CEnSLaXUcEMJF zN8rawwBFwNslBHOgfm6aaLw+kq9FHSvi7v1z05+CF08k9QGjRAKw9eo42ZHQNNmLCpO QSbvn8kP2UoSJYeGSOUBmip2Y5SidPj94eF9lb4cNiEwSUKgwxxOkBOwCXpJNwhRDt0+ VPXwWoyERMjaM4a3KI1V6qcYXPgb1O1U9hPO/WQ1yOi4l8NqJ6TweGN7kqickYJDmAl1 VSQg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VX6mewHW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:46 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 05/28] translator: Use cpu_ld*_code instead of open-coding Date: Wed, 11 Dec 2019 20:00:16 -0800 Message-Id: <20191212040039.26546-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The DO_LOAD macros replicate the distinction already performed by the cpu_ldst.h functions. Use them. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 11 --------- include/exec/translator.h | 48 +++++++++++---------------------------- 2 files changed, 13 insertions(+), 46 deletions(-) -- 2.20.1 diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index cf8af36dbc..399ff6c3da 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -129,11 +129,6 @@ static inline void clear_helper_retaddr(void) #include "exec/cpu_ldst_useronly_template.h" #undef MEMSUFFIX -/* - * Code access is deprecated in favour of translator_ld* functions - * (see translator.h). However there are still users that need to - * converted so for now these stay. - */ #define MEMSUFFIX _code #define CODE_ACCESS #define DATA_SIZE 1 @@ -455,12 +450,6 @@ void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, #undef CPU_MMU_INDEX #undef MEMSUFFIX -/* - * Code access is deprecated in favour of translator_ld* functions - * (see translator.h). However there are still users that need to - * converted so for now these stay. - */ - #define CPU_MMU_INDEX (cpu_mmu_index(env, true)) #define MEMSUFFIX _code #define SOFTMMU_CODE_ACCESS diff --git a/include/exec/translator.h b/include/exec/translator.h index 459dd72aab..638e1529c5 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -148,41 +148,19 @@ void translator_loop_temp_check(DisasContextBase *db); /* * Translator Load Functions * - * These are intended to replace the old cpu_ld*_code functions and - * are mandatory for front-ends that have been migrated to the common - * translator_loop. These functions are only intended to be called - * from the translation stage and should not be called from helper - * functions. Those functions should be converted to encode the - * relevant information at translation time. + * These are intended to replace the direct usage of the cpu_ld*_code + * functions and are mandatory for front-ends that have been migrated + * to the common translator_loop. These functions are only intended + * to be called from the translation stage and should not be called + * from helper functions. Those functions should be converted to encode + * the relevant information at translation time. */ -#ifdef CONFIG_USER_ONLY - -#define DO_LOAD(type, name, shift) \ - do { \ - set_helper_retaddr(1); \ - ret = name ## _p(g2h(pc)); \ - clear_helper_retaddr(); \ - } while (0) - -#else - -#define DO_LOAD(type, name, shift) \ - do { \ - int mmu_idx = cpu_mmu_index(env, true); \ - TCGMemOpIdx oi = make_memop_idx(shift, mmu_idx); \ - ret = helper_ret_ ## name ## _cmmu(env, pc, oi, 0); \ - } while (0) - -#endif - -#define GEN_TRANSLATOR_LD(fullname, name, type, shift, swap_fn) \ +#define GEN_TRANSLATOR_LD(fullname, type, load_fn, swap_fn) \ static inline type \ fullname ## _swap(CPUArchState *env, abi_ptr pc, bool do_swap) \ { \ - type ret; \ - DO_LOAD(type, name, shift); \ - \ + type ret = load_fn(env, pc); \ if (do_swap) { \ ret = swap_fn(ret); \ } \ @@ -195,11 +173,11 @@ void translator_loop_temp_check(DisasContextBase *db); return fullname ## _swap(env, pc, false); \ } -GEN_TRANSLATOR_LD(translator_ldub, ldub, uint8_t, 0, /* no swap */ ) -GEN_TRANSLATOR_LD(translator_ldsw, ldsw, int16_t, 1, bswap16) -GEN_TRANSLATOR_LD(translator_lduw, lduw, uint16_t, 1, bswap16) -GEN_TRANSLATOR_LD(translator_ldl, ldl, uint32_t, 2, bswap32) -GEN_TRANSLATOR_LD(translator_ldq, ldq, uint64_t, 3, bswap64) +GEN_TRANSLATOR_LD(translator_ldub, uint8_t, cpu_ldub_code, /* no swap */) +GEN_TRANSLATOR_LD(translator_ldsw, int16_t, cpu_ldsw_code, bswap16) +GEN_TRANSLATOR_LD(translator_lduw, uint16_t, cpu_lduw_code, bswap16) +GEN_TRANSLATOR_LD(translator_ldl, uint32_t, cpu_ldl_code, bswap32) +GEN_TRANSLATOR_LD(translator_ldq, uint64_t, cpu_ldq_code, bswap64) #undef GEN_TRANSLATOR_LD #endif /* EXEC__TRANSLATOR_H */ From patchwork Thu Dec 12 04:00:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181420 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp391863ile; Wed, 11 Dec 2019 20:09:10 -0800 (PST) X-Google-Smtp-Source: APXvYqyM4u1wXuTLIEMdCp1R/3GK0RweN6BzBiNUBh/hiTuLAtZve/6xQ7HWvyXX7i8XlOcPSKT8 X-Received: by 2002:a9d:6745:: with SMTP id w5mr5512968otm.221.1576123750611; Wed, 11 Dec 2019 20:09:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123750; cv=none; d=google.com; s=arc-20160816; b=m/QlhVYJ2/bv9hqKJgoYF0rF05O0lAnzdURpw8REF5d0c1Sw8kyTTJ9LLhyhmAyROr TrSSkucAsOZGktBkzrQliSmPC2jT/G4QV18uHIi0OWeSKOsU+R+RZqj66iRv/DKh6EGY o72KuzkS+/+2oKYxE4SC7canpRV66XnhyYYLO/cboVnlQ+Hsk6s79yQ4ifxVhbWK71ev 1Y+Du9b+MN3Q9MaWYtH8Egv4QYBzn+PMyhWmJUd43Ux5xM3jCtjMPC1g29bcvULEVtFB Q4kazHzVNCyyHtkCURUXnitcdoDqXtVLBt3nRFVjutqcMrCSnyRVXLDO4MNEeGAobZbN BY6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=g2HDuntRIjCstijqk6uXe4EzljYYGvKqgpwECMjCs30=; b=jT8FoR6EWGRXbmzFSFEF6GFzUYnH/+qTqEDd6OkQRYB2uNxAOYjwz7Vk89Kr42Spjf uHVQos/1+z7tXtQCRfxdvXSMJvEMD8NJVvo/fKcDGBehwjBOPY3BsFbPIyMfqRtzwzBB gaV+w1q5cffOvrbmtYmV7+jxir00XnAgtRMJzs0ndVCqjBlewf9EsqwKdsNCooZ0rGu7 nX4rX+d1kXIBD9+o/NFD4M9V8Fsd8NA/WoNa2/sP74MmIPHQDypL0iMb4J81ri7WtBA1 cUjB3AzEXk8gEHB905UogwLo7AZFD5IIiiedKNlHVHl+LH5SmlSf07PF/gzEI7+Up3gt 864g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oj3ttRdA; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:47 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 06/28] cputlb: Rename helper_ret_ld*_cmmu to cpu_ld*_code Date: Wed, 11 Dec 2019 20:00:17 -0800 Message-Id: <20191212040039.26546-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There are no uses of the *_cmmu names other than the bare wrapping within the *_code inlines. Therefore rename the functions so we can drop the inlines. Use abi_ptr instead of target_ulong in preparation for user-only; the two types are identical for softmmu. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 29 ++++------ include/exec/cpu_ldst_template.h | 21 ------- tcg/tcg.h | 29 ---------- accel/tcg/cputlb.c | 94 ++++++++------------------------ docs/devel/loads-stores.rst | 4 +- 5 files changed, 36 insertions(+), 141 deletions(-) -- 2.20.1 Reviewed-by: Aleksandar Markovic diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 399ff6c3da..ef59ed61e4 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -450,25 +450,20 @@ void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, #undef CPU_MMU_INDEX #undef MEMSUFFIX -#define CPU_MMU_INDEX (cpu_mmu_index(env, true)) -#define MEMSUFFIX _code -#define SOFTMMU_CODE_ACCESS +uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr); +uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr); +uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr); +uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr); -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" +static inline int cpu_ldsb_code(CPUArchState *env, abi_ptr addr) +{ + return (int8_t)cpu_ldub_code(env, addr); +} -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" - -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#undef SOFTMMU_CODE_ACCESS +static inline int cpu_ldsw_code(CPUArchState *env, abi_ptr addr) +{ + return (int16_t)cpu_lduw_code(env, addr); +} #endif /* defined(CONFIG_USER_ONLY) */ diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h index ea39e29c19..e400979f23 100644 --- a/include/exec/cpu_ldst_template.h +++ b/include/exec/cpu_ldst_template.h @@ -58,25 +58,6 @@ /* generic load/store macros */ -#ifdef SOFTMMU_CODE_ACCESS - -static inline RES_TYPE -glue(glue(cpu_ld, USUFFIX), _code)(CPUArchState *env, target_ulong ptr) -{ - TCGMemOpIdx oi = make_memop_idx(MO_TE | SHIFT, CPU_MMU_INDEX); - return glue(glue(helper_ret_ld, USUFFIX), _cmmu)(env, ptr, oi, 0); -} - -#if DATA_SIZE <= 2 -static inline int -glue(glue(cpu_lds, SUFFIX), _code)(CPUArchState *env, target_ulong ptr) -{ - return (DATA_STYPE)glue(glue(cpu_ld, USUFFIX), _code)(env, ptr); -} -#endif - -#else - static inline RES_TYPE glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, target_ulong ptr, @@ -127,8 +108,6 @@ glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr, glue(glue(cpu_st, SUFFIX), _mmuidx_ra)(env, ptr, v, CPU_MMU_INDEX, 0); } -#endif /* !SOFTMMU_CODE_ACCESS */ - #undef RES_TYPE #undef DATA_TYPE #undef DATA_STYPE diff --git a/tcg/tcg.h b/tcg/tcg.h index 92ca10dffc..3b4f79301c 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -1290,27 +1290,6 @@ void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val, void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val, TCGMemOpIdx oi, uintptr_t retaddr); -uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -uint32_t helper_le_ldl_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -uint64_t helper_le_ldq_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); - /* Temporary aliases until backends are converted. */ #ifdef TARGET_WORDS_BIGENDIAN # define helper_ret_ldsw_mmu helper_be_ldsw_mmu @@ -1322,10 +1301,6 @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, # define helper_ret_stw_mmu helper_be_stw_mmu # define helper_ret_stl_mmu helper_be_stl_mmu # define helper_ret_stq_mmu helper_be_stq_mmu -# define helper_ret_lduw_cmmu helper_be_lduw_cmmu -# define helper_ret_ldsw_cmmu helper_be_ldsw_cmmu -# define helper_ret_ldl_cmmu helper_be_ldl_cmmu -# define helper_ret_ldq_cmmu helper_be_ldq_cmmu #else # define helper_ret_ldsw_mmu helper_le_ldsw_mmu # define helper_ret_lduw_mmu helper_le_lduw_mmu @@ -1336,10 +1311,6 @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, # define helper_ret_stw_mmu helper_le_stw_mmu # define helper_ret_stl_mmu helper_le_stl_mmu # define helper_ret_stq_mmu helper_le_stq_mmu -# define helper_ret_lduw_cmmu helper_le_lduw_cmmu -# define helper_ret_ldsw_cmmu helper_le_ldsw_cmmu -# define helper_ret_ldl_cmmu helper_le_ldl_cmmu -# define helper_ret_ldq_cmmu helper_le_ldq_cmmu #endif uint32_t helper_atomic_cmpxchgb_mmu(CPUArchState *env, target_ulong addr, diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 4d3ec1d35a..7d519738bb 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -2028,98 +2028,50 @@ void cpu_stq_mmuidx_ra(CPUArchState *env, target_ulong addr, uint64_t val, /* Code access functions. */ -static uint64_t full_ldub_cmmu(CPUArchState *env, target_ulong addr, +static uint64_t full_ldub_code(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { - return load_helper(env, addr, oi, retaddr, MO_8, true, full_ldub_cmmu); + return load_helper(env, addr, oi, retaddr, MO_8, true, full_ldub_code); } -uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr) { - return full_ldub_cmmu(env, addr, oi, retaddr); + TCGMemOpIdx oi = make_memop_idx(MO_UB, cpu_mmu_index(env, true)); + return full_ldub_code(env, addr, oi, 0); } -int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +static uint64_t full_lduw_code(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) { - return (int8_t) full_ldub_cmmu(env, addr, oi, retaddr); + return load_helper(env, addr, oi, retaddr, MO_TEUW, true, full_lduw_code); } -static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr) { - return load_helper(env, addr, oi, retaddr, MO_LEUW, true, - full_le_lduw_cmmu); + TCGMemOpIdx oi = make_memop_idx(MO_TEUW, cpu_mmu_index(env, true)); + return full_lduw_code(env, addr, oi, 0); } -uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +static uint64_t full_ldl_code(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) { - return full_le_lduw_cmmu(env, addr, oi, retaddr); + return load_helper(env, addr, oi, retaddr, MO_TEUL, true, full_ldl_code); } -int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr) { - return (int16_t) full_le_lduw_cmmu(env, addr, oi, retaddr); + TCGMemOpIdx oi = make_memop_idx(MO_TEUL, cpu_mmu_index(env, true)); + return full_ldl_code(env, addr, oi, 0); } -static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +static uint64_t full_ldq_code(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) { - return load_helper(env, addr, oi, retaddr, MO_BEUW, true, - full_be_lduw_cmmu); + return load_helper(env, addr, oi, retaddr, MO_TEQ, true, full_ldq_code); } -uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr) { - return full_be_lduw_cmmu(env, addr, oi, retaddr); -} - -int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return (int16_t) full_be_lduw_cmmu(env, addr, oi, retaddr); -} - -static uint64_t full_le_ldul_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return load_helper(env, addr, oi, retaddr, MO_LEUL, true, - full_le_ldul_cmmu); -} - -uint32_t helper_le_ldl_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return full_le_ldul_cmmu(env, addr, oi, retaddr); -} - -static uint64_t full_be_ldul_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return load_helper(env, addr, oi, retaddr, MO_BEUL, true, - full_be_ldul_cmmu); -} - -uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return full_be_ldul_cmmu(env, addr, oi, retaddr); -} - -uint64_t helper_le_ldq_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return load_helper(env, addr, oi, retaddr, MO_LEQ, true, - helper_le_ldq_cmmu); -} - -uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return load_helper(env, addr, oi, retaddr, MO_BEQ, true, - helper_be_ldq_cmmu); + TCGMemOpIdx oi = make_memop_idx(MO_TEQ, cpu_mmu_index(env, true)); + return full_ldq_code(env, addr, oi, 0); } diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index c74cd090e6..8a5bc912a5 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -171,8 +171,6 @@ more in line with the other memory access functions. load: ``helper_{endian}_ld{sign}{size}_mmu(env, addr, opindex, retaddr)`` -load (code): ``helper_{endian}_ld{sign}{size}_cmmu(env, addr, opindex, retaddr)`` - store: ``helper_{endian}_st{size}_mmu(env, addr, val, opindex, retaddr)`` ``sign`` @@ -192,7 +190,7 @@ store: ``helper_{endian}_st{size}_mmu(env, addr, val, opindex, retaddr)`` - ``ret`` : target endianness Regexes for git grep - - ``\`` + - ``\`` - ``\`` ``address_space_*`` From patchwork Thu Dec 12 04:00:18 2019 Content-Type: text/plain; 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:49 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 07/28] cputlb: Provide cpu_(ld,st}*_mmuidx_ra for user-only Date: Wed, 11 Dec 2019 20:00:18 -0800 Message-Id: <20191212040039.26546-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::644 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This finishes the new interface began with the previous patch. Document the interface and deprecate MMU_MODE_SUFFIX. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 84 ++++++++++++++++++++++++++++++++++++++--- 1 file changed, 79 insertions(+), 5 deletions(-) -- 2.20.1 diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index ef59ed61e4..3b2c46bdf4 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -25,9 +25,13 @@ * * The syntax for the accessors is: * - * load: cpu_ld{sign}{size}_{mmusuffix}(env, ptr) + * load: cpu_ld{sign}{size}_{mmusuffix}(env, ptr) + * cpu_ld{sign}{size}_{mmusuffix}_ra(env, ptr, retaddr) + * cpu_ld{sign}{size}_mmuidx_ra(env, ptr, mmu_idx, retaddr) * - * store: cpu_st{sign}{size}_{mmusuffix}(env, ptr, val) + * store: cpu_st{size}_{mmusuffix}(env, ptr, val) + * cpu_st{size}_{mmusuffix}_ra(env, ptr, val, retaddr) + * cpu_st{size}_mmuidx_ra(env, ptr, val, mmu_idx, retaddr) * * sign is: * (empty): for 32 and 64 bit sizes @@ -40,9 +44,14 @@ * l: 32 bits * q: 64 bits * - * mmusuffix is one of the generic suffixes "data" or "code", or - * (for softmmu configs) a target-specific MMU mode suffix as defined - * in target cpu.h. + * mmusuffix is one of the generic suffixes "data" or "code", or "mmuidx". + * The "mmuidx" suffix carries an extra mmu_idx argument that specifies + * the index to use; the "data" and "code" suffixes take the index from + * cpu_mmu_index(). + * + * Deprecated: for softmmu configs, mmusuffix may be a target-specific MMU + * mode suffix as defined in target cpu.h. These should be replaced by + * one of the "mmuidx" functions. */ #ifndef CPU_LDST_H #define CPU_LDST_H @@ -145,6 +154,71 @@ static inline void clear_helper_retaddr(void) #undef MEMSUFFIX #undef CODE_ACCESS +/* + * Provide the same *_mmuidx_ra interface as for softmmu. + * The mmu_idx argument is ignored. + */ + +static inline uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_ldub_data_ra(env, addr, ra); +} + +static inline uint32_t cpu_lduw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_lduw_data_ra(env, addr, ra); +} + +static inline uint32_t cpu_ldl_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_ldl_data_ra(env, addr, ra); +} + +static inline uint64_t cpu_ldq_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_ldq_data_ra(env, addr, ra); +} + +static inline int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_ldsb_data_ra(env, addr, ra); +} + +static inline int cpu_ldsw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_ldsw_data_ra(env, addr, ra); +} + +static inline void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr, + uint32_t val, int mmu_idx, uintptr_t ra) +{ + cpu_stb_data_ra(env, addr, val, ra); +} + +static inline void cpu_stw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + uint32_t val, int mmu_idx, uintptr_t ra) +{ + cpu_stw_data_ra(env, addr, val, ra); +} + +static inline void cpu_stl_mmuidx_ra(CPUArchState *env, abi_ptr addr, + uint32_t val, int mmu_idx, uintptr_t ra) +{ + cpu_stl_data_ra(env, addr, val, ra); +} + +static inline void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, + uint64_t val, int mmu_idx, uintptr_t ra) +{ + cpu_stq_data_ra(env, addr, val, ra); +} + #else /* Needed for TCG_OVERSIZED_GUEST */ From patchwork Thu Dec 12 04:00:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181416 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp390122ile; Wed, 11 Dec 2019 20:06:39 -0800 (PST) X-Google-Smtp-Source: APXvYqzCQ1wZpsoeJ8JJUzqyCoIlTXfjFDq7fUKp9U7GKy8TwDz1W5ohwPOrG6vnIMoXQdGl2ds7 X-Received: by 2002:a37:514:: with SMTP id 20mr6147136qkf.321.1576123599031; Wed, 11 Dec 2019 20:06:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123599; cv=none; d=google.com; s=arc-20160816; b=eN67OLTa0pBQVYgmAtqe1q9LGc6S6m494uEgt1d088nsQ96T5WOubTSefZTLq1IeUS 5SK2epTPQ1sNHM2ru9rkZbDG0Fh4T6O7JAlOzhaLuVBW6MLk7Q3oSsumJEfpEBsflxcg I85OqUPnyioQPqXGYPoKlxfx7Cr4qwOU8DfZfqE6A5It0AL4bIDYA2pAL9PGDnMjnp6s 0mWoTy4u3SrgiGLnB3niw4B8x5leAqsMUP3R4VbCNVc/B+Oj+DJWsYFvrezIyAL7WWdo qYNWVjlgGGt6IhyjFoQu036gS2eid6YKYowEV5KLjHWqcNR+bXw+ocfUewMzErwGPETq BMVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Z1jFy93uFg71kyk+6R/bFVW2zASLoWb071ZQYRrnUSs=; b=PVUnFpTcPEdBspoyxbs8ftIgUHLi6PPHIo098Jsbu+U7ema1qKvoEG14VgLh/sByzR 2K9guaIcApxpo8g3iGXdg1SWRSkACdNjEYUXAt8ovZSJc+S6tLHXxpz8MTgbrKVJ0lnY WT2t3QMFwhcUtu80WYGkn1MlSPf2F0V86eMagioxsZD5DsS0vqql/Nki50SMVtt9ZHeC ISyJWklg6AwpqfDHCp+psvZwgcskUE/2hMIgaxjz6doZFWZOeQ6YQ0lTLpH+l4qqOnu+ nZVShjl4XnFogzeaAo+uAI+3gFjVnQw2qoTYZcjTFjoSfOPcxm+k4n/LOIOeGpVE/IhJ 4Vbg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=StUfQfWw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:50 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 08/28] target/i386: Use cpu_*_mmuidx_ra instead of templates Date: Wed, 11 Dec 2019 20:00:19 -0800 Message-Id: <20191212040039.26546-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Received-From: 2607:f8b0:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eduardo Habkost Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Do not use exec/cpu_ldst_{,useronly_}template.h directly, but instead use the functional interface. Cc: Paolo Bonzini Cc: Eduardo Habkost Signed-off-by: Richard Henderson --- target/i386/seg_helper.c | 75 ++++++++++++++++++++++++++-------------- 1 file changed, 50 insertions(+), 25 deletions(-) -- 2.20.1 Acked-by: Paolo Bonzini diff --git a/target/i386/seg_helper.c b/target/i386/seg_helper.c index 87a627f9dc..b348569c30 100644 --- a/target/i386/seg_helper.c +++ b/target/i386/seg_helper.c @@ -37,37 +37,62 @@ # define LOG_PCALL_STATE(cpu) do { } while (0) #endif -#ifdef CONFIG_USER_ONLY -#define MEMSUFFIX _kernel -#define DATA_SIZE 1 -#include "exec/cpu_ldst_useronly_template.h" +static inline uint32_t cpu_ldub_kernel_ra(CPUX86State *env, abi_ptr ptr, + uintptr_t ra) +{ + return cpu_ldub_mmuidx_ra(env, ptr, cpu_mmu_index_kernel(env), ra); +} -#define DATA_SIZE 2 -#include "exec/cpu_ldst_useronly_template.h" +static inline uint32_t cpu_lduw_kernel_ra(CPUX86State *env, abi_ptr ptr, + uintptr_t ra) +{ + return cpu_lduw_mmuidx_ra(env, ptr, cpu_mmu_index_kernel(env), ra); +} -#define DATA_SIZE 4 -#include "exec/cpu_ldst_useronly_template.h" +static inline uint32_t cpu_ldl_kernel_ra(CPUX86State *env, abi_ptr ptr, + uintptr_t ra) +{ + return cpu_ldl_mmuidx_ra(env, ptr, cpu_mmu_index_kernel(env), ra); +} -#define DATA_SIZE 8 -#include "exec/cpu_ldst_useronly_template.h" -#undef MEMSUFFIX -#else -#define CPU_MMU_INDEX (cpu_mmu_index_kernel(env)) -#define MEMSUFFIX _kernel -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" +static inline uint64_t cpu_ldq_kernel_ra(CPUX86State *env, abi_ptr ptr, + uintptr_t ra) +{ + return cpu_ldq_mmuidx_ra(env, ptr, cpu_mmu_index_kernel(env), ra); +} -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" +static inline void cpu_stb_kernel_ra(CPUX86State *env, target_ulong ptr, + uint32_t val, uintptr_t ra) +{ + cpu_stb_mmuidx_ra(env, ptr, val, cpu_mmu_index_kernel(env), ra); +} -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" +static inline void cpu_stw_kernel_ra(CPUX86State *env, target_ulong ptr, + uint32_t val, uintptr_t ra) +{ + cpu_stw_mmuidx_ra(env, ptr, val, cpu_mmu_index_kernel(env), ra); +} -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif +static inline void cpu_stl_kernel_ra(CPUX86State *env, target_ulong ptr, + uint32_t val, uintptr_t ra) +{ + cpu_stl_mmuidx_ra(env, ptr, val, cpu_mmu_index_kernel(env), ra); +} + +static inline void cpu_stq_kernel_ra(CPUX86State *env, target_ulong ptr, + uint64_t val, uintptr_t ra) +{ + cpu_stq_mmuidx_ra(env, ptr, val, cpu_mmu_index_kernel(env), ra); +} + +#define cpu_ldub_kernel(e, p) cpu_ldub_kernel_ra(e, p, 0) +#define cpu_lduw_kernel(e, p) cpu_lduw_kernel_ra(e, p, 0) +#define cpu_ldl_kernel(e, p) cpu_ldl_kernel_ra(e, p, 0) +#define cpu_ldq_kernel(e, p) cpu_ldq_kernel_ra(e, p, 0) +#define cpu_stb_kernel(e, p, v) cpu_stb_kernel_ra(e, p, v, 0) +#define cpu_stw_kernel(e, p, v) cpu_stw_kernel_ra(e, p, v, 0) +#define cpu_stl_kernel(e, p, v) cpu_stl_kernel_ra(e, p, v, 0) +#define cpu_stq_kernel(e, p, v) cpu_stq_kernel_ra(e, p, v, 0) /* return non zero if error */ static inline int load_segment_ra(CPUX86State *env, uint32_t *e1_ptr, From patchwork Thu Dec 12 04:00:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181424 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp393541ile; 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:51 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 09/28] target/s390x: Include tcg.h in mem_helper.c Date: Wed, 11 Dec 2019 20:00:20 -0800 Message-Id: <20191212040039.26546-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Code movement in an upcoming patch will show that this file was implicitly depending on tcg.h being included indirectly. Cc: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/mem_helper.c | 1 + 1 file changed, 1 insertion(+) -- 2.20.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 2325767f17..57ce17c252 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -27,6 +27,7 @@ #include "exec/cpu_ldst.h" #include "qemu/int128.h" #include "qemu/atomic128.h" +#include "tcg.h" #if !defined(CONFIG_USER_ONLY) #include "hw/s390x/storage-keys.h" From patchwork Thu Dec 12 04:00:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181418 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp390237ile; Wed, 11 Dec 2019 20:06:49 -0800 (PST) X-Google-Smtp-Source: APXvYqwHZMIGOdobLOg9T7krW9PNr2psZLCzM/SWtwBI7ueBtkhr6EOJnD2K1zRshxHX+r8O/L9V X-Received: by 2002:a37:6c44:: with SMTP id h65mr6224593qkc.245.1576123609295; Wed, 11 Dec 2019 20:06:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123609; cv=none; d=google.com; s=arc-20160816; b=xfMOaS/BSM7l4vZXRcyjprePVvyvohWgAwy9DekpSKYxHUtxpR/ZaiDdPZE6UWS0aS PcxeWFbwPTyr3w6z5dNyazYk8I9763D2iKsm+RVRDv3Dmp+PwMtBLopj0X5U9NvQrgUx 9szCoOJn+SPEr68WQyhsfvMPrkDw2Ix6dfAxjNG4oqgjTWGlnoE8UDk7CdNQv453Uq0t Yixy3JvPGsC2kUp7n+7GF1r2Oln5fpcVt8Y0ob3oeyNgcVS1cqrbcjJr8Y62LGu1lsU0 7BhY4O+4FbtD2xlMHewEFNrMt679yKAp8RJ2BCbFzYT0IrKlUeirt7+tQi3+qEHTBTC3 UjLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ZD30K4OON5Rr10XGqonKOfQz8NelurszVZDAGc9w8Wk=; b=vjrAkJRWBxJS/jVtW8/ykOobC/RDopfrXhz5qq5+QPs+Xxmt5LQLavcX9KDqU9e75y feFdti+HtLMOaxyTDzq9M4vb+HPW7a4FuYE27vl1Yb7tYS4Vqc3aCUnaZ6TbktGaTXs0 QDHVS3f1EA6cH7JmHpNeMEUpL4RpVt6i6l3VT9sJwq2DQchZc6652HyB4FYCs1E7BTWU X2BsrkA/rjqgvNmQsYjFbEQs3kUX2Mr4PUhRzMwIhnuWbjR1hMYdSJ50lcizYYcLOZHl r12vfjBNzWRP2wwLx5hghLD9EL/Yiyp0Ef2n+F09fwD7ODQE3BTmu+yMV4bBDGQQfIlC lsGA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=U6gnXQDC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:52 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 10/28] target/arm: Include tcg.h in sve_helper.c Date: Wed, 11 Dec 2019 20:00:21 -0800 Message-Id: <20191212040039.26546-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1042 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Code movement in an upcoming patch will show that this file was implicitly depending on tcg.h being included indirectly. Cc: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/sve_helper.c | 1 + 1 file changed, 1 insertion(+) -- 2.20.1 diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index fc0c1755d2..83cc7f5bb5 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -25,6 +25,7 @@ #include "exec/helper-proto.h" #include "tcg/tcg-gvec-desc.h" #include "fpu/softfloat.h" +#include "tcg.h" /* Note that vector data is stored in host-endian 64-bit chunks, From patchwork Thu Dec 12 04:00:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181419 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp390342ile; Wed, 11 Dec 2019 20:06:59 -0800 (PST) X-Google-Smtp-Source: APXvYqwPFM/bDrgaEYMkIo5whCme9C/c0k687jSZO1T8X/vqRJgGnFsVSOYehsBMt2IIkjXG/bj2 X-Received: by 2002:a0c:990d:: with SMTP id h13mr6267693qvd.247.1576123619675; Wed, 11 Dec 2019 20:06:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123619; cv=none; d=google.com; s=arc-20160816; b=b6s8SHemX7h1V3BRoJ8/iiBVId9wHDcUBmGdfU+RGjnKGqueHHtN+T7/YExJ9uWtPO iW0G07AfpMC1z1Svcd2MTFLZHOOv88CGdZ/3X6ZIwCfOkha1HLxyQAUOTxQoXbiM9mv9 sy6R/QbaekAKVM1Ri1SaSc92FhHUqOyMiCtNiPn3lecBZtWgzgAAyNqcjvDn8Jb8MryZ 0/g99uSkQlp8UkvCltHXRro1b5eW47wwUy86ymzbI1AtdPfNxiQimZp1ZjYhvGzOhTQ4 f29RRRvmldGwMbzJMCZNVq2+sPuYacxP9nkJqFvC9HPP4maJgXgfLuFHGnfKBUD3KzwM I/yw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Tm+3zU2+l6eymlzwCB1U0xOnxx40yaNG/9+U/KiDb/I=; b=iJrwpd8ALt0t4CCwkTuZP703ckSC7QrW1u+MDAW4mGb9xBlN9NDd1s7OYy4Xknbi/p tuq0WCqJp53hcZc8tYJ0q1ex5qllcDSck5ZuVT9ZQsRNzofENp9aYXJO1tYVQI+S4NF8 MkEkmTMw+wHEePUwdILY1SPHig0lp7oVD1fzrDs/2jzPaOq0x6Pwf49TaU4Dbx6p2W2D 99V7nMEc1p92aE41DikXHqgIsnYf36wFpsJG0rKUwX7q6RvU68+FKyYPg3cjRh9uXKbf 0A1z+n4dV46d8vONeKTMpjhLx++AkynbFm4b63CNtfVmWjFfn2z5HFoRNzIlqBsPeZAA pbOQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HOJyPutX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id a6si2226444qtp.258.2019.12.11.20.06.59 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 Dec 2019 20:06:59 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HOJyPutX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:53960 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ifFkg-0008E6-Rl for patch@linaro.org; Wed, 11 Dec 2019 23:06:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:49190) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ifFey-0000uv-1v for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:01:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ifFew-0004Cm-Oc for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:01:03 -0500 Received: from mail-pj1-x1044.google.com ([2607:f8b0:4864:20::1044]:32871) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ifFev-00042M-K3 for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:01:02 -0500 Received: by mail-pj1-x1044.google.com with SMTP id r67so455633pjb.0 for ; Wed, 11 Dec 2019 20:00:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=Tm+3zU2+l6eymlzwCB1U0xOnxx40yaNG/9+U/KiDb/I=; b=HOJyPutXkwI28qe8MJ/lJTYi+Ndl2nzk5rKbS19xQD7ZHzKEJTdOPENYVBpQXudL1Z nKfM4kdBEP+OyOvRFbXeFBv0OWD+i9JJ0uAjQkX4lwFzy6X0Qhdy1/8WsKBHoLFployP oW0cmwqvmPNHTUGKorW4PDJGwXpqRtWBBtJKDf3bUhLsRVbs/JXr0ipYdMgn2HNLyS6F Buv56vaQevz2cidA0Rf2osCCRGGOP9U0+mCree8Ar1z7lBUJ2eInIqvSjhhx6Q/X4u80 38hxvEKRvkEIfMJlS3GsWI3RnD6U9TxIsMMtktxgTEwCESIbLqywwRZRmemS75tIte9D Rh+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Tm+3zU2+l6eymlzwCB1U0xOnxx40yaNG/9+U/KiDb/I=; b=FksV/UrQyTEXMJgSuciQXRHQfzfIYeqwARiBuhxkiNicYMhk133ImnZ1+XpRgwrOhX XTVV6YwCSZ6aoyHLJIrHetzY+3yGUDahUW1KcT91VdPrW0D2PyxLx5jBGh5ygrQuHZEa F7nhW2H80cQHnUMULAxo04YdOLvIUoBvcixG9QSduQFk87UjLs5aVRbjOse6/1UxxLcb YuB6r4rbwmNI+qmbamy0taeDRl4B6i4XI9POsnbtJG+pEyC8jTOQ7UiaTC3rxbOGvYeW jqMskIGZOulSr5puqBRQcMpkAwd2RpPzTbJGKqSKymLmUXB5eBjXOdzczNmxlKYEC9ot tU4g== X-Gm-Message-State: APjAAAWFvWMgNHdT8QeOnhSKL5FL+6uLnN+s6qfI/FKXeQyK6HUWQaOO CoUfDmuFBJS4IOPoDPqzo59QwadYYc8= X-Received: by 2002:a17:90a:e98a:: with SMTP id v10mr7597126pjy.67.1576123254761; Wed, 11 Dec 2019 20:00:54 -0800 (PST) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:54 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 11/28] accel/tcg: Include tcg.h in tcg-runtime.c Date: Wed, 11 Dec 2019 20:00:22 -0800 Message-Id: <20191212040039.26546-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1044 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Code movement in an upcoming patch will show that this file was implicitly depending on tcg.h being included indirectly. Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime.c | 1 + 1 file changed, 1 insertion(+) -- 2.20.1 Reviewed-by: Alex Bennée diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c index 8a1e408e31..4ab2cf7f75 100644 --- a/accel/tcg/tcg-runtime.c +++ b/accel/tcg/tcg-runtime.c @@ -30,6 +30,7 @@ #include "exec/tb-lookup.h" #include "disas/disas.h" #include "exec/log.h" +#include "tcg.h" /* 32-bit helpers */ From patchwork Thu Dec 12 04:00:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181430 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp393769ile; Wed, 11 Dec 2019 20:12:00 -0800 (PST) X-Google-Smtp-Source: APXvYqx54RGEiIgz/X8hUVuWBwd6ES0sDCdSb51GbuwP42IMMcW9t2eQpY+SaenXEoiKhtZ4sglJ X-Received: by 2002:a37:7fc2:: with SMTP id a185mr6363711qkd.107.1576123920783; Wed, 11 Dec 2019 20:12:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123920; cv=none; d=google.com; s=arc-20160816; b=gPdJaiil1r2QaP7TxeKFaPsvAT817AYGfbTSEiKVlDZ7y0iNcSn1acCpU+LxJYmvbg yLs34/FKKTb2qxaObtB794L9L5K83AEWG0+uNlYMBQEq89wrdLTL1GrEqyH6dGBqehTB 5uzsl5H81TN7dlyCtSJdwY33GLHykM7Ul8cVA772MB0V1VRdB3xL3DEx1YWWVNMO1vfo wQPG5m7OxzuTJaJxQPFLOQ5mVFJZeKIj1+adAMq7Gd9zMRav1HPSdbyTIsRhk60n0c9A 66isiolat/mRik6W/NQeDKhzgO55oEBRc+TiwEa+J8UmzRV3S5Ux6LwfJQqhvLs0Fc1D F1qA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=eyI58KOw8f6KjHd513cv2CHH4iBrq42PUmdQAMssFYg=; b=g5zD2W3v7mY9UF4pbBL9O+w3JBFNTRieK1F6go0cZ8EyGWh++w3bfPb8e/IpkWhin3 h+FCI9UMJLwFBLzVWgnEp8CNgVu6qE3juxaGb69RoBDqxrSaGwesEwZkyoOg9pQNMDEU tXFqTZYZLZontYa8VL/TthVNMgEi75E9kJJyQrKT7bvNU4y2SsWoNz4fBUALsCZxeEE3 fR/UEa2iaLfphDLKhz0SVPmnq1OfEK6rJpeJTO0cChGgOF+ojwT/RuhgxtHGtDOVqNy/ o0W0oiVx1jkvh4PfRQC0u1C2VUM4/IEJLkQp+C5cFCTTx4Xgq04+0K++5m4A3TWZcfjm 4Oyg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yU7qj1XN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id v36si2115030qta.93.2019.12.11.20.12.00 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 Dec 2019 20:12:00 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yU7qj1XN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:54070 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ifFpX-0006xU-QH for patch@linaro.org; Wed, 11 Dec 2019 23:11:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:49097) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ifFex-0000uI-KH for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:01:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ifFew-0004CO-Hw for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:01:03 -0500 Received: from mail-pl1-x644.google.com ([2607:f8b0:4864:20::644]:41897) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ifFet-00043l-P9 for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:01:01 -0500 Received: by mail-pl1-x644.google.com with SMTP id bd4so444084plb.8 for ; Wed, 11 Dec 2019 20:00:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=eyI58KOw8f6KjHd513cv2CHH4iBrq42PUmdQAMssFYg=; b=yU7qj1XNPXvU2aK0pxXWNBjDcqxCt8gSjhGqkbLmUYjZzt14lFVB5uyDIN+MmYDjlJ S/sdqZw3de50hJbaptVKpOUIYvO0mam0o8VZTbshL+sE1UA5tsZfvOETvvWiiJB9E9hN 3Hd+ydtwdahyHdhdYEUyD8UEnpAYF2Q73twN5f+DxGX9Ynn9+zjK3o8rzatKxX8gupUD XgOmiL1JpaN5nwgaSa3ym70/7l5tlEHEzoL2fKzzSEyITMY8cQ4MYSdcdo08kmYtwV/f lizTHrd7oYxzlfbwYV8qvTjr8CrUAI5XN3GDxg0rMfT16GdQwA5xxKqMyyhF6R0h9RJ0 70TA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eyI58KOw8f6KjHd513cv2CHH4iBrq42PUmdQAMssFYg=; b=m2gR4A/Uu9Z244jyuq5ZYF+LNJPopa+oxHDdQjB7KzcMVmQvbJn63tfAtV9z/+GThT aA0hppjj6djX3pv0MEZkfy+0en5FJCWOuDNsQ8Dj/VfzPuEp900dJphejWvOH5mqOXAe /1aKsRltb70ypvoEwZKtxkLTdaM0adGQdzQ8i4blXnzvFgsmpatf80ASUbHpRRROfFj4 LYbG/KGSkO2vGFrD5Qlfh7NYBHO0DMru7HvTQzTR5KWgL5tsZyOBv2KnaEIumLXfMKGe WNC27EQzkXndeIsgflme431UUuKXduH5n6AKvPNj8qBJz0fKOEUY60WkWtnF//Y16IoW O4hQ== X-Gm-Message-State: APjAAAUtSZvZV2LoFf7YpP8SOSklcTnfFfuwBJ1bJsI/jIe94DQ1nqt/ uJBOOwz+jMmycDxYl7yMxTWAARfxruA= X-Received: by 2002:a17:902:9a04:: with SMTP id v4mr7382327plp.192.1576123256006; Wed, 11 Dec 2019 20:00:56 -0800 (PST) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:55 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 12/28] linux-user: Include tcg.h in syscall.c Date: Wed, 11 Dec 2019 20:00:23 -0800 Message-Id: <20191212040039.26546-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::644 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Code movement in an upcoming patch will show that this file was implicitly depending on tcg.h being included indirectly. Signed-off-by: Richard Henderson --- linux-user/syscall.c | 1 + 1 file changed, 1 insertion(+) -- 2.20.1 diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 171c0caef3..34825f15bf 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -115,6 +115,7 @@ #include "user/syscall-trace.h" #include "qapi/error.h" #include "fd-trans.h" +#include "tcg.h" #ifndef CLONE_IO #define CLONE_IO 0x80000000 /* Clone io context */ From patchwork Thu Dec 12 04:00:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181423 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp393435ile; Wed, 11 Dec 2019 20:11:33 -0800 (PST) X-Google-Smtp-Source: APXvYqzzU2L+IXRdx88JW+qK7BQsXl6EnsRvpX9Tn2bOKlJ+mrVd5Q1je359oScEe7NmnFvMue9A X-Received: by 2002:a05:6830:2111:: with SMTP id i17mr5482464otc.24.1576123893092; Wed, 11 Dec 2019 20:11:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123893; cv=none; d=google.com; s=arc-20160816; b=07w8XssY0og3ExMjds2eqKIoNTNIBUPjVWUJrXlK4XEhdh90EdWMXUvAirvlaArgtA uNCjSoKR+64FMZzXjSCaok3bvvHA4CcgyLxYOM8qHmhDsgGDSwLcod7JugfLQWC0D//6 MymlCizFeBnUj9DnNE6DvV4vps2tGn68gkVsXhL21s33BUPG62x8eva1BZLNbZVM5PcE lACqNOUstIJ9fG5H1tdVHeSpnoSuUhZIRcT79i5fAq2Dk8ECsaJBFrhd7Je3Ohqa4aIa UrKdztRyILxb116cJpYm4oWTBIUs227rPehE89CeaRwfo4roJ7Cez9+unQT8kU4MgwKX OUTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=r5qvsiX5IA+LOMSB6fEkOOIthLDhI8Op7OL9OEMu7no=; b=J9ryRQwE7rr7V8B9wSVFhulhy3CwXdfmNewZmteGciK4pa9NjMKkyVgvyU6zGwoK5a mXewWB1j937aaOZ/2M3V22B3MTkBcyrRiIEFyxRJOYqd3W0CWA8GXK80vu+ZT9sSbnJZ pcAtQuYCFeJS1BzB2OU22N3LKUwy9nM7D7PydcztadVf2q5ah/ZZsbjbur54ZyQeJHub FVu6YM2oCx+zbD+kYMH0rMwvGL9sHDrq9nrgklkIzIiGd1YSRI07lICH63tRF0JkJag+ XenhsaLc370yKnTp3n6bRVAvfwFp8kChtchP36G6G+mYb9Cxh4RENFoksaWo0Z1APs0x Vg2Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ytK+wWRO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 16si3291783otk.151.2019.12.11.20.11.33 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 Dec 2019 20:11:33 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ytK+wWRO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:54058 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ifFp6-0006YK-4B for patch@linaro.org; Wed, 11 Dec 2019 23:11:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:49304) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ifFez-0000vw-KG for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:01:06 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ifFew-0004DB-Vg for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:01:05 -0500 Received: from mail-pj1-x1044.google.com ([2607:f8b0:4864:20::1044]:46507) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ifFew-00046A-9S for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:01:02 -0500 Received: by mail-pj1-x1044.google.com with SMTP id z21so429790pjq.13 for ; Wed, 11 Dec 2019 20:00:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=r5qvsiX5IA+LOMSB6fEkOOIthLDhI8Op7OL9OEMu7no=; b=ytK+wWROUGVs+Qv86KTs5TbB7kJY3WTm7emXiy/vlvsSaxx6zeJRhCrRLvnmzJrpFc D/hG3+hdr4GnuHLDgTHbjt0RrQhYmgXJLj9BMIBxSMrX/wuE3eVVpIkwYhtwLlsCDbAW fFvM+6/bD9wKgDkOT0dMlmPLShgw08Th8rnUKywFD1rXUTNQ9pQRUABvwHs+DjFneqL0 aquuU1X+mBBpjoBdqayERow2YFk92J8goM1FBhFGbdiYm4Gt2WEKHwi4L5K1C8RrPyaX ry+stkL79HGZ7/mP3R7mPR4VS7S8T6wOOUiDEGXlxpOeHKZjT+MedZuKqCwN1oczN8wM OOVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=r5qvsiX5IA+LOMSB6fEkOOIthLDhI8Op7OL9OEMu7no=; b=Q/7HRsff+Vp8l93RQecpk/BaVRG3eSqfiC93UOioqqUVf86GG5uV4v5rBFlQmQ9/86 QedZ4U8PYKXg+72luTELTLw9dqHdk+cYpSqWRaVauMB7ky8q8UyNVDrhAHbTzueaR7Am SPQFhZhAaLcM5mK8STPI52jdijfD8VIbhSZTf/zZuuYmSeAF1+fQNZany7cosJuW22A2 CFtEqyHzL+NMzZUrl+jgwg8679h+6DVG1/kh0BRCkNj37q8CI6UD7suAA9uQofxT/f6f 2Fe9QJm4e7MONPkh2S0HDB+gnenPaK/jyfT+QL9sYvwPq6BW4R2YgiTv2AtDeKc0Ae67 0UXA== X-Gm-Message-State: APjAAAUGdkIrfmiUYUVnCRfE4bx3HUq9oilB2xb/XVm4pz8cDjSzcieG IR6VmiQNkuQ28r/2cVBL2UM3eVziLoo= X-Received: by 2002:a17:902:8216:: with SMTP id x22mr7261485pln.334.1576123257273; Wed, 11 Dec 2019 20:00:57 -0800 (PST) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:56 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 13/28] linux-user: Include trace-root.h in syscall-trace.h Date: Wed, 11 Dec 2019 20:00:24 -0800 Message-Id: <20191212040039.26546-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1044 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Code movement in an upcoming patch will show that this file was implicitly depending on trace-root.h being included beforehand. Signed-off-by: Richard Henderson --- include/user/syscall-trace.h | 2 ++ 1 file changed, 2 insertions(+) -- 2.20.1 diff --git a/include/user/syscall-trace.h b/include/user/syscall-trace.h index 9e60473643..79fd3e5aa9 100644 --- a/include/user/syscall-trace.h +++ b/include/user/syscall-trace.h @@ -10,6 +10,8 @@ #ifndef _SYSCALL_TRACE_H_ #define _SYSCALL_TRACE_H_ +#include "trace-root.h" + /* * These helpers just provide a common place for the various * subsystems that want to track syscalls to put their hooks in. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:57 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 14/28] cputlb: Expand cpu_ldst_useronly_template.h in user-exec.c Date: Wed, 11 Dec 2019 20:00:25 -0800 Message-Id: <20191212040039.26546-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1042 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" With the tracing hooks, the inline functions are no longer so simple. Reduce the amount of preprocessor obfuscation by expanding the text of each of the functions generated. The result is only slightly larger than the original. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 54 +++-- include/exec/cpu_ldst_useronly_template.h | 159 --------------- accel/tcg/user-exec.c | 236 ++++++++++++++++++++++ 3 files changed, 262 insertions(+), 187 deletions(-) delete mode 100644 include/exec/cpu_ldst_useronly_template.h -- 2.20.1 diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 3b2c46bdf4..5a638fd8d6 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -124,35 +124,33 @@ static inline void clear_helper_retaddr(void) /* In user-only mode we provide only the _code and _data accessors. */ -#define MEMSUFFIX _data -#define DATA_SIZE 1 -#include "exec/cpu_ldst_useronly_template.h" +uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr); +uint32_t cpu_lduw_data(CPUArchState *env, abi_ptr ptr); +uint32_t cpu_ldl_data(CPUArchState *env, abi_ptr ptr); +uint64_t cpu_ldq_data(CPUArchState *env, abi_ptr ptr); +int cpu_ldsb_data(CPUArchState *env, abi_ptr ptr); +int cpu_ldsw_data(CPUArchState *env, abi_ptr ptr); -#define DATA_SIZE 2 -#include "exec/cpu_ldst_useronly_template.h" +uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr); +uint32_t cpu_lduw_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr); +uint32_t cpu_ldl_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr); +uint64_t cpu_ldq_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr); +int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr); +int cpu_ldsw_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr); -#define DATA_SIZE 4 -#include "exec/cpu_ldst_useronly_template.h" +void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val); +void cpu_stw_data(CPUArchState *env, abi_ptr ptr, uint32_t val); +void cpu_stl_data(CPUArchState *env, abi_ptr ptr, uint32_t val); +void cpu_stq_data(CPUArchState *env, abi_ptr ptr, uint64_t val); -#define DATA_SIZE 8 -#include "exec/cpu_ldst_useronly_template.h" -#undef MEMSUFFIX - -#define MEMSUFFIX _code -#define CODE_ACCESS -#define DATA_SIZE 1 -#include "exec/cpu_ldst_useronly_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_useronly_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_useronly_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_useronly_template.h" -#undef MEMSUFFIX -#undef CODE_ACCESS +void cpu_stb_data_ra(CPUArchState *env, abi_ptr ptr, + uint32_t val, uintptr_t retaddr); +void cpu_stw_data_ra(CPUArchState *env, abi_ptr ptr, + uint32_t val, uintptr_t retaddr); +void cpu_stl_data_ra(CPUArchState *env, abi_ptr ptr, + uint32_t val, uintptr_t retaddr); +void cpu_stq_data_ra(CPUArchState *env, abi_ptr ptr, + uint64_t val, uintptr_t retaddr); /* * Provide the same *_mmuidx_ra interface as for softmmu. @@ -524,6 +522,8 @@ void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, #undef CPU_MMU_INDEX #undef MEMSUFFIX +#endif /* defined(CONFIG_USER_ONLY) */ + uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr); uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr); uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr); @@ -539,8 +539,6 @@ static inline int cpu_ldsw_code(CPUArchState *env, abi_ptr addr) return (int16_t)cpu_lduw_code(env, addr); } -#endif /* defined(CONFIG_USER_ONLY) */ - /** * tlb_vaddr_to_host: * @env: CPUArchState diff --git a/include/exec/cpu_ldst_useronly_template.h b/include/exec/cpu_ldst_useronly_template.h deleted file mode 100644 index e5a3d1983a..0000000000 --- a/include/exec/cpu_ldst_useronly_template.h +++ /dev/null @@ -1,159 +0,0 @@ -/* - * User-only accessor function support - * - * Generate inline load/store functions for one data size. - * - * Generate a store function as well as signed and unsigned loads. - * - * Not used directly but included from cpu_ldst.h. - * - * Copyright (c) 2015 Linaro Limited - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ - -#if !defined(CODE_ACCESS) -#include "trace-root.h" -#endif - -#include "trace/mem.h" - -#if DATA_SIZE == 8 -#define SUFFIX q -#define USUFFIX q -#define DATA_TYPE uint64_t -#define SHIFT 3 -#elif DATA_SIZE == 4 -#define SUFFIX l -#define USUFFIX l -#define DATA_TYPE uint32_t -#define SHIFT 2 -#elif DATA_SIZE == 2 -#define SUFFIX w -#define USUFFIX uw -#define DATA_TYPE uint16_t -#define DATA_STYPE int16_t -#define SHIFT 1 -#elif DATA_SIZE == 1 -#define SUFFIX b -#define USUFFIX ub -#define DATA_TYPE uint8_t -#define DATA_STYPE int8_t -#define SHIFT 0 -#else -#error unsupported data size -#endif - -#if DATA_SIZE == 8 -#define RES_TYPE uint64_t -#else -#define RES_TYPE uint32_t -#endif - -static inline RES_TYPE -glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr) -{ - RES_TYPE ret; -#ifdef CODE_ACCESS - set_helper_retaddr(1); - ret = glue(glue(ld, USUFFIX), _p)(g2h(ptr)); - clear_helper_retaddr(); -#else - MemOp op = MO_TE | SHIFT; - uint16_t meminfo = trace_mem_get_info(op, MMU_USER_IDX, false); - trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); - ret = glue(glue(ld, USUFFIX), _p)(g2h(ptr)); -#endif - return ret; -} - -#ifndef CODE_ACCESS -static inline RES_TYPE -glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, - abi_ptr ptr, - uintptr_t retaddr) -{ - RES_TYPE ret; - set_helper_retaddr(retaddr); - ret = glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(env, ptr); - clear_helper_retaddr(); - return ret; -} -#endif - -#if DATA_SIZE <= 2 -static inline int -glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr) -{ - int ret; -#ifdef CODE_ACCESS - set_helper_retaddr(1); - ret = glue(glue(lds, SUFFIX), _p)(g2h(ptr)); - clear_helper_retaddr(); -#else - MemOp op = MO_TE | MO_SIGN | SHIFT; - uint16_t meminfo = trace_mem_get_info(op, MMU_USER_IDX, false); - trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); - ret = glue(glue(lds, SUFFIX), _p)(g2h(ptr)); - qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); -#endif - return ret; -} - -#ifndef CODE_ACCESS -static inline int -glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, - abi_ptr ptr, - uintptr_t retaddr) -{ - int ret; - set_helper_retaddr(retaddr); - ret = glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(env, ptr); - clear_helper_retaddr(); - return ret; -} -#endif /* CODE_ACCESS */ -#endif /* DATA_SIZE <= 2 */ - -#ifndef CODE_ACCESS -static inline void -glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr, - RES_TYPE v) -{ - MemOp op = MO_TE | SHIFT; - uint16_t meminfo = trace_mem_get_info(op, MMU_USER_IDX, true); - trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); - glue(glue(st, SUFFIX), _p)(g2h(ptr), v); - qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); -} - -static inline void -glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, - abi_ptr ptr, - RES_TYPE v, - uintptr_t retaddr) -{ - set_helper_retaddr(retaddr); - glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(env, ptr, v); - clear_helper_retaddr(); -} -#endif - -#undef RES_TYPE -#undef DATA_TYPE -#undef DATA_STYPE -#undef SUFFIX -#undef USUFFIX -#undef DATA_SIZE -#undef SHIFT diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index b09f7a1577..79da4219bb 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -26,6 +26,8 @@ #include "translate-all.h" #include "exec/helper-proto.h" #include "qemu/atomic128.h" +#include "trace-root.h" +#include "trace/mem.h" #undef EAX #undef ECX @@ -734,6 +736,240 @@ int cpu_signal_handler(int host_signum, void *pinfo, /* The softmmu versions of these helpers are in cputlb.c. */ +uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr) +{ + uint32_t ret; + uint16_t meminfo = trace_mem_get_info(MO_UB, MMU_USER_IDX, false); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + ret = ldub_p(g2h(ptr)); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); + return ret; +} + +int cpu_ldsb_data(CPUArchState *env, abi_ptr ptr) +{ + int ret; + uint16_t meminfo = trace_mem_get_info(MO_SB, MMU_USER_IDX, false); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + ret = ldsb_p(g2h(ptr)); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); + return ret; +} + +uint32_t cpu_lduw_data(CPUArchState *env, abi_ptr ptr) +{ + uint32_t ret; + uint16_t meminfo = trace_mem_get_info(MO_TEUW, MMU_USER_IDX, false); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + ret = lduw_p(g2h(ptr)); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); + return ret; +} + +int cpu_ldsw_data(CPUArchState *env, abi_ptr ptr) +{ + int ret; + uint16_t meminfo = trace_mem_get_info(MO_TESW, MMU_USER_IDX, false); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + ret = ldsw_p(g2h(ptr)); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); + return ret; +} + +uint32_t cpu_ldl_data(CPUArchState *env, abi_ptr ptr) +{ + uint32_t ret; + uint16_t meminfo = trace_mem_get_info(MO_TEUL, MMU_USER_IDX, false); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + ret = ldl_p(g2h(ptr)); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); + return ret; +} + +uint64_t cpu_ldq_data(CPUArchState *env, abi_ptr ptr) +{ + uint64_t ret; + uint16_t meminfo = trace_mem_get_info(MO_TEQ, MMU_USER_IDX, false); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + ret = ldq_p(g2h(ptr)); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); + return ret; +} + +uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr) +{ + uint32_t ret; + + set_helper_retaddr(retaddr); + ret = cpu_ldub_data(env, ptr); + clear_helper_retaddr(); + return ret; +} + +int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr) +{ + int ret; + + set_helper_retaddr(retaddr); + ret = cpu_ldsb_data(env, ptr); + clear_helper_retaddr(); + return ret; +} + +uint32_t cpu_lduw_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr) +{ + uint32_t ret; + + set_helper_retaddr(retaddr); + ret = cpu_lduw_data(env, ptr); + clear_helper_retaddr(); + return ret; +} + +int cpu_ldsw_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr) +{ + int ret; + + set_helper_retaddr(retaddr); + ret = cpu_ldsw_data(env, ptr); + clear_helper_retaddr(); + return ret; +} + +uint32_t cpu_ldl_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr) +{ + uint32_t ret; + + set_helper_retaddr(retaddr); + ret = cpu_ldl_data(env, ptr); + clear_helper_retaddr(); + return ret; +} + +uint64_t cpu_ldq_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr) +{ + uint64_t ret; + + set_helper_retaddr(retaddr); + ret = cpu_ldq_data(env, ptr); + clear_helper_retaddr(); + return ret; +} + +void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val) +{ + uint16_t meminfo = trace_mem_get_info(MO_UB, MMU_USER_IDX, true); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + stb_p(g2h(ptr), val); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); +} + +void cpu_stw_data(CPUArchState *env, abi_ptr ptr, uint32_t val) +{ + uint16_t meminfo = trace_mem_get_info(MO_TEUW, MMU_USER_IDX, true); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + stw_p(g2h(ptr), val); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); +} + +void cpu_stl_data(CPUArchState *env, abi_ptr ptr, uint32_t val) +{ + uint16_t meminfo = trace_mem_get_info(MO_TEUL, MMU_USER_IDX, true); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + stl_p(g2h(ptr), val); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); +} + +void cpu_stq_data(CPUArchState *env, abi_ptr ptr, uint64_t val) +{ + uint16_t meminfo = trace_mem_get_info(MO_TEQ, MMU_USER_IDX, true); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + stq_p(g2h(ptr), val); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); +} + +void cpu_stb_data_ra(CPUArchState *env, abi_ptr ptr, + uint32_t val, uintptr_t retaddr) +{ + set_helper_retaddr(retaddr); + cpu_stb_data(env, ptr, val); + clear_helper_retaddr(); +} + +void cpu_stw_data_ra(CPUArchState *env, abi_ptr ptr, + uint32_t val, uintptr_t retaddr) +{ + set_helper_retaddr(retaddr); + cpu_stw_data(env, ptr, val); + clear_helper_retaddr(); +} + +void cpu_stl_data_ra(CPUArchState *env, abi_ptr ptr, + uint32_t val, uintptr_t retaddr) +{ + set_helper_retaddr(retaddr); + cpu_stl_data(env, ptr, val); + clear_helper_retaddr(); +} + +void cpu_stq_data_ra(CPUArchState *env, abi_ptr ptr, + uint64_t val, uintptr_t retaddr) +{ + set_helper_retaddr(retaddr); + cpu_stq_data(env, ptr, val); + clear_helper_retaddr(); +} + +uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr ptr) +{ + uint32_t ret; + + set_helper_retaddr(1); + ret = ldub_p(g2h(ptr)); + clear_helper_retaddr(); + return ret; +} + +uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr ptr) +{ + uint32_t ret; + + set_helper_retaddr(1); + ret = lduw_p(g2h(ptr)); + clear_helper_retaddr(); + return ret; +} + +uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr ptr) +{ + uint32_t ret; + + set_helper_retaddr(1); + ret = ldl_p(g2h(ptr)); + clear_helper_retaddr(); + return ret; +} + +uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr ptr) +{ + uint64_t ret; + + set_helper_retaddr(1); + ret = ldq_p(g2h(ptr)); + clear_helper_retaddr(); + return ret; +} + /* Do not allow unaligned operations to proceed. Return the host address. */ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr, int size, uintptr_t retaddr) From patchwork Thu Dec 12 04:00:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181422 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp392385ile; Wed, 11 Dec 2019 20:09:53 -0800 (PST) X-Google-Smtp-Source: APXvYqwPTGe6iALX2wIRzPn+Y8hce3D/0rbY7IeBP5P7FI8cncG/VS1gBYuFBvVFMl6QyNzo2/2z X-Received: by 2002:a05:6830:1689:: with SMTP id k9mr5946846otr.311.1576123793588; Wed, 11 Dec 2019 20:09:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123793; cv=none; d=google.com; s=arc-20160816; b=Co5h4Ut5C7lPjlohUXAMo71mq7eqfm+BZkh9AB7xxLsCBVfOYUuPuytuFawc0cWDi1 pyBswMOGkZtVzpa3lWsVSl5Vg6sKXxCaMYkyIT58//JFDwPDvZN2vi07YtKPZM7tRese TmKw6Hfogcs1Bv8bDcJivBnIUTmgSBFkc0oS94xV5NDvEyDNMfQh/GKwHEXzHb+Wr541 4LO+ZHr5YfvpAm1bwugaegJ7Fms6s4r1acuUimyW1Lv4XgVdSn6mK9mlXJ5VkI5ysUeT 8b4/7OMrCm0S7EOqF0dY85zWrpUi7yqpKd9cbcoiU84Y91dAybFvCAZRaQxkkc+Mpw0o Vn9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ywIseiPjqJvH3CWY8/pVr57z5YPy7BfDXHEc/+9ytCA=; b=ROBDitME9+s7Z/4xU5Aid7bXur7vECsQyIPOyFHgm3Q7NS0TdL6swWgXCxVNUQ8qke G65mUdhtymX95yKtSxiE4NUk8rm3PANMOCFENfUkUu2gvdK4MPSuitAYIcdl3+s72vse EASKAdgkBaHR4m7RBrUwDrt0Dfx0ZUkcbD/KgEMq3vSqsssP0d0DxlaREPP8zyUQADd2 lOBygRDgvb7vnJn4zq/GLFsr2BDi0nyvPc3HcsCOddkDtXezuwbZxJca6PFrDJV8T3wv n2YLCWKcSvF4OKY403khltzdixP6ZsKLTG6AfLzaQFJE9lbjSCDGTtJmEHA7uCWpYnLV igeQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Rz9tF1ME; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:00:59 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 15/28] target/nios2: Remove MMU_MODE{0,1}_SUFFIX Date: Wed, 11 Dec 2019 20:00:26 -0800 Message-Id: <20191212040039.26546-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1043 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Chris Wulff Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Cc: Chris Wulff Cc: Marek Vasut Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 2 -- 1 file changed, 2 deletions(-) -- 2.20.1 diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 361b06ffeb..78f633f970 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -217,8 +217,6 @@ void do_nios2_semihosting(CPUNios2State *env); #define CPU_SAVE_VERSION 1 /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _user #define MMU_SUPERVISOR_IDX 0 #define MMU_USER_IDX 1 From patchwork Thu Dec 12 04:00:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181426 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp393669ile; Wed, 11 Dec 2019 20:11:53 -0800 (PST) X-Google-Smtp-Source: APXvYqxVfmqvd5v+euwBGzHcg+Z36BUYO67yZkeR6We5/AtoHtjmat2WkA7GF+e2CAgTJ7lZZg8N X-Received: by 2002:ac8:74cb:: with SMTP id j11mr5555172qtr.32.1576123913471; Wed, 11 Dec 2019 20:11:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123913; cv=none; d=google.com; s=arc-20160816; b=LQiREJXwE+GO75EkVjU3a86peRP99LpDZLzdeUrC8nGhbXf9Tg5zbIPvfozuvjAh2C O9jFGt7O8eV3kOAwfBptjQ3zR4fi7Hwj9BzdBoQCrRwkph/4kggve9BgVwNTAQUr3pQp QU0ta2h8ik07jJEEtVQ5s3VEPiCcFRbwnSC3gKWufVrnpnJyRKhrRbytvhF6/xMkbo61 dyXrkEVvyooXp0x8LKz/JduZkXJVD9YMzIiwc6mAPOElp+6/fqTRCG8rRv8IqZkqjpJy R/EXqUF3UABgwAW4FtOHKGCnvdLTufXnijC6WX+Mu8DoprQO0F/23Bp9J/oBKWtSQb1t dnHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=cdzUkCGd4j9cyI7GBjpMOiOf+nGUeT9o9Hdz62SsCpo=; b=ZQ9caKKGDu7B11Ugo3wCp6cS98nMoHjualNYXNDxGqcXN+hK+o4cTceZ9a7ccbnBti 2QHo8tYKyWu1YDQFveSyP+TpfdUeX6ZUNVWiRXRRQ6P7DwRfiA6/Y+ylRPpZXUw7l8ti x2dFwZL4SCNNihDJDGLv1etQ0mLNItuLQNccNYWmqayrslEaXjvTJtJHB1lfaGEkLtg1 wwtURHKmh4Qgvdpu+1tu3Nwuf20Jd8f5xcRQxgBBOQw33ZYeYDg/BDHhYq/wDFs8J5SP 4SxLg33JUVUNhOY5laM0IZV+0nWcdX7h5O2Js1XiQkoQHiZvA+/2WlnKCD+njWALorDW BYcg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=U4d5yTE1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.00.59 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:01:00 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 16/28] target/alpha: Remove MMU_MODE{0,1}_SUFFIX Date: Wed, 11 Dec 2019 20:00:27 -0800 Message-Id: <20191212040039.26546-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::642 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Signed-off-by: Richard Henderson --- target/alpha/cpu.h | 2 -- 1 file changed, 2 deletions(-) -- 2.20.1 diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index a530249a5b..3f782c0efe 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -193,8 +193,6 @@ enum { PALcode cheats and usees the KSEG mapping for its code+data rather than physical addresses. */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _user #define MMU_KERNEL_IDX 0 #define MMU_USER_IDX 1 #define MMU_PHYS_IDX 2 From patchwork Thu Dec 12 04:00:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181442 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp399899ile; Wed, 11 Dec 2019 20:19:15 -0800 (PST) X-Google-Smtp-Source: APXvYqxjDu0dhJBgsVDBZcI8bQjO8/LqvgjZ09Ne5pdK9/gggpbfaMpKrUFZJymsBzB0K+3dN1+/ X-Received: by 2002:a05:6830:1d1:: with SMTP id r17mr6147769ota.151.1576124355893; Wed, 11 Dec 2019 20:19:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576124355; cv=none; d=google.com; s=arc-20160816; b=YEgU1qQFclOrQecVqOGjvTFWJM2Qc1PlM3f8aZsAVw6CWoPtatNHUgyccMW1nYJXRY pNVdjO8NrcSc9fTSzGDRBKwHcxYfGIBHXoHyvjFe1H27M4yQVTqhyBTIUdgRAzjrkrzv QWuytr65egatxPr4HnpluQg551KYQYUoiUz+/htNmW/OVoDBbo0peGLGHcjnEUlBOEqK C+Vh5RNdfRkxZwVW4UXEY+HO45Z10ry9Ybig6oLp9/xZ7o5wiktnDcreF8Xu6xZEa+r1 K70OFCCo0NmWHQdL4Xdj+MFdVioQCt7gx3yfGk2oeoHklpuvB0yDXbGDh1KZu4svwgNM dd/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=s8SYA9/Rwv4ZxWRA0n9zn8WOO8ULkXoz56NCsZvZKnc=; b=vYHIX/f+iQTK6b/bj4oRvUMtlWe625qx5eTFWPvFxrbN1C+KnNd15ncXABGsZ6BoPu l4r4eAWOMH5Rv5N7MSDmo13lPeFkh97N3EZHlg2PcAcO6o8d5nvzJjZqNJyWa/7ovtUt AsjNSs9AJulJAhGtCzPIf4VOA73F9hYe6jAiAgviAIlfhwUWz7UjOBs5Kth11QaWs8xh bqMe4aL9vJlXQLP31BLNI/fJQXRELjwJloc6iVjPRlO/mqGgVi6Qjy0AVVl8xTZxivCc NiVri5bNAziPcECD2TcsDCEoyBNqJI6oiSIiAZdMlBx2LFv82jv++edr7dV57F41cupx FVsQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=m+L1V1lP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.01.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:01:01 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 17/28] target/cris: Remove MMU_MODE{0,1}_SUFFIX Date: Wed, 11 Dec 2019 20:00:28 -0800 Message-Id: <20191212040039.26546-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E . Iglesias" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Cc: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/cris/cpu.h | 2 -- 1 file changed, 2 deletions(-) -- 2.20.1 diff --git a/target/cris/cpu.h b/target/cris/cpu.h index aba0a66474..bc43bc23a1 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -252,8 +252,6 @@ enum { #define cpu_signal_handler cpu_cris_signal_handler /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _user #define MMU_USER_IDX 1 static inline int cpu_mmu_index (CPUCRISState *env, bool ifetch) { From patchwork Thu Dec 12 04:00:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181421 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp391924ile; Wed, 11 Dec 2019 20:09:16 -0800 (PST) X-Google-Smtp-Source: APXvYqwiqQdR5d9eKeYH/6DCyCwZrxf1+QP05HQtv+t3IWa8GqDapvZ6TKD39xmk4WFqaj8VmROA X-Received: by 2002:a9d:6a7:: with SMTP id 36mr5535261otx.136.1576123756047; Wed, 11 Dec 2019 20:09:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123756; cv=none; d=google.com; s=arc-20160816; b=vL/cWBxXnBzBo2704qc0Xy1jTtM3pgHXlqw3it7j+Uw41cRzPAIC0PWBhu1RSJZKCw 96zwQDhNVBeOkm4Ir7lQviX5EDl/7vIZRqQr7/dOvg38k6Qe+mi9yFaLXJ5sosQ36O4Q ZqFQF5foExlxtv/rGDvAMXLMT/6MwA2kNo6FTW2YUb+ikUh+tB8le7WkNSUEKNn+VjUj kKNXYY8Q6vmxaaB5y7XPFSy7DMXshdVPbHIRrk5ssdHcIdHesQSmyOK3gy66siq0jHP4 IoOgzZsoPIkybOwDhXB8DPOAg6Rob/fiZUJcsHMsFw8j5molYeq6UopqHPcXRU1b6gJe +cbw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=GvGCU+3iqgPT0dthIniMLE/ga9WOcGpwXeWfFW4ZBaM=; b=WRucThJR2Uinz4gLO7D4pw2FAIaP3vysQ+6ZX+9viLnecCQ9DVZJDk1a2457KUBivm C8OrKz9kS9kShuKEY8I1JwFL/tkET1uL8tWeoiYt0AdVGLUn6Yl4riwB8vewP/LTwJmd nvvE6IzBEvAPmjzJEsjESQrC5K3RSdRLUEodhk82VTAT7vpKtlkgnoG/KFqe056Ieko+ hLtrcu56OxbUPtWKbyG7rodEGFbbWt+FBRtiHeAAuuJoXp5/DSlR0fzHF4Acc0BXxE4X axQ7jKJTjb1XHxsULHjxj8jFTYnHSdchoAmJMUZTav5RD7nEJyNyn0mJHP9A45lCZHrj cOPg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WJ6i1SZM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.01.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:01:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 18/28] target/i386: Remove MMU_MODE{0,1,2}_SUFFIX Date: Wed, 11 Dec 2019 20:00:29 -0800 Message-Id: <20191212040039.26546-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1042 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Eduardo Habkost Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Cc: Paolo Bonzini Cc: Eduardo Habkost Signed-off-by: Richard Henderson --- target/i386/cpu.h | 3 --- 1 file changed, 3 deletions(-) -- 2.20.1 Acked-by: Paolo Bonzini diff --git a/target/i386/cpu.h b/target/i386/cpu.h index cde2a16b94..6a8228df4f 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1949,9 +1949,6 @@ uint64_t cpu_get_tsc(CPUX86State *env); #define cpu_list x86_cpu_list /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _ksmap -#define MMU_MODE1_SUFFIX _user -#define MMU_MODE2_SUFFIX _knosmap /* SMAP disabled or CPL<3 && AC=1 */ #define MMU_KSMAP_IDX 0 #define MMU_USER_IDX 1 #define MMU_KNOSMAP_IDX 2 From patchwork Thu Dec 12 04:00:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181436 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp394153ile; Wed, 11 Dec 2019 20:12:25 -0800 (PST) X-Google-Smtp-Source: APXvYqw+WSRsHM/cFZw1HtlM4FUAf56OZsOS93OLIDSPsJ8+2pigVkWbym0FjiQ6jC10jHlHicD9 X-Received: by 2002:ae9:ef50:: with SMTP id d77mr6156796qkg.71.1576123945034; Wed, 11 Dec 2019 20:12:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123945; cv=none; d=google.com; s=arc-20160816; b=jMWVoGsi83XxcbwQEBxaTF2rTghhZhGs5N66aByJu+se3tzDYjg/mjOtAaflG6cFDr BsjEe0fGIg9qkwrKGPodd69lgOA0/VrfkMKufQeombP7udrYuOn4vCjOuR3EM05bGy/r 5uq6avHikS8HJnwNEGYyxeUEW7/6nMbvT61QwUmNtGi6W4PF4pUDu1ZqBj0LxmQ5S12r usX7VhvcD5jNDJFmc+AyxU8v/NQRvO6aMtEkE9mQTJ+7708I6PTOb98YB6ZZ0XQI+ZwE NGjtYHAE8OnGUay6Yh71zI1cgY8SrRulEc33FGIhL0sh+VOO40EsbBjONZGcpt4kqsm5 OO8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=1+xmXAmgTNTTPDSwdxL19l0lBXnRZdS0RxSiPt4HA6M=; b=gPciZ+6JkiqkdDAqkVYaOInq844UEX0ymOEbcdllAwNfVm7+usjNk6Up3er/IMGiRR RsTEVqCPfl8XG8u96sEtQPVT+cbTXG44qmuocn6/bOS6QyHNRDGCXea3OYt/XhvRaMS3 YT6H7/JJSj18AsKXinO74wNgBbJJpXi0ldeugtGxVDh9/+6p0cQP4gnAcLhAj4YqCC9k jMjuMr0xyUouNjjnNzzEP/2eriDWUmEU4D36uR2SQCxqTz6Rdlzd90vlbxMQcflOF7Hk C0vSqio9y3kGMugj1fpBamlsixWiUsQhCLqBY4yjByCvtRWFoM2LfBQ1SPFuAaErdvHi g+9g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NRs1fkXA; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.01.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:01:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 19/28] target/microblaze: Remove MMU_MODE{0,1,2}_SUFFIX Date: Wed, 11 Dec 2019 20:00:30 -0800 Message-Id: <20191212040039.26546-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E . Iglesias" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Cc: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/microblaze/cpu.h | 3 --- 1 file changed, 3 deletions(-) -- 2.20.1 diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 95773089aa..32522f606b 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -328,9 +328,6 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo, #define cpu_signal_handler cpu_mb_signal_handler /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _nommu -#define MMU_MODE1_SUFFIX _kernel -#define MMU_MODE2_SUFFIX _user #define MMU_NOMMU_IDX 0 #define MMU_KERNEL_IDX 1 #define MMU_USER_IDX 2 From patchwork Thu Dec 12 04:00:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181440 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp398272ile; Wed, 11 Dec 2019 20:17:16 -0800 (PST) X-Google-Smtp-Source: APXvYqz49jyvc9ZrjdbqQe8XRSdQbeYMyHgnp5SE3jLe4ErcL/CrRufZo/FV2fm04boziqnKEqUZ X-Received: by 2002:a9d:7483:: with SMTP id t3mr5834649otk.262.1576124236722; Wed, 11 Dec 2019 20:17:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576124236; cv=none; d=google.com; s=arc-20160816; b=FyUaI1BaFdAX0F6YOmXZwlZFsKdgEBctVVL5dyuWIaKCCJHMAIsR9JIacLIDn70O2F +64RmgyPzF5WZhIVtAczucTewJSxcM0xC3N4bj97C/zMUbQbfSgzn+jwkkT57bNC8I0W MHr29LsNl022wDv+cdKn4gJZcpOrakbLe3qckk5wg4o6EPz4NeL0nsPPwnD/2/MhswyO 44zso8pj/AaTS0I0MEJqv7Hpj0Nso51p3GjJ+yWTbiLIUakIJhWOmtidpPTHF+lRi0Mf ED1eNNBlBWZQ0qzHiwZMkDzQsFpYH0TeKCACPRBB+Dzh0LDnPP2Oj/eUpAdCauBOtmR8 e8cQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=pZRCwuJZhFmLfLLVDEuLYlambcalO9LoW5IlxLfh4Nc=; b=ycwpYctmyBSSR31moD0GK7bW+K/CnDbHjmbP4VDfQzItoQZjkOoTkmQlz6s5V7lG55 068luPJ/IyYCCo0HdXyjNrSmOupT5Xyxi5sP9QTTbP/qkZj9IpHaf+8RN+Pg1hwxpW+o l4/imxChXi2WGB35ZujiKIXDB26A9i2vb5k5Nr7jg2p68qHPKEbmPo24ruwb+XxXYQLY Xqt5E1tVJjNXUcLGeP9LfB0/POIsh6JBld03zK0aNYiqA4zxUnTFusq8is8s5FbqwzOO MCD0pkGXvQg4RtxQBsEh3Nvrpem9JAz+McP0Fx9hSO3E5OXdLKnC8jusGiHuAePVc2pE +TNw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rZ5H+lA3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.01.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:01:05 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 20/28] target/sh4: Remove MMU_MODE{0,1}_SUFFIX Date: Wed, 11 Dec 2019 20:00:31 -0800 Message-Id: <20191212040039.26546-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aurelien Jarno Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Cc: Aurelien Jarno Signed-off-by: Richard Henderson --- target/sh4/cpu.h | 2 -- 1 file changed, 2 deletions(-) -- 2.20.1 diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index ecaa7a18a9..452a596e67 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -254,8 +254,6 @@ void cpu_load_tlb(CPUSH4State * env); #define cpu_list sh4_cpu_list /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _user #define MMU_USER_IDX 1 static inline int cpu_mmu_index (CPUSH4State *env, bool ifetch) { From patchwork Thu Dec 12 04:00:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181443 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp400052ile; Wed, 11 Dec 2019 20:19:26 -0800 (PST) X-Google-Smtp-Source: APXvYqzANRKWvqpsa0vWbeKTfNVC27vH0Zok2k09LrXxdWnmvyXZ39MMLpuXCz/e6PXMILWQ6KWL X-Received: by 2002:a05:6830:12d0:: with SMTP id a16mr6039097otq.8.1576124366824; Wed, 11 Dec 2019 20:19:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576124366; cv=none; d=google.com; s=arc-20160816; b=LxegqbKCNy8ksCBUqg1twWhHD6rMQMwYDj/MWQm1cMRXoAvfNZll3Q9pJ7zBl51UGt 76pZomL3Kj/x6PuupFwrTcuI/je8jVVsaMdYQzyWDHBacgiZHucwIP4di4YXyvn0OLW1 4l2Xm4Srw028pQo3YDBVX2epi/fbcHn89wt/l9YbA/47D/Gq3nWilDXyoE8sOaKQ5Rxb Nk1tI4oDEuozAH7lh4DAfUHqdkQp3JV1+E2Def3JHz4QXHMKnBJHArzSYhDQX/NvvO3J cJJhU1Y0CEYyPPluIvr5i5RnDB0KwbLS6tfMabEZx4V8VnorQSyf5AiIpXF4Glq5hMQb /drQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=b1FV8qQCpJxFWsy94CcM4K8EE5MW0MHS/kAxt/18Mds=; b=UwCEW7bRgVCMbiD39vWNvU0WkxGGqDcKN54sUPOJojUwq4340/ObF5dPPe4Bzrr/bI RS5aZtTurUdvSoZzWne7X/R6jw0gUq4hk1FHjnNGDOeTFXcuNI9wXnlM/kjcPezXVryN +Wf38tlK5Czb5ASAzTqHBNVctBa2TrwcDUPFv7b/PNF+M2bT07DQvPSdFFHIv8SublPM U5IciPvO5JSBbqYit3a2ZVS0rAHBNCqUTJLc/Tptyrv1SOtvuJHAUs3wL8qzhAR8eN9E CbdXJfmk/5w2u/MIeqrcG3hIDKht9FBHntsymlh9x3Wtg4vX0bcYNpBQ212khenY9ZZ/ GuTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CI2cLMYv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.01.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:01:06 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 21/28] target/unicore32: Remove MMU_MODE{0,1}_SUFFIX Date: Wed, 11 Dec 2019 20:00:32 -0800 Message-Id: <20191212040039.26546-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Guan Xuetao Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Cc: Guan Xuetao Signed-off-by: Richard Henderson --- target/unicore32/cpu.h | 2 -- 1 file changed, 2 deletions(-) -- 2.20.1 diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h index 50ed9dd99c..7a32e086ed 100644 --- a/target/unicore32/cpu.h +++ b/target/unicore32/cpu.h @@ -133,8 +133,6 @@ void cpu_asr_write(CPUUniCore32State *env1, target_ulong val, target_ulong mask) int uc32_cpu_signal_handler(int host_signum, void *pinfo, void *puc); /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _user #define MMU_USER_IDX 1 static inline int cpu_mmu_index(CPUUniCore32State *env, bool ifetch) { From patchwork Thu Dec 12 04:00:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181425 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp393589ile; Wed, 11 Dec 2019 20:11:46 -0800 (PST) X-Google-Smtp-Source: APXvYqy7DJnjbaTVb/EUd2BekLku2GUuE+H6o/5dj+DKvhJbcUDfB2p/iA1dbEaBnpnHWJbOS7cP X-Received: by 2002:a9d:4d01:: with SMTP id n1mr5450988otf.245.1576123906194; Wed, 11 Dec 2019 20:11:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576123906; cv=none; d=google.com; s=arc-20160816; b=tuYTYz8bVFiXXc8SLnPo061DIyAvCGG2skZ9ky6EZHaZc7FtaUeCcvXrpZnXrqTZwF WvNpP2P5Sik9Pzzxw6vkIoBwi5BkiS9ctHem5OfcVs8opOeAymLJ0zbtQ5H6OX/ck11d 0bQu76s73yViJeZ52Mj3hFT04UvCNrvZlNiH5OGhnXq9iYaUxnMn3fsAxC6eUfCRujc7 SAQyZHlSQiTaLLMD5w1SgY5YdF+lpaZV8MrrYJYwTawLCAfW6zpDU85FSzLUgWIp35qi Bzz+mUrKmzE2y3i4Mfqo6+0btLMfWVSl2gcqABix5AuilXTEiBWkI4PtTrXIdJte/Wsp TtJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=gVD0Cco3EmSuZ4UAvZCQGkeEhpYCeBDscZpWml9gxJs=; b=SmEPFFjgw0zou+VaDHnZudao44hGi/uR3PfcJ2MKUC6YNkG2iMHpSUs4ys4qYJkdOb 1gv9ZfPv2kMHVXAdPtBl/NjKn9X4E3C5Uq45X2kqJRXIZcgzmocrv3jHoun/GhmCk1qS ExNF40Tivm0QYFSy78c1dPjdfBtH7FttTUDFnyrfbJGy8b1aeQNPXyV18bukgWwgkCGE mt0mQXp3mR/aYafIIafsoMdaF3ceOEikXqu4nhvDojYFTqR1TSbytVbdmgoDMYh1hcFW fqAauFcKkLUHsjUdLv4H729WNN6B4eBVRiPnthKSEGNhbXsKtBvqoT9xijMuEYup4l1A WG8w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sRiYXcNa; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d187si2468474oif.33.2019.12.11.20.11.46 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 Dec 2019 20:11:46 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sRiYXcNa; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:54054 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ifFpJ-0006Vt-63 for patch@linaro.org; Wed, 11 Dec 2019 23:11:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50171) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ifFf7-00011y-Fs for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:01:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ifFf6-0004PB-99 for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:01:13 -0500 Received: from mail-pg1-x543.google.com ([2607:f8b0:4864:20::543]:34370) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ifFf6-0004NB-1g for qemu-devel@nongnu.org; Wed, 11 Dec 2019 23:01:12 -0500 Received: by mail-pg1-x543.google.com with SMTP id r11so446641pgf.1 for ; Wed, 11 Dec 2019 20:01:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gVD0Cco3EmSuZ4UAvZCQGkeEhpYCeBDscZpWml9gxJs=; b=sRiYXcNa4wHsd674U2C3vEEdQ7JKEbwql6cN0BXjGBRisQZ51exLO1qFOBacjTI4gB DjDDkuQ9Fu6vfz/s3TuNnq6ejqtrNlYLLUuR7UE1Lr5uhEAI33RTloe3yTJYVg8surfV rjFIzciPn7RUCdMX8L/uw11YpddQU3gtvDBkvV8bYUTJcsdbRpuGo5g2uRZeaUQkOhTm IzD+VUe9E1OGypW+hGUYCJo/Hl7lvO1vnm24dgUY9KIVymplzEaQ4wuDBRWYhhqU9Yrp sRrAYz3CBQ+CqdetU4QTc9WsEps3co0u6Kg++xvZ6sTJk8zL+yU34SBWwqIWJsFoZXS1 IStg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gVD0Cco3EmSuZ4UAvZCQGkeEhpYCeBDscZpWml9gxJs=; b=q7bCcP1Xje2QINiHschJBH4bgko/84hkZp/Vqw3ZgR6M/eucbKQxtXE1tkj7wwTl3E aBavdjfyRyeF9icQG0gMWeLasxQfCAQvp5dcBDY0NjKfCD+VT3wa5RN/Wi2tAKZlb9rR qwp7hxxkdoDS0QlyZ+HAW5J3lkJwD5fVbiRSOo4GvbfP4Z4oudYDHhxwCU5LpV6tf8XW 232KJCK6rNNq9fM0Ymf0dmEWvz2yMKKyoezzkAaT85GOXj0SVQaS3+VinNGAULjGGxFv fbu3VehvZvQ26TbM0xw6Q7O6xaok5WxY9+M4yvbnyKVNYryQD/JLgbooh36rtsw0r2TD TnWQ== X-Gm-Message-State: APjAAAXwJMMQthk7POteWRk16x5JIz8g8tBhss30tTX8KpTsKvcWVZTL EyyYAxwipUHKcf6xVg4VaGi1mQrgt10= X-Received: by 2002:a63:12:: with SMTP id 18mr8159398pga.294.1576123268895; Wed, 11 Dec 2019 20:01:08 -0800 (PST) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.01.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:01:08 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 22/28] target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIX Date: Wed, 11 Dec 2019 20:00:33 -0800 Message-Id: <20191212040039.26546-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Cc: Max Filippov Signed-off-by: Richard Henderson --- target/xtensa/cpu.h | 4 ---- 1 file changed, 4 deletions(-) -- 2.20.1 Acked-by: Max Filippov diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index b363ffcf10..f5a7ea48bb 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -685,10 +685,6 @@ static inline uint32_t xtensa_replicate_windowstart(CPUXtensaState *env) } /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _ring0 -#define MMU_MODE1_SUFFIX _ring1 -#define MMU_MODE2_SUFFIX _ring2 -#define MMU_MODE3_SUFFIX _ring3 #define MMU_USER_IDX 3 static inline int cpu_mmu_index(CPUXtensaState *env, bool ifetch) From patchwork Thu Dec 12 04:00:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181439 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp398042ile; Wed, 11 Dec 2019 20:17:00 -0800 (PST) X-Google-Smtp-Source: APXvYqxAvcfg0MuEJZaJLuUoiiqhSquQ1slv49fgJXP7eu2v3Jw80p/gV8NZHOV2fq1PHiesWJLg X-Received: by 2002:a9d:4c88:: with SMTP id m8mr5789997otf.12.1576124220558; Wed, 11 Dec 2019 20:17:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576124220; cv=none; d=google.com; s=arc-20160816; b=TeVJO3UxbZy+Sq/j5mIzoIQwHWsLxkxkfRZ/G0EOLnGNYUYSW9ghhR+DpcSHhztu+U ScYsAnsxt88VOlByoO/6m9q9BMnq1BYHYQH8/ZwfDkmuvCRhxKegoaRAmFBpU448FbYK weBuIBeoMH7GoV18O/1gjcYE3V9ovsDKcRnOompi8Ngk4udIKfa/6hhHZov5ZC7Ppdve clfWa+ylDcdkPlPwQZUtBGw7BY+Izk4OiJGUIivnWNHRRMsNr1Ky01nas8lL4Oc5hyem E+fjnQPvkbF0vSHs9Ql/e3bHzx5ITvnbYyto4tf9C6FxEi2ax8CNNTKW0os73GscwNWI 9WBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=moeX6cR2plwHGjOubTw0OffPZ6hPUqHTM5k0VKv1gGw=; b=KmabGj2FebMpBoVXyYm2mS8quPmcG2b+Rr21jOTyOZcH3aSY3lCH/1SgNebfKIlD9i npxl4/DjY+KLE+0uEYkpclYPgXdo/NKugColZ6DOOiSBrzl9sTW8d//jNPi6fHdDF2nU Gh5lDKkerkHiDCsobMbJNS7wtImILMYEUiONr15OsrBS6OCIndnGWPd8cwXd95VwzT+G jzxr3Cj1QAS2QqcM3Rqtyu/z/r/CBdm//vDMwmE5BjaKfhCLbjNi0R0VB4cFr3U6ng8i y74b942JDf3O7HHP5v/EGXkz5VniHQaIVFzK2PQa8iasP0Wo+9jHW86588Us1mWYOcH3 Lejw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="TDGgw/3x"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.01.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:01:09 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 23/28] target/m68k: Use cpu_*_mmuidx_ra instead of MMU_MODE{0, 1}_SUFFIX Date: Wed, 11 Dec 2019 20:00:34 -0800 Message-Id: <20191212040039.26546-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The generated *_user functions are unused. The *_kernel functions have a couple of users in op_helper.c; use *_mmuidx_ra instead, with MMU_KERNEL_IDX. Cc: Laurent Vivier Signed-off-by: Richard Henderson --- target/m68k/cpu.h | 2 -- target/m68k/op_helper.c | 5 +++++ 2 files changed, 5 insertions(+), 2 deletions(-) -- 2.20.1 Reviewed-by: Laurent Vivier diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 20de3c379a..89af14e899 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -516,8 +516,6 @@ enum { #define cpu_list m68k_cpu_list /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _user #define MMU_KERNEL_IDX 0 #define MMU_USER_IDX 1 static inline int cpu_mmu_index (CPUM68KState *env, bool ifetch) diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index bc4f845e3f..96a4951c21 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -36,6 +36,11 @@ static inline void do_interrupt_m68k_hardirq(CPUM68KState *env) #else +#define cpu_lduw_kernel(e, p) cpu_lduw_mmuidx_ra(e, p, MMU_KERNEL_IDX, 0) +#define cpu_ldl_kernel(e, p) cpu_ldl_mmuidx_ra(e, p, MMU_KERNEL_IDX, 0) +#define cpu_stw_kernel(e, p, v) cpu_stw_mmuidx_ra(e, p, v, MMU_KERNEL_IDX, 0) +#define cpu_stl_kernel(e, p, v) cpu_stl_mmuidx_ra(e, p, v, MMU_KERNEL_IDX, 0) + static void cf_rte(CPUM68KState *env) { uint32_t sp; From patchwork Thu Dec 12 04:00:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181445 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp401450ile; Wed, 11 Dec 2019 20:21:28 -0800 (PST) X-Google-Smtp-Source: APXvYqxULQ4DmpVl5SUzvzoQta853+y2J2aYntVpIE8ENyByCgF4DS0hfT7hyXkKtrWY8MjS8S+P X-Received: by 2002:a9d:760f:: with SMTP id k15mr5827807otl.65.1576124487984; Wed, 11 Dec 2019 20:21:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576124487; cv=none; d=google.com; s=arc-20160816; b=MAOe2UHi2k5dcU3o3xsOX2jMNJCv+/8/fYRmwUidfM/tXwilHwdNH2KB9XMLXYndsr 0smqfXEd+RwyBHFu5gkUU/zirplnRzI3kzeHWXxnbuEE9wYVQEUIzHUZa1kBfla9Fgme 9RcH5isxR5/i+MwrgsiZdtR1CwQrwzVVDwzKhoR/yndi53au62E+fpNgpBDAtbggMRjC LkeHZ4Zzk839YOyDj2T4LcURBy92hw6SpK/Y4KhN2LK9cUv/VVNMZ3j0L3yhgnjdBw3c kVUK2GA+seRl7ZO3ByKge7ZgIa0JS/NVUh9Vcd/daVWRVXSn8yKQeFKoq/F02/DjuhPt 4Smg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=yYBvYjZLPkpZmdiS8lUBGedF7y384liLKSs7F7Dhknc=; b=B8eN8WVQ2/TKh/XNqG4AHysu5v+e62zNKGkt+jDGtWvnVpEp4qLK3qz0IBZTpSaR1z 7XJIWvdonT17J2hxlJanEB/nZ0tuUYLhlLN89orpd5A54QbC0gdWm8/7aP+J9w8pY+ry +NiN585UwWSw86mdaz2MPBSpwp5nchV/LMTeiPxDmSh6X6nPywPGdfyOKaWx7ZhLpTqp uynS8A9/+BP4bHBF/K6fe0tiV139tRIxfIYYarKQ17cXbyrNdGAVjOxgX9hf9mcpLT1q msuf/X7lgrpaC3GjUM34R3s4YmK/Y3cjQgGQ8GRsdJZ/my+vttP6Vc0KYhUB24uwS6WQ UXwQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=oDigNFT4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.01.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:01:11 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 24/28] target/mips: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX Date: Wed, 11 Dec 2019 20:00:35 -0800 Message-Id: <20191212040039.26546-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::644 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Aleksandar Markovic , Aurelien Jarno Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The separate suffixed functions were used to construct some do_##insn function switched on mmu_idx. The interface is exactly identical to the *_mmuidx_ra functions. Replace them directly and remove the constructions. Cc: Aurelien Jarno Cc: Aleksandar Markovic Cc: Aleksandar Rikalo Signed-off-by: Richard Henderson --- target/mips/cpu.h | 4 - target/mips/op_helper.c | 182 +++++++++++++--------------------------- 2 files changed, 60 insertions(+), 126 deletions(-) -- 2.20.1 Reviewed-by: Aleksandar Markovic diff --git a/target/mips/cpu.h b/target/mips/cpu.h index ca00f41daf..c218ccc4a8 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1147,10 +1147,6 @@ extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env); * MMU modes definitions. We carefully match the indices with our * hflags layout. */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _super -#define MMU_MODE2_SUFFIX _user -#define MMU_MODE3_SUFFIX _error #define MMU_USER_IDX 2 static inline int hflags_mmu_index(uint32_t hflags) diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c index 18fcee4a78..79d44da6fa 100644 --- a/target/mips/op_helper.c +++ b/target/mips/op_helper.c @@ -52,69 +52,6 @@ static void raise_exception(CPUMIPSState *env, uint32_t exception) do_raise_exception(env, exception, 0); } -#if defined(CONFIG_USER_ONLY) -#define HELPER_LD(name, insn, type) \ -static inline type do_##name(CPUMIPSState *env, target_ulong addr, \ - int mem_idx, uintptr_t retaddr) \ -{ \ - return (type) cpu_##insn##_data_ra(env, addr, retaddr); \ -} -#else -#define HELPER_LD(name, insn, type) \ -static inline type do_##name(CPUMIPSState *env, target_ulong addr, \ - int mem_idx, uintptr_t retaddr) \ -{ \ - switch (mem_idx) { \ - case 0: return (type) cpu_##insn##_kernel_ra(env, addr, retaddr); \ - case 1: return (type) cpu_##insn##_super_ra(env, addr, retaddr); \ - default: \ - case 2: return (type) cpu_##insn##_user_ra(env, addr, retaddr); \ - case 3: return (type) cpu_##insn##_error_ra(env, addr, retaddr); \ - } \ -} -#endif -HELPER_LD(lw, ldl, int32_t) -#if defined(TARGET_MIPS64) -HELPER_LD(ld, ldq, int64_t) -#endif -#undef HELPER_LD - -#if defined(CONFIG_USER_ONLY) -#define HELPER_ST(name, insn, type) \ -static inline void do_##name(CPUMIPSState *env, target_ulong addr, \ - type val, int mem_idx, uintptr_t retaddr) \ -{ \ - cpu_##insn##_data_ra(env, addr, val, retaddr); \ -} -#else -#define HELPER_ST(name, insn, type) \ -static inline void do_##name(CPUMIPSState *env, target_ulong addr, \ - type val, int mem_idx, uintptr_t retaddr) \ -{ \ - switch (mem_idx) { \ - case 0: \ - cpu_##insn##_kernel_ra(env, addr, val, retaddr); \ - break; \ - case 1: \ - cpu_##insn##_super_ra(env, addr, val, retaddr); \ - break; \ - default: \ - case 2: \ - cpu_##insn##_user_ra(env, addr, val, retaddr); \ - break; \ - case 3: \ - cpu_##insn##_error_ra(env, addr, val, retaddr); \ - break; \ - } \ -} -#endif -HELPER_ST(sb, stb, uint8_t) -HELPER_ST(sw, stl, uint32_t) -#if defined(TARGET_MIPS64) -HELPER_ST(sd, stq, uint64_t) -#endif -#undef HELPER_ST - /* 64 bits arithmetic for 32 bits hosts */ static inline uint64_t get_HILO(CPUMIPSState *env) { @@ -379,12 +316,12 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int mem_idx) \ } \ env->CP0_LLAddr = do_translate_address(env, arg, 0, GETPC()); \ env->lladdr = arg; \ - env->llval = do_##insn(env, arg, mem_idx, GETPC()); \ + env->llval = cpu_##insn##_mmuidx_ra(env, arg, mem_idx, GETPC()); \ return env->llval; \ } -HELPER_LD_ATOMIC(ll, lw, 0x3) +HELPER_LD_ATOMIC(ll, ldl, 0x3) #ifdef TARGET_MIPS64 -HELPER_LD_ATOMIC(lld, ld, 0x7) +HELPER_LD_ATOMIC(lld, ldq, 0x7) #endif #undef HELPER_LD_ATOMIC #endif @@ -400,42 +337,42 @@ HELPER_LD_ATOMIC(lld, ld, 0x7) void helper_swl(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, int mem_idx) { - do_sb(env, arg2, (uint8_t)(arg1 >> 24), mem_idx, GETPC()); + cpu_stb_mmuidx_ra(env, arg2, (uint8_t)(arg1 >> 24), mem_idx, GETPC()); if (GET_LMASK(arg2) <= 2) { - do_sb(env, GET_OFFSET(arg2, 1), (uint8_t)(arg1 >> 16), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 1), (uint8_t)(arg1 >> 16), + mem_idx, GETPC()); } if (GET_LMASK(arg2) <= 1) { - do_sb(env, GET_OFFSET(arg2, 2), (uint8_t)(arg1 >> 8), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 2), (uint8_t)(arg1 >> 8), + mem_idx, GETPC()); } if (GET_LMASK(arg2) == 0) { - do_sb(env, GET_OFFSET(arg2, 3), (uint8_t)arg1, mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 3), (uint8_t)arg1, + mem_idx, GETPC()); } } void helper_swr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, int mem_idx) { - do_sb(env, arg2, (uint8_t)arg1, mem_idx, GETPC()); + cpu_stb_mmuidx_ra(env, arg2, (uint8_t)arg1, mem_idx, GETPC()); if (GET_LMASK(arg2) >= 1) { - do_sb(env, GET_OFFSET(arg2, -1), (uint8_t)(arg1 >> 8), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -1), (uint8_t)(arg1 >> 8), + mem_idx, GETPC()); } if (GET_LMASK(arg2) >= 2) { - do_sb(env, GET_OFFSET(arg2, -2), (uint8_t)(arg1 >> 16), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -2), (uint8_t)(arg1 >> 16), + mem_idx, GETPC()); } if (GET_LMASK(arg2) == 3) { - do_sb(env, GET_OFFSET(arg2, -3), (uint8_t)(arg1 >> 24), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -3), (uint8_t)(arg1 >> 24), + mem_idx, GETPC()); } } @@ -453,82 +390,82 @@ void helper_swr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, void helper_sdl(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, int mem_idx) { - do_sb(env, arg2, (uint8_t)(arg1 >> 56), mem_idx, GETPC()); + cpu_stb_mmuidx_ra(env, arg2, (uint8_t)(arg1 >> 56), mem_idx, GETPC()); if (GET_LMASK64(arg2) <= 6) { - do_sb(env, GET_OFFSET(arg2, 1), (uint8_t)(arg1 >> 48), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 1), (uint8_t)(arg1 >> 48), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) <= 5) { - do_sb(env, GET_OFFSET(arg2, 2), (uint8_t)(arg1 >> 40), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 2), (uint8_t)(arg1 >> 40), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) <= 4) { - do_sb(env, GET_OFFSET(arg2, 3), (uint8_t)(arg1 >> 32), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 3), (uint8_t)(arg1 >> 32), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) <= 3) { - do_sb(env, GET_OFFSET(arg2, 4), (uint8_t)(arg1 >> 24), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 4), (uint8_t)(arg1 >> 24), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) <= 2) { - do_sb(env, GET_OFFSET(arg2, 5), (uint8_t)(arg1 >> 16), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 5), (uint8_t)(arg1 >> 16), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) <= 1) { - do_sb(env, GET_OFFSET(arg2, 6), (uint8_t)(arg1 >> 8), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 6), (uint8_t)(arg1 >> 8), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) <= 0) { - do_sb(env, GET_OFFSET(arg2, 7), (uint8_t)arg1, mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 7), (uint8_t)arg1, + mem_idx, GETPC()); } } void helper_sdr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, int mem_idx) { - do_sb(env, arg2, (uint8_t)arg1, mem_idx, GETPC()); + cpu_stb_mmuidx_ra(env, arg2, (uint8_t)arg1, mem_idx, GETPC()); if (GET_LMASK64(arg2) >= 1) { - do_sb(env, GET_OFFSET(arg2, -1), (uint8_t)(arg1 >> 8), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -1), (uint8_t)(arg1 >> 8), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) >= 2) { - do_sb(env, GET_OFFSET(arg2, -2), (uint8_t)(arg1 >> 16), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -2), (uint8_t)(arg1 >> 16), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) >= 3) { - do_sb(env, GET_OFFSET(arg2, -3), (uint8_t)(arg1 >> 24), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -3), (uint8_t)(arg1 >> 24), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) >= 4) { - do_sb(env, GET_OFFSET(arg2, -4), (uint8_t)(arg1 >> 32), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -4), (uint8_t)(arg1 >> 32), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) >= 5) { - do_sb(env, GET_OFFSET(arg2, -5), (uint8_t)(arg1 >> 40), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -5), (uint8_t)(arg1 >> 40), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) >= 6) { - do_sb(env, GET_OFFSET(arg2, -6), (uint8_t)(arg1 >> 48), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -6), (uint8_t)(arg1 >> 48), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) == 7) { - do_sb(env, GET_OFFSET(arg2, -7), (uint8_t)(arg1 >> 56), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -7), (uint8_t)(arg1 >> 56), + mem_idx, GETPC()); } } #endif /* TARGET_MIPS64 */ @@ -546,14 +483,14 @@ void helper_lwm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, for (i = 0; i < base_reglist; i++) { env->active_tc.gpr[multiple_regs[i]] = - (target_long)do_lw(env, addr, mem_idx, GETPC()); + (target_long)cpu_ldl_mmuidx_ra(env, addr, mem_idx, GETPC()); addr += 4; } } if (do_r31) { - env->active_tc.gpr[31] = (target_long)do_lw(env, addr, mem_idx, - GETPC()); + env->active_tc.gpr[31] = + (target_long)cpu_ldl_mmuidx_ra(env, addr, mem_idx, GETPC()); } } @@ -567,14 +504,14 @@ void helper_swm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, target_ulong i; for (i = 0; i < base_reglist; i++) { - do_sw(env, addr, env->active_tc.gpr[multiple_regs[i]], mem_idx, - GETPC()); + cpu_stw_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]], + mem_idx, GETPC()); addr += 4; } } if (do_r31) { - do_sw(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); + cpu_stw_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); } } @@ -589,14 +526,15 @@ void helper_ldm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, target_ulong i; for (i = 0; i < base_reglist; i++) { - env->active_tc.gpr[multiple_regs[i]] = do_ld(env, addr, mem_idx, - GETPC()); + env->active_tc.gpr[multiple_regs[i]] = + cpu_ldq_mmuidx_ra(env, addr, mem_idx, GETPC()); addr += 8; } } if (do_r31) { - env->active_tc.gpr[31] = do_ld(env, addr, mem_idx, GETPC()); + env->active_tc.gpr[31] = + cpu_ldq_mmuidx_ra(env, addr, mem_idx, GETPC()); } } @@ -610,14 +548,14 @@ void helper_sdm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, target_ulong i; for (i = 0; i < base_reglist; i++) { - do_sd(env, addr, env->active_tc.gpr[multiple_regs[i]], mem_idx, - GETPC()); + cpu_stq_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]], + mem_idx, GETPC()); addr += 8; } } if (do_r31) { - do_sd(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); + cpu_stq_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); } } #endif From patchwork Thu Dec 12 04:00:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181444 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp401356ile; Wed, 11 Dec 2019 20:21:18 -0800 (PST) X-Google-Smtp-Source: APXvYqzu0dL9jZs0k6thvPX97GAaabBQHLLUOtO0ADvNbKarBQpWhMzlzSnoSGCFWPPA3OUuQLAT X-Received: by 2002:a9d:eea:: with SMTP id 97mr5501548otj.177.1576124478892; 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.01.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:01:12 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 25/28] target/s390x: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX Date: Wed, 11 Dec 2019 20:00:36 -0800 Message-Id: <20191212040039.26546-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The generated functions aside from *_real are unused. The *_real functions have a couple of users in mem_helper.c; use *_mmuidx_ra instead, with MMU_REAL_IDX. Cc: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 5 ----- target/s390x/mem_helper.c | 5 +++++ 2 files changed, 5 insertions(+), 5 deletions(-) -- 2.20.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 17460ed7b3..2670728e8a 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -36,11 +36,6 @@ #define TARGET_INSN_START_EXTRA_WORDS 2 -#define MMU_MODE0_SUFFIX _primary -#define MMU_MODE1_SUFFIX _secondary -#define MMU_MODE2_SUFFIX _home -#define MMU_MODE3_SUFFIX _real - #define MMU_USER_IDX 0 #define S390_MAX_CPUS 248 diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 57ce17c252..d379be8418 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -43,6 +43,11 @@ #define HELPER_LOG(x...) #endif +#define cpu_ldl_real_ra(e, p, r) cpu_ldl_mmuidx_ra(e, p, MMU_REAL_IDX, r) +#define cpu_ldq_real_ra(e, p, r) cpu_ldq_mmuidx_ra(e, p, MMU_REAL_IDX, r) +#define cpu_stl_real_ra(e, p, v, r) cpu_stl_mmuidx_ra(e, p, v, MMU_REAL_IDX, r) +#define cpu_stq_real_ra(e, p, v, r) cpu_stq_mmuidx_ra(e, p, v, MMU_REAL_IDX, r) + static inline bool psw_key_valid(CPUS390XState *env, uint8_t psw_key) { uint16_t pkm = env->cregs[3] >> 16; From patchwork Thu Dec 12 04:00:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181438 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp397621ile; Wed, 11 Dec 2019 20:16:29 -0800 (PST) X-Google-Smtp-Source: APXvYqzZD4isSikVE+vu/3I2Hw8NLuWwTnUGADNwtI6TPJm7OiUevcOefHDHCTLkXvWmc7hJwWzG X-Received: by 2002:ae9:dc82:: with SMTP id q124mr6550258qkf.20.1576124189384; Wed, 11 Dec 2019 20:16:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576124189; cv=none; d=google.com; s=arc-20160816; b=Ve+Pq821DwDeWDGX6megCd6+0RvTHkv8Ia4371pjtBhz2mkrlWMiLaUItFV0eFcEqE CyJVSwByF6Kn3hpivSgeEUcrlLwG1XHDFbamNrAQtToewBmmYMo4vncFOPwCCAbszZcJ S+AAsVrfE1/qORZFg+qgnDWXRXZcnHLthZSE7b7q1omgztaBnJbbKTY8z6KhPu3iOUtN xzcMD5BAe7m9a6EsnZmvFdV+VMq+9g9xcbnzB4dPOr4WOOyyMjbBDsjwO0aPUWhOP+DS D94gwwmiylch9d6hASofKQF0dpkOpAHdiQ4imcWkoq1mOU6+5DKuU1Eq/R/PCl+fqFaG ii/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=JWpl4dTJywBw8dk4WBNibniYDIKR8WNVBGRxmrDjrqI=; b=mtxOWboZwgxenRr4nbnzwe3BQp0HanmLHZnMUSSqJX2HSWVlWFC9xSJl2sOXwr5WqU TfHuJRy0ev5GToX6h8z1PsUJ0+NQddZxdzRg3nHArRej5P2+ImSxegeHkIq4DgXyh39F v74yBpUYDzxd5Hdu8LGb7ZeiW2o2C1A9VdmAwrT3sS6Pw0ddRzNXk23E8y1kVdkAG8sT kSQVICtgD/inxn2aRwRRehMwhRPSH9YrqpkHZYuJ9riRBFQOor2uI3tSHw0vXHO3omSF Bm2h9qqnMzZu/tibemTALBVKy+uAbvaWTT0hTLJmTCC7XNmmDITEoqz8mvoq41xj+N37 39YA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lKAF37rD; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.01.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:01:13 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 26/28] target/ppc: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX Date: Wed, 11 Dec 2019 20:00:37 -0800 Message-Id: <20191212040039.26546-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::642 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There are only two uses. Within dcbz_common, the local variable mmu_idx already contains the epid computation, and we can avoid repeating it for the store. Within helper_icbiep, the usage is trivially expanded using PPC_TLB_EPID_LOAD. Cc: David Gibson Signed-off-by: Richard Henderson --- target/ppc/cpu.h | 2 -- target/ppc/mem_helper.c | 11 ++--------- 2 files changed, 2 insertions(+), 11 deletions(-) -- 2.20.1 Acked-by: David Gibson diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index e3e82327b7..3bd983adaa 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -951,8 +951,6 @@ struct ppc_radix_page_info { * + real/paged mode combinations. The other two modes are for * external PID load/store. */ -#define MMU_MODE8_SUFFIX _epl -#define MMU_MODE9_SUFFIX _eps #define PPC_TLB_EPID_LOAD 8 #define PPC_TLB_EPID_STORE 9 diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index 1351b53f28..56855f2381 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -177,14 +177,7 @@ static void dcbz_common(CPUPPCState *env, target_ulong addr, } else { /* Slow path */ for (i = 0; i < dcbz_size; i += 8) { - if (epid) { -#if !defined(CONFIG_USER_ONLY) - /* Does not make sense on USER_ONLY config */ - cpu_stq_eps_ra(env, addr + i, 0, retaddr); -#endif - } else { - cpu_stq_data_ra(env, addr + i, 0, retaddr); - } + cpu_stq_mmuidx_ra(env, addr + i, 0, mmu_idx, retaddr); } } } @@ -216,7 +209,7 @@ void helper_icbiep(CPUPPCState *env, target_ulong addr) #if !defined(CONFIG_USER_ONLY) /* See comments above */ addr &= ~(env->dcache_line_size - 1); - cpu_ldl_epl_ra(env, addr, GETPC()); + cpu_ldl_mmuidx_ra(env, addr, PPC_TLB_EPID_LOAD, GETPC()); #endif } From patchwork Thu Dec 12 04:00:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181441 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp399627ile; Wed, 11 Dec 2019 20:18:55 -0800 (PST) X-Google-Smtp-Source: APXvYqw4wiJ7hWe+APLOlY+QQh4/sz9epaQC0aCa7VBDrFQb40DElrYyF3f3sU7/Gr4CiRRgYQQ2 X-Received: by 2002:a9d:453:: with SMTP id 77mr5814154otc.307.1576124335273; Wed, 11 Dec 2019 20:18:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576124335; cv=none; d=google.com; s=arc-20160816; b=pYl3CYQXZ1RDZi+Okcppt0uYF3HU0KFxo2v7nlQX7eQz+/Irt+tUkLEBFOsLj3hj7H H+Nf5CynqvRhHVkbhxJheFIXa60UKXy1PLm9PhozdOobSGvpLI+A+Hs1/+Yr2BD5gs3n WHfriKvquCj3jYrpDLinjeDZlYB3VTsII93YV6yA5/0W72RSMRihnjD97u/A5TWUuYvM 7C8OdF8/MP69Dzz9RQmAHB6XaxxZSJh+2QCwnVfGZXjOI8lwEyBXq74opmnFWxJYMVw0 LAg0xT2Nv1vqlL5hCbjq1yiDs7WfOQEBSaXZXgXvLIWUaTQrxx/Y2BUqy4qyIWQdgaw0 Ot3A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=SlhvR/93XuswRqdgG5vpGH1hywauX0iU3FE7RaogKGg=; b=TH5790Fj3LTBrOeBuOUxndFTy2zv5nNRM6hy/zRIfDpDdvu+Rz0KR18JDJLfCf/O7S oe344e9zZt1g+cNIF+++vRLGBF7nhr8BgHPL23sSD0EccaTi3fknEVpQ/ofd09dhI/5V AJz088pFYh/Tt1N6AhN3Z5A4F9GK+AhQ8w0iyr0C5Z5MY2Me3Qa+joDIx2cuoLe0FBk2 R7STZbpTA4LyEwecTZDMi6R/lo9MP5VozczCn2zGWMCdsQ7uOO6x034aK9QDRnqJU1p9 FoKiBuPVZV6ixiLWUBZcloY876yoKoT+tsk4w0ybmLjQSQdpFImKNo4l9evyiD5mpCT5 gPPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zLNZwvnK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.01.14 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:01:15 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 27/28] cputlb: Remove support for MMU_MODE*_SUFFIX Date: Wed, 11 Dec 2019 20:00:38 -0800 Message-Id: <20191212040039.26546-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::62a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" All users have now been converted to cpu_*_mmuidx_ra. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 230 ---------------------------------------- 1 file changed, 230 deletions(-) -- 2.20.1 diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 5a638fd8d6..eb2756e214 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -275,236 +275,6 @@ void cpu_stl_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, int mmu_idx, uintptr_t retaddr); -#ifdef MMU_MODE0_SUFFIX -#define CPU_MMU_INDEX 0 -#define MEMSUFFIX MMU_MODE0_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif - -#if (NB_MMU_MODES >= 2) && defined(MMU_MODE1_SUFFIX) -#define CPU_MMU_INDEX 1 -#define MEMSUFFIX MMU_MODE1_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif - -#if (NB_MMU_MODES >= 3) && defined(MMU_MODE2_SUFFIX) - -#define CPU_MMU_INDEX 2 -#define MEMSUFFIX MMU_MODE2_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 3) */ - -#if (NB_MMU_MODES >= 4) && defined(MMU_MODE3_SUFFIX) - -#define CPU_MMU_INDEX 3 -#define MEMSUFFIX MMU_MODE3_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 4) */ - -#if (NB_MMU_MODES >= 5) && defined(MMU_MODE4_SUFFIX) - -#define CPU_MMU_INDEX 4 -#define MEMSUFFIX MMU_MODE4_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 5) */ - -#if (NB_MMU_MODES >= 6) && defined(MMU_MODE5_SUFFIX) - -#define CPU_MMU_INDEX 5 -#define MEMSUFFIX MMU_MODE5_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 6) */ - -#if (NB_MMU_MODES >= 7) && defined(MMU_MODE6_SUFFIX) - -#define CPU_MMU_INDEX 6 -#define MEMSUFFIX MMU_MODE6_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 7) */ - -#if (NB_MMU_MODES >= 8) && defined(MMU_MODE7_SUFFIX) - -#define CPU_MMU_INDEX 7 -#define MEMSUFFIX MMU_MODE7_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 8) */ - -#if (NB_MMU_MODES >= 9) && defined(MMU_MODE8_SUFFIX) - -#define CPU_MMU_INDEX 8 -#define MEMSUFFIX MMU_MODE8_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 9) */ - -#if (NB_MMU_MODES >= 10) && defined(MMU_MODE9_SUFFIX) - -#define CPU_MMU_INDEX 9 -#define MEMSUFFIX MMU_MODE9_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 10) */ - -#if (NB_MMU_MODES >= 11) && defined(MMU_MODE10_SUFFIX) - -#define CPU_MMU_INDEX 10 -#define MEMSUFFIX MMU_MODE10_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 11) */ - -#if (NB_MMU_MODES >= 12) && defined(MMU_MODE11_SUFFIX) - -#define CPU_MMU_INDEX 11 -#define MEMSUFFIX MMU_MODE11_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 12) */ - -#if (NB_MMU_MODES > 12) -#error "NB_MMU_MODES > 12 is not supported for now" -#endif /* (NB_MMU_MODES > 12) */ - /* these access are slower, they must be as rare as possible */ #define CPU_MMU_INDEX (cpu_mmu_index(env, false)) #define MEMSUFFIX _data From patchwork Thu Dec 12 04:00:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181446 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp402779ile; Wed, 11 Dec 2019 20:23:28 -0800 (PST) X-Google-Smtp-Source: APXvYqxwNikRMBx6vLAK9psJoU9lxKiVeCXyP3yLnLOCh22CnKTH5Jxztuvj7nBMeXRU0csBKEpa X-Received: by 2002:a05:6830:14d3:: with SMTP id t19mr6128389otq.278.1576124608501; Wed, 11 Dec 2019 20:23:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576124608; cv=none; d=google.com; s=arc-20160816; b=xPoB/q35/xg+TklK4gcW2EBgOu3B6PlnH+reoMKGCwOp4TVCwCvEsNmaoClXMlFTVC uvCpILzI1P236vfoO4A8+xdiPNkVmfl0+ZRVniFUB5yNr6mRJQ/K59KzrPJVjZdHdRDr /bZ1uxneVaPVGlNcWcNNnhukn1PQl+Y2xOrpOyaLqK/w1PhujorkmwZSayszhHR91JSz OLZvEg9Vic/130dEwgmaQpaOJr7fYB/esSPsNFv9nadVsxAG+80u9IpMzzUqkQga13Cy G06+OAJuUVzYklDGc/+hV30ateQa7OhWogS/aZ77erFXDvemVkx6OZ/8+ZAw23rzoHCm d6PA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=33Q4Yqkuc7Q0/fUqgwOWgoOSsW6NeczfiBq3tI04bWU=; b=R6ZREP5/obdyVFmXRtywazoSOojbASMUoXCPedJ6f0GMKr9xdHCBR3vPV+u66Y2mb6 8cRzCnpOXpWnHdsZhI4wJvAQtmAxno2rYte/Ff9ZtR+gUQ2zcCe2YmhGJmlhy+5QwjJl 63vgSlwQMQcaBhonykMlg6l32IsF6IeCGxScZK1m11VMhAoeDb6JaNFpOX2fJjs7rHbg HzIdpG8kjc+VI3m4WPFTq7XLoc0ktDOe3xmXW2dhy5hCTMtUctnCGgXB7A7u/8jLo5Qp 2yPySSdXfMFLx6OG32u9EuzIG5ObBsfEFrm0dUGzWS/JjMqonUcWNFReL0XlvsDIWVgg 94Sg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CkEazuxO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id z130sm4666391pgz.6.2019.12.11.20.01.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 20:01:16 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 28/28] cputlb: Expand cpu_ldst_template.h in cputlb.c Date: Wed, 11 Dec 2019 20:00:39 -0800 Message-Id: <20191212040039.26546-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191212040039.26546-1-richard.henderson@linaro.org> References: <20191212040039.26546-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reduce the amount of preprocessor obfuscation by expanding the text of each of the functions generated. The result is only slightly smaller than the original. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 67 +++++++----------- include/exec/cpu_ldst_template.h | 117 ------------------------------- accel/tcg/cputlb.c | 107 +++++++++++++++++++++++++++- 3 files changed, 130 insertions(+), 161 deletions(-) delete mode 100644 include/exec/cpu_ldst_template.h -- 2.20.1 Reviewed-by: Aleksandar Markovic diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index eb2756e214..d7a20145ce 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -98,32 +98,6 @@ typedef target_ulong abi_ptr; #define TARGET_ABI_FMT_ptr TARGET_ABI_FMT_lx #endif -#if defined(CONFIG_USER_ONLY) - -extern __thread uintptr_t helper_retaddr; - -static inline void set_helper_retaddr(uintptr_t ra) -{ - helper_retaddr = ra; - /* - * Ensure that this write is visible to the SIGSEGV handler that - * may be invoked due to a subsequent invalid memory operation. - */ - signal_barrier(); -} - -static inline void clear_helper_retaddr(void) -{ - /* - * Ensure that previous memory operations have succeeded before - * removing the data visible to the signal handler. - */ - signal_barrier(); - helper_retaddr = 0; -} - -/* In user-only mode we provide only the _code and _data accessors. */ - uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr); uint32_t cpu_lduw_data(CPUArchState *env, abi_ptr ptr); uint32_t cpu_ldl_data(CPUArchState *env, abi_ptr ptr); @@ -152,6 +126,30 @@ void cpu_stl_data_ra(CPUArchState *env, abi_ptr ptr, void cpu_stq_data_ra(CPUArchState *env, abi_ptr ptr, uint64_t val, uintptr_t retaddr); +#if defined(CONFIG_USER_ONLY) + +extern __thread uintptr_t helper_retaddr; + +static inline void set_helper_retaddr(uintptr_t ra) +{ + helper_retaddr = ra; + /* + * Ensure that this write is visible to the SIGSEGV handler that + * may be invoked due to a subsequent invalid memory operation. + */ + signal_barrier(); +} + +static inline void clear_helper_retaddr(void) +{ + /* + * Ensure that previous memory operations have succeeded before + * removing the data visible to the signal handler. + */ + signal_barrier(); + helper_retaddr = 0; +} + /* * Provide the same *_mmuidx_ra interface as for softmmu. * The mmu_idx argument is ignored. @@ -275,23 +273,6 @@ void cpu_stl_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, int mmu_idx, uintptr_t retaddr); -/* these access are slower, they must be as rare as possible */ -#define CPU_MMU_INDEX (cpu_mmu_index(env, false)) -#define MEMSUFFIX _data -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX - #endif /* defined(CONFIG_USER_ONLY) */ uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr); diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h deleted file mode 100644 index e400979f23..0000000000 --- a/include/exec/cpu_ldst_template.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * Software MMU support - * - * Generate inline load/store functions for one MMU mode and data - * size. - * - * Generate a store function as well as signed and unsigned loads. - * - * Not used directly but included from cpu_ldst.h. - * - * Copyright (c) 2003 Fabrice Bellard - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ - -#if DATA_SIZE == 8 -#define SUFFIX q -#define USUFFIX q -#define DATA_TYPE uint64_t -#define SHIFT 3 -#elif DATA_SIZE == 4 -#define SUFFIX l -#define USUFFIX l -#define DATA_TYPE uint32_t -#define SHIFT 2 -#elif DATA_SIZE == 2 -#define SUFFIX w -#define USUFFIX uw -#define DATA_TYPE uint16_t -#define DATA_STYPE int16_t -#define SHIFT 1 -#elif DATA_SIZE == 1 -#define SUFFIX b -#define USUFFIX ub -#define DATA_TYPE uint8_t -#define DATA_STYPE int8_t -#define SHIFT 0 -#else -#error unsupported data size -#endif - -#if DATA_SIZE == 8 -#define RES_TYPE uint64_t -#else -#define RES_TYPE uint32_t -#endif - -/* generic load/store macros */ - -static inline RES_TYPE -glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, - target_ulong ptr, - uintptr_t retaddr) -{ - return glue(glue(cpu_ld, USUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, - retaddr); -} - -static inline RES_TYPE -glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr) -{ - return glue(glue(cpu_ld, USUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, 0); -} - -#if DATA_SIZE <= 2 -static inline int -glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, - target_ulong ptr, - uintptr_t retaddr) -{ - return glue(glue(cpu_lds, SUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, - retaddr); -} - -static inline int -glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr) -{ - return glue(glue(cpu_lds, SUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, 0); -} -#endif - -/* generic store macro */ - -static inline void -glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, - target_ulong ptr, - RES_TYPE v, uintptr_t retaddr) -{ - glue(glue(cpu_st, SUFFIX), _mmuidx_ra)(env, ptr, v, CPU_MMU_INDEX, - retaddr); -} - -static inline void -glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr, - RES_TYPE v) -{ - glue(glue(cpu_st, SUFFIX), _mmuidx_ra)(env, ptr, v, CPU_MMU_INDEX, 0); -} - -#undef RES_TYPE -#undef DATA_TYPE -#undef DATA_STYPE -#undef SUFFIX -#undef USUFFIX -#undef DATA_SIZE -#undef SHIFT diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 7d519738bb..34560dd3e1 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -35,7 +35,6 @@ #include "qemu/atomic128.h" #include "translate-all.h" #include "trace-root.h" -#include "qemu/plugin.h" #include "trace/mem.h" #ifdef CONFIG_PLUGIN #include "qemu/plugin-memory.h" @@ -1697,6 +1696,68 @@ uint64_t cpu_ldq_mmuidx_ra(CPUArchState *env, abi_ptr addr, ? helper_le_ldq_mmu : helper_be_ldq_mmu); } +uint32_t cpu_ldub_data_ra(CPUArchState *env, target_ulong ptr, + uintptr_t retaddr) +{ + return cpu_ldub_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr); +} + +int cpu_ldsb_data_ra(CPUArchState *env, target_ulong ptr, uintptr_t retaddr) +{ + return cpu_ldsb_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr); +} + +uint32_t cpu_lduw_data_ra(CPUArchState *env, target_ulong ptr, + uintptr_t retaddr) +{ + return cpu_lduw_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr); +} + +int cpu_ldsw_data_ra(CPUArchState *env, target_ulong ptr, uintptr_t retaddr) +{ + return cpu_ldsw_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr); +} + +uint32_t cpu_ldl_data_ra(CPUArchState *env, target_ulong ptr, uintptr_t retaddr) +{ + return cpu_ldl_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr); +} + +uint64_t cpu_ldq_data_ra(CPUArchState *env, target_ulong ptr, uintptr_t retaddr) +{ + return cpu_ldq_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr); +} + +uint32_t cpu_ldub_data(CPUArchState *env, target_ulong ptr) +{ + return cpu_ldub_data_ra(env, ptr, 0); +} + +int cpu_ldsb_data(CPUArchState *env, target_ulong ptr) +{ + return cpu_ldsb_data_ra(env, ptr, 0); +} + +uint32_t cpu_lduw_data(CPUArchState *env, target_ulong ptr) +{ + return cpu_lduw_data_ra(env, ptr, 0); +} + +int cpu_ldsw_data(CPUArchState *env, target_ulong ptr) +{ + return cpu_ldsw_data_ra(env, ptr, 0); +} + +uint32_t cpu_ldl_data(CPUArchState *env, target_ulong ptr) +{ + return cpu_ldl_data_ra(env, ptr, 0); +} + +uint64_t cpu_ldq_data(CPUArchState *env, target_ulong ptr) +{ + return cpu_ldq_data_ra(env, ptr, 0); +} + /* * Store Helpers */ @@ -1970,6 +2031,50 @@ void cpu_stq_mmuidx_ra(CPUArchState *env, target_ulong addr, uint64_t val, cpu_store_helper(env, addr, val, mmu_idx, retaddr, MO_TEQ); } +void cpu_stb_data_ra(CPUArchState *env, target_ulong ptr, + uint32_t val, uintptr_t retaddr) +{ + cpu_stb_mmuidx_ra(env, ptr, val, cpu_mmu_index(env, false), retaddr); +} + +void cpu_stw_data_ra(CPUArchState *env, target_ulong ptr, + uint32_t val, uintptr_t retaddr) +{ + cpu_stw_mmuidx_ra(env, ptr, val, cpu_mmu_index(env, false), retaddr); +} + +void cpu_stl_data_ra(CPUArchState *env, target_ulong ptr, + uint32_t val, uintptr_t retaddr) +{ + cpu_stl_mmuidx_ra(env, ptr, val, cpu_mmu_index(env, false), retaddr); +} + +void cpu_stq_data_ra(CPUArchState *env, target_ulong ptr, + uint64_t val, uintptr_t retaddr) +{ + cpu_stq_mmuidx_ra(env, ptr, val, cpu_mmu_index(env, false), retaddr); +} + +void cpu_stb_data(CPUArchState *env, target_ulong ptr, uint32_t val) +{ + cpu_stb_data_ra(env, ptr, val, 0); +} + +void cpu_stw_data(CPUArchState *env, target_ulong ptr, uint32_t val) +{ + cpu_stw_data_ra(env, ptr, val, 0); +} + +void cpu_stl_data(CPUArchState *env, target_ulong ptr, uint32_t val) +{ + cpu_stl_data_ra(env, ptr, val, 0); +} + +void cpu_stq_data(CPUArchState *env, target_ulong ptr, uint64_t val) +{ + cpu_stq_data_ra(env, ptr, val, 0); +} + /* First set of helpers allows passing in of OI and RETADDR. This makes them callable from other helpers. */