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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id b14sm1389608lff.68.2019.12.11.07.44.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 07:44:02 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v4 07/14] cpuidle: psci: Support hierarchical CPU idle states Date: Wed, 11 Dec 2019 16:43:36 +0100 Message-Id: <20191211154343.29765-8-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191211154343.29765-1-ulf.hansson@linaro.org> References: <20191211154343.29765-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently CPU's idle states are represented using the flattened model. Let's add support for the hierarchical layout, via converting to use of_get_cpu_state_node(). Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v4: - None. --- drivers/cpuidle/cpuidle-psci.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 761359be50f2..830995b8a56f 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -86,8 +86,7 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, return -ENOMEM; for (i = 1; i < state_count; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - i - 1); + state_node = of_get_cpu_state_node(cpu_node, i - 1); if (!state_node) break; From patchwork Wed Dec 11 15:43:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 181272 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp701968ile; Wed, 11 Dec 2019 07:44:11 -0800 (PST) X-Google-Smtp-Source: APXvYqw2NqC8CTZ0bK0BcgzX924gu6MzIthqnxAMk8klcWmxmKFNCGwntfTNcUIbaWiLOoK8NP0H X-Received: by 2002:a9d:12ea:: with SMTP id g97mr2835177otg.105.1576079051400; Wed, 11 Dec 2019 07:44:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576079051; cv=none; d=google.com; s=arc-20160816; b=Qy+m4Hzu33og6nS7LDpPwZI0fuTIG/TCvO9ab3HSmbUAWUvl3VXFzwRcEnqIIGgOJq 5TlsywXYxbx0nuRhUjKLQ3CYyomYea1/iAECYit+UlNNc6wR2oFnZRdSwoBI+qRBfpYz UuM4wezzV8NVIWTvsH7xAg8MltEaK+SZeJ+EJcEXN0hGuG1R33EpION/xKNzc/qDWvQv UsUos2ECmSVpBnJ4C+VjFzeSuiswKsIjeCyBZ92TAGvkrPfi/XjImQn7pUFO7dansdD+ agDg4rFy7gtYzHFC1IedLr5CB0AgvqjXy6CBeP968f7FdmwB6sqiaFL6nGeigx6Xv5Sj udqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=ZEqQy0QuBsg1TqWJIDaDl2CROKkjokF3ooQD0C47ttQ=; b=r7JWs8oj9I2vdzSX1FfNcFgKvBPq4V9UsPSMPr7TG1AyCZes+KPnE/6XdQWW310HXU QrAucYq/+42EGre+qzzJwPdnP8kofu+TPwswLUD4zt8CCVKjeGHwMTGkosVOymNh5YTb VUIvOtczNYcpt8CQFF402mVVunyd+oI/lhpqvCh1YEFfL/iw9q64Jv4jCgXE4J6/u47t ck9yIW3L0uZaDqFLlFWqehuv3mRjQn2y1upqLF4d3tMOPnobe1F9WtBQtfcyZPTgPY0L dMKU7M+gYvfpVGD0L7qaHkLVO1zQasydOcptbgI4kGXf0lCJg8H4BQBqTxV3yBfMR2qa UYcw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=crgggGsC; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id b14sm1389608lff.68.2019.12.11.07.44.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 07:44:05 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v4 09/14] cpuidle: psci: Attach CPU devices to their PM domains Date: Wed, 11 Dec 2019 16:43:38 +0100 Message-Id: <20191211154343.29765-10-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191211154343.29765-1-ulf.hansson@linaro.org> References: <20191211154343.29765-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In order to enable a CPU to be power managed through its PM domain, let's try to attach it by calling psci_dt_attach_cpu() during the cpuidle initialization. psci_dt_attach_cpu() returns a pointer to the attached struct device, which later should be used for runtime PM, hence we need to store it somewhere. Rather than adding yet another per CPU variable, let's create a per CPU struct to collect the relevant per CPU variables. Signed-off-by: Ulf Hansson --- Changes in v4: - Add check for OSI support before calling psci_dt_attach_cpu(). --- drivers/cpuidle/cpuidle-psci.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) -- 2.17.1 Reviewed-by: Sudeep Holla diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 830995b8a56f..6a87848be3c3 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -20,14 +20,20 @@ #include +#include "cpuidle-psci.h" #include "dt_idle_states.h" -static DEFINE_PER_CPU_READ_MOSTLY(u32 *, psci_power_state); +struct psci_cpuidle_data { + u32 *psci_states; + struct device *dev; +}; + +static DEFINE_PER_CPU_READ_MOSTLY(struct psci_cpuidle_data, psci_cpuidle_data); static int psci_enter_idle_state(struct cpuidle_device *dev, struct cpuidle_driver *drv, int idx) { - u32 *state = __this_cpu_read(psci_power_state); + u32 *state = __this_cpu_read(psci_cpuidle_data.psci_states); return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, idx, state[idx]); @@ -79,6 +85,7 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, int i, ret = 0; u32 *psci_states; struct device_node *state_node; + struct psci_cpuidle_data *data = per_cpu_ptr(&psci_cpuidle_data, cpu); state_count++; /* Add WFI state too */ psci_states = kcalloc(state_count, sizeof(*psci_states), GFP_KERNEL); @@ -104,8 +111,17 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, goto free_mem; } - /* Idle states parsed correctly, initialize per-cpu pointer */ - per_cpu(psci_power_state, cpu) = psci_states; + /* Currently limit the hierarchical topology to be used in OSI mode. */ + if (psci_has_osi_support()) { + data->dev = psci_dt_attach_cpu(cpu); + if (IS_ERR(data->dev)) { + ret = PTR_ERR(data->dev); + goto free_mem; + } + } + + /* Idle states parsed correctly, store them in the per-cpu struct. */ + data->psci_states = psci_states; return 0; free_mem: From patchwork Wed Dec 11 15:43:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 181274 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp702017ile; Wed, 11 Dec 2019 07:44:14 -0800 (PST) X-Google-Smtp-Source: APXvYqx8s5TPsX1yCY7gFfr6Sfe8WYPfSs6CtqvhLOZHCiZvxlRJmBtRxZR/pCoETMpoJWPQ5iyo X-Received: by 2002:aca:dd04:: with SMTP id u4mr3218491oig.94.1576079053989; Wed, 11 Dec 2019 07:44:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576079053; cv=none; d=google.com; s=arc-20160816; b=bjY76MYdWubewS999UtqTOz5JDpZriO/5A2hblLUO4GhWex8G6z3DDwi7BXap54anu o0+FQV6117PdGRWD2FyFep8d0TSb6u8UEH2vBF6yrBppfSN+FQ7Q9SKqjc8W9vrY/j9y PkH4CN17S6uK0RJ5NtC+Vjq6r9/4+zXhsv2q5m0YhXaekA5cjkCTENSf4IyjT0h11zJ+ RTC1gvNI6goMOvaGlb0LIZoINPPPzJlfWjJ5lY3fv5ravz7kq2C2coeda7LbmdiJN3Uf 2Xh/WpT9j0+g8P+vjGylKpDlU9eaF3kJ3tEp0L7uHJPdY8lF0o/eugg5skol6dfNcBxV z7wQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=xFV9pwGCTDQIRD0MEW258+4R088s+9zQCaaqV7y2r0w=; b=QMz3L3ZpH89a5tRDYPWjcEfG8juKjQP/ZG/l2M+bfH2HJLwErXdvWOyMGIhTitaPc0 GmAmnITz1EyzoZuvPs5OChdUwJ4Qxq/vitsgbVF2FxXxXMZzitPiREYs/7HvesiS9jdk 8kWn21GvPA+TKlP6TL5SykqH3plS6b7qVyHdR27MhH8Dhb9rX9S+vhnw2iy8ZR8ogLD0 ZsDcTn4lOqiUWxzcmqPjEGayNXQ95IcR6J/xDTDNSDl8SzQ60IhYyTC6mRVjWKafoEtB 5UiqyU+FRVLjHUmUHaQING3efK2XdrXf/MbtNz2iPd424MUm5DmuiwNA0J5fGtbLOyVI ZtAw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=syw2oRHy; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id b14sm1389608lff.68.2019.12.11.07.44.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 07:44:07 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v4 10/14] cpuidle: psci: Prepare to use OS initiated suspend mode via PM domains Date: Wed, 11 Dec 2019 16:43:39 +0100 Message-Id: <20191211154343.29765-11-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191211154343.29765-1-ulf.hansson@linaro.org> References: <20191211154343.29765-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The per CPU variable psci_power_state, contains an array of fixed values, which reflects the corresponding arm,psci-suspend-param parsed from DT, for each of the available CPU idle states. This isn't sufficient when using the hierarchical CPU topology in DT, in combination with having PSCI OS initiated (OSI) mode enabled. More precisely, in OSI mode, Linux is responsible of telling the PSCI FW what idle state the cluster (a group of CPUs) should enter, while in PSCI Platform Coordinated (PC) mode, each CPU independently votes for an idle state of the cluster. For this reason, introduce a per CPU variable called domain_state and implement two helper functions to read/write its value. Then let the domain_state take precedence over the regular selected state, when entering and idle state. To avoid executing the above OSI specific code in the ->enter() callback, while operating in the default PSCI Platform Coordinated mode, let's also add a new enter-function and use it for OSI. Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v4: - Rebased on top of earlier changes. - Add comment about using the deepest cpuidle state for the domain state selection. --- drivers/cpuidle/cpuidle-psci.c | 56 ++++++++++++++++++++++++++++++---- 1 file changed, 50 insertions(+), 6 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 6a87848be3c3..9600fe674a89 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -29,14 +29,47 @@ struct psci_cpuidle_data { }; static DEFINE_PER_CPU_READ_MOSTLY(struct psci_cpuidle_data, psci_cpuidle_data); +static DEFINE_PER_CPU(u32, domain_state); + +static inline void psci_set_domain_state(u32 state) +{ + __this_cpu_write(domain_state, state); +} + +static inline u32 psci_get_domain_state(void) +{ + return __this_cpu_read(domain_state); +} + +static inline int psci_enter_state(int idx, u32 state) +{ + return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, idx, state); +} + +static int psci_enter_domain_idle_state(struct cpuidle_device *dev, + struct cpuidle_driver *drv, int idx) +{ + struct psci_cpuidle_data *data = this_cpu_ptr(&psci_cpuidle_data); + u32 *states = data->psci_states; + u32 state = psci_get_domain_state(); + int ret; + + if (!state) + state = states[idx]; + + ret = psci_enter_state(idx, state); + + /* Clear the domain state to start fresh when back from idle. */ + psci_set_domain_state(0); + return ret; +} static int psci_enter_idle_state(struct cpuidle_device *dev, struct cpuidle_driver *drv, int idx) { u32 *state = __this_cpu_read(psci_cpuidle_data.psci_states); - return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, - idx, state[idx]); + return psci_enter_state(idx, state[idx]); } static struct cpuidle_driver psci_idle_driver __initdata = { @@ -79,7 +112,8 @@ static int __init psci_dt_parse_state_node(struct device_node *np, u32 *state) return 0; } -static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, +static int __init psci_dt_cpu_init_idle(struct cpuidle_driver *drv, + struct device_node *cpu_node, unsigned int state_count, int cpu) { int i, ret = 0; @@ -118,6 +152,15 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, ret = PTR_ERR(data->dev); goto free_mem; } + + /* + * Using the deepest state for the CPU to trigger a potential + * selection of a shared state for the domain, assumes the + * domain states are all deeper states. + */ + if (data->dev) + drv->states[state_count - 1].enter = + psci_enter_domain_idle_state; } /* Idle states parsed correctly, store them in the per-cpu struct. */ @@ -129,7 +172,8 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, return ret; } -static __init int psci_cpu_init_idle(unsigned int cpu, unsigned int state_count) +static __init int psci_cpu_init_idle(struct cpuidle_driver *drv, + unsigned int cpu, unsigned int state_count) { struct device_node *cpu_node; int ret; @@ -145,7 +189,7 @@ static __init int psci_cpu_init_idle(unsigned int cpu, unsigned int state_count) if (!cpu_node) return -ENODEV; - ret = psci_dt_cpu_init_idle(cpu_node, state_count, cpu); + ret = psci_dt_cpu_init_idle(drv, cpu_node, state_count, cpu); of_node_put(cpu_node); @@ -201,7 +245,7 @@ static int __init psci_idle_init_cpu(int cpu) /* * Initialize PSCI idle states. */ - ret = psci_cpu_init_idle(cpu, ret); + ret = psci_cpu_init_idle(drv, cpu, ret); if (ret) { pr_err("CPU %d failed to PSCI idle\n", cpu); goto out_kfree_drv; From patchwork Wed Dec 11 15:43:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 181278 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp703825ile; Wed, 11 Dec 2019 07:45:49 -0800 (PST) X-Google-Smtp-Source: APXvYqxG9ysfnTPx/ygAla2BhC1ETMfVNvv9NHC0fkiLQmjrPH1WzP5zAf/juAEUiYM8hmYWWu6d X-Received: by 2002:aca:b346:: with SMTP id c67mr2734738oif.17.1576079056531; Wed, 11 Dec 2019 07:44:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576079056; cv=none; d=google.com; s=arc-20160816; b=gWKMFgKu0cm9JZm1XkrbJFpyOiWwoLOpne/76Fe07shy+3K61O3kJRNIYJF/WPENm3 hrc5HPm/Emq0Er9+vxf+KVOB69KB0KP3FAqb7Y7Ht8xM0hdF/G0Dbzi7RMiqmCKIW8gq uPfB7KxseW+/Zku3fX79gcxw5B0VsBOGX0J8ej8ax4RXHBudl7XCm3oyWXE6ekTgQesn KG7hFCxi9hdBNvlaVStmJ/LuSbQW1A5kbYWq8OpltGIeNmjzpiuLhuKqUDkEjPCI6NBS ah3fGDDh42Fi8aXuCwRlPSkawJbT338wFRB9hFAsnX8FYYhHp4UwtgkZXDG4Cg0ZEFSu Pouw== ARC-Message-Signature: i=1; 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id b14sm1389608lff.68.2019.12.11.07.44.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 07:44:09 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v4 11/14] cpuidle: psci: Manage runtime PM in the idle path Date: Wed, 11 Dec 2019 16:43:40 +0100 Message-Id: <20191211154343.29765-12-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191211154343.29765-1-ulf.hansson@linaro.org> References: <20191211154343.29765-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In case we have succeeded to attach a CPU to its PM domain, let's deploy runtime PM support for the corresponding attached device, to allow the CPU to be powered-managed accordingly. The triggering point for when runtime PM reference counting should be done, has been selected to the deepest idle state for the CPU. However, from the hierarchical point view, there may be good reasons to do runtime PM reference counting even on shallower idle states, but at this point this isn't supported, mainly due to limitations set by the generic PM domain. Signed-off-by: Ulf Hansson --- Changes in v4: - None. --- drivers/cpuidle/cpuidle-psci.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) -- 2.17.1 Reviewed-by: Sudeep Holla diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 9600fe674a89..6e7804e697ed 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -51,14 +52,21 @@ static int psci_enter_domain_idle_state(struct cpuidle_device *dev, { struct psci_cpuidle_data *data = this_cpu_ptr(&psci_cpuidle_data); u32 *states = data->psci_states; - u32 state = psci_get_domain_state(); + struct device *pd_dev = data->dev; + u32 state; int ret; + /* Do runtime PM to manage a hierarchical CPU toplogy. */ + pm_runtime_put_sync_suspend(pd_dev); + + state = psci_get_domain_state(); if (!state) state = states[idx]; ret = psci_enter_state(idx, state); + pm_runtime_get_sync(pd_dev); + /* Clear the domain state to start fresh when back from idle. */ psci_set_domain_state(0); return ret;