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[34.90.227.64]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa50b339612sm693762966b.84.2024.11.27.03.01.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2024 03:01:40 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 27 Nov 2024 11:01:39 +0000 Subject: [PATCH 1/6] arm64: defconfig: enable Maxim TCPCI driver Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241127-gs101-phy-lanes-orientation-dts-v1-1-5222d8508b71@linaro.org> References: <20241127-gs101-phy-lanes-orientation-dts-v1-0-5222d8508b71@linaro.org> In-Reply-To: <20241127-gs101-phy-lanes-orientation-dts-v1-0-5222d8508b71@linaro.org> To: Catalin Marinas , Will Deacon , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jagan Sridharan , Alim Akhtar Cc: Peter Griffin , Tudor Ambarus , Sam Protsenko , Will McVicker , Roy Luo , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, =?utf-8?q?A?= =?utf-8?q?ndr=C3=A9_Draszik?= X-Mailer: b4 0.13.0 Enable the Maxim max33359 as this is used by the gs101-oriole (Google Pixel 6) board. Signed-off-by: André Draszik Reviewed-by: Peter Griffin --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d13218d0c30f..5080fe2ce776 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1121,6 +1121,7 @@ CONFIG_USB_MASS_STORAGE=m CONFIG_TYPEC=m CONFIG_TYPEC_TCPM=m CONFIG_TYPEC_TCPCI=m +CONFIG_TYPEC_TCPCI_MAXIM=m CONFIG_TYPEC_FUSB302=m CONFIG_TYPEC_QCOM_PMIC=m CONFIG_TYPEC_UCSI=m From patchwork Wed Nov 27 11:01:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 845905 Received: from mail-ed1-f50.google.com (mail-ed1-f50.google.com [209.85.208.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E71DE1EC009 for ; Wed, 27 Nov 2024 11:01:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732705306; cv=none; b=fMlGV7bJP/iUp30VRXPneyyoOcyr+UrOGG8uPdTNiZQneL1wgP5esFtHzPke2sx7mirSjJLxERh7YUy21OFDMoMPVEMKBbEEejgKM9beqYbfwPTxzf54ehDXmQPRDp57eLZv+02tfh64iTyH75OedEyiPQ0LNwo0gq6MzOeNQ3s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732705306; c=relaxed/simple; bh=wuW9dlmQHK3i/Jcfb0eJR/IK57A7oEJMFzUPWXw07Qg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MI5PMscf+OE9FoxGr+LoBlDXGO3uINwpFPfb+g6gslrHw/EUw2JlU0oewaRDbk/W4hWcTlWuLXtnJP8g973+HF/4D9azccWGHca1ZJMF3e51LSD3AGzaTPA4DsTrLyA/jHBi9edqJy8HUiRm2XV3WWK2DcQivMPyfgIA2J4P1rk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=XvkDYawG; arc=none smtp.client-ip=209.85.208.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="XvkDYawG" Received: by mail-ed1-f50.google.com with SMTP id 4fb4d7f45d1cf-5ced377447bso8944952a12.1 for ; Wed, 27 Nov 2024 03:01:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732705302; x=1733310102; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=sFCCGNoly/ihHw+f0V0Z4F6JNgdV9f0RgxXs1v/pmwo=; b=XvkDYawGO4rLrHjuOYqc9USC/olOKHS/kuwzL+WCClMn0MJZNMsdLdBV9UsdlpJ+VR k7Y/yiMQSafgLrRjR6TY9QSkcPoPbg1Xh6/kEW+CpusbIvHPPvo5FfuzQLGsBTjyQWw2 8J1v5O8qutOM1weFjrexJNNAwTsr+WpmPydiQJmoqlKExoqHzTiP+yTvUiU+2qWUJQAQ p0Mn3lMQABa8ds7dgIpAQoCSNmnEPWtnKdEC2YaIOGU+unIW9wsYEWR6+/ftyBXzhylo 5wNgj9vv6Mfy7YYGU4OGXmvRSPqpoxFG/ILn82gJwazAuHJPZExOoG4p2+hjqFmBtggK h7AQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732705302; x=1733310102; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sFCCGNoly/ihHw+f0V0Z4F6JNgdV9f0RgxXs1v/pmwo=; b=f6YxNgrS5r4BYAo/JlpbS0cymtLIqwE0gRiBSEUI27mZTPPxM6xImqtMm33KlJF/+x n2qeHLwgOsy25r50Ms8QYSVh9a0y9PtRt1CUG/xCPmAmsFALw+aSsLcN0j0hPFjwv7l/ i3381+O90/eYomRrTUCi5VEYyHGX8v5U/dtfpon66JuLDTcn54w7afhMwBJwQ2RTOQPA vOFtY5C52o9QrWVS9YqLsJfaqerVw+mB+JvhkoWRW8jFLHFvMXpV0ZgjQU9IT0sjldeD XvZvWTJWTx4Ql+zyTqmfRUShRo1b/wlhvg9I3hHLjHxFnptTj8IrBZXxdTVbedu0eTeh Fyjw== X-Forwarded-Encrypted: i=1; AJvYcCVitYG+Yv4dmRmBvUaq/VB91EjSiWZoJf83Lsr+9i4oORvKGbicYnOXogfWqJcAfSNH4h4Wc0fV0Pc=@vger.kernel.org X-Gm-Message-State: AOJu0Yzrjwg72puXiJLDZ8sgqbIT0/2kQPAHvWLAf+7X4IUeUoz8nj7M tU976SA8agjQnfUgtC/234rvunPp3yAjMP5FM9dJ3+g8QQAht6Rwgmq50kWJpbI= X-Gm-Gg: ASbGnctXyj6nRxoPsktxR32yXc0trJgHTaSfGoQmk/CCm4bApJTRV/M2TmfsJqgN0ZI SN/FqdzPbMAXyZgtUD+h9JUyMe5D6hjI6FE8VvTD8tslNaYKtVXm7xTpvmgzD/cJvlT5nPMn9nO 1ILStw8rRbC2EHaLyPVqLk+qH0Ww3RocXdaGsHz+Gpu6vgFeKfalo3uDOsMVMCOuwBMCnMDbpyJ WyHB4ZacKW+gaNLIyAtqE0bD8PUmNI5av14RyY12fj9jv9fA9CL4y3fbMJXdz9momi8McI5KtYi vxRdWUiQQ2ro6innVgUwQO4jqqMMW2PUUg== X-Google-Smtp-Source: AGHT+IGf8PRBbpu00lqdlanskxanZwbdL0mBeUOVNbWHJwrX3n9oj1hwGayugKGWxCGG58SnT8c/lQ== X-Received: by 2002:a05:6402:2807:b0:5cf:4687:b816 with SMTP id 4fb4d7f45d1cf-5d080c64a93mr2444477a12.31.1732705302188; Wed, 27 Nov 2024 03:01:42 -0800 (PST) Received: from puffmais.c.googlers.com (64.227.90.34.bc.googleusercontent.com. [34.90.227.64]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa50b339612sm693762966b.84.2024.11.27.03.01.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2024 03:01:41 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 27 Nov 2024 11:01:41 +0000 Subject: [PATCH 3/6] arm64: dts: exynos: gs101: phy region for exynos5-usbdrd is larger Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241127-gs101-phy-lanes-orientation-dts-v1-3-5222d8508b71@linaro.org> References: <20241127-gs101-phy-lanes-orientation-dts-v1-0-5222d8508b71@linaro.org> In-Reply-To: <20241127-gs101-phy-lanes-orientation-dts-v1-0-5222d8508b71@linaro.org> To: Catalin Marinas , Will Deacon , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jagan Sridharan , Alim Akhtar Cc: Peter Griffin , Tudor Ambarus , Sam Protsenko , Will McVicker , Roy Luo , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, =?utf-8?q?A?= =?utf-8?q?ndr=C3=A9_Draszik?= X-Mailer: b4 0.13.0 Turns out there are some additional registers in the phy region, update the DT accordingly. Signed-off-by: André Draszik --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index 302c5beb224a..18d4e7852a1a 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -1267,7 +1267,7 @@ cmu_hsi0: clock-controller@11000000 { usbdrd31_phy: phy@11100000 { compatible = "google,gs101-usb31drd-phy"; - reg = <0x11100000 0x0100>, + reg = <0x11100000 0x0200>, <0x110f0000 0x0800>, <0x110e0000 0x2800>; reg-names = "phy", "pcs", "pma"; From patchwork Wed Nov 27 11:01:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 845904 Received: from mail-ej1-f43.google.com (mail-ej1-f43.google.com [209.85.218.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9084A1EE02F for ; Wed, 27 Nov 2024 11:01:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732705308; cv=none; b=jpzYJz1uHDkkl6X60NBYKV0dlVthl0UpJuWI6swDzcuQugUFBp6pRoFGdy+wB8mmd389FXYebXIjwoBo1I5kTMF2eNsWiOhE+A4FBhs96eBdr4cLcUOnAKistRE5j+eTnjODMtEHeP7uOZUZoVAC6Q+8Hnw3/mVAkJ9GclFRJ60= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732705308; c=relaxed/simple; bh=kck+d2QOFZ1QTUsEEtVgD4V3qv1m6CMUYhFTMP5YqAc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GuG7mS5bcAqnEJBDFlIk9wZf09EJ6o501VF20jbyf3QUYwwYpzphAIXQQYfUxmANyqD+trb0tW/jymV+JgC9qT7SaINmXeQmRe4+Qh+p6jxfv4+MOYNAb/DZSuBiUyy6I8j2Anvgov8+nWJzURATQyL3arW8NW6vgNIS+jyqMgM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=q9rQRz9L; arc=none smtp.client-ip=209.85.218.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="q9rQRz9L" Received: by mail-ej1-f43.google.com with SMTP id a640c23a62f3a-aa54adcb894so418987966b.0 for ; Wed, 27 Nov 2024 03:01:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732705304; x=1733310104; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=lE4wmixBBgayLXBCtLCcMeypgTnpcFbWaBYeAtvt70Q=; b=q9rQRz9LMmRiOkxpsDiUxa6F76ChZFOH+HPoGkGkGMCPSrAxQANlE6hLz/oRH0vEVn wyt8hCNUmyklQpNRqkjlVgktGCWbtbalfyAQnbn4auXWAxzTrpukRyD0fvEiH4iGyndw gpKZxhgT1C54Wfrd0LR38xkNIHA+4IAtR64OK5y4xE6MDoSW2584lvSp3r9yEXN3H+3A t7/ATUoMToFvw801jVIVPhS8AkVkKrLIvJTdLq5dv+jMZIB77ygKAI4qbGvI328R0bOT hYmkiOqisgemTYUwO66KxfqbD1H58SW9n53HDyVUEUQS1XNC58SHMeU5+Vv32/rpE5gn ioyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732705304; x=1733310104; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lE4wmixBBgayLXBCtLCcMeypgTnpcFbWaBYeAtvt70Q=; b=UrcuonmV2it4GtZoDPibYLRGM6EbkrktCk1ekfaZTtAKn5kz35KFIwaGZ3ryAbkc85 wsF56RWm/hQeNZdDYkp9mJWarR1XAe3zb0EBAq6NC9gejTy9aJBJHpy6JYEIudZHx7c+ Tgzph8Jekun2xRSBBqhQPhOSjRlo6gxO8dXgyF/KkttuGFmm7+Q9n5uLxDHuQNCyJLYa DwKEn+DhrFJ0CnXGb57bTv3WBBE4bDfwVi34FkQheuHdYOrDucFz5thTq98tWlvENHFg 6dfOaEbZnIzu5D6/lbOWxn+SOor8PPcX6BE+hWToVw7e4yxXReci8DUsGlh2I4A7kUdb BJDw== X-Forwarded-Encrypted: i=1; AJvYcCWb8ZHfXHUxuSlyB5i9GlmwTWAdwX2urhX6QAAwfKbqjynRbTql33u37YwLa0dis+hUUFXEZ7zGh20=@vger.kernel.org X-Gm-Message-State: AOJu0YzlzlZTq1thjQRY+Q+SmOBz6o0r7NuTiU9WuSY+Q3VXqPHCnfVa 9EsIwr7qLbLORYtFOGZXYuA4cXTJmPqM+ciQ+m5Hqua0MzGYISFbNPIZJktCdXY= X-Gm-Gg: ASbGncvHFkr/55hC/jZhss3xe792DJKLC6WUh8pCQ7uK5RSKEv6IkhKqkxu0vZbuTPX n2ZwgcMAQyoBR50Kj8uo9Ht+m9j+N+b4ljxEzbfneR9kmomFLeN0x3JivDPzk3HzXhWEi8EUKEF WD/HbPCd4SEVQhDKh0BbiHc9KMeeENA9etsxPGQ9bgB4inJsygoKojwN3NQBa61fQV/qFZ7iI3+ XD1X/jtGVOatq+h03dRXVsK7nPNJzRvjhqLK6BI17lgl9NITxrNXtFD8UHHM0CTqzmRicB6pK18 WQ/fR7GLf5ieXC7rcsGNkoZEdHmTTC6DyA== X-Google-Smtp-Source: AGHT+IEjfWpzgWvuf2PuWauL4irDzBBYokZtNaKPDwP8hTNSrJiLJvviKNCQ2xOU0CW7rCVG+Drreg== X-Received: by 2002:a17:906:2192:b0:aa5:e01:1471 with SMTP id a640c23a62f3a-aa5810330a4mr150052566b.37.1732705303655; Wed, 27 Nov 2024 03:01:43 -0800 (PST) Received: from puffmais.c.googlers.com (64.227.90.34.bc.googleusercontent.com. [34.90.227.64]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa50b339612sm693762966b.84.2024.11.27.03.01.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2024 03:01:43 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Wed, 27 Nov 2024 11:01:43 +0000 Subject: [PATCH 5/6] arm64: dts: exynos: gs101-oriole: enable Maxim max77759 TCPCi Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241127-gs101-phy-lanes-orientation-dts-v1-5-5222d8508b71@linaro.org> References: <20241127-gs101-phy-lanes-orientation-dts-v1-0-5222d8508b71@linaro.org> In-Reply-To: <20241127-gs101-phy-lanes-orientation-dts-v1-0-5222d8508b71@linaro.org> To: Catalin Marinas , Will Deacon , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jagan Sridharan , Alim Akhtar Cc: Peter Griffin , Tudor Ambarus , Sam Protsenko , Will McVicker , Roy Luo , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, =?utf-8?q?A?= =?utf-8?q?ndr=C3=A9_Draszik?= X-Mailer: b4 0.13.0 On Pixel 6 (and Pro), a max77759 companion PMIC for USB Type-C applications is used, which contains five functional blocks (at distinct I2C addresses): * top * charger * fuel gauge * TCPCi * GPIO The TCPCi is required to detect and handle connector orientation in Pixel's USB PHY driver, and to configure the USB controller's role (host vs device). Signed-off-by: André Draszik --- arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 99 ++++++++++++++++++++++ 1 file changed, 99 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts index 387fb779bd29..5f7be0cb7418 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts +++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts @@ -10,6 +10,7 @@ #include #include +#include #include "gs101-pinctrl.h" #include "gs101.dtsi" @@ -90,6 +91,84 @@ eeprom: eeprom@50 { &hsi2c_12 { status = "okay"; /* TODO: add the devices once drivers exist */ + + usb-typec@25 { + compatible = "maxim,max77759", "maxim,max33359"; + reg = <0x25>; + interrupts-extended = <&gpa8 2 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&typec_int>; + pinctrl-names = "default"; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + power-role = "dual"; + self-powered; + try-power-role = "sink"; + op-sink-microwatt = <2600000>; + new-source-frs-typec-current = ; + slow-charger-loop; + /* + * max77759 operating in reverse boost mode (0xA) can + * source up to 1.5A while extboost can only do ~1A. + * Since extboost is the primary path, advertise 900mA. + */ + source-pdos = ; + sink-pdos = ; + sink-vdos = ; + sink-vdos-v1 = ; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usbc0_orien_sw: endpoint { + remote-endpoint = <&usbdrd31_phy_orien_switch>; + }; + }; + + port@1 { + reg = <1>; + + usbc0_role_sw: endpoint { + remote-endpoint = <&usbdrd31_dwc3_role_switch>; + }; + }; + }; + }; + }; }; &pinctrl_far_alive { @@ -106,6 +185,13 @@ key_volup: key-volup-pins { samsung,pin-pud = ; samsung,pin-drv = ; }; + + typec_int: typec-int-pins { + samsung,pins = "gpa8-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; }; &pinctrl_gpio_alive { @@ -142,9 +228,16 @@ &usbdrd31_dwc3 { role-switch-default-mode = "peripheral"; maximum-speed = "super-speed-plus"; status = "okay"; + + port { + usbdrd31_dwc3_role_switch: endpoint { + remote-endpoint = <&usbc0_role_sw>; + }; + }; }; &usbdrd31_phy { + orientation-switch; /* TODO: Update these once PMIC is implemented */ pll-supply = <®_placeholder>; dvdd-usb20-supply = <®_placeholder>; @@ -153,6 +246,12 @@ &usbdrd31_phy { vdda-usbdp-supply = <®_placeholder>; vddh-usbdp-supply = <®_placeholder>; status = "okay"; + + port { + usbdrd31_phy_orien_switch: endpoint { + remote-endpoint = <&usbc0_orien_sw>; + }; + }; }; &usi_uart {