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Fri, 22 Nov 2024 19:10:20 GMT Received: from hu-krichai-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 22 Nov 2024 11:10:15 -0800 From: Krishna chaitanya chundru Date: Sat, 23 Nov 2024 00:40:00 +0530 Subject: [PATCH v5 2/3] PCI: qcom: Set use_linkup_irq if global IRQ handler is present Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20241123-remove_wait2-v5-2-b5f9e6b794c2@quicinc.com> References: <20241123-remove_wait2-v5-0-b5f9e6b794c2@quicinc.com> In-Reply-To: <20241123-remove_wait2-v5-0-b5f9e6b794c2@quicinc.com> To: Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Konrad Dybcio CC: , , , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , , , , "Krishna chaitanya chundru" X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1732302607; l=1542; i=quic_krichai@quicinc.com; s=20230907; h=from:subject:message-id; bh=ZFOBw3BMKmVGtHb0UcVh69Xu/bqSKbBzvXx11WmbKHM=; b=DOXfm8XYstztEIabuC/cLDFkQtaMpv0Sqc+5ujDinZdWjwyqgy4kxNKI9FEKOp0G7OpG8XDwD +Qru1/8xj6JAuGs/4Gqlt5UimkEA6gG22AJmn4YSeytKCcHCfItHHGD X-Developer-Key: i=quic_krichai@quicinc.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: woxJ4f__5UlQBKRuKLjkZKvG7ImsIuX7 X-Proofpoint-ORIG-GUID: woxJ4f__5UlQBKRuKLjkZKvG7ImsIuX7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 adultscore=0 clxscore=1015 impostorscore=0 suspectscore=0 spamscore=0 bulkscore=0 lowpriorityscore=0 mlxlogscore=889 mlxscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411220161 In cases where a global IRQ handler is present to manage link up interrupts, it may not be necessary to wait for the link to be up during PCI initialization which optimizes the bootup time. So, set use_linkup_irq flag if global IRQ is present and in order to set the use_linkup_irq flag before calling dw_pcie_host_init() call, which waits for link to be up, move platform_get_irq_byname_optional() API above dw_pcie_host_init(). Reviewed-by: Manivannan Sadhasivam Signed-off-by: Krishna chaitanya chundru --- drivers/pci/controller/dwc/pcie-qcom.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index dc102d8bd58c..656d2be9d87f 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1703,6 +1703,10 @@ static int qcom_pcie_probe(struct platform_device *pdev) platform_set_drvdata(pdev, pcie); + irq = platform_get_irq_byname_optional(pdev, "global"); + if (irq > 0) + pp->use_linkup_irq = true; + ret = dw_pcie_host_init(pp); if (ret) { dev_err(dev, "cannot initialize host\n"); @@ -1716,7 +1720,6 @@ static int qcom_pcie_probe(struct platform_device *pdev) goto err_host_deinit; } - irq = platform_get_irq_byname_optional(pdev, "global"); if (irq > 0) { ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, qcom_pcie_global_irq_thread,