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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add pinctrl driver for the TLMM block found in the X1E80100 SoC. Signed-off-by: Neil Armstrong --- drivers/pinctrl/qcom/Kconfig | 7 +++ drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-x1e80100.c | 100 ++++++++++++++++++++++++++++++++ 3 files changed, 108 insertions(+) diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig index 4f93a34281d5327e2bb53e5b628106a1c5227755..d3eb699855103ae586e60afedb571cc93702a4ee 100644 --- a/drivers/pinctrl/qcom/Kconfig +++ b/drivers/pinctrl/qcom/Kconfig @@ -83,6 +83,13 @@ config PINCTRL_QCOM_SM8650 Say Y here to enable support for pinctrl on the Snapdragon SM8650 SoC, as well as the associated GPIO driver. +config PINCTRL_QCOM_X1E80100 + bool "Qualcomm X1E80100 GCC" + select PINCTRL_QCOM + help + Say Y here to enable support for pinctrl on the Snapdragon X1E80100 SoC, + as well as the associated GPIO driver. + endmenu endif diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile index 43d0dd2922253e93510242d66e8b56f9de72ea4e..06d3c95f93a624bd3cccbd8521f37cfa95a5d022 100644 --- a/drivers/pinctrl/qcom/Makefile +++ b/drivers/pinctrl/qcom/Makefile @@ -14,3 +14,4 @@ obj-$(CONFIG_PINCTRL_QCOM_SM8150) += pinctrl-sm8150.o obj-$(CONFIG_PINCTRL_QCOM_SM8250) += pinctrl-sm8250.o obj-$(CONFIG_PINCTRL_QCOM_SM8550) += pinctrl-sm8550.o obj-$(CONFIG_PINCTRL_QCOM_SM8650) += pinctrl-sm8650.o +obj-$(CONFIG_PINCTRL_QCOM_X1E80100) += pinctrl-x1e80100.o diff --git a/drivers/pinctrl/qcom/pinctrl-x1e80100.c b/drivers/pinctrl/qcom/pinctrl-x1e80100.c new file mode 100644 index 0000000000000000000000000000000000000000..2e2f5093272cf8c2a60eecf642ad9c567b539f84 --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-x1e80100.c @@ -0,0 +1,100 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm x1e80100 pinctrl + * + * (C) Copyright 2024 Linaro Ltd. + * + */ + +#include + +#include "pinctrl-qcom.h" + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); + +static const struct pinctrl_function msm_pinctrl_functions[] = { + {"qup2_se5", 1}, + {"gpio", 0}, +}; + +#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ + { \ + .name = pg_name, \ + .ctl_reg = ctl, \ + .io_reg = 0, \ + .pull_bit = pull, \ + .drv_bit = drv, \ + .oe_bit = -1, \ + .in_bit = -1, \ + .out_bit = -1, \ + } + +#define UFS_RESET(pg_name, ctl) \ + { \ + .name = pg_name, \ + .ctl_reg = ctl, \ + .io_reg = ctl + 0x4, \ + .pull_bit = 3, \ + .drv_bit = 0, \ + .oe_bit = -1, \ + .in_bit = -1, \ + .out_bit = 0, \ + } + +static const struct msm_special_pin_data msm_special_pins_data[] = { + [0] = UFS_RESET("ufs_reset", 0xf9000), + [1] = SDC_QDSD_PINGROUP("sdc2_clk", 0xf2000, 14, 6), + [2] = SDC_QDSD_PINGROUP("sdc2_cmd", 0xf2000, 11, 3), + [3] = SDC_QDSD_PINGROUP("sdc2_data", 0xf2000, 9, 0), +}; + +static const char *x1e80100_get_function_name(struct udevice *dev, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *x1e80100_get_pin_name(struct udevice *dev, + unsigned int selector) +{ + if (selector >= 238 && selector <= 241) + snprintf(pin_name, MAX_PIN_NAME_LEN, + msm_special_pins_data[selector - 238].name); + else + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + + return pin_name; +} + +static unsigned int x1e80100_get_function_mux(__maybe_unused unsigned int pin, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +static struct msm_pinctrl_data x1e80100_data = { + .pin_data = { + .pin_count = 242, + .special_pins_start = 238, + .special_pins_data = msm_special_pins_data, + }, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = x1e80100_get_function_name, + .get_function_mux = x1e80100_get_function_mux, + .get_pin_name = x1e80100_get_pin_name, +}; + +static const struct udevice_id msm_pinctrl_ids[] = { + { .compatible = "qcom,x1e80100-tlmm", .data = (ulong)&x1e80100_data }, + { /* Sentinel */ } +}; + +U_BOOT_DRIVER(pinctrl_x1e80100) = { + .name = "pinctrl_x1e80100", + .id = UCLASS_NOP, + .of_match = msm_pinctrl_ids, + .ops = &msm_pinctrl_ops, + .bind = msm_pinctrl_bind, +}; + From patchwork Fri Nov 15 15:44:16 2024 Content-Type: text/plain; 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Fri, 15 Nov 2024 07:44:19 -0800 (PST) From: Neil Armstrong Date: Fri, 15 Nov 2024 16:44:16 +0100 Subject: [PATCH 2/2] qcom_defconfig: enable X1E80100 pinctrl driver MIME-Version: 1.0 Message-Id: <20241115-topic-x1e80100-pinctrl-v1-2-35f984226e47@linaro.org> References: <20241115-topic-x1e80100-pinctrl-v1-0-35f984226e47@linaro.org> In-Reply-To: <20241115-topic-x1e80100-pinctrl-v1-0-35f984226e47@linaro.org> To: Tom Rini , Caleb Connolly , Sumit Garg Cc: u-boot@lists.denx.de, u-boot-qcom@groups.io, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=667; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=jrxg3E1Ktm7qMTsO7msEH1Cuk9ciU0/GrfGse9Qs9SE=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBnN2xRSlCPpl6gI6FWuoZBBeI+PLTPgnFLYurU32np XkCgPu6JAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZzdsUQAKCRB33NvayMhJ0SsyD/ 432fVfhKckUbo1gDHYg4AGeQBCvkFeqzUO/jsddiIpiDMmAiUVF/Bl61oKpukqO0+GfQCEERhcgfLo 5egdQjQyx97djCaeN4P31fh2ZmKQ6IDGaVw0o5/1uwX0RR24cj1phebqJQWmDvs4cbcemRf9aWkPcS vwfzaqG/E6HXF1HaNnCJWwXnxspayo30pz8JuiNNXrb4dH1CU7MlAkmBx0dfYl2vvC0e5S9qNMgRJM c1LJ3s2AWKjNCJ8UQPeUsQtZwAajXBlMFyLUr5/Mk9kAOUvr2Qi1S/FwCjUhs1cApU2OxYfMutJqNb NvJKljlNCj9B7XNdXubDpPI3Idap2UCiNuaa2wdLJXo8rTcZDVDFHkEIcM1gHWRgtU4QLq3YjtEl2L u2HsmW1O6355tdd+KuKfYeKgWDN3f7YRXwACD/BxW4GGkjTbphGlpW2xTdBGEnLe0Ei8uUBzJWhU3m +ur0KxeFBgk0OKYHGIVaQTtR2R5BG1eC6k/+l3us9xnPnvdkDcUHQAVx6YG9sWHcv84HF+q+huNaEk Oc2fJgjY6ECJQos8X12LIwRDJJJSTW1T9sSN/SZH42TEv94fznFxpkTQ/koMjLAS6kfHrYFflyt9FL IRjBfDnkvfOOZjjro7QW8dOSF/mqi9ovMaLWlPgzLAY656Mo9vToNApqiVJg== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Enable the X1E80100 pinctrl driver in the Qualcomm defconfig. Signed-off-by: Neil Armstrong --- configs/qcom_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index ea0dd3e58018c8bf08e4a455a47e29cf1bbd3c60..7e87cbc4dac57c55fa9093b4642e4fa93fb671e8 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -91,6 +91,7 @@ CONFIG_PINCTRL_QCOM_SM8150=y CONFIG_PINCTRL_QCOM_SM8250=y CONFIG_PINCTRL_QCOM_SM8550=y CONFIG_PINCTRL_QCOM_SM8650=y +CONFIG_PINCTRL_QCOM_X1E80100=y CONFIG_DM_PMIC=y CONFIG_PMIC_QCOM=y CONFIG_DM_REGULATOR=y