From patchwork Thu Nov 14 06:37:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Horvath via B4 Relay X-Patchwork-Id: 843275 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F6191CCEE0 for ; Thu, 14 Nov 2024 06:40:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731566452; cv=none; b=TFOkwA8TwZe8qs281S6w65AN1D7ZpSI3JLIKNSYUXcqDRxfukBt8Op2JXhKfJnFohI8+wJ2HXSAsw8TLaf/P8KjIAMQjQapW348SP4Uv+uwwcpEKhl1yfw1hEvoDFwC2FQRIDx/T4BlG8g3GEsb2ppB1jTi3/UT3I7Jpo/YpHw0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731566452; c=relaxed/simple; bh=4nDHDTh3ZpGrmTNGNOC1JgoQNGg6FfopfpXFy0nTkLA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ktDgP/nVcBHaxuKmy3Exv1GJPJcITTwXXSfvNCP9CAXP+XmTjPwccsYJWm4iALa8REheEiXY9SeWHGhUdW8h4iKG6ufSwf7/02USx/B4ciO6KfQwU8hxpxHGI/e0oCuAX80fRUIrBlS2u5RhNNPtONxZJ/4ta2cV1RMKiL4vSTc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=I7WBmvCt; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="I7WBmvCt" Received: by smtp.kernel.org (Postfix) with ESMTPS id 2F646C4CED4; Thu, 14 Nov 2024 06:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731566452; bh=4nDHDTh3ZpGrmTNGNOC1JgoQNGg6FfopfpXFy0nTkLA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=I7WBmvCtR0vtiUbwfX76aAd1jH7oO7OPr/N7Hxsd9tyFw9dqTFb8Ay0NpNsJ2rcOY W+Ou979tO6ypt1QGJKlt/MxoBFQoGIN8ysRJT8F5f+O+AuUTpmB0VAk3PgKhOI10RR M8aboY7BQbsAW/V04/vY+4uV+7klRn7nCFvqNn6RN8rMPEo/WUTzv88skpZ+F9Tyb0 XV8Q0s3Ircd4plei7YmQl0KNNEkY2jF+WeLy89baLvWgJ+Wd4VT1uI3M2Vgyq8JzcQ NPaysQAxyos2AQ2tkkCe8maHSBFULs05+hMeJuIDVJgEnuPczuQhH2Jjh4zq+uhNpM ZL0Hmw7oxX/0w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1BB36D65C46; Thu, 14 Nov 2024 06:40:52 +0000 (UTC) From: Stephen Horvath via B4 Relay Date: Thu, 14 Nov 2024 16:37:35 +1000 Subject: [PATCH 1/6] decode-dimms: Implement DDR5 checksum parsing Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241114-decode-ddr5-v1-1-0ed2db8ef30f@outlook.com.au> References: <20241114-decode-ddr5-v1-0-0ed2db8ef30f@outlook.com.au> In-Reply-To: <20241114-decode-ddr5-v1-0-0ed2db8ef30f@outlook.com.au> To: linux-i2c@vger.kernel.org Cc: Jean Delvare , Stephen Horvath , Guenter Roeck X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2979; i=s.horvath@outlook.com.au; s=2024-05-10; h=from:subject:message-id; bh=4QAYYDVnAHLOSY3cYarYhZv9TKmYHfU0kIsepg5zKVM=; b=owEBbQKS/ZANAwAKAYC8XiInGJ2jAcsmYgBnNZtwQKU+SUFBvzfpk4QnPZ9dbLFo2uh/U8+cw jpgqCojheCJAjMEAAEKAB0WIQTIAeBGYgifSxYwNMiAvF4iJxidowUCZzWbcAAKCRCAvF4iJxid o0tvD/90+QuXjFr/6T6iZvx1L0B5R8iUI7YmnrPQgMs0gQe6CuoQp+SLRqNObnstOrgg9ooMZVh cytPXdDu4aM/FFpPwZw1bRmT1H6SUg2OBUR8Q7+uiPw9D6PKdjLtArgc5CvoJ1wkosThorgHqlO jcpEak90JeRr0zfVZ4kL6BQpeKD/ezK0mAiPwfq3A9XjBWuLpJ5829yo2NAmfyUyQ5au0c+12fi sfzbM4lv2bsWifsUHDtThk/BBjzCnT4Y399Qdk0ZJv86V6dctZPc7Op0YCNr1jj8RatQRX6o6RQ NcfpUVg1lXabFlrv4KoLaXIBLZLNLaoE2ZoGhpGUC3X4TJqQFf+pPa+bqLNR/m/Dh+IsQmASDMZ FdHAFLfbvHvv6hPUi7b6Fjc2tt1AtuEuX84Ca+EjllhtSE+LydkfjkOoTOOHjbKyk8oMPiNnYDZ bGFXSYu9JqS++yDPrlRoaTtFduyG/P/7mGE2AtHTD/+FIJG+iWxdHxYulNSDkKn4BKZMl1YktJh jYFU4L6OA/gUoj1XR0IRc9kKmIAngXMkd59sZCmuPmCzOmHR8CzFtPeAdJsPugFVEqQ9HNwdsYz xlCzQxrmTJsrCEcEbs0RFGxtyT2hCWuH6m4o6tmCMEwoKvKsL5WJOcV5E5jx2YZU61LcgsWh2LU 5tS75bwIF8vcdyQ== X-Developer-Key: i=s.horvath@outlook.com.au; a=openpgp; fpr=C801E04662089F4B163034C880BC5E2227189DA3 X-Endpoint-Received: by B4 Relay for s.horvath@outlook.com.au/2024-05-10 with auth_id=277 X-Original-From: Stephen Horvath Reply-To: s.horvath@outlook.com.au From: Stephen Horvath The code here was mostly written by Guenter Roeck with some modifications for compatibility with other types by me, but it was originally written only to verify that the eeprom is being read correctly while developing spd5118. It looks okay to me, although there might be a better way of figuring out the amount of bytes needed to check the checksum. Link: https://lore.kernel.org/linux-hwmon/efb77b37-30e5-48a8-b4af-eb9995a2882b@roeck-us.net/ Cc: Guenter Roeck Signed-off-by: Stephen Horvath --- eeprom/decode-dimms | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/eeprom/decode-dimms b/eeprom/decode-dimms index 32e840a107cd3425039fcbc6ce317e2ef610acc1..88ebe67d86d52486c8ce439d885fb3f9c89526b6 100755 --- a/eeprom/decode-dimms +++ b/eeprom/decode-dimms @@ -2402,7 +2402,12 @@ sub spd_sizes($) my $bytes = shift; my $type = $bytes->[2]; - if ($type == 12 || $type == 14 || $type == 16 || $type == 17) { + if ($type == 18 || $type == 19 || $type == 20 || $type == 21) { + # DDR5 + my $spd_len = 256 * ((($bytes->[0] >> 4) & 7) + 1); + my $used = $spd_len; + return ($spd_len, $used); + } elsif ($type == 12 || $type == 14 || $type == 16 || $type == 17) { # DDR4 my $spd_len = 256 * (($bytes->[0] >> 4) & 7); my $used = 128 * ($bytes->[0] & 15); @@ -2511,10 +2516,16 @@ sub calculate_crc($$$) sub check_crc($) { my $bytes = shift; + my $is_ddr5 = ($bytes->[0] & 0x70) == 0x30; my $crc_cover = $bytes->[0] & 0x80 ? 116 : 125; + my $crc_start = 126; + if ($is_ddr5) { + $crc_cover = 509; + $crc_start = 510; + } my $crc = calculate_crc($bytes, 0, $crc_cover + 1); - my $dimm_crc = ($bytes->[127] << 8) | $bytes->[126]; + my $dimm_crc = ($bytes->[$crc_start + 1] << 8) | $bytes->[$crc_start]; return ("EEPROM CRC of bytes 0-$crc_cover", ($dimm_crc == $crc) ? 1 : 0, sprintf("0x%04X", $dimm_crc), @@ -2617,7 +2628,8 @@ sub get_dimm_list if ($use_sysfs) { @drivers = ('eeprom', 'at24', - 'ee1004'); # DDR4 + 'ee1004', # DDR4 + 'spd5118'); # DDR5 } else { @drivers = ('eeprom'); $dir = '/proc/sys/dev/sensors'; @@ -2642,7 +2654,8 @@ sub get_dimm_list next unless defined $attr && ($attr eq "eeprom" || $attr eq "spd" || - $attr eq "ee1004"); # DDR4 + $attr eq "ee1004" || # DDR4 + $attr eq "spd5118"); # DDR5 } else { next unless $file =~ /^eeprom-/; } @@ -2684,6 +2697,9 @@ for my $i (0 .. $#dimm) { $dimm[$i]->{chk_spd}, $dimm[$i]->{chk_calc}) = checksum(\@bytes); } else { + if (($bytes[0] & 0x70) == 0x30) { # DDR5's checksum is at 510-511 + push(@bytes, readspd(@bytes, 512, $dimm[$i]->{file})); + } ($dimm[$i]->{chk_label}, $dimm[$i]->{chk_valid}, $dimm[$i]->{chk_spd}, $dimm[$i]->{chk_calc}) = check_crc(\@bytes); From patchwork Thu Nov 14 06:37:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Horvath via B4 Relay X-Patchwork-Id: 843274 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F67F1E884C for ; Thu, 14 Nov 2024 06:40:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731566452; cv=none; b=PwYAMfhZYnVoHqih8uRymhCjrxcNPTqbt/SLYZyoTHdyZoH390IqzMCpgazAzzjLsVs4QyYnhNRcE+EsXOYwtmDhzqkF4Y8FMatHf4WwePkk1dIkEz8bx2WJ7xng8Oe29hNAqTp5gwovzdpFcMwdnYdQrySQiFGTEt+Oxb+zzko= ARC-Message-Signature: i=1; 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a=openpgp; fpr=C801E04662089F4B163034C880BC5E2227189DA3 X-Endpoint-Received: by B4 Relay for s.horvath@outlook.com.au/2024-05-10 with auth_id=277 X-Original-From: Stephen Horvath Reply-To: s.horvath@outlook.com.au From: Stephen Horvath Decode the DRAM's manufacturer data for DDR5. There are more manufacturers in the common and type specific sections, but I decided to limit myself to only reading the 'Manufacturing Information' section of the eeprom. Signed-off-by: Stephen Horvath --- eeprom/decode-dimms | 51 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/eeprom/decode-dimms b/eeprom/decode-dimms index 88ebe67d86d52486c8ce439d885fb3f9c89526b6..b395eafca9ba17725e391e18a70d303c0baaa291 100755 --- a/eeprom/decode-dimms +++ b/eeprom/decode-dimms @@ -2278,6 +2278,48 @@ sub decode_ddr4_mfg_data($) sprintf("0x%02X", $bytes->[349])); } +# Parameter: EEPROM bytes 0-639 (using 512-554) +sub decode_ddr5_mfg_data($) +{ + my $bytes = shift; + + prints("Manufacturer Data"); + + printl("Module Manufacturer", + manufacturer_ddr3($bytes->[512], $bytes->[513])); + + printl_cond(spd_written(@{$bytes}[552..553]), + "DRAM Manufacturer", + manufacturer_ddr3($bytes->[552], $bytes->[553])); + + printl_mfg_location_code($bytes->[514]); + + printl_cond(spd_written(@{$bytes}[515..516]), + "Manufacturing Date", + manufacture_date($bytes->[515], $bytes->[516])); + + printl_mfg_assembly_serial(@{$bytes}[517..520]); + + printl("Part Number", part_number(@{$bytes}[521..550])); + + printl_cond(spd_written(@{$bytes}[551]), + "Revision Code", + sprintf("0x%02X", $bytes->[551])); + + if ($bytes->[554] != 0xff) { + # DRAM Stepping may be a number or an uppercase ASCII letter + # 0x00-0xfe is valid, 0xff is invalid + my $stepping = $bytes->[554]; + if ($stepping < 0x41 || $stepping > 0x5a) { + printl("DRAM Stepping", + sprintf("0x%02X", $stepping)); + } else { + printl("DRAM Stepping", + sprintf("%c", $stepping)); + } + } +} + # Parameter: EEPROM bytes 0-127 (using 64-98) sub decode_manufacturing_information($) { @@ -2828,6 +2870,15 @@ for $current (0 .. $#dimm) { } elsif (!$use_hexdump && $dimm[$current]->{driver} ne "ee1004") { print STDERR "HINT: You should be using the ee1004 driver instead of the $dimm[$current]->{driver} driver\n"; } + } elsif ($type eq "DDR5 SDRAM" || + $type eq "LPDDR5 SDRAM" || + $type eq "DDR5 NVDIMM-P" || + $type eq "LPDDR5X SDRAM") { + if (@bytes >= 640) { + # Decode DDR5-specific manufacturing data in bytes + # 512-639 + decode_ddr5_mfg_data(\@bytes); + } } else { # Decode next 35 bytes (64-98, common to most # memory types) From patchwork Thu Nov 14 06:37:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Horvath via B4 Relay X-Patchwork-Id: 843630 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A87F81E9093 for ; Thu, 14 Nov 2024 06:40:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731566452; cv=none; b=LAQKtI94Mn0XfaZlF2eiK9Nd+LZV3D+mwz4UE/3uRQmW94hhHzjiXU0lpj9C5I5/1iJhvNOLJpocy3CiGVMcRYh4Lg/ziGOR3dtgQRmbYRIqhItaYSCL6bnF4rS/YK19RjjFacCDoBE7ToZJW4vJruEV9/tb20Z4U0XaocR2aFg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Thu, 14 Nov 2024 06:40:52 +0000 (UTC) From: Stephen Horvath via B4 Relay Date: Thu, 14 Nov 2024 16:37:37 +1000 Subject: [PATCH 3/6] decode-dimms: Decode timings and other data for DDR5 Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241114-decode-ddr5-v1-3-0ed2db8ef30f@outlook.com.au> References: <20241114-decode-ddr5-v1-0-0ed2db8ef30f@outlook.com.au> In-Reply-To: <20241114-decode-ddr5-v1-0-0ed2db8ef30f@outlook.com.au> To: linux-i2c@vger.kernel.org Cc: Jean Delvare , Stephen Horvath , Guenter Roeck X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=10006; i=s.horvath@outlook.com.au; s=2024-05-10; h=from:subject:message-id; bh=QQnH74lM3Wn95RbrOayLURRrS0J6h2df26+YO0HbPrQ=; b=owEBbQKS/ZANAwAKAYC8XiInGJ2jAcsmYgBnNZtx5NU01sTpgZ8EEPWSFZb+kf6T0WTWVip7H mBc/YZMc9CJAjMEAAEKAB0WIQTIAeBGYgifSxYwNMiAvF4iJxidowUCZzWbcQAKCRCAvF4iJxid o5pID/9EkLxCxykpBeiKyQ2Yvl6r5rQMLrHUrzOMhfN2KFWvdqX+TvtQScvvfH1qCCNA1fNOjKx N2J0oHkvPGZaSZp0W/M15u6aedIbEioE8UuqGQP4/UxQzclcF1CesjT4GRoBlVnoBuLKJ/E0BlL 3v6IMkV/dZ/xiZaJRi8bTjwHwcyL0wntnxGFrWJ4yRDqyRXj0etL6+NGMd4ksI6llIV5C5al9VC 4rWCTQ1IJvtgCPHLmnZdd3BAKBO6N9zMW+QpiqqiOl4apaPVaK0XVjKqYrPDhUbIWP8SJ9f2dcZ qg98As//COC/st2/bs6+CPTO47VZkGguHBlR7bVyOyyHcBB5oJfWc8vcHc/2o5w526JpBAaoU+i WUU3Wq5o0OFIoHQjD94QFUu5uUYj4jIBLcVeZKBwQFkINpKW60JD6T89SlmWkX5aoNk5Qu90eiD 5+egbHZVb3cTTzDZtnCpOA25ZnB0LTaXg3GK/n8BeKp3WVdGuXlmQUHkJTWP+pgLm2/ymvU0Bk0 8fuSoUNS6kX0J5VGIFA8QYCvYbsQbdw0zvnVikZ50e8Z3RI8gz+YKOOeHyHEv31JcQL3yZVYkLb 6dAyc1eeUJ5BeEB5Awk7OLj7kJaq74JRI5spNzUmyjPLIh5bd8bcuWPs/mqIEy6Hf3QjCV2oX40 NidbjZwiBzpHFAg== X-Developer-Key: i=s.horvath@outlook.com.au; a=openpgp; fpr=C801E04662089F4B163034C880BC5E2227189DA3 X-Endpoint-Received: by B4 Relay for s.horvath@outlook.com.au/2024-05-10 with auth_id=277 X-Original-From: Stephen Horvath Reply-To: s.horvath@outlook.com.au From: Stephen Horvath Decode size, timings, and other data for DDR5. I'm no expert at RAM timings, so I hope it's correct. The values in my BIOS do seem to match up with those here. Although I am a little confused why most of the timings are one cycle less than it seems they should be (e.g. 40-39-39-77, and not 40-40-40-78), but the output is correct (according to BIOS and module specs). There are also more timings that I'd like to add in the future. Signed-off-by: Stephen Horvath --- eeprom/decode-dimms | 230 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 230 insertions(+) diff --git a/eeprom/decode-dimms b/eeprom/decode-dimms index b395eafca9ba17725e391e18a70d303c0baaa291..4a19e962cd1f837ccdb6660caa8d198f65e3fc4f 100755 --- a/eeprom/decode-dimms +++ b/eeprom/decode-dimms @@ -2127,6 +2127,231 @@ sub decode_ddr4_sdram($) } } +# DDR5 Rounding Algorithm +sub ddr5_round($$) +{ + my ($tck, $twr) = @_; + my $correction = 3; # 0.30% per the rounding algorithm + my $new_twr = $twr * (1000 - $correction); + $tck = ($new_twr / $tck) + 1000; + + return $twr / int($tck / 1000); +} + +# Return combined time in ns +sub ddr5_ns($$) +{ + my ($bytes, $index) = @_; + + return (($bytes->[$index + 1] << 8) | $bytes->[$index]) / 1000; +} + +# Parameter: EEPROM bytes 0-639 (using 1-255) +sub decode_ddr5_sdram($) +{ + my $bytes = shift; + my ($ctime, $ctime_max); + my $ii; + + my @module_types = ( + { type => "Reserved (0x00)", }, + { type => "RDIMM", }, + { type => "UDIMM", }, + { type => "SODIMM", }, + { type => "LRDIMM", }, + { type => "CUDIMM", }, + { type => "CSOUDIMM", }, + { type => "MRDIMM", }, + { type => "CAMM2", }, + { type => "Reserved (0x09)", }, + { type => "DDIMM", }, + { type => "Solder down", }, + { type => "Reserved (0x0C)", }, + { type => "Reserved (0x0D)", }, + { type => "Reserved (0x0E)", }, + { type => "Reserved (0x0F)", }, + ); + +# SPD revision + printl("SPD Revision", ($bytes->[1] >> 4) . "." . ($bytes->[1] & 0xf)); + + my $raw_type = $bytes->[3]; + my $type = $raw_type & 0x0f; + printl("Module Type", $module_types[$type]->{type}); + +# time bases + if (($bytes->[19] & 0x03) != 0x00 || ($bytes->[19] & 0xc0) != 0x00) { + print STDERR "Unknown time base values, can't decode\n"; + return; + } + + my $twr = ddr5_ns($bytes, 40); + +# speed + prints("Memory Characteristics"); + + $ctime = ddr5_ns($bytes, 20); + $ctime = ddr5_round($ctime, $twr); + $ctime_max = ddr5_ns($bytes, 22); + $ctime_max = ddr5_round($ctime_max, $twr); + + my $ddrclk = 2 * (1000 / $ctime); + my $tbits = 8 << ($bytes->[235] & 7); + my $pcclk = int ($ddrclk * $tbits / 8); + # Round down to comply with Jedec + $pcclk = $pcclk - ($pcclk % 100); + $ddrclk = int ($ddrclk); + printl("Maximum module speed", "$ddrclk MT/s (PC5-${pcclk})"); + +# Size computation + my $rank_mix = $bytes->[234] & 0x40; + my $sdram_width0 = 4 << (($bytes->[6] >> 5) & 0x07); + my $sdram_width1 = 4 << (($bytes->[10] >> 5) & 0x07); + my $bus_width = 8 << ($bytes->[235] & 0x07); + my $ranks = (($bytes->[234] >> 3) & 0x07) + 1; + my $subchannels = 1 << (($bytes->[235] >> 5) & 0x07); + + my $die_count0 = (($bytes->[4] >> 5) & 0x07) + 1; + my $die_3ds0 = $die_count0 > 2; + if ($die_3ds0) { $die_count0 >>= 1; } + + my $die_count1 = (($bytes->[8] >> 5) & 0x07) + 1; + my $die_3ds1 = $die_count1 > 2; + if ($die_3ds1) { $die_count1 >>= 1; } + + my $die_count = $die_count0 + $die_count1; + my $density0 = ($bytes->[4] & 0x1f) * 4; + my $density1 = ($bytes->[8] & 0x1f) * 4; + + my $cap0 = $subchannels * ($bus_width / $sdram_width0) * $die_count0 * ($density0 / 8) * $ranks; + my $cap1 = $subchannels * ($bus_width / $sdram_width1) * $die_count1 * ($density1 / 8) * $ranks; + my $cap = $cap0 + $cap1; + + printl("Size", $cap . " GB"); + + printl("Banks x Rows x Columns x Bits" . ($rank_mix ? " (Even Rank)" : ""), + join(' x ', (1 << (($bytes->[7] >> 5) & 0x07)) * (1 << ($bytes->[7] & 0x07)), + (( $bytes->[5] & 0x1f) + 16), + ((($bytes->[5] >> 5) & 0x05) + 10), + (8 << ($bytes->[235] & 0x07)))); + + printl_cond($rank_mix, "Banks x Rows x Columns x Bits (Odd Rank)", + join(' x ', (1 << (($bytes->[11] >> 5) & 0x07)) * (1 << ($bytes->[11] & 0x07)), + (( $bytes->[9] & 0x1f) + 16), + ((($bytes->[9] >> 5) & 0x05) + 10), + (8 << ($bytes->[235] & 0x07)))); + + printl("SDRAM Device Width" . ($rank_mix ? " (Even Rank)" : ""), "$sdram_width0 bits"); + printl_cond($rank_mix, "SDRAM Device Width (Odd Rank)", "$sdram_width1 bits"); + + printl("Ranks", $ranks); + printl_cond($ranks > 1, "Rank Mix", + $rank_mix ? "Asymmetrical" : "Symmetrical"); + printl("Primary Bus Width", (8 << ($bytes->[235] & 7))." bits"); + printl_cond($bytes->[235] & 0x18, "Bus Width Extension", (($bytes->[235] & 0x18) >> 1) ." bits"); + + my $taa; + my $trcd; + my $trp; + my $tras; + + $taa = ddr5_ns($bytes, 30); + $trcd = ddr5_ns($bytes, 32); + $trp = ddr5_ns($bytes, 34); + $tras = ddr5_ns($bytes, 36); + + printl("AA-RCD-RP-RAS (cycles)", + ddr4_core_timings(ceil(($taa * 997 / $ctime + 1000) / 1000), + $ctime, $trcd, $trp, $tras)); + +# latencies + my %cas; + my $cas_sup = ($bytes->[28] << 32) + ($bytes->[27] << 24) + + ($bytes->[26] << 16) + ($bytes->[25] << 8) + $bytes->[24]; + my $base_cas = 20; + + for ($ii = 0; $ii < 40; $ii++) { + if ($cas_sup & (1 << $ii)) { + $cas{$base_cas + ($ii * 2)}++; + } + } + printl("Supported CAS Latencies", cas_latencies(keys %cas)); + +# standard DDR5 speeds + prints("Timings at Standard Speeds"); + foreach my $ctime_at_speed (5/22, 5/21, 5/20, 5/19, 5/18, 5/17, 5/16, + 5/15, 5/14, 5/13, 5/12, 5/11, 5/10, 5/9, 5/8) { + my $best_cas = 0; + + + # Find min CAS latency at this speed + for ($ii = 39; $ii >= 0; $ii--) { + next unless ($cas_sup & (1 << $ii)); + if (ceil(($taa * 997 / $ctime_at_speed + 1000) / 1000) <= $base_cas + ($ii * 2)) { + $best_cas = $base_cas + ($ii * 2); + } + } + + printl_cond($best_cas && $ctime_at_speed >= $ctime + && $ctime_at_speed <= $ctime_max, + "AA-RCD-RP-RAS (cycles)" . as_ddr(5, $ctime_at_speed), + ddr4_core_timings($best_cas, $ctime_at_speed, + $trcd, $trp, $tras)); + } + +# more timing information + prints("Timing Parameters"); + + printl("Minimum Cycle Time (tCKmin)", tns3($ctime)); + printl("Maximum Cycle Time (tCKmax)", tns3($ctime_max)); + printl("Minimum CAS Latency Time (tAA)", tns3($taa)); + printl("Minimum RAS to CAS Delay (tRCD)", tns3($trcd)); + printl("Minimum Row Precharge Delay (tRP)", tns3($trp)); + printl("Minimum Active to Precharge Delay (tRAS)", tns3($tras)); + printl("Minimum Active to Auto-Refresh Delay (tRC)", tns3(ddr5_ns($bytes, 38))); + printl("Minimum Recovery Delay (tRFC1)", tns3(ddr5_ns($bytes, 42))); + printl("Minimum Recovery Delay (tRFC2)", tns3(ddr5_ns($bytes, 44))); + printl("Minimum Recovery Delay (tRFCsb)", tns3(ddr5_ns($bytes, 46))); + printl("Minimum Four Activate Window Delay (tFAW)", tns3(ddr5_ns($bytes, 82)) . " (" . $bytes->[84] . " cycles)"); + printl("Minimum Row Active to Row Active Delay (tRRD_L)", tns3(ddr5_ns($bytes, 70)) . " (" . $bytes->[72] . " cycles)"); + printl("Minimum CAS to CAS Delay (tCCD_L)", tns3(ddr5_ns($bytes, 73)) . " (" . $bytes->[75] . " cycles)"); + printl("Minimum Write Recovery Time (tWR)", tns3(ddr5_ns($bytes, 40))); + printl("Minimum Write to Read Time (tWTR_S)", tns3(ddr5_ns($bytes, 88)) . " (" . $bytes->[90] . " cycles)"); + printl("Minimum Write to Read Time (tWTR_L)", tns3(ddr5_ns($bytes, 85)) . " (" . $bytes->[87] . " cycles)"); + +# miscellaneous stuff + prints("Other Information"); + + my $package_type0 = $die_3ds0 ? "3DS" : + $die_count0 > 1 ? "Dual-die package" : + $die_count0 == 1 ? "Monolithic" : "Unknown"; + $package_type0 .= sprintf(" (%u dies)", $die_count0) if $die_count0 >= 2; + printl("Package Type" . ($rank_mix ? " (Even Rank)" : ""), $package_type0); + + my $package_type1 = $die_3ds1 ? "3DS" : + $die_count1 > 1 ? "Dual-die package" : + $die_count1 == 1 ? "Monolithic" : "Unknown"; + $package_type1 .= sprintf(" (%u dies)", $die_count1) if $die_count1 >= 2; + printl_cond($rank_mix, "Package Type (Odd Rank)", $package_type1); + + my $ppr = $bytes->[12] >> 7; + printl("Post Package Repair", + $ppr == 0x00 ? "One row per bank group" : + $ppr == 0x01 ? "One row per bank" : "Unknown"); + printl("Soft PPR Undo/Lock", $bytes->[12] & 0x20 ? + "Supported" : "Not Supported"); + printl("MBIST PPR", $bytes->[12] & 0x02 ? + "Supported" : "Not Supported"); + + printl("Module Nominal Voltage", + ($bytes->[16] & 0xf0) == 0x00 ? "1.1 V" : + ($bytes->[16] & 0x0c) == 0x00 ? "Unknown (1.1 V operable)" : + ($bytes->[16] & 0x03) == 0x00 ? "Unknown (1.1 V endurant)" : "Unknown"); + + printl("Thermal Sensor", + $bytes->[14] & 0x08 ? "Supported" : "No"); +} + # Parameter: EEPROM bytes 0-127 (using 4-5) sub decode_direct_rambus($) { @@ -2177,6 +2402,10 @@ sub decode_rambus($) "DDR4E SDRAM" => \&decode_ddr4_sdram, "LPDDR4 SDRAM" => \&decode_ddr4_sdram, "LPDDR4X SDRAM" => \&decode_ddr4_sdram, + "DDR5 SDRAM" => \&decode_ddr5_sdram, + "LPDDR5 SDRAM" => \&decode_ddr5_sdram, + "DDR5 NVDIMM-P" => \&decode_ddr5_sdram, + "LPDDR5X SDRAM" => \&decode_ddr5_sdram, "Direct Rambus" => \&decode_direct_rambus, "Rambus" => \&decode_rambus, ); @@ -2841,6 +3070,7 @@ for $current (0 .. $#dimm) { "DDR4E SDRAM", "LPDDR3 SDRAM", # 14, 15 "LPDDR4 SDRAM", "LPDDR4X SDRAM", # 16, 17 "DDR5 SDRAM", "LPDDR5 SDRAM", # 18, 19 + "DDR5 NVDIMM-P", "LPDDR5X SDRAM", # 20, 21 ); if ($bytes[2] < @type_list) { $type = $type_list[$bytes[2]]; From patchwork Thu Nov 14 06:37:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Horvath via B4 Relay X-Patchwork-Id: 843629 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BEFC41EABA9 for ; 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a=openpgp; fpr=C801E04662089F4B163034C880BC5E2227189DA3 X-Endpoint-Received: by B4 Relay for s.horvath@outlook.com.au/2024-05-10 with auth_id=277 X-Original-From: Stephen Horvath Reply-To: s.horvath@outlook.com.au From: Stephen Horvath Decode that extra manufacturer information that was mentioned earlier, but only the info that is common between all DDR5 memory modules. Also the physical size is here too. Signed-off-by: Stephen Horvath --- eeprom/decode-dimms | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/eeprom/decode-dimms b/eeprom/decode-dimms index 4a19e962cd1f837ccdb6660caa8d198f65e3fc4f..f36af056a480d429203abc7e0dfda3751027948b 100755 --- a/eeprom/decode-dimms +++ b/eeprom/decode-dimms @@ -2350,6 +2350,42 @@ sub decode_ddr5_sdram($) printl("Thermal Sensor", $bytes->[14] & 0x08 ? "Supported" : "No"); + +# common module information + prints("Common Information"); + + my $spd_info_rev = $bytes->[192]; + printl("SPD Module Info Revision", ($spd_info_rev >> 4) . "." . ($spd_info_rev & 0xf)); + + printl_cond($bytes->[196] & 0x80, + "SPD Manufacturer", + manufacturer_ddr3($bytes->[194], $bytes->[195])); + printl_cond($bytes->[200] & 0x80, + "PMIC0 Manufacturer", + manufacturer_ddr3($bytes->[198], $bytes->[199])); + printl_cond($bytes->[204] & 0x80, + "PMIC1 Manufacturer", + manufacturer_ddr3($bytes->[202], $bytes->[203])); + printl_cond($bytes->[208] & 0x80, + "PMIC2 Manufacturer", + manufacturer_ddr3($bytes->[206], $bytes->[207])); + printl_cond($bytes->[212] & 0xC0, + "Thermal Sensors Manufacturer", + manufacturer_ddr3($bytes->[210], $bytes->[211])); + + prints("Physical Characteristics"); + + my $height = $bytes->[230] & 0x1f; + printl("Module Height", + $height == 0x00 ? "15 mm or less" : + $height == 0x1f ? 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This is completely untested since my modules don't expose this. I also only have UDIMMs. Signed-off-by: Stephen Horvath --- eeprom/decode-dimms | 71 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/eeprom/decode-dimms b/eeprom/decode-dimms index f36af056a480d429203abc7e0dfda3751027948b..a3b613bc869bbd1d8183958c42d05c3b3e3653ca 100755 --- a/eeprom/decode-dimms +++ b/eeprom/decode-dimms @@ -2386,6 +2386,77 @@ sub decode_ddr5_sdram($) (($bytes->[231] >> 4) & 15) + 1)); printl("Module Reference Card", ddr3_reference_card($bytes->[232], $bytes->[232])); + +# type-specific settings + if ($spd_info_rev == 0x11 && + ($type == 0x02 || # UDIMM + $type == 0x03 || # SODIMM + $type == 0x05 || # CUDIMM + $type == 0x06)) { # CSODIMM + prints("Unbuffered Memory Module"); + + printl("Clock driver manufacturer", + manufacturer_ddr3($bytes->[240], $bytes->[241])); + } + + if ($spd_info_rev == 0x11 && + ($type == 0x01 || # RDIMM + $type == 0x04)) { # LRDIMM + prints("Registered Memory Module"); + + printl("Clock driver manufacturer", + manufacturer_ddr3($bytes->[240], $bytes->[241])); + printl("Data buffer manufacturer", + manufacturer_ddr3($bytes->[244], $bytes->[245])); + } + + if ($spd_info_rev == 0x11 && + ($type == 0x07)) { # MRDIMM + prints("Multiplexed Rank Memory Module"); + + printl("Clock driver manufacturer", + manufacturer_ddr3($bytes->[240], $bytes->[241])); + printl("Data buffer manufacturer", + manufacturer_ddr3($bytes->[244], $bytes->[245])); + } + + if ($spd_info_rev == 0x10 && + ($type == 0x0A)) { # DDIMM + prints("Differential Memory Module"); + + printl("Memory buffer manufacturer", + manufacturer_ddr3($bytes->[240], $bytes->[241])); + } + + if ($spd_info_rev == 0x01 && + ($raw_type & 0xf0 == 0x90)) { # NVDIMM-N + prints("Non-Volatile Memory Module"); + + printl("Clock driver manufacturer", + manufacturer_ddr3($bytes->[240], $bytes->[241])); + printl("Data buffer manufacturer", + manufacturer_ddr3($bytes->[244], $bytes->[245])); + } + + if ($spd_info_rev == 0x10 && + ($raw_type & 0xf0 == 0xA0)) { # NVDIMM-P + prints("Non-Volatile Memory Module"); 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a=openpgp-sha256; l=5999; i=s.horvath@outlook.com.au; s=2024-05-10; h=from:subject:message-id; bh=A8O/ruVMqwOn599M2htEJdweuap0U7q1Y3nIc9FO6VI=; b=owEBbQKS/ZANAwAKAYC8XiInGJ2jAcsmYgBnNZtyNKNq45T8D41/g4BA/TiL5/A4pNuGwAhnp ONb1jhD7jSJAjMEAAEKAB0WIQTIAeBGYgifSxYwNMiAvF4iJxidowUCZzWbcgAKCRCAvF4iJxid o+cID/9uVzU3YRJQcjwNMelgsPAxItzMLT5a0jknUCpYjQwu82DUxQ7A+BJWhD0HwYBRhJmQVy2 80v8eVivffheveIujhnXCwUKQearVPaAYiEG8Sf+ph079ZqO4slgPKPKUds7utb2mF3jgP9DS4J FXMQw/jJtnrBDNgeK+4nk8Y1OpzdazjgO2mxgL1FH2jzj8yrxr9k1a1M2bTFGJiuwodW9s8iOWI P9ZZYVlXKlv6R+iHnnMm+U8sch8e75fZMx4XX7lmoQjQsZtE43o1yZ63OIm85vjzIkC4jXKS2vC CMoG3GFFz8SX99Oa0UePjVhWtNNbDJvsj/qerOFcNNVP2erj+At4G4KTh1CgjiDUHgt6cvxVR/t 2V7QXC1xlCiE6D2IkmBrKxTrcrjiJHzJJDI2K+STyZ87nrZDbL5/sb94VOwuFyvBTiQ4J7bd1+W C5SQr8bS7hiRjvfT9MH5G05NuXb5cfHGcn0yy3kFSz/2jOOGFwbi5ew8KrGmwdWgkPpxSgrjX4d 2fQ0WO6f5ocht55OjUp+51TXGoG4D9NT2vrB0t2rtWtGpnHNKesXmA/uewB2CgE4U7/zRCHHdsY 5nyltzAJFNWXpG9gJm+9lseUZgSOoLtTDs2FpQ1YKi+BhjI13Jxm6DQHTdt+tHGV42MFcjnW2Xw +cXXQRytDc40Q0Q== X-Developer-Key: i=s.horvath@outlook.com.au; a=openpgp; fpr=C801E04662089F4B163034C880BC5E2227189DA3 X-Endpoint-Received: by B4 Relay for s.horvath@outlook.com.au/2024-05-10 with auth_id=277 X-Original-From: Stephen Horvath Reply-To: s.horvath@outlook.com.au From: Stephen Horvath JESD400 specifies that an error log can be written to anywhere in the end user programmable eeprom section, following a specific format. This adds some code to find and read this error log. This is also completely untested on actual hardware implementations, only tested by reading some manually constructed files. Signed-off-by: Stephen Horvath --- eeprom/decode-dimms | 105 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/eeprom/decode-dimms b/eeprom/decode-dimms index a3b613bc869bbd1d8183958c42d05c3b3e3653ca..a6a16696b126b16b7a8e62b15120f99789d9b762 100755 --- a/eeprom/decode-dimms +++ b/eeprom/decode-dimms @@ -2656,6 +2656,108 @@ sub decode_ddr5_mfg_data($) } } +# Parameter: EEPROM bytes 0-1023 (using 640-1023) +sub decode_ddr5_error_data($) +{ + my $bytes = shift; + + # Zero or more error logs may appear anywhere in any End User Programmable blocks of the SPD, + # including over SPD Block boundaries. They may be found by searching for a four byte anchor string. + + my $errors = []; + + my $size = scalar @{$bytes} < 1023 ? scalar @{$bytes} : 1023; + + for (my $ii = 0; $ii < $size - 640 - 23; $ii++) { + if (join('', @{$bytes}[640 + $ii .. 640 + $ii + 3]) eq "95707695") { + push @{$errors}, [@{$bytes}[640 + $ii .. 640 + $ii + 23]]; + $ii += 23; + } + } + + if (@{$errors} == 0) { + # No error logs found + return; + } + + prints("Error Log"); + + printl("Error Log Count", scalar @{$errors}); + + for (my $ii = 0; $ii < scalar @{$errors}; $ii++) { + my $error = @{$errors}[$ii]; + + # error location + printl_cond($error->[4] & (1 << 0), "Error $ii Type", "DRAM Uncorrectable Error"); + printl_cond($error->[4] & (1 << 1), "Error $ii Type", "DRAM Correctable Error"); + printl_cond($error->[4] & (1 << 2), "Error $ii Type", "DRAM ECS Error"); + printl_cond($error->[4] & (1 << 3), "Error $ii Type", "hPPR Was Required"); + printl_cond($error->[4] & (1 << 4), "Error $ii Type", "hPPR Resource Error"); + + printl("Error $ii Location CPU", ($error->[5] >> 3) & 0x07); + printl("Error $ii Location CPUMC", (($error->[5] & 3) << 2) | ($error->[6] >> 6)); + printl("Error $ii Location DIMM", ($error->[6] >> 4) & 0x01); + + # these are active low + printl_cond(~$error->[6] & (1 << 3), "Error $ii Location Rank", "0 (sub-channel A)"); + printl_cond(~$error->[6] & (1 << 2), "Error $ii Location Rank", "1 (sub-channel A)"); + printl_cond(~$error->[6] & (1 << 1), "Error $ii Location Rank", "0 (sub-channel B)"); + printl_cond(~$error->[6] & (1 << 0), "Error $ii Location Rank", "1 (sub-channel B)"); + + printl("Error $ii Location Parity", ($error->[7] >> 6) & 0x01); + if (($error->[7] >> 5) & 1) { + # chip identifier? + printl("Error $ii Location Chip", ($error->[7] >> 2) & 0x07); + } else { + # row address? + printl("Error $ii Location Bank Group", (($error->[7] & 0x03) << 1) | (($error->[8] & 0x80) >> 7)); + printl("Error $ii Location Bank Address", ($error->[8] >> 5) & 0x03); + printl("Error $ii Location Row Address", (($error->[8] & 0x1f) << 12) | ($error->[9] << 4) | ($error->[10] >> 4)); + printl("Error $ii Location Column Address", (($error->[10] & 0x0f) << 7) | (($error->[11] & 0xf0) >> 1)); + } + + # also active low + printl_cond(~$error->[11] & (1 << 0), "Error $ii Location Device", "DQS6A"); + printl_cond(~$error->[11] & (1 << 1), "Error $ii Location Device", "DQS7A"); + printl_cond(~$error->[11] & (1 << 2), "Error $ii Location Device", "DQS8A"); + printl_cond(~$error->[11] & (1 << 3), "Error $ii Location Device", "DQS9A"); + + printl_cond(~$error->[12] & (1 << 0), "Error $ii Location Device", "DQS8B"); + printl_cond(~$error->[12] & (1 << 1), "Error $ii Location Device", "DQS9B"); + printl_cond(~$error->[12] & (1 << 2), "Error $ii Location Device", "DQS0A"); + printl_cond(~$error->[12] & (1 << 3), "Error $ii Location Device", "DQS1A"); + printl_cond(~$error->[12] & (1 << 4), "Error $ii Location Device", "DQS2A"); + printl_cond(~$error->[12] & (1 << 5), "Error $ii Location Device", "DQS3A"); + printl_cond(~$error->[12] & (1 << 6), "Error $ii Location Device", "DQS4A"); + printl_cond(~$error->[12] & (1 << 7), "Error $ii Location Device", "DQS5A"); + + printl_cond(~$error->[12] & (1 << 0), "Error $ii Location Device", "DQS0B"); + printl_cond(~$error->[12] & (1 << 1), "Error $ii Location Device", "DQS1B"); + printl_cond(~$error->[12] & (1 << 2), "Error $ii Location Device", "DQS2B"); + printl_cond(~$error->[12] & (1 << 3), "Error $ii Location Device", "DQS3B"); + printl_cond(~$error->[12] & (1 << 4), "Error $ii Location Device", "DQS4B"); + printl_cond(~$error->[12] & (1 << 5), "Error $ii Location Device", "DQS5B"); + printl_cond(~$error->[12] & (1 << 6), "Error $ii Location Device", "DQS6B"); + printl_cond(~$error->[12] & (1 << 7), "Error $ii Location Device", "DQS7B"); + + # timestamp + my $year = ($error->[14] >> 2) + 2020; + my $month = (($error->[14] & 0x03) << 2) | ($error->[15] >> 6); + my $day = ($error->[15] & 0x3e) >> 1; + my $hour = (($error->[15] & 0x01) << 4) | ($error->[16] >> 4); + my $minute = (($error->[16] & 0x0f) << 2) | ($error->[17] >> 6); + my $second = $error->[17] & 0x3f; + printl("Error $ii Timestamp", sprintf("%04d-%02d-%02d %02d:%02d:%02d", + $year, $month, $day, $hour, $minute, $second)); + + # DRAM refresh settings + # TODO + + # measured temperature + # TODO + } +} + # Parameter: EEPROM bytes 0-127 (using 64-98) sub decode_manufacturing_information($) { @@ -3215,6 +3317,9 @@ for $current (0 .. $#dimm) { # Decode DDR5-specific manufacturing data in bytes # 512-639 decode_ddr5_mfg_data(\@bytes); + # Decode DDR5-specific error log + # 640-1023 (max) + decode_ddr5_error_data(\@bytes); } } else { # Decode next 35 bytes (64-98, common to most