From patchwork Wed Nov 13 09:37:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xianwei Zhao via B4 Relay X-Patchwork-Id: 842993 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 30A021F77AC; Wed, 13 Nov 2024 09:37:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731490656; cv=none; b=hPuEWSkJGrYAjtiGb+k1AzidyEWkPLGgR9jn+kNqGmkcO6O3zfmX/5XlIxTfrm6XdztZcCf7j3bUZpD7r0ODQDK8218wV3VdXi/GmgFqExDvu82SIYO5fGwARf3aN+o+tAW5PHs+T8z6jVMvXm8J4tSrgTNGjr8Syb9WonidHvU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731490656; c=relaxed/simple; bh=8TOv1Z5OyPH3FzN2qQ0QJp6OTICIwjthX/si2CeYrbw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=iL5zcveZ/DpS1grMELx7Q4xydEuVlLYtk2sYe1V7R7V0ztl79uKwu5r4gxdMutkXziAmcNqZPI290SuFH1B69pwHvAZurridwOmNYuw+o1JcwXbXiLH0rVVIGUFGuLKi6iO0DvYEmZamx5ksw7QSsEho1+6HBdVLQpsg7F9f5co= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=gEY6ye42; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="gEY6ye42" Received: by smtp.kernel.org (Postfix) with ESMTPS id D81B5C4CED8; Wed, 13 Nov 2024 09:37:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731490655; bh=8TOv1Z5OyPH3FzN2qQ0QJp6OTICIwjthX/si2CeYrbw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=gEY6ye42h+QP1DKU3EHWQ4r29J9fqJ5z3ykGlFr83XMAlUCbTF1GylEGA0sAotw3t xVKHWuY/5+aM8Lcj/Pnsp6F5uGThnI4LNb0JxqNSfs9JZKWRMQK7eMjEAggYwBhv5Y JOYx4cZhgEGMUQuuvv9lJeAGnQoME+fDsOp7Hka4zWpig2BW2NvglUT4ewiXIP3pwi iTd/zl85gMtZ/rkAoYwnPjlZyRxI0i5lN9FYEH+58Rr3MpDxEyKZN1YT55bT/vYNAj aC69fjhCfE3uNTQ/TQV52m9Gtrt1te4Luo5yTZM6RN8mR2+iptPs2RypaTqg93p1HT 8AFnIF/oTEh2Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CCBBDD41C2A; Wed, 13 Nov 2024 09:37:35 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Wed, 13 Nov 2024 17:37:30 +0800 Subject: [PATCH v7 3/5] pinctrl: meson: add interface of of_xlate Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241113-a4_pinctrl-v7-3-0546a20c1c22@amlogic.com> References: <20241113-a4_pinctrl-v7-0-0546a20c1c22@amlogic.com> In-Reply-To: <20241113-a4_pinctrl-v7-0-0546a20c1c22@amlogic.com> To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Bartosz Golaszewski Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Xianwei Zhao X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1731490653; l=1754; i=xianwei.zhao@amlogic.com; s=20231208; h=from:subject:message-id; bh=kZkfTxXyUa/bUEnikqRrRpqnocDlXw3ORsFp/T0SNwU=; b=oyTkOMvKCa2cVjlY8hKd3hAxrbJwp8YiBEVVLREl9rTCfaX7670T1XHpd6Gn8jhqZlrNnw3Dp jY4hQwnxHW+BvZuHsgwrLIpDMHI23qxbIJ3iyyIWmdK/oZYc50MpOYG X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=o4fDH8ZXL6xQg5h17eNzRljf6pwZHWWjqcOSsj3dW24= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20231208 with auth_id=107 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Amlogic pinctrl software framework use system API of_gpio_simple_xlate which only support linear one-to-one correspondence to translate gpiospec to the GPIO number and flags before. It can not meet the non-linear needs. Add the interface satisfies the underlying driver to implement the transformation to meet the needs of various scenarios. Reviewed-by: Neil Armstrong Signed-off-by: Xianwei Zhao --- drivers/pinctrl/meson/pinctrl-meson.c | 4 ++++ drivers/pinctrl/meson/pinctrl-meson.h | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index 253a0cc57e39..fc0c0bef38c0 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -620,6 +620,10 @@ static int meson_gpiolib_register(struct meson_pinctrl *pc) pc->chip.base = -1; pc->chip.ngpio = pc->data->num_pins; pc->chip.can_sleep = false; + if (pc->data->of_xlate) { + pc->chip.of_gpio_n_cells = pc->data->of_gpio_n_cells; + pc->chip.of_xlate = pc->data->of_xlate; + } ret = gpiochip_add_data(&pc->chip, pc); if (ret) { diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h index 7883ea31a001..cbb3f22552b9 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.h +++ b/drivers/pinctrl/meson/pinctrl-meson.h @@ -120,6 +120,10 @@ struct meson_pinctrl_data { const struct pinmux_ops *pmx_ops; const void *pmx_data; int (*parse_dt)(struct meson_pinctrl *pc); + int (*of_xlate)(struct gpio_chip *gc, + const struct of_phandle_args *gpiospec, + u32 *flags); + int of_gpio_n_cells; }; struct meson_pinctrl { From patchwork Wed Nov 13 09:37:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xianwei Zhao via B4 Relay X-Patchwork-Id: 842992 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E06C1F8181; Wed, 13 Nov 2024 09:37:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731490656; cv=none; b=IxCVWyEuI5hcfzDtrTnsT87ljNbbhzPxH13qwrMj4aZq1llKlsgsJsity4jiAYrJoLoMxGm3w7BifaMxw1myrWLed8Qp1jZQDehq6cnNIz4D5M2lO43NFJ1htVT14g9FwVDzb0cpe7Lc+9o7YsE04wEJb82ZevjQHFodAJlN544= ARC-Message-Signature: i=1; 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b=XiKqSUHLDjA6Tzt2f5SPY3sJde3lPOrmOpU3HZxIxwCbpVpPAb+BikJ4a1N3TCXNM 6bbKEl9vIM5u//JwkzJXH02WpJR0zLceVNPeJ4eb3JXAWHwRZqXykKqP9Gnt9AoGy+ j6csyDjy1xAcElkcRJbQWg7Bxch+0yfVDaoc/rHHPhz7mD0aj1ZKvwpmyaxtFfyJql aPAKMdhokXAcFICMfbBmEaZPRq/8V6PqGImFvf0NtFRtDT/paHOKc/FiGgJhALAzaF Lf24WwjXtU/CejQ6Jv9OIH2jt4ldUYrk99ImPGivT4LPCRDMZzdtinLv92miF/Aay1 +DAgrfxlvgBmg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00195D41C26; Wed, 13 Nov 2024 09:37:35 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Wed, 13 Nov 2024 17:37:32 +0800 Subject: [PATCH v7 5/5] arm64: dts: amlogic: a4: add pinctrl node Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241113-a4_pinctrl-v7-5-0546a20c1c22@amlogic.com> References: <20241113-a4_pinctrl-v7-0-0546a20c1c22@amlogic.com> In-Reply-To: <20241113-a4_pinctrl-v7-0-0546a20c1c22@amlogic.com> To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Bartosz Golaszewski Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Xianwei Zhao X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1731490653; l=1622; i=xianwei.zhao@amlogic.com; s=20231208; h=from:subject:message-id; bh=BwmmxNbUHc87jVbNysKI2HGP1eTeZdpPlPo2pspjE6Y=; b=hn2p1wGZPfsXzU3Bx5wf7JMYkfyqeofIhyhq1sVoKupzAstVpSTr/QNt5Byp5/Nmm8EmodgyD FLLm00mF8YTBhXAYtT04iaM/UEpYoOIAFZTIQ87PBqeGY+wR6vPUKdv X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=o4fDH8ZXL6xQg5h17eNzRljf6pwZHWWjqcOSsj3dW24= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20231208 with auth_id=107 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add pinctrl device to support Amlogic A4. Reviewed-by: Neil Armstrong Signed-off-by: Xianwei Zhao --- arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 36 +++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi index de10e7aebf21..a176faf7f1ef 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi @@ -5,6 +5,7 @@ #include "amlogic-a4-common.dtsi" #include +#include / { cpus { #address-cells = <2>; @@ -48,3 +49,38 @@ pwrc: power-controller { }; }; }; + +&apb { + periphs_pinctrl: pinctrl@4000 { + compatible = "amlogic,a4-periphs-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0x4000 0x0 0x02e0>; + + gpio: bank@0 { + reg = <0x0 0x0 0x0 0x0050>, + <0x0 0xc0 0x0 0x0220>; + reg-names = "mux", "gpio"; + gpio-controller; + #gpio-cells = <3>; + gpio-ranges = <&periphs_pinctrl 0 0 73>; + }; + }; + + aobus_pinctrl: pinctrl@8e700 { + compatible = "amlogic,a4-aobus-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0x8e700 0x0 0x0064>; + + ao_gpio: bank@0 { + reg = <0x0 0x00 0x0 0x04>, + <0x0 0x04 0x0 0x60>; + reg-names = "mux", "gpio"; + gpio-controller; + #gpio-cells = <3>; + gpio-ranges = <&aobus_pinctrl 0 0 8>; + }; + }; + +};