From patchwork Mon Dec 9 17:59:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 181069 Delivered-To: patch@linaro.org Received: by 2002:ac9:44c4:0:0:0:0:0 with SMTP id t4csp4457964och; Mon, 9 Dec 2019 10:02:05 -0800 (PST) X-Google-Smtp-Source: APXvYqw4H3vZzpoqk/A0th/Zlac57NxkqxIvTH4VzirA58Ti2RFF/Gz4cmdRTUbnbuxHc30Z61nG X-Received: by 2002:aca:3a06:: with SMTP id h6mr221678oia.137.1575914525210; Mon, 09 Dec 2019 10:02:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1575914525; cv=none; d=google.com; s=arc-20160816; b=V5DX0TC+pjVt+QNG1vFu8oTdGtOcasiqHEhUdcz/vcgIe8mVEYHWObycxVf3UV0GrT XFGrjaqYQHu/qjWoHbCRbQDES+hwfHxesKC/XQDLNtFeENDTXB/mkWnWYv0LxulBsl9E piEKIPaclJ1mKlOW2AjwNB6bS29fHetigh9vcrxCFMw+AVnqqE3CXYWFPALQ/qvtk6L8 vqXHQKabADvh1/cJkjCDYAES6dM7mZ2wkEC+phzgEy6ELWTx6WjezvzbC/yE/yb2X3/2 QJk4RY/EC8XgouWcqj2UsUzht4ftQDjLafAIISWam4FZlX514GXnrVDE+m3M3QXH/zbe REeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=r1x+K9BBhHJjUmtI42e6rQHLTAqUvvujoQEGWOph+/4=; b=XuTyhhfrtWGPAHtvYXkW57oQnzMbQY5yzbb7MuroyeuU4RvYHKYBCa2EPhJbE2RDS1 MriPPvfHXUNEq6/ffDdkzF771ogDVh2o1Hoy1CFeOMKr/LH9qrcpQBLUzbip+soC4W5Q PccLiQrDFCHA0iaKVRuq1xYGuXZzqgFnyylhg2rw5pBQFfveBmd04YdVpTetiqUMrkJw Aij311nnxhl5dtQyGG/vBqvRIaM3gp5z+tuvxUROb7WY12YJbRZw4bfPFEomYD6NY5vB sLZLvsAzaHWNZ1K3Rh67BBNuurJh9G0TZpJxvjletcxjbXfq7QrhSzzLMU3f0/+alu3e FGOA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=v0eXCYon; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o128si332264oih.66.2019.12.09.10.02.04; Mon, 09 Dec 2019 10:02:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=v0eXCYon; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726883AbfLISCC (ORCPT + 27 others); Mon, 9 Dec 2019 13:02:02 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:57968 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726801AbfLISB7 (ORCPT ); Mon, 9 Dec 2019 13:01:59 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id xB9I1s2R064516; Mon, 9 Dec 2019 12:01:54 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1575914514; bh=r1x+K9BBhHJjUmtI42e6rQHLTAqUvvujoQEGWOph+/4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=v0eXCYonH74/2VVsw1SFbu1UR3W+0COpFoMxyMttI+NaUjX2BAf4NdAJvrQKxOpsM FcEkTumKzW+9rjIEatkLE9HDrBBBTRed3YE9CzO9SwjkfZO7pZpbaaztSkG/4USsJO 4FlBG2/oEiqjeybiekSFuEB1zFHNRs2DFJXWc82g= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id xB9I1slb024438; Mon, 9 Dec 2019 12:01:54 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Mon, 9 Dec 2019 12:01:52 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Mon, 9 Dec 2019 12:01:52 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xB9I1qdD057952; Mon, 9 Dec 2019 12:01:52 -0600 From: Dan Murphy To: , , , CC: , , , , Dan Murphy , Rob Herring Subject: [PATCH net-next v2 1/2] dt-bindings: dp83867: Convert fifo-depth to common fifo-depth and make optional Date: Mon, 9 Dec 2019 11:59:42 -0600 Message-ID: <20191209175943.23110-2-dmurphy@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191209175943.23110-1-dmurphy@ti.com> References: <20191209175943.23110-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the ti,fifo-depth from a TI specific property to the common tx-fifo-depth property. Also add support for the rx-fifo-depth. These are optional properties for this device and if these are not available then the fifo depths are set to device default values. Signed-off-by: Dan Murphy Reported-by: Adrian Bunk CC: Rob Herring --- Documentation/devicetree/bindings/net/ti,dp83867.txt | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) -- 2.23.0 diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt index 388ff48f53ae..44e2a4fab29e 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83867.txt +++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt @@ -8,8 +8,6 @@ Required properties: - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h for applicable values. Required only if interface type is PHY_INTERFACE_MODE_RGMII_ID or PHY_INTERFACE_MODE_RGMII_TXID - - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h - for applicable values Note: If the interface type is PHY_INTERFACE_MODE_RGMII the TX/RX clock delays will be left at their default values, as set by the PHY's pin strapping. @@ -42,6 +40,14 @@ Optional property: Some MACs work with differential SGMII clock. See data manual for details. + - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h + for applicable values (deprecated) + + -tx-fifo-depth - As defined in the ethernet-controller.yaml. Values for + the depth can be found in dt-bindings/net/ti-dp83867.h + -rx-fifo-depth - As defined in the ethernet-controller.yaml. Values for + the depth can be found in dt-bindings/net/ti-dp83867.h + Note: ti,min-output-impedance and ti,max-output-impedance are mutually exclusive. When both properties are present ti,max-output-impedance takes precedence. @@ -55,7 +61,7 @@ Example: reg = <0>; ti,rx-internal-delay = ; ti,tx-internal-delay = ; - ti,fifo-depth = ; + tx-fifo-depth = ; }; Datasheet can be found: