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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381fbf416c6sm7670380f8f.54.2024.11.12.10.10.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:10:55 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 01/20] hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit Date: Tue, 12 Nov 2024 19:10:25 +0100 Message-ID: <20241112181044.92193-2-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All these MemoryRegionOps read() and write() handlers are implemented expecting 32-bit accesses. Clarify that setting .impl.min/max_access_size fields. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson --- hw/char/xilinx_uartlite.c | 4 ++++ hw/intc/xilinx_intc.c | 4 ++++ hw/net/xilinx_ethlite.c | 4 ++++ hw/timer/xilinx_timer.c | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c index f325084f8b..3022b3d8ef 100644 --- a/hw/char/xilinx_uartlite.c +++ b/hw/char/xilinx_uartlite.c @@ -170,6 +170,10 @@ static const MemoryRegionOps uart_ops = { .read = uart_read, .write = uart_write, .endianness = DEVICE_NATIVE_ENDIAN, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + }, .valid = { .min_access_size = 1, .max_access_size = 4 diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c index 6e5012e66e..8fb6b4f1a5 100644 --- a/hw/intc/xilinx_intc.c +++ b/hw/intc/xilinx_intc.c @@ -144,6 +144,10 @@ static const MemoryRegionOps pic_ops = { .read = pic_read, .write = pic_write, .endianness = DEVICE_NATIVE_ENDIAN, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + }, .valid = { .min_access_size = 4, .max_access_size = 4 diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index bd81290808..e84b4cdd35 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -170,6 +170,10 @@ static const MemoryRegionOps eth_ops = { .read = eth_read, .write = eth_write, .endianness = DEVICE_NATIVE_ENDIAN, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + }, .valid = { .min_access_size = 4, .max_access_size = 4 diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c index 32a9df69e0..383fc8b3c8 100644 --- a/hw/timer/xilinx_timer.c +++ b/hw/timer/xilinx_timer.c @@ -193,6 +193,10 @@ static const MemoryRegionOps timer_ops = { .read = timer_read, .write = timer_write, .endianness = DEVICE_NATIVE_ENDIAN, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + }, .valid = { .min_access_size = 4, .max_access_size = 4 From patchwork Tue Nov 12 18:10:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842706 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3715956wru; Tue, 12 Nov 2024 10:12:32 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCW4dKBPQPM2zH/njgj3lDoWoS8LMn/jLnW7pZZbTLhglYniF9lWH/3/zbxC5VDvk5aZsciUWg==@linaro.org X-Google-Smtp-Source: AGHT+IHLBUQXhAZjasAJAmAJChUcv48rLycMA83VQ87zKAB750KaZIYTcp16JKmkp5TzfuXGmTHW X-Received: by 2002:a05:620a:19a9:b0:7b1:51df:115a with SMTP id af79cd13be357-7b331f20cfemr2794440085a.49.1731435151856; Tue, 12 Nov 2024 10:12:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435151; cv=none; d=google.com; s=arc-20240605; b=KgA+q68Dl3YPEomcZLY6jkViumjNW7JPR6jyfeOhfHSj1L+hTuoVLq3HYNXyEPfUk4 pxVYWedBCPgAU/yhx/ciO+DIeVbR1gax+pSyVh7lHKqgy0LqGBOE3SirszulCgPbCFv9 1u0hgKPR2rt/DbbdiC9dz1YGIaICOIa1b/IjcN7DllkyDrIGs8ABGh3BJq2Ao+fOh9vL cQtwsyum6jzcCkGDtIW8Ur486VMXP1p1w3D9RrfgnEznIJfdXhA2/KJYkTQ4RpHtr6J5 ackTtgjSJS/77c3Lf0rZtBKq3kPuIksknuj09KVYrgAZrFvyQtBwKFXHClx5vMUoVmNp f5jw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ZQmPPVoGs75Oc0X7p2l9C1PUIeVlzMNRobjeBMri9rg=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=VxcDYX4jI9/O2wSpFTqZjAfKBzkkhV6sFZ1HhCt63H3DYNn9VqfhbXoHAw7RmNkIq4 1c3DyJNnWW2dpaqN1OWEgtrD2pkLpKmrxoiUvlbIIOgfhGmR9aREV/SjHvaz/S6fUgdu U4P+jPO+iUm8+bFQZ4tmo490fzhKP+zHBWz8Cvnjl4OSZxgv5WsU1f4LyMgMvWOik3Fb 3MSH++blaNuNW3O2w5GsbA5LS2LKZGaP9Ie4eOzTAqR4zsEkCb8QsCh711zX0fIVBovC VNNTWN3UimTy1hK2QmBiKBCPsU3eRMO6xGy9MEu1GATA57fjmJnZPmYadgHu2ma4QI7e 6YRA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Bkuy9+OP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432aa737c86sm262860325e9.38.2024.11.12.10.10.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:11:01 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 02/20] hw/net/xilinx_ethlite: Convert some debug logs to trace events Date: Tue, 12 Nov 2024 19:10:26 +0100 Message-ID: <20241112181044.92193-3-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12e; envelope-from=philmd@linaro.org; helo=mail-lf1-x12e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 5 +++-- hw/net/trace-events | 4 ++++ 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index e84b4cdd35..bb330a233f 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -30,6 +30,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "net/net.h" +#include "trace.h" #define D(x) #define R_TX_BUF0 0 @@ -198,13 +199,13 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) return size; if (s->regs[rxbase + R_RX_CTRL0] & CTRL_S) { - D(qemu_log("ethlite lost packet %x\n", s->regs[R_RX_CTRL0])); + trace_ethlite_pkt_lost(s->regs[R_RX_CTRL0]); return -1; } D(qemu_log("%s %zd rxbase=%x\n", __func__, size, rxbase)); if (size > (R_MAX - R_RX_BUF0 - rxbase) * 4) { - D(qemu_log("ethlite packet is too big, size=%x\n", size)); + trace_ethlite_pkt_size_too_big(size); return -1; } memcpy(&s->regs[rxbase + R_RX_BUF0], buf, size); diff --git a/hw/net/trace-events b/hw/net/trace-events index d0f1d8c0fb..2b36cd967e 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -511,3 +511,7 @@ xen_netdev_connect(int dev, unsigned int tx, unsigned int rx, int port) "vif%u t xen_netdev_frontend_changed(const char *dev, int state) "vif%s state %d" xen_netdev_tx(int dev, int ref, int off, int len, unsigned int flags, const char *c, const char *d, const char *m, const char *e) "vif%u ref %u off %u len %u flags 0x%x%s%s%s%s" xen_netdev_rx(int dev, int idx, int status, int flags) "vif%u idx %d status %d flags 0x%x" + +# xilinx_ethlite.c +ethlite_pkt_lost(uint32_t rx_ctrl) "rx_ctrl:0x%" PRIx32 +ethlite_pkt_size_too_big(uint64_t size) "size:0x%" PRIx64 From patchwork Tue Nov 12 18:10:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842723 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3719370wru; Tue, 12 Nov 2024 10:19:04 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCU6f0MPybkL66DoRMrPuhZ7aTWLGcAH5SM56tfBTGt2r3h/xmQzHYEcNLkmLqUsPVFmIQpvZQ==@linaro.org X-Google-Smtp-Source: AGHT+IGvqh4Ytx8erFsmTe1RTtpuQJAz8dO49BxylTQpNL0UThJqOctIaxK4tGvK8EvyvKx4Itgx X-Received: by 2002:a05:620a:2908:b0:7b0:6e8:94fd with SMTP id af79cd13be357-7b352750235mr15665185a.0.1731435544256; Tue, 12 Nov 2024 10:19:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435544; cv=none; d=google.com; s=arc-20240605; b=O0+TigP9Q8xZVWP/4iWJ25G4wfCO8eXqWa6mIMBYTrcws6534TrISyCXerv38pR4Gj sDw+R69AdlREx/Gr/69m1U+mb7Rb+0CA/qi0vNghlcRiCOpXyS2Pvdm7r58LL2YhJGb/ aAEqFKXejmMniyi1wVcnBbQyfyGk8HzWFv0GBbaG4wkNn0rcOG6w+hTz9+8STk9Jv2Ya qmg0iGa6h6+79eaoGfgbVczxganeW7cIADDm4jWdyI2spHnS1bnBM7VvwPLLrjYmAsp0 DCqnZQP92rdkkxiKdWhnr1OVU7bfRLdfH038lm/EoDhiDbJkWIdIh3pxlq3+eDTTm951 x3Mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=oH/SQSX4OUP5TxQrfvghzIartXS3npm2RFGdjSdA9Ng=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=gPW/aHBbIxPPMkh+S7ILgn6BR2f96I/WgQNoLjIlYj6734DDXf4WkanNvBnz8jWoK2 DHUlKL4MI6WdtM80KhpX0BoFcL38WR2s9X1BGJbSRll4xkJ1IdBpaOq1qssCpiFkHPI1 VCc1BPdFDTCbr+BQ9BJ8epd6HIGTK93V3G+rwL/13uV92p4j4I0UeF0dZ9YgmmyI358g kdB37z8aj8yg55nh7+wWaE14yDh+3g4NEvZKPSVrAYmKYHzbtDR8lDLtwI/CFfcjCXAI hNQkHxpaOo1iRzf0gPHijmPx45U/O/XSbK4berQ936k8DFC3bLzYlcRlr6CfOdDF8c03 3c9Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BsBqowxg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381ed97e46bsm15765702f8f.30.2024.11.12.10.11.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:11:07 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 03/20] hw/net/xilinx_ethlite: Remove unuseful debug logs Date: Tue, 12 Nov 2024 19:10:27 +0100 Message-ID: <20241112181044.92193-4-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index bb330a233f..2b52597f03 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -32,7 +32,6 @@ #include "net/net.h" #include "trace.h" -#define D(x) #define R_TX_BUF0 0 #define R_TX_LEN0 (0x07f4 / 4) #define R_TX_GIE0 (0x07f8 / 4) @@ -100,7 +99,6 @@ eth_read(void *opaque, hwaddr addr, unsigned int size) case R_RX_CTRL1: case R_RX_CTRL0: r = s->regs[addr]; - D(qemu_log("%s " HWADDR_FMT_plx "=%x\n", __func__, addr * 4, r)); break; default: @@ -126,13 +124,10 @@ eth_write(void *opaque, hwaddr addr, if (addr == R_TX_CTRL1) base = 0x800 / 4; - D(qemu_log("%s addr=" HWADDR_FMT_plx " val=%x\n", - __func__, addr * 4, value)); if ((value & (CTRL_P | CTRL_S)) == CTRL_S) { qemu_send_packet(qemu_get_queue(s->nic), (void *) &s->regs[base], s->regs[base + R_TX_LEN0]); - D(qemu_log("eth_tx %d\n", s->regs[base + R_TX_LEN0])); if (s->regs[base + R_TX_CTRL0] & CTRL_I) eth_pulse_irq(s); } else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) { @@ -156,8 +151,6 @@ eth_write(void *opaque, hwaddr addr, case R_TX_LEN0: case R_TX_LEN1: case R_TX_GIE0: - D(qemu_log("%s addr=" HWADDR_FMT_plx " val=%x\n", - __func__, addr * 4, value)); s->regs[addr] = value; break; @@ -203,7 +196,6 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) return -1; } - D(qemu_log("%s %zd rxbase=%x\n", __func__, size, rxbase)); if (size > (R_MAX - R_RX_BUF0 - rxbase) * 4) { trace_ethlite_pkt_size_too_big(size); return -1; From patchwork Tue Nov 12 18:10:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842705 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3715736wru; Tue, 12 Nov 2024 10:12:08 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWsbXgHUn4TzgCNFXAzjEWblVRunblqQEs6tI7zk1y+wu1ZEjVDjJ6L9XNi2m/3zqWvwdSGBw==@linaro.org X-Google-Smtp-Source: AGHT+IFBhHGnZFYI8q3ReUSMbNy4Ec+Wkb2jVrtvWNLfN1AQEzT4UKF5I1uR7h3QUDhJ9vJ93ZAC X-Received: by 2002:a05:6214:3c9a:b0:6c5:b6de:5ee with SMTP id 6a1803df08f44-6d39e1ee80amr244905806d6.30.1731435127953; Tue, 12 Nov 2024 10:12:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435127; cv=none; d=google.com; s=arc-20240605; b=NovcNJxbLbcQDZfyZjsMdlg5hpXbBPJ1Uu4+WBK/uVsspMa8yrlPhc97tqIGfOyCJI XzJqZLzi7nXHQSeBDE+HhPsSJCLDVBcctPe/Pql357+MwOAtMGxa+PAuD4W3HX19N3pj /R5/CkzEeWy8LgqTb9MxlZxFqfhZrr8UHlpm7M35tMfhmyKav1pmxUHcyeDHB1OaIfOa zYoeH4zX6oiZ7b4lWfcAC2laMALAiEwQYYtjYiTQ0WeoNO17W71ZjW5spLiEQoOEGOzJ s1TXESFYdzjfyuTxbIgZIztexkgGOzSS8PmLhiWJKcyQSpSRd8k7Oc6azeIoGgmRXVjf MVyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9vHIdtfs7hylvYAHt1fb/5wAWL2WHXc3GjbNq8ajJe0=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=RSntuVLa++G99JZiGrTUk3gmEKvsKiytNCWle0cASkehm3E8XPWP2mvjgV8sREUnUz QmNUTvqaOFabvG8KZ7Ap9i30fig+wVwO30Aken7MnDB1P9aUqmNNoX5PEQ/iFFraaTAV WPa1UGhIAiqRTaI5x0qrHM7Agx5r7AX52vgJ69WkxneN88rp8pprcKrYpCG9EaohEGRr jk4LugxhxOFz6rKnY3OY2zql39XRXhnT6b+Hv2lhKxQYAzO3Ax42fTJZH2wdfJIFfN2+ 3rlK+viq2u0nDVzj4txuppyxe7o01d27AeWQ+nmrjPErPnBSkL/wJKKPIvoXVwMj2xVh cJ/A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bcaPTC0V; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381eda03e8asm15986444f8f.90.2024.11.12.10.11.12 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:11:13 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 04/20] hw/net/xilinx_ethlite: Update QOM style Date: Tue, 12 Nov 2024 19:10:28 +0100 Message-ID: <20241112181044.92193-5-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Use XlnxXpsEthLite typedef, OBJECT_DECLARE_SIMPLE_TYPE macro; convert type_init() to DEFINE_TYPES(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 48 +++++++++++++++++++---------------------- 1 file changed, 22 insertions(+), 26 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 2b52597f03..0f59811c78 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -53,10 +53,9 @@ #define CTRL_S 0x1 #define TYPE_XILINX_ETHLITE "xlnx.xps-ethernetlite" -DECLARE_INSTANCE_CHECKER(struct xlx_ethlite, XILINX_ETHLITE, - TYPE_XILINX_ETHLITE) +OBJECT_DECLARE_SIMPLE_TYPE(XlnxXpsEthLite, XILINX_ETHLITE) -struct xlx_ethlite +struct XlnxXpsEthLite { SysBusDevice parent_obj; @@ -73,7 +72,7 @@ struct xlx_ethlite uint32_t regs[R_MAX]; }; -static inline void eth_pulse_irq(struct xlx_ethlite *s) +static inline void eth_pulse_irq(XlnxXpsEthLite *s) { /* Only the first gie reg is active. */ if (s->regs[R_TX_GIE0] & GIE_GIE) { @@ -84,7 +83,7 @@ static inline void eth_pulse_irq(struct xlx_ethlite *s) static uint64_t eth_read(void *opaque, hwaddr addr, unsigned int size) { - struct xlx_ethlite *s = opaque; + XlnxXpsEthLite *s = opaque; uint32_t r = 0; addr >>= 2; @@ -112,7 +111,7 @@ static void eth_write(void *opaque, hwaddr addr, uint64_t val64, unsigned int size) { - struct xlx_ethlite *s = opaque; + XlnxXpsEthLite *s = opaque; unsigned int base = 0; uint32_t value = val64; @@ -176,7 +175,7 @@ static const MemoryRegionOps eth_ops = { static bool eth_can_rx(NetClientState *nc) { - struct xlx_ethlite *s = qemu_get_nic_opaque(nc); + XlnxXpsEthLite *s = qemu_get_nic_opaque(nc); unsigned int rxbase = s->rxbuf * (0x800 / 4); return !(s->regs[rxbase + R_RX_CTRL0] & CTRL_S); @@ -184,7 +183,7 @@ static bool eth_can_rx(NetClientState *nc) static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) { - struct xlx_ethlite *s = qemu_get_nic_opaque(nc); + XlnxXpsEthLite *s = qemu_get_nic_opaque(nc); unsigned int rxbase = s->rxbuf * (0x800 / 4); /* DA filter. */ @@ -214,7 +213,7 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) static void xilinx_ethlite_reset(DeviceState *dev) { - struct xlx_ethlite *s = XILINX_ETHLITE(dev); + XlnxXpsEthLite *s = XILINX_ETHLITE(dev); s->rxbuf = 0; } @@ -228,7 +227,7 @@ static NetClientInfo net_xilinx_ethlite_info = { static void xilinx_ethlite_realize(DeviceState *dev, Error **errp) { - struct xlx_ethlite *s = XILINX_ETHLITE(dev); + XlnxXpsEthLite *s = XILINX_ETHLITE(dev); qemu_macaddr_default_if_unset(&s->conf.macaddr); s->nic = qemu_new_nic(&net_xilinx_ethlite_info, &s->conf, @@ -239,7 +238,7 @@ static void xilinx_ethlite_realize(DeviceState *dev, Error **errp) static void xilinx_ethlite_init(Object *obj) { - struct xlx_ethlite *s = XILINX_ETHLITE(obj); + XlnxXpsEthLite *s = XILINX_ETHLITE(obj); sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq); @@ -249,9 +248,9 @@ static void xilinx_ethlite_init(Object *obj) } static Property xilinx_ethlite_properties[] = { - DEFINE_PROP_UINT32("tx-ping-pong", struct xlx_ethlite, c_tx_pingpong, 1), - DEFINE_PROP_UINT32("rx-ping-pong", struct xlx_ethlite, c_rx_pingpong, 1), - DEFINE_NIC_PROPERTIES(struct xlx_ethlite, conf), + DEFINE_PROP_UINT32("tx-ping-pong", XlnxXpsEthLite, c_tx_pingpong, 1), + DEFINE_PROP_UINT32("rx-ping-pong", XlnxXpsEthLite, c_rx_pingpong, 1), + DEFINE_NIC_PROPERTIES(XlnxXpsEthLite, conf), DEFINE_PROP_END_OF_LIST(), }; @@ -264,17 +263,14 @@ static void xilinx_ethlite_class_init(ObjectClass *klass, void *data) device_class_set_props(dc, xilinx_ethlite_properties); } -static const TypeInfo xilinx_ethlite_info = { - .name = TYPE_XILINX_ETHLITE, - .parent = TYPE_SYS_BUS_DEVICE, - .instance_size = sizeof(struct xlx_ethlite), - .instance_init = xilinx_ethlite_init, - .class_init = xilinx_ethlite_class_init, +static const TypeInfo xilinx_ethlite_types[] = { + { + .name = TYPE_XILINX_ETHLITE, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(XlnxXpsEthLite), + .instance_init = xilinx_ethlite_init, + .class_init = xilinx_ethlite_class_init, + }, }; -static void xilinx_ethlite_register_types(void) -{ - type_register_static(&xilinx_ethlite_info); -} - -type_init(xilinx_ethlite_register_types) +DEFINE_TYPES(xilinx_ethlite_types) From patchwork Tue Nov 12 18:10:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842707 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3716048wru; 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432b05e5f82sm222757955e9.42.2024.11.12.10.11.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:11:19 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 05/20] hw/net/xilinx_ethlite: Correct maximum RX buffer size Date: Tue, 12 Nov 2024 19:10:29 +0100 Message-ID: <20241112181044.92193-6-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The current max RX bufsize is set to 0x800. This is invalid, since it contains the MMIO registers region. Add the correct definition and use it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 0f59811c78..e6f6179fce 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -46,6 +46,8 @@ #define R_RX_CTRL1 (0x1ffc / 4) #define R_MAX (0x2000 / 4) +#define RX_BUFSZ_MAX 0x07e0 + #define GIE_GIE 0x80000000 #define CTRL_I 0x8 @@ -195,7 +197,7 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) return -1; } - if (size > (R_MAX - R_RX_BUF0 - rxbase) * 4) { + if (size > RX_BUFSZ_MAX) { trace_ethlite_pkt_size_too_big(size); return -1; } From patchwork Tue Nov 12 18:10:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842716 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3717626wru; Tue, 12 Nov 2024 10:15:46 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWv7Ub5mesJkGynuycH2dix0S8J2gbSQYsC5D9bfM6n8xqW1Mx88vc/P+/MixEqtLnkiXwlLg==@linaro.org X-Google-Smtp-Source: AGHT+IGdia9w0UZVH/b8c/IBC0ghHtvOZaB3SpJOX2S+Ik/UN9d9fpyLpBH/LEanv8k2z5XAfq4V X-Received: by 2002:a05:6102:3a09:b0:4a3:ef1e:8566 with SMTP id ada2fe7eead31-4ad4698eefdmr226283137.17.1731435346535; Tue, 12 Nov 2024 10:15:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435346; cv=none; d=google.com; s=arc-20240605; b=JYUFj+nt/z2EmUWYxXyHGUcNhyv9p9o8HHOgqYGbhFoGn9uDnbs4jFh3gE7wGGHPYL MThf1vZtFuaqZQFOqvSqDKPdqPIlkPfe5DDXa2Oqao2rvhaBDWzQqchnqFCmfwv/Nfzs kMCJ56IVkw48zsPQUam0zFB2yknKvC4tmSRem+H4xlsDK79AzLTE/qgoJJEGjY21abIX NEEfBV9KmBZ8zUGxs1B6r58oY4WdQs5TAaCV8DsHFgxoQ5TN0B4/9l5negpmysxBKBJs 9G/nYzDtZfyj5v6a/wws0CSdjzEKdV36P8Nuj1UuF7TlW83wcUo3vbNv11KaIOR19onV IMdQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=xM2ZSeJRoX/j6Un6zic7nNQ/NMvb/n81U1A/iot7Isw=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=fqrPDB/A0gmQ5mN/071brw7Tc549/sl2DbzRxqI5HH7rWXBmgHRL4zgG6qtNkTMUzp n4Z8dj322NvkxnB/K7jtt6itkc0C++LN50ErgaBfNzdA/u0l7CPd+LGSVXc8COB9Uthv Dsv6tqOPJC5bcdaxINr1XnMDrzf8YGQSjasJTkcaVkTVZk2Gp0IEG40rckdaSb03e9yI y/jvDR7h7qwu7WOFrmbgXvZlSgYERkPlz8uCQ/KbHMvvNx28l6Rn/LZYK3Mn5Vcjo/uL 6BboonOyJyeSOOM4ObE3DItWvYwFrn1g2n3IufpC35QiHzqlmofiIHIqvdXcRVWIW00Y alKw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qyRe20Br; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381eda1433esm15896532f8f.111.2024.11.12.10.11.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:11:25 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 06/20] hw/net/xilinx_ethlite: Map MDIO registers (as unimplemented) Date: Tue, 12 Nov 2024 19:10:30 +0100 Message-ID: <20241112181044.92193-7-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rather than handling the MDIO registers as RAM, map them as unimplemented I/O within the device MR. The memory flat view becomes: (qemu) info mtree -f FlatView #0 Root memory region: system 0000000081000000-00000000810007e3 (prio 0, i/o): xlnx.xps-ethernetlite 00000000810007e4-00000000810007f3 (prio 0, i/o): ethlite.mdio 00000000810007f4-0000000081001fff (prio 0, i/o): xlnx.xps-ethernetlite @00000000000007f4 Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index e6f6179fce..76b1e7d826 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -25,13 +25,17 @@ #include "qemu/osdep.h" #include "qemu/module.h" #include "qom/object.h" +#include "qapi/error.h" #include "exec/tswap.h" #include "hw/sysbus.h" #include "hw/irq.h" #include "hw/qdev-properties.h" +#include "hw/misc/unimp.h" #include "net/net.h" #include "trace.h" +#define A_MDIO_BASE 0x07e4 + #define R_TX_BUF0 0 #define R_TX_LEN0 (0x07f4 / 4) #define R_TX_GIE0 (0x07f8 / 4) @@ -71,6 +75,7 @@ struct XlnxXpsEthLite unsigned int txbuf; unsigned int rxbuf; + UnimplementedDeviceState mdio; uint32_t regs[R_MAX]; }; @@ -231,6 +236,14 @@ static void xilinx_ethlite_realize(DeviceState *dev, Error **errp) { XlnxXpsEthLite *s = XILINX_ETHLITE(dev); + object_initialize_child(OBJECT(dev), "ethlite.mdio", &s->mdio, + TYPE_UNIMPLEMENTED_DEVICE); + qdev_prop_set_string(DEVICE(&s->mdio), "name", "ethlite.mdio"); + qdev_prop_set_uint64(DEVICE(&s->mdio), "size", 4 * 4); + sysbus_realize(SYS_BUS_DEVICE(&s->mdio), &error_fatal); + memory_region_add_subregion(&s->mmio, A_MDIO_BASE, + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mdio), 0)); + qemu_macaddr_default_if_unset(&s->conf.macaddr); s->nic = qemu_new_nic(&net_xilinx_ethlite_info, &s->conf, object_get_typename(OBJECT(dev)), dev->id, From patchwork Tue Nov 12 18:10:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842721 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3718884wru; Tue, 12 Nov 2024 10:18:03 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWbeDF63ZXemIt2jz/W5wADVNbvsu4DORKuNzAw2CdfqJVK9mJiYq9d22AMZUaZjwzYdtaBpA==@linaro.org X-Google-Smtp-Source: AGHT+IEzV30UGQs/R3CSerqP42/M4PgzXCFj2xuf1Rr/vu3HaHnlFbSgtgsYx7a0M/LkiXCTK4Gu X-Received: by 2002:a05:622a:2b47:b0:460:8fd3:b393 with SMTP id d75a77b69052e-4630937fd66mr266800901cf.28.1731435482953; Tue, 12 Nov 2024 10:18:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435482; cv=none; d=google.com; s=arc-20240605; b=O07HZ8tjZiasiW8zTimtAzULwoRZ8JZ2z/3n8UNwMeDIOF2Ylp18imM+K3q/zf8+kG 9usXVKqNnSY00RrBWE4XQ0CTS6Tzh0gsHnBLW5Y4s4sDWcUHcKKTdymdDaanoeTeljUN WpGoHNqEmHI4a7ZZDrHNSvRib0tCeeNnEcscr8sr94q08M00MwT3ercSrgdTiCHQgDa0 9yeliwyxj3HugdnUyrfTey/iJm71KhV0hYjZunuLaWgNav6q+JQj+afhF8tTp1Y8m4tw AyJav31SkJ2awT9Mtj10QaXogvhR7ShuIzthbsymTAjI+9Pl6EpQN98FKV+LNtgp0Ymm 9Ntg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=S0A+XO8SEDEpUXfiyI42zPsZnM8n4BbkRd6mjrTW2c4=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=BXD2vFk77iEzNfCNy+N/Ojgj2EqI0D9OWvkcCDznkP7pKnwM25tUFQyMwr4P0SBJ8w wiLgQL0Axp0Hl4R3hJe4MuhnH9w8HXHON8DWWgx06pGkc/VULF5z5T5TsK/jGw6swo+p vfJcP+JMZKCM4XRVh2tYt2N3CzXs+pj//j8ss+zYo3rbC8D81zDb/jxCAIQVhdDGnrdS c6JG4RkjIBrouaWhFNQ8Sl5H5Bweklv48x4uY1mlmDejFo0ccxFOrzXSEM/CIQMqfbM9 CiKvQk5I8JPZ8JDt+sX385bsRf0DU0ljSspkRO5nHaCHvoQxl3G4rfcWp6ekws75Aa/K YboQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xqNcY8GR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432aa7397e4sm252183635e9.40.2024.11.12.10.11.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:11:31 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 07/20] hw/net/xilinx_ethlite: Rename rxbuf -> port_index Date: Tue, 12 Nov 2024 19:10:31 +0100 Message-ID: <20241112181044.92193-8-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12b; envelope-from=philmd@linaro.org; helo=mail-lf1-x12b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org 'rxbuf' is the index of the port used. Rename it as 'port_index'. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 76b1e7d826..20919b4f54 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -72,8 +72,7 @@ struct XlnxXpsEthLite uint32_t c_tx_pingpong; uint32_t c_rx_pingpong; - unsigned int txbuf; - unsigned int rxbuf; + unsigned int port_index; UnimplementedDeviceState mdio; uint32_t regs[R_MAX]; @@ -183,7 +182,7 @@ static const MemoryRegionOps eth_ops = { static bool eth_can_rx(NetClientState *nc) { XlnxXpsEthLite *s = qemu_get_nic_opaque(nc); - unsigned int rxbase = s->rxbuf * (0x800 / 4); + unsigned int rxbase = s->port_index * (0x800 / 4); return !(s->regs[rxbase + R_RX_CTRL0] & CTRL_S); } @@ -191,7 +190,7 @@ static bool eth_can_rx(NetClientState *nc) static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) { XlnxXpsEthLite *s = qemu_get_nic_opaque(nc); - unsigned int rxbase = s->rxbuf * (0x800 / 4); + unsigned int rxbase = s->port_index * (0x800 / 4); /* DA filter. */ if (!(buf[0] & 0x80) && memcmp(&s->conf.macaddr.a[0], buf, 6)) @@ -214,7 +213,7 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) } /* If c_rx_pingpong was set flip buffers. */ - s->rxbuf ^= s->c_rx_pingpong; + s->port_index ^= s->c_rx_pingpong; return size; } @@ -222,7 +221,7 @@ static void xilinx_ethlite_reset(DeviceState *dev) { XlnxXpsEthLite *s = XILINX_ETHLITE(dev); - s->rxbuf = 0; + s->port_index = 0; } static NetClientInfo net_xilinx_ethlite_info = { From patchwork Tue Nov 12 18:10:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842720 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3718609wru; Tue, 12 Nov 2024 10:17:27 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXVvACqn0DHtK30izAyTdzXJlubosD8fX8CaPL8y6nHqAOAv7PVEQgytIKf7iy4hCPCkdk6AQ==@linaro.org X-Google-Smtp-Source: AGHT+IF9ieBzxLPSPAmvARXegOEOK//iLI+8C6ObmMKJ90Hhf1kumkM6s4/jbaShgiQRd6/gWW8p X-Received: by 2002:a05:622a:293:b0:460:4e67:d67f with SMTP id d75a77b69052e-4630930e049mr251535271cf.2.1731435446857; Tue, 12 Nov 2024 10:17:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435446; cv=none; d=google.com; s=arc-20240605; b=aap2QUYhSnLPtQXH8CC4GoGFaU4aI8RnsJOlMseGh/kd7jEMNvN0At7wlmfJjTAKy6 60pdTYTG9ror6Yemcb8pAfKrpZtrL4xMw1O2CvpbGEUOK8p1vCCZPyk+RWj50jlMZWfG opgsWp23NShmHVKuUwpnaoopBEayMfTVPaQ8Qj1m6phuxvmocSJsb/uhW3/hN9cA9Tf0 TjhcdeO9DQf9FbVT0AZnhz6If83eECNsplr81AmkSGhMggvog+UjPZsYrrFf2U7xOU/Z xvrmwmcdrXniYLsD68nfLN/W1I6KKEWG69Ren5qHSV57Ye9NY4uurZ+Wq9BY+waFapqq OJYg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=VgOSNR6wPQJECLaWUR0U2aDVp6+TXCTXj/l4QB6G0rU=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=BPmW5btsHR21wzAz43h2oGJ6PkrGx7wQZDYyaF63LHvUb/rzVUIxB3gDvSOWRkOu2C ib30jViqgHrph1OpyScRhL1re/CSqRUDLv0hoKNUgNi6yFPi7KeeVNqhq9VoesCXVGe3 bpiIAxGGvrtbHw4Qu2vm8WDLl63DtbcCrGwUYN2+Um7eL7fYUkH3EAZ9F2OdA8sxl07e +x+dZ3cxLIUbFAnI6NKjlpETiW1zGtToeKWXL0g7KyZfDKkqukiQ1u97oM4m2drUqP13 ZfrDa5IyL7q/4Rb7y747/P6SPMuaP/iYvSkVjkpP6HWC7aWepcWd3ketRpUPv6zYYO6F 8e2Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mPaVWrNO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381eda04211sm15991976f8f.94.2024.11.12.10.11.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:11:37 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 08/20] hw/net/xilinx_ethlite: Add addr_to_port_index() helper Date: Tue, 12 Nov 2024 19:10:32 +0100 Message-ID: <20241112181044.92193-9-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org For a particular physical address within the EthLite MMIO range, addr_to_port_index() returns which port is accessed. Signed-off-by: Philippe Mathieu-Daudé --- hw/net/xilinx_ethlite.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 20919b4f54..fe91891310 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #include "qemu/module.h" +#include "qemu/bitops.h" #include "qom/object.h" #include "qapi/error.h" #include "exec/tswap.h" @@ -86,6 +87,12 @@ static inline void eth_pulse_irq(XlnxXpsEthLite *s) } } +__attribute__((unused)) +static unsigned addr_to_port_index(hwaddr addr) +{ + return extract64(addr, 11, 1); +} + static uint64_t eth_read(void *opaque, hwaddr addr, unsigned int size) { @@ -190,7 +197,8 @@ static bool eth_can_rx(NetClientState *nc) static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) { XlnxXpsEthLite *s = qemu_get_nic_opaque(nc); - unsigned int rxbase = s->port_index * (0x800 / 4); + unsigned int port_index = s->port_index; + unsigned int rxbase = port_index * (0x800 / 4); /* DA filter. */ if (!(buf[0] & 0x80) && memcmp(&s->conf.macaddr.a[0], buf, 6)) From patchwork Tue Nov 12 18:10:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842708 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3716051wru; Tue, 12 Nov 2024 10:12:42 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCU6QapAqGsSYwXr+lZImKXJ071/kw/T7q2IPgtKW35Xy8hUoG66NetuVugq8vMj5UwU02YdlA==@linaro.org X-Google-Smtp-Source: AGHT+IFN+GKbRMT8+Xac0wjzFbpjMrkuOZXQCv86gB4zeorJFdPn5fqB9qGJKRik8IxAYxmsCYdS X-Received: by 2002:a05:622a:189f:b0:458:3884:9aef with SMTP id d75a77b69052e-4630935cdeemr271216771cf.27.1731435162114; Tue, 12 Nov 2024 10:12:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435162; cv=none; d=google.com; s=arc-20240605; b=UMPxGS0Pl/W3++Jyzj6cGM1bLNkdUmqRc33kOvQWgzDAnHpBhwm4LuYOlc1OFvU4ey lXTpnzC00mQdhKtJ2qaoVAzWN/9QTmqx0dc2u30ObgVEKH+RrNpSu3B4njO0OOnCle/x 8Wc0nqvstzC6QGkBE3yFYq2RIgXxSZIpR5hKMTyoXFx070krJkcBlgvufMCewCFaGcEs WsVOko1d8B1zw19Qoou7xCPFA6nOuBB8YNQ6WfDoNwJyzXIQXcTIrBER93BGPnXBUxOT OIRJoDicqdFbk0WosSuOUxVxtO4xYmZjG617zofJMpvrFKwbWy01LeOVkY5uoJltIvBm jJZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=IFxTKFQ0DGptUkzLtcja4XwpDLueVdiea1brksjZQow=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=cZ5XsawkyXrFaMzUu+x5umslRl3tReRY5ODNd49/TUMA9IF9ql/IQVXp1siS+6fvjL q9BOBpz4f1pMpuswvajGyiOSv/Ln8HqzjOuEeKN1+jL9Gsq52RpVnxzuUej0OyctlDGq ex4vpWCG7pAznEcQWoIr5szvPDm9BcwLXz/VcJaUSA3blHkIJg4DkqgYohnVSGxv4Nx5 fPYgaC9MvqffS/naFhjkKE8oUGkOkNMOM4EpWNiB/hZuVUsI4MtmEaZpjDZZC+r9XVkB 2VQ0TK0E2xnQhxQaQCuWhlBI+gk7Kvws4E4VmcaTKh03Rt02KgTfa6yCgrv4D56BiIbB iYIg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hmIDoznQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432aa70a234sm257606015e9.34.2024.11.12.10.11.41 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:11:42 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 09/20] hw/net/xilinx_ethlite: Introduce txbuf_ptr() helper Date: Tue, 12 Nov 2024 19:10:33 +0100 Message-ID: <20241112181044.92193-10-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12a; envelope-from=philmd@linaro.org; helo=mail-lf1-x12a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org txbuf_ptr() points to the beginning of a (RAM) TX buffer within the device state. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index fe91891310..d4882f43f7 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -87,12 +87,18 @@ static inline void eth_pulse_irq(XlnxXpsEthLite *s) } } -__attribute__((unused)) static unsigned addr_to_port_index(hwaddr addr) { return extract64(addr, 11, 1); } +static void *txbuf_ptr(XlnxXpsEthLite *s, unsigned port_index) +{ + unsigned int rxbase = port_index * (0x800 / 4); + + return &s->regs[rxbase + R_TX_BUF0]; +} + static uint64_t eth_read(void *opaque, hwaddr addr, unsigned int size) { @@ -125,6 +131,7 @@ eth_write(void *opaque, hwaddr addr, uint64_t val64, unsigned int size) { XlnxXpsEthLite *s = opaque; + unsigned int port_index = addr_to_port_index(addr); unsigned int base = 0; uint32_t value = val64; @@ -138,12 +145,12 @@ eth_write(void *opaque, hwaddr addr, if ((value & (CTRL_P | CTRL_S)) == CTRL_S) { qemu_send_packet(qemu_get_queue(s->nic), - (void *) &s->regs[base], + txbuf_ptr(s, port_index), s->regs[base + R_TX_LEN0]); if (s->regs[base + R_TX_CTRL0] & CTRL_I) eth_pulse_irq(s); } else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) { - memcpy(&s->conf.macaddr.a[0], &s->regs[base], 6); + memcpy(&s->conf.macaddr.a[0], txbuf_ptr(s, port_index), 6); if (s->regs[base + R_TX_CTRL0] & CTRL_I) eth_pulse_irq(s); } From patchwork Tue Nov 12 18:10:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842711 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3716797wru; Tue, 12 Nov 2024 10:14:19 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXvnLgoc/lbnv8C4FTaPhKSGhcyrVKgFvGOTpId+dQrdlC3sov6KjuAXEyyknDiyIDpE+yjMQ==@linaro.org X-Google-Smtp-Source: AGHT+IHCkjqTRbXUp6krDW7JdvfmYhy0x2tXEF/NEv0zDcuN9An8JU9xzOxAf2mDarhz3K/kfpgp X-Received: by 2002:a05:622a:393:b0:458:256:bf7d with SMTP id d75a77b69052e-4630932c4f2mr232592491cf.22.1731435259543; Tue, 12 Nov 2024 10:14:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435259; cv=none; d=google.com; s=arc-20240605; b=Kq6jOBBU7Aypg6tLB8GBODs2wOdXikhpx1hP3gIu7fCcg9EO3oVyFYhWZmCvPdguKI nOMPfiNFSgmlje9503jhYWMCAwmke0YtgLe0vHpPcjYoBzxz8mN8jfzlB8iDoSzgGObZ ZYzho6dUxaGVd3n8uhV0qT6V40F3TJo6uh0R29cH8vbHbZwyF6C/r+u2pyZ5wiKX2KH2 kIP4ulDrnWEOYWqObs8cTnVVbb7oThCY9Bu583kJL/7Vm8NLhwT1/9hCelc1q4EcQ/ty P/Q4nK3FDGtQL5t7cTXg6bVWE3M2yeBliESZPuIkrP270D3H4D4JSltgGYvveHECAcFw M5YQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=gI2r50YagKyW5wjp5nKAHhdiWka7DOBUV8IxoWF7VBw=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=lQ3cwMwLutOiCzahdxxF7mcrjs8TQGeLSRefc2iLUfcYGf1lm4vHu3fmqu/vYgl/pz wCjlQI9S+4Lw2MTayqEvbs/LSE+xT0D7uoafc+iUqN2rQvHbXNoTMmqxzYVYK+9z9fKr ioWC9EUb1s+8eR9s0isCR0YAV6BG4K8s8LxpxSFtZHgw4h0f3AbFLW0csvmc4mnRwbqd lzPB8wv3d7Y9JOql0D2TXk3wYzE/eMeMHiCYDYSTqzMaRD4cpSkVXkA9Uk0tavHMz9SZ O53lKbCQZaEhZq5xo02sjkuznbrOJFaAYUxBjsEp3We1tSBW3tSI8EdOnbk7UPRfHbei ruYA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Q5FxZrwr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381eda0517csm15935048f8f.96.2024.11.12.10.11.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:11:49 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 10/20] hw/net/xilinx_ethlite: Introduce rxbuf_ptr() helper Date: Tue, 12 Nov 2024 19:10:34 +0100 Message-ID: <20241112181044.92193-11-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org rxbuf_ptr() points to the beginning of a (RAM) RX buffer within the device state. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index d4882f43f7..fdbf25fd91 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -99,6 +99,13 @@ static void *txbuf_ptr(XlnxXpsEthLite *s, unsigned port_index) return &s->regs[rxbase + R_TX_BUF0]; } +static void *rxbuf_ptr(XlnxXpsEthLite *s, unsigned port_index) +{ + unsigned int rxbase = port_index * (0x800 / 4); + + return &s->regs[rxbase + R_RX_BUF0]; +} + static uint64_t eth_read(void *opaque, hwaddr addr, unsigned int size) { @@ -220,7 +227,7 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) trace_ethlite_pkt_size_too_big(size); return -1; } - memcpy(&s->regs[rxbase + R_RX_BUF0], buf, size); + memcpy(rxbuf_ptr(s, port_index), buf, size); s->regs[rxbase + R_RX_CTRL0] |= CTRL_S; if (s->regs[R_RX_CTRL0] & CTRL_I) { From patchwork Tue Nov 12 18:10:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842712 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3716837wru; Tue, 12 Nov 2024 10:14:24 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXh8i3AAGSFZHK047BDmfVb0rnZIcLoC/BD01WF7dY079zZJV35UMrWo96hPc5o5IWFnOuOwQ==@linaro.org X-Google-Smtp-Source: AGHT+IFJCy0ol3I4MzuHMf9FdgNdEhIXykBu7vKl1PmvBmladOq7IizrGp69VAe30JqqRCZVHZTu X-Received: by 2002:a05:622a:207:b0:458:34fb:5d59 with SMTP id d75a77b69052e-4630938ab07mr224231321cf.29.1731435264569; Tue, 12 Nov 2024 10:14:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435264; cv=none; d=google.com; s=arc-20240605; b=VdcOPtOzTMv/WVIjHHavveJOfw1gry+qotoq+6ku3cMrKywdQ3/yfXj3R3TAf2xYnj POF6S3xa9C1LbgkvPtWu+dYpAIiAgk75emhAlqTFuwUZcccq1zHVaZ799o4NGJGXDz8m EkEnmHbmxmWhGdOOs55oFBzP5Uh/Ynjp80qrxT0Gm+Y+3MbSNGcexZxoF9eFI2aB/ssk upF+tDOhUrJlSBLUPi3GnhaRR6FrHF0qEOKbXvdpUxb+QsYx4D9g+TxkPYS5JrqJEiZ0 KDObacJ7FalZNhc7Tj1kv0K2e4mtDKcEQ4kXjAps/hJpZmyHecyLLt2G2jrONJCrtL3B 9tzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=90u2pbXGOCmIRt7v1T1RJKt/kgJQ6BpSNcFSvHFisE0=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=Usk3hdAMQc8ihyJRPMpTqjZzpYkG5Veoqjr5Eng9L6WksZgKuMFZWIbUv6VdlradrH ByoQ3derU4RucLWASfLGnkXAjCjhg9s6EBAkace7xh6Us3axvO8sQJpzd38s4SgiYXIL OYd7ZsdIscUiCdUMvfhbe+SBTKQ6F+zwy42inOwF138fVWkGXUz+LLZdl8A4k/5vsj8e GnP2Mrm580w1uuk2bglrszLXT/rCLxNB/zk4IgG4qRz+Puexmqh0X0RjEzOAdN7VSr7D b2vGrqJ+TD9pBPZiZZzBtclIi5dMJ+wLE7vWIa47BqatmUvPZinMRjsbyBBWieMsdLWE /jZA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=STnerbud; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432b05e5871sm219236105e9.37.2024.11.12.10.11.54 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:11:55 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 11/20] hw/net/xilinx_ethlite: Access RX_CTRL register for each port Date: Tue, 12 Nov 2024 19:10:35 +0100 Message-ID: <20241112181044.92193-12-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rather than accessing the registers within the mixed RAM/MMIO region as indexed register, declare a per-port RX_CTRL. This will help to map the RAM as RAM (keeping MMIO as MMIO) in few commits. Previous s->regs[R_RX_CTRL0] and s->regs[R_RX_CTRL1] are now unused. Not a concern, this array will soon disappear. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index fdbf25fd91..605451a522 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -59,6 +59,13 @@ #define CTRL_P 0x2 #define CTRL_S 0x1 +typedef struct XlnxXpsEthLitePort +{ + struct { + uint32_t rx_ctrl; + } reg; +} XlnxXpsEthLitePort; + #define TYPE_XILINX_ETHLITE "xlnx.xps-ethernetlite" OBJECT_DECLARE_SIMPLE_TYPE(XlnxXpsEthLite, XILINX_ETHLITE) @@ -76,6 +83,7 @@ struct XlnxXpsEthLite unsigned int port_index; UnimplementedDeviceState mdio; + XlnxXpsEthLitePort port[2]; uint32_t regs[R_MAX]; }; @@ -110,6 +118,7 @@ static uint64_t eth_read(void *opaque, hwaddr addr, unsigned int size) { XlnxXpsEthLite *s = opaque; + unsigned port_index = addr_to_port_index(addr); uint32_t r = 0; addr >>= 2; @@ -121,11 +130,13 @@ eth_read(void *opaque, hwaddr addr, unsigned int size) case R_TX_LEN1: case R_TX_CTRL1: case R_TX_CTRL0: - case R_RX_CTRL1: - case R_RX_CTRL0: r = s->regs[addr]; break; + case R_RX_CTRL1: + case R_RX_CTRL0: + r = s->port[port_index].reg.rx_ctrl; + default: r = tswap32(s->regs[addr]); break; @@ -173,7 +184,9 @@ eth_write(void *opaque, hwaddr addr, if (!(value & CTRL_S)) { qemu_flush_queued_packets(qemu_get_queue(s->nic)); } - /* fall through */ + s->port[port_index].reg.rx_ctrl = value; + break; + case R_TX_LEN0: case R_TX_LEN1: case R_TX_GIE0: @@ -203,23 +216,21 @@ static const MemoryRegionOps eth_ops = { static bool eth_can_rx(NetClientState *nc) { XlnxXpsEthLite *s = qemu_get_nic_opaque(nc); - unsigned int rxbase = s->port_index * (0x800 / 4); - return !(s->regs[rxbase + R_RX_CTRL0] & CTRL_S); + return !(s->port[s->port_index].reg.rx_ctrl & CTRL_S); } static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) { XlnxXpsEthLite *s = qemu_get_nic_opaque(nc); unsigned int port_index = s->port_index; - unsigned int rxbase = port_index * (0x800 / 4); /* DA filter. */ if (!(buf[0] & 0x80) && memcmp(&s->conf.macaddr.a[0], buf, 6)) return size; - if (s->regs[rxbase + R_RX_CTRL0] & CTRL_S) { - trace_ethlite_pkt_lost(s->regs[R_RX_CTRL0]); + if (s->port[port_index].reg.rx_ctrl & CTRL_S) { + trace_ethlite_pkt_lost(s->port[port_index].reg.rx_ctrl); return -1; } @@ -229,8 +240,8 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) } memcpy(rxbuf_ptr(s, port_index), buf, size); - s->regs[rxbase + R_RX_CTRL0] |= CTRL_S; - if (s->regs[R_RX_CTRL0] & CTRL_I) { + s->port[port_index].reg.rx_ctrl |= CTRL_S; + if (s->port[port_index].reg.rx_ctrl & CTRL_I) { eth_pulse_irq(s); } From patchwork Tue Nov 12 18:10:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842718 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3718264wru; Tue, 12 Nov 2024 10:16:50 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXn5t0jW5TdMYAE7K0BGwhA7VW0pVycFMo12dWkqOjoaSy+/TDXV6/EQuIEt31PHb/QdnNuZg==@linaro.org X-Google-Smtp-Source: AGHT+IFUUitXdehnQipNFL2CKq4o1Ufrt8NPafPXjgr6EEz4nJlxYvt9JYqcdu0DUe6G+ksHMO4z X-Received: by 2002:a05:620a:bca:b0:7b1:4762:8a with SMTP id af79cd13be357-7b3318c7e9emr2766735985a.3.1731435409461; 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432aa7378e9sm262755635e9.37.2024.11.12.10.11.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:12:01 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 12/20] hw/net/xilinx_ethlite: Access TX_GIE register for each port Date: Tue, 12 Nov 2024 19:10:36 +0100 Message-ID: <20241112181044.92193-13-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rather than accessing the registers within the mixed RAM/MMIO region as indexed register, declare a per-port TX_GIE. This will help to map the RAM as RAM (keeping MMIO as MMIO) in few commits. Previous s->regs[R_TX_GIE0] and s->regs[R_TX_GIE1] are now unused. Not a concern, this array will soon disappear. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 605451a522..4cb4781e70 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -62,6 +62,8 @@ typedef struct XlnxXpsEthLitePort { struct { + uint32_t tx_gie; + uint32_t rx_ctrl; } reg; } XlnxXpsEthLitePort; @@ -90,7 +92,7 @@ struct XlnxXpsEthLite static inline void eth_pulse_irq(XlnxXpsEthLite *s) { /* Only the first gie reg is active. */ - if (s->regs[R_TX_GIE0] & GIE_GIE) { + if (s->port[0].reg.tx_gie & GIE_GIE) { qemu_irq_pulse(s->irq); } } @@ -126,6 +128,9 @@ eth_read(void *opaque, hwaddr addr, unsigned int size) switch (addr) { case R_TX_GIE0: + r = s->port[port_index].reg.tx_gie; + break; + case R_TX_LEN0: case R_TX_LEN1: case R_TX_CTRL1: @@ -189,10 +194,13 @@ eth_write(void *opaque, hwaddr addr, case R_TX_LEN0: case R_TX_LEN1: - case R_TX_GIE0: s->regs[addr] = value; break; + case R_TX_GIE0: + s->port[port_index].reg.tx_gie = value; + break; + default: s->regs[addr] = tswap32(value); break; From patchwork Tue Nov 12 18:10:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842709 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3716434wru; Tue, 12 Nov 2024 10:13:33 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXNzXXmpU1f5d9Dw9BGxC6ra2I+PZJ4BD3zgGxF48iijmUK8A4cF/woefVauIF4i0gjX+0ILg==@linaro.org X-Google-Smtp-Source: AGHT+IHOPT9EtMhAFxtcddWdEzBHB7PlvM3FH+UmSCLO+7w3vLBXchB05XgVuH0GegkO30Jypkmr X-Received: by 2002:a05:6102:f09:b0:4a9:6359:cd9d with SMTP id ada2fe7eead31-4ac297785e2mr3520385137.1.1731435212963; Tue, 12 Nov 2024 10:13:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435212; cv=none; d=google.com; s=arc-20240605; b=C5IZvEn5O/4+rc3O6zRq9L5uBvlMimOm33r5IyJzUxx/HuUAw18c7RdIz179ngH4T2 aApNM3r+8gWrefg5FetQxjdPq5CuzpYB7SmmJI8y59eIli1s2L2PqcWK03x4dyN19zkw K8eRQsmHxXal0hCOtbrPbkb4tmpVfavnMRzM5dAiQbGB4atbLRDb+Ob6erQ2DNdSvAVi qkFs81sI5CMNi3J3AjpqhXq06IDXYMjSgc+4YoY4ZqNXEDwWoymfeJvKuHJAYHabYIt8 /m1Fb3XzIQRVMSIS4cM7k7cgtXXq2BDvRAvubNf2zx5KP/yWk2NPnQ/AmzW1j1JfKOrT KrTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=o5EaUAp0FQKhEfz/Flp6sGp3H9rqfBlFSfz8Y3bBsgY=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=LKibusGC5JJDlic4xzd/VfzIyZBigB8/8/8JmlBjpaqHtb5NbeX3+07Dq8M+tUILYd PvDeCDDPM/0jWyiaQjxVJRDG+nYeEzWzW9oSDH2oxu7/FDzcfwePPmZz7tNz0i7i1Ab3 JVQUhqYY7qUxkd6G+7wnBvLmHh33xqMbyyRgWnjQhyic9A2xEX0qPK9rMFXkWTEAXuo2 vIYAn4VwZhZChIUlXd6Iiywd9AmXn5nd30gjoiyDvke14/vcw22zSDZ7siabRQOQep6U kCaUmZIeZvc70Gca2JQic+pK02ygpBdhqWGhDSEXqNR59lwxXnzABWFwYtFuKHJeQAgr Reug==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eTmcJfwc; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432b053069fsm222425585e9.4.2024.11.12.10.12.05 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:12:06 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 13/20] hw/net/xilinx_ethlite: Access TX_LEN register for each port Date: Tue, 12 Nov 2024 19:10:37 +0100 Message-ID: <20241112181044.92193-14-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rather than accessing the registers within the mixed RAM/MMIO region as indexed register, declare a per-port TX_LEN. This will help to map the RAM as RAM (keeping MMIO as MMIO) in few commits. Previous s->regs[R_TX_LEN0] and s->regs[R_TX_LEN1] are now unused. Not a concern, this array will soon disappear. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 4cb4781e70..1a3b295b4b 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -62,6 +62,7 @@ typedef struct XlnxXpsEthLitePort { struct { + uint32_t tx_len; uint32_t tx_gie; uint32_t rx_ctrl; @@ -133,6 +134,9 @@ eth_read(void *opaque, hwaddr addr, unsigned int size) case R_TX_LEN0: case R_TX_LEN1: + r = s->port[port_index].reg.tx_len; + break; + case R_TX_CTRL1: case R_TX_CTRL0: r = s->regs[addr]; @@ -169,7 +173,7 @@ eth_write(void *opaque, hwaddr addr, if ((value & (CTRL_P | CTRL_S)) == CTRL_S) { qemu_send_packet(qemu_get_queue(s->nic), txbuf_ptr(s, port_index), - s->regs[base + R_TX_LEN0]); + s->port[port_index].reg.tx_len); if (s->regs[base + R_TX_CTRL0] & CTRL_I) eth_pulse_irq(s); } else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) { @@ -194,7 +198,7 @@ eth_write(void *opaque, hwaddr addr, case R_TX_LEN0: case R_TX_LEN1: - s->regs[addr] = value; + s->port[port_index].reg.tx_len = value; break; case R_TX_GIE0: From patchwork Tue Nov 12 18:10:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842710 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3716584wru; Tue, 12 Nov 2024 10:13:51 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVtexiyubqIY5FUSQFGvB+/xN5ymmMTRAR+xxXjJAn6DvY0bMYAKIZ8/klSzlq7RSs67fHOow==@linaro.org X-Google-Smtp-Source: AGHT+IFFiR/515xH5Ssmvb7S+Az81esyzG3rJiaXp/KNk2bHQVnAu1UgjWZBTB/TU66hrep2VJ29 X-Received: by 2002:a05:6359:428f:b0:1c3:6685:1176 with SMTP id e5c5f4694b2df-1c641f6608fmr812034255d.22.1731435231627; Tue, 12 Nov 2024 10:13:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435231; cv=none; d=google.com; s=arc-20240605; b=dyBSHhACi0EJQrC39eksabUH0OeRBgF5caZWcLFh8yGsFbvkQkJwInkmpewYGpT1pZ LOyGFbT9qzfykzWZFJIzY36Pc9HH7G248JTfuRLjN2zXPi/EVR+cWt2ZGXRLsiXkoPAc YkinsHS9VNPoR6pRpCZ1FNoySoE4K0j0Kn743S/sOHc+k5wad24/CGM2D/1tv6Dm3KrG TuCOTw4R/32s9i1oYRb1CkOecUxMI0whcWOqNPUhdc5qL9RQrcaKf04g3iLJ4AdDKCOO wEzPmxxB17B56MtZOYAYC0kCbhBt44iJ8NKKvabRv8vC1uWkzvR594rAwx1rjQJ+xLvt oOmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=4nCaOfvRzjvZ75Fs3bp8T2IB7oZkyC8yIZExkGUsnvA=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=JvdV2IoPQ31WkclxcseVl+b+XRe8lam0T+joHNsc9+klE+/QMSnnbWNNLxJb8rmkXS lCuLwICWbNmTJ1X5OhcTtqu5TWsr3n0XL0bzYC9xFKA7Et5QOSisW2QGU7Lhz6t4v9HP FIJuAx9x1X5l+y//qCC9J9AwBqtVlOgd3IO4edB0jMIRLBn1poUY3Vq2uDr8yygbiX3P H9OvsDV/4d+B8MJQEWY8p7I6K9zvzZ74+zSnKngTrn34PMMnZ5d5VVWsqIsIi4RNDiAr z3vhrIqSrOe+E4jk1WTdNIpuJDzuflcLeUZmVdhqkUynCBMAhHKKG5PeEAgKiz4iTNOQ 7k/Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=d2E2lzYm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381ed970e23sm15919690f8f.18.2024.11.12.10.12.11 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:12:12 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 14/20] hw/net/xilinx_ethlite: Access TX_CTRL register for each port Date: Tue, 12 Nov 2024 19:10:38 +0100 Message-ID: <20241112181044.92193-15-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rather than accessing the registers within the mixed RAM/MMIO region as indexed register, declare a per-port TX_CTRL. This will help to map the RAM as RAM (keeping MMIO as MMIO) in few commits. Previous s->regs[R_TX_CTRL0] and s->regs[R_TX_CTRL1] are now unused. Not a concern, this array will soon disappear. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 1a3b295b4b..4d86851f38 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -64,6 +64,7 @@ typedef struct XlnxXpsEthLitePort struct { uint32_t tx_len; uint32_t tx_gie; + uint32_t tx_ctrl; uint32_t rx_ctrl; } reg; @@ -139,7 +140,7 @@ eth_read(void *opaque, hwaddr addr, unsigned int size) case R_TX_CTRL1: case R_TX_CTRL0: - r = s->regs[addr]; + r = s->port[port_index].reg.tx_ctrl; break; case R_RX_CTRL1: @@ -159,7 +160,6 @@ eth_write(void *opaque, hwaddr addr, { XlnxXpsEthLite *s = opaque; unsigned int port_index = addr_to_port_index(addr); - unsigned int base = 0; uint32_t value = val64; addr >>= 2; @@ -167,24 +167,23 @@ eth_write(void *opaque, hwaddr addr, { case R_TX_CTRL0: case R_TX_CTRL1: - if (addr == R_TX_CTRL1) - base = 0x800 / 4; - if ((value & (CTRL_P | CTRL_S)) == CTRL_S) { qemu_send_packet(qemu_get_queue(s->nic), txbuf_ptr(s, port_index), s->port[port_index].reg.tx_len); - if (s->regs[base + R_TX_CTRL0] & CTRL_I) + if (s->port[port_index].reg.tx_ctrl & CTRL_I) { eth_pulse_irq(s); + } } else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) { memcpy(&s->conf.macaddr.a[0], txbuf_ptr(s, port_index), 6); - if (s->regs[base + R_TX_CTRL0] & CTRL_I) + if (s->port[port_index].reg.tx_ctrl & CTRL_I) { eth_pulse_irq(s); + } } /* We are fast and get ready pretty much immediately so we actually never flip the S nor P bits to one. */ - s->regs[addr] = value & ~(CTRL_P | CTRL_S); + s->port[port_index].reg.tx_ctrl = value & ~(CTRL_P | CTRL_S); break; /* Keep these native. */ From patchwork Tue Nov 12 18:10:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842714 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3716993wru; Tue, 12 Nov 2024 10:14:43 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUXXqtVDp04DWCOjDEs27e9IY5dvoTF2N68JJPEV+3hAkaSCPhhfRN9I/H7kNB9zq7kqZNxJw==@linaro.org X-Google-Smtp-Source: AGHT+IH0hFhxibnfYYCNN73Sc5ENhqGlWmRXi4Njo1Xsa+jEFCyabGvNP2K3Db8O7Oj+HZ5m/Iuf X-Received: by 2002:a05:6358:729e:b0:1c3:7d12:708d with SMTP id e5c5f4694b2df-1c641ece5f6mr752309455d.11.1731435283250; Tue, 12 Nov 2024 10:14:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435283; cv=none; d=google.com; s=arc-20240605; b=ki5QNGp3Cd8eKL8OOL8dRdwNFZwjPUCAkH4iXFU1WhUDQDwn+KVAEv1LH2AWegRzPJ cSP3boLhLTefHQNNLMv8s7QP772sMKuwicrFsvWAovGjm5VkX4LuWAb1RXksb4BBbsqa sqi231OwEIS1+TASI1a0Aj0WYUXxaoHIL7lH1OsSaoClfzjhv1l1QITstgGH5GGLn6Fz PnndE5qAFW+v1JuLUR/YRK6fAMejC9hEeDfmWnl6IhOIa1mxhbAI9S9i3Q/kkBZ98gc7 ZT8edTVszvp8zv4Oq+/Gr129Sii46PGq+AElcYSDyoZvH0TGsfX3n7PwgkqSKqL6Qrd/ 6l9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=33ai2lENeDpCfbtpntzIEqfDXZ63d2DBrrpSSg3fCCg=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=k8IapFMS04XgNzp84CDfCw38Yj/4wjLAOnofVyRMRFoXSnzU1BWmEZMUZ0jvRWdy3o La6FVAlC4hBC596bNC6KvJHLXfaaQGTH+IrkTzJthQqOTrnsbFoZqWf6isAPT1OcHl7y 5giC5yFaIxbkAoTmDYWo+BXBNcaY6UjrUXmgllqTM+xRnQd4tNFnFyejaFnWdq5R9OZe Da4HSZJv72w2O+DuRswcAJgq1QzYq1uh8yMYCAKLY3xApzHHdUUYn11khc3ispsPmEH1 /dYbAPS56X9Cy+w8L+fIt+HKf0XfRupv02DOPAPkyGx3MEp94w+WXUPDg6LNMBFsBj3m QO1w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Y3L9CiDN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381ed97071esm15832992f8f.12.2024.11.12.10.12.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:12:18 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 15/20] hw/net/xilinx_ethlite: Map RX_CTRL as MMIO Date: Tue, 12 Nov 2024 19:10:39 +0100 Message-ID: <20241112181044.92193-16-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Declare RX registers as MMIO region, split it out of the current mixed RAM/MMIO region. The memory flat view becomes: FlatView #0 Root memory region: system 0000000081000000-00000000810007e3 (prio 0, i/o): xlnx.xps-ethernetlite 00000000810007e4-00000000810007f3 (prio 0, i/o): ethlite.mdio 00000000810007f4-00000000810017fb (prio 0, i/o): xlnx.xps-ethernetlite @00000000000007f4 00000000810017fc-00000000810017ff (prio 0, i/o): ethlite.rx[0]io 0000000081001800-0000000081001ffb (prio 0, i/o): xlnx.xps-ethernetlite @0000000000001800 0000000081001ffc-0000000081001fff (prio 0, i/o): ethlite.rx[1]io Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 79 +++++++++++++++++++++++++++++++++-------- 1 file changed, 65 insertions(+), 14 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 4d86851f38..161fd97f06 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -46,13 +46,18 @@ #define R_TX_CTRL1 (0x0ffc / 4) #define R_RX_BUF0 (0x1000 / 4) -#define R_RX_CTRL0 (0x17fc / 4) +#define A_RX_BASE0 0x17fc #define R_RX_BUF1 (0x1800 / 4) -#define R_RX_CTRL1 (0x1ffc / 4) +#define A_RX_BASE1 0x1ffc #define R_MAX (0x2000 / 4) #define RX_BUFSZ_MAX 0x07e0 +enum { + RX_CTRL = 0, + RX_MAX +}; + #define GIE_GIE 0x80000000 #define CTRL_I 0x8 @@ -61,6 +66,8 @@ typedef struct XlnxXpsEthLitePort { + MemoryRegion rxio; + struct { uint32_t tx_len; uint32_t tx_gie; @@ -118,6 +125,53 @@ static void *rxbuf_ptr(XlnxXpsEthLite *s, unsigned port_index) return &s->regs[rxbase + R_RX_BUF0]; } +static uint64_t port_rx_read(void *opaque, hwaddr addr, unsigned int size) +{ + XlnxXpsEthLite *s = opaque; + unsigned port_index = addr_to_port_index(addr); + uint32_t r = 0; + + switch (addr >> 2) { + case RX_CTRL: + r = s->port[port_index].reg.rx_ctrl; + break; + default: + g_assert_not_reached(); + } + + return r; +} + +static void port_rx_write(void *opaque, hwaddr addr, uint64_t value, + unsigned int size) +{ + XlnxXpsEthLite *s = opaque; + + switch (addr >> 2) { + case RX_CTRL: + if (!(value & CTRL_S)) { + qemu_flush_queued_packets(qemu_get_queue(s->nic)); + } + break; + default: + g_assert_not_reached(); + } +} + +static const MemoryRegionOps eth_portrx_ops = { + .read = port_rx_read, + .write = port_rx_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + }, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, +}; + static uint64_t eth_read(void *opaque, hwaddr addr, unsigned int size) { @@ -143,10 +197,6 @@ eth_read(void *opaque, hwaddr addr, unsigned int size) r = s->port[port_index].reg.tx_ctrl; break; - case R_RX_CTRL1: - case R_RX_CTRL0: - r = s->port[port_index].reg.rx_ctrl; - default: r = tswap32(s->regs[addr]); break; @@ -187,14 +237,6 @@ eth_write(void *opaque, hwaddr addr, break; /* Keep these native. */ - case R_RX_CTRL0: - case R_RX_CTRL1: - if (!(value & CTRL_S)) { - qemu_flush_queued_packets(qemu_get_queue(s->nic)); - } - s->port[port_index].reg.rx_ctrl = value; - break; - case R_TX_LEN0: case R_TX_LEN1: s->port[port_index].reg.tx_len = value; @@ -287,6 +329,15 @@ static void xilinx_ethlite_realize(DeviceState *dev, Error **errp) memory_region_add_subregion(&s->mmio, A_MDIO_BASE, sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mdio), 0)); + for (unsigned i = 0; i < 2; i++) { + memory_region_init_io(&s->port[i].rxio, OBJECT(dev), + ð_portrx_ops, s, + i ? "ethlite.rx[1]io" : "ethlite.rx[0]io", + 4 * RX_MAX); + memory_region_add_subregion(&s->mmio, i ? A_RX_BASE1 : A_RX_BASE0, + &s->port[i].rxio); + } + qemu_macaddr_default_if_unset(&s->conf.macaddr); s->nic = qemu_new_nic(&net_xilinx_ethlite_info, &s->conf, object_get_typename(OBJECT(dev)), dev->id, From patchwork Tue Nov 12 18:10:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842717 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3718093wru; Tue, 12 Nov 2024 10:16:30 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXdu05v0dzdBnj9hnV1oZ2jCrI2GhaGA0RFDKOVffex3Y4Nb4zigZJirJjvyY5327tM9MN8eQ==@linaro.org X-Google-Smtp-Source: AGHT+IH8QF2aBsSJrA8lbWGT8lY1n33cmzKoJn/sTyCleKWQajuIWR4GJAA69ODJ9YA/vktOyXsA X-Received: by 2002:a05:6122:da4:b0:50a:b5a3:e00c with SMTP id 71dfb90a1353d-51401ba5a93mr15934251e0c.1.1731435390547; Tue, 12 Nov 2024 10:16:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435390; cv=none; d=google.com; s=arc-20240605; b=hiN5nxHfCq/ZULCCcG2bFqjBc3dDJqMw5mYj5VMeEX8RJOzTOs/iAeY9OvF8TR/60E BboNLlaKgVchF3SkIyr5mbpWTjtZoSqB7RzVFGDin64KZwOr/UHoqzkMmdQI5kiyW/dB /K2xY4qNqwuPnKO5PRrhW45ngl6ypD9hukGcO22W6TJtpZUgj4GdtTb1OsEdLUPvr+Mp ekmaTE+h6wfewTBa/dFTAeKgwFOZAsQANIp4PjVx2F2CH7t4VfnSgsvzlDmquFzTpW2T WZYcPfGnwocwi7h6V9+vnlHy+N+649etHO/Yudgn8CVG20EQA+2JQ4OJg+yu5c3Mfnbj ii9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=vGBo3n6UAnKrx1s/4bgTSsf0dXQKvd5mL1bf1mP4VKA=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=j9bH4P8b3ueifvho5+jSWcduLDGGNBUJS4pQme+4rd8/gRnX2KjScbY/V/5lFLNoKH HgO+srfRsfqczR7Joo5UuEDx36QdcebqZtlkeMxWSYBB6X2C9+Gjm5++KwR/UwuaYRbU xXnOLf/YWUTMd4A+pgZ6TxYP2ZiPdXUosWlYryQkj96KeNB0J+yX6yqEi3MRKvu0eaRw oeAgBtdbgO3Ui3Z9AFfKzklJcG4lpsxAccvw525fQCt4dfxuCaD6K8/OjYe/jWoTemap 2nUdZZqHW41BLlQbKZUjwpTiW4stZTX7ACi4c6LijdwnO0Uw0YLgKJ5/RWMGaJeBLgQ5 nKIQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qBkdv6jy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381fc0f5f91sm7530136f8f.62.2024.11.12.10.12.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:12:24 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 16/20] hw/net/xilinx_ethlite: Map TX_LEN as MMIO Date: Tue, 12 Nov 2024 19:10:40 +0100 Message-ID: <20241112181044.92193-17-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Declare TX registers as MMIO region, split it out of the current mixed RAM/MMIO region. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 71 ++++++++++++++++++++++++++++++++++------- 1 file changed, 59 insertions(+), 12 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 161fd97f06..159b2b0c64 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -38,11 +38,11 @@ #define A_MDIO_BASE 0x07e4 #define R_TX_BUF0 0 -#define R_TX_LEN0 (0x07f4 / 4) +#define A_TX_BASE0 0x07f4 #define R_TX_GIE0 (0x07f8 / 4) #define R_TX_CTRL0 (0x07fc / 4) #define R_TX_BUF1 (0x0800 / 4) -#define R_TX_LEN1 (0x0ff4 / 4) +#define A_TX_BASE1 0x0ff4 #define R_TX_CTRL1 (0x0ffc / 4) #define R_RX_BUF0 (0x1000 / 4) @@ -53,6 +53,11 @@ #define RX_BUFSZ_MAX 0x07e0 +enum { + TX_LEN = 0, + TX_MAX +}; + enum { RX_CTRL = 0, RX_MAX @@ -125,6 +130,51 @@ static void *rxbuf_ptr(XlnxXpsEthLite *s, unsigned port_index) return &s->regs[rxbase + R_RX_BUF0]; } +static uint64_t port_tx_read(void *opaque, hwaddr addr, unsigned int size) +{ + XlnxXpsEthLite *s = opaque; + unsigned port_index = addr_to_port_index(addr); + uint32_t r = 0; + + switch (addr >> 2) { + case TX_LEN: + r = s->port[port_index].reg.tx_len; + break; + default: + g_assert_not_reached(); + } + + return r; +} + +static void port_tx_write(void *opaque, hwaddr addr, uint64_t value, + unsigned int size) +{ + XlnxXpsEthLite *s = opaque; + + switch (addr >> 2) { + case TX_LEN: + s->port[port_index].reg.tx_len = value; + break; + default: + g_assert_not_reached(); + } +} + +static const MemoryRegionOps eth_porttx_ops = { + .read = port_tx_read, + .write = port_tx_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + }, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, +}; + static uint64_t port_rx_read(void *opaque, hwaddr addr, unsigned int size) { XlnxXpsEthLite *s = opaque; @@ -187,11 +237,6 @@ eth_read(void *opaque, hwaddr addr, unsigned int size) r = s->port[port_index].reg.tx_gie; break; - case R_TX_LEN0: - case R_TX_LEN1: - r = s->port[port_index].reg.tx_len; - break; - case R_TX_CTRL1: case R_TX_CTRL0: r = s->port[port_index].reg.tx_ctrl; @@ -237,11 +282,6 @@ eth_write(void *opaque, hwaddr addr, break; /* Keep these native. */ - case R_TX_LEN0: - case R_TX_LEN1: - s->port[port_index].reg.tx_len = value; - break; - case R_TX_GIE0: s->port[port_index].reg.tx_gie = value; break; @@ -330,6 +370,13 @@ static void xilinx_ethlite_realize(DeviceState *dev, Error **errp) sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mdio), 0)); for (unsigned i = 0; i < 2; i++) { + memory_region_init_io(&s->port[i].txio, OBJECT(dev), + ð_porttx_ops, s, + i ? "ethlite.tx[1]io" : "ethlite.tx[0]io", + 4 * TX_MAX); + memory_region_add_subregion(&s->mmio, i ? A_TX_BASE1 : A_TX_BASE0, + &s->port[i].txio); + memory_region_init_io(&s->port[i].rxio, OBJECT(dev), ð_portrx_ops, s, i ? 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381ed9ea3cbsm16209684f8f.74.2024.11.12.10.12.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:12:30 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 17/20] hw/net/xilinx_ethlite: Map TX_GIE as MMIO Date: Tue, 12 Nov 2024 19:10:41 +0100 Message-ID: <20241112181044.92193-18-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Add TX_GIE to the TX registers MMIO region. Before TX_GIE1 was accessed as RAM, with no effect. Now it is accessed as MMIO, also without any effect. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 159b2b0c64..f7a5b1620a 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -39,7 +39,6 @@ #define R_TX_BUF0 0 #define A_TX_BASE0 0x07f4 -#define R_TX_GIE0 (0x07f8 / 4) #define R_TX_CTRL0 (0x07fc / 4) #define R_TX_BUF1 (0x0800 / 4) #define A_TX_BASE1 0x0ff4 @@ -55,6 +54,7 @@ enum { TX_LEN = 0, + TX_GIE = 1, TX_MAX }; @@ -140,6 +140,9 @@ static uint64_t port_tx_read(void *opaque, hwaddr addr, unsigned int size) case TX_LEN: r = s->port[port_index].reg.tx_len; break; + case TX_GIE: + r = s->port[port_index].reg.tx_gie; + break; default: g_assert_not_reached(); } @@ -156,6 +159,9 @@ static void port_tx_write(void *opaque, hwaddr addr, uint64_t value, case TX_LEN: s->port[port_index].reg.tx_len = value; break; + case TX_GIE: + s->port[port_index].reg.tx_gie = value; + break; default: g_assert_not_reached(); } @@ -233,10 +239,6 @@ eth_read(void *opaque, hwaddr addr, unsigned int size) switch (addr) { - case R_TX_GIE0: - r = s->port[port_index].reg.tx_gie; - break; - case R_TX_CTRL1: case R_TX_CTRL0: r = s->port[port_index].reg.tx_ctrl; @@ -281,11 +283,6 @@ eth_write(void *opaque, hwaddr addr, s->port[port_index].reg.tx_ctrl = value & ~(CTRL_P | CTRL_S); break; - /* Keep these native. */ - case R_TX_GIE0: - s->port[port_index].reg.tx_gie = value; - break; - default: s->regs[addr] = tswap32(value); break; From patchwork Tue Nov 12 18:10:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 842713 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp3716877wru; Tue, 12 Nov 2024 10:14:29 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCX+dK39ONFvZsOwnnzeXZFjmHogwJHX+RV2nSauhGXjDivg7EKbVvAc3ZLMULJ07l8pidJdDw==@linaro.org X-Google-Smtp-Source: AGHT+IGwXlqQpnBUcs6WhyHa+ia/27MRuKMBV3QuIYvmr63isbx7WFItlK6QPRo6u8gLH07eHVDe X-Received: by 2002:a05:6102:c14:b0:492:9e3a:9f48 with SMTP id ada2fe7eead31-4aae134c2d1mr13884887137.2.1731435269344; Tue, 12 Nov 2024 10:14:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1731435269; cv=none; d=google.com; s=arc-20240605; b=SAwVeOxjvzYAlLajB3YbDony2tu+6QT2BJ58ZaH0dlnS//heEZzrLgYnBSiMhfHd+r cFwqGuNr9RAJwBpa0xtkBxFge3rBfoWaFOu504CIztxNDcVllynWL9loQzKdg2wdP/mV ZJhDGbEMQvUugYipng+D1w//6logvThIx5vi609w1RqA/WfnZlmgO3AGYfOKHU5yoRjm Ws3fajI6AN/GLMeMJBMlUAPjrTDziXR+jSx3Qqlu8g2yhTAuyTTqZJRln4eXpVLHNE6m A02+DuFdz2WIBQ5/CLFGWKTvbe356uwQZT9TtMFY8tWJwCCSpncIYfucG60RpQMAmXmi uvwA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=toHAwahSX4A1oHkXEKjfL9qzsyS5xjf5aUzpCpynlgA=; fh=qmVcbpKGT2NGruxhf8fgQHnlhHRaRjD5ibgD08FHYfA=; b=S/1mvCx/HJ/n3/tOArAThlZtTvH8vW4u0q1uJy/Dk3XM0BDTINp6NAiN5fUNQtka1W atTS+fUh0cXq0qJabhQkygIT/IsH8I0xZShHTC/pjz0MtTdBnd3O0XKmm/NjFAlkwC06 nG6tS3C/1PF6wC185896DxutW+/rD4KwIo2lAT3h6nEHi1e5bT2rarQXC4Ol+yTGL68r kLR2Uqaicj703jerNJRqREAlzKblcc8LCSB6h0xd7mJ12pz12qfCJ7XL4k2vL2aUxV5C mzsKFbYuzMXJl0R2yqIOQ4USgvsHhM2yRw31Ddn5diBihfHT/Jbqq5MzopR9W4PU8pYD UqGg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TPSdYAfR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381ed997391sm16150539f8f.45.2024.11.12.10.12.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:12:36 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 18/20] hw/net/xilinx_ethlite: Map TX_CTRL as MMIO Date: Tue, 12 Nov 2024 19:10:42 +0100 Message-ID: <20241112181044.92193-19-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Add TX_CTRL to the TX registers MMIO region. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 56 +++++++++++++++++++---------------------- 1 file changed, 26 insertions(+), 30 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index f7a5b1620a..f681b91769 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -39,10 +39,8 @@ #define R_TX_BUF0 0 #define A_TX_BASE0 0x07f4 -#define R_TX_CTRL0 (0x07fc / 4) #define R_TX_BUF1 (0x0800 / 4) #define A_TX_BASE1 0x0ff4 -#define R_TX_CTRL1 (0x0ffc / 4) #define R_RX_BUF0 (0x1000 / 4) #define A_RX_BASE0 0x17fc @@ -55,6 +53,7 @@ enum { TX_LEN = 0, TX_GIE = 1, + TX_CTRL = 2, TX_MAX }; @@ -71,6 +70,7 @@ enum { typedef struct XlnxXpsEthLitePort { + MemoryRegion txio; MemoryRegion rxio; struct { @@ -143,6 +143,9 @@ static uint64_t port_tx_read(void *opaque, hwaddr addr, unsigned int size) case TX_GIE: r = s->port[port_index].reg.tx_gie; break; + case TX_CTRL: + r = s->port[port_index].reg.tx_ctrl; + break; default: g_assert_not_reached(); } @@ -154,6 +157,7 @@ static void port_tx_write(void *opaque, hwaddr addr, uint64_t value, unsigned int size) { XlnxXpsEthLite *s = opaque; + unsigned port_index = addr_to_port_index(addr); switch (addr >> 2) { case TX_LEN: @@ -162,6 +166,26 @@ static void port_tx_write(void *opaque, hwaddr addr, uint64_t value, case TX_GIE: s->port[port_index].reg.tx_gie = value; break; + case TX_CTRL: + if ((value & (CTRL_P | CTRL_S)) == CTRL_S) { + qemu_send_packet(qemu_get_queue(s->nic), + txbuf_ptr(s, port_index), + s->port[port_index].reg.tx_len); + if (s->port[port_index].reg.tx_ctrl & CTRL_I) { + eth_pulse_irq(s); + } + } else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) { + memcpy(&s->conf.macaddr.a[0], txbuf_ptr(s, port_index), 6); + if (s->port[port_index].reg.tx_ctrl & CTRL_I) { + eth_pulse_irq(s); + } + } + /* + * We are fast and get ready pretty much immediately + * so we actually never flip the S nor P bits to one. + */ + s->port[port_index].reg.tx_ctrl = value & ~(CTRL_P | CTRL_S); + break; default: g_assert_not_reached(); } @@ -232,18 +256,12 @@ static uint64_t eth_read(void *opaque, hwaddr addr, unsigned int size) { XlnxXpsEthLite *s = opaque; - unsigned port_index = addr_to_port_index(addr); uint32_t r = 0; addr >>= 2; switch (addr) { - case R_TX_CTRL1: - case R_TX_CTRL0: - r = s->port[port_index].reg.tx_ctrl; - break; - default: r = tswap32(s->regs[addr]); break; @@ -256,33 +274,11 @@ eth_write(void *opaque, hwaddr addr, uint64_t val64, unsigned int size) { XlnxXpsEthLite *s = opaque; - unsigned int port_index = addr_to_port_index(addr); uint32_t value = val64; addr >>= 2; switch (addr) { - case R_TX_CTRL0: - case R_TX_CTRL1: - if ((value & (CTRL_P | CTRL_S)) == CTRL_S) { - qemu_send_packet(qemu_get_queue(s->nic), - txbuf_ptr(s, port_index), - s->port[port_index].reg.tx_len); - if (s->port[port_index].reg.tx_ctrl & CTRL_I) { - eth_pulse_irq(s); - } - } else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) { - memcpy(&s->conf.macaddr.a[0], txbuf_ptr(s, port_index), 6); - if (s->port[port_index].reg.tx_ctrl & CTRL_I) { - eth_pulse_irq(s); - } - } - - /* We are fast and get ready pretty much immediately so - we actually never flip the S nor P bits to one. */ - s->port[port_index].reg.tx_ctrl = value & ~(CTRL_P | CTRL_S); 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432aa6bee9asm260965995e9.19.2024.11.12.10.12.41 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:12:42 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 19/20] hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region Date: Tue, 12 Nov 2024 19:10:43 +0100 Message-ID: <20241112181044.92193-20-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rather than using I/O registers for RAM buffer, having to swap endianness back and forth (because the core memory layer automatically swaps endiannes for us), declare the buffers as RAM regions. Remove the now unused s->regs[] array. The memory flat view becomes: FlatView #0 Root memory region: system 0000000081000000-00000000810007f3 (prio 0, ram): ethlite.tx[0]buf 00000000810007f4-00000000810007ff (prio 0, i/o): ethlite.tx[0]io 0000000081000800-0000000081000ff3 (prio 0, ram): ethlite.tx[1]buf 0000000081000ff4-0000000081000fff (prio 0, i/o): ethlite.tx[1]io 0000000081001000-00000000810017f3 (prio 0, ram): ethlite.rx[0]buf 00000000810017fc-00000000810017ff (prio 0, i/o): ethlite.rx[0]io 0000000081001800-0000000081001ff3 (prio 0, ram): ethlite.rx[1]buf 0000000081001ffc-0000000081001fff (prio 0, i/o): ethlite.rx[1]io Mention the device datasheet in the file header. Reported-by: Paolo Bonzini Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 79 +++++++++++------------------------------ 1 file changed, 20 insertions(+), 59 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index f681b91769..da453465ca 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -2,6 +2,10 @@ * QEMU model of the Xilinx Ethernet Lite MAC. * * Copyright (c) 2009 Edgar E. Iglesias. + * Copyright (c) 2024 Linaro, Ltd + * + * DS580: https://docs.amd.com/v/u/en-US/xps_ethernetlite + * LogiCORE IP XPS Ethernet Lite Media Access Controller * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -27,7 +31,6 @@ #include "qemu/bitops.h" #include "qom/object.h" #include "qapi/error.h" -#include "exec/tswap.h" #include "hw/sysbus.h" #include "hw/irq.h" #include "hw/qdev-properties.h" @@ -46,7 +49,6 @@ #define A_RX_BASE0 0x17fc #define R_RX_BUF1 (0x1800 / 4) #define A_RX_BASE1 0x1ffc -#define R_MAX (0x2000 / 4) #define RX_BUFSZ_MAX 0x07e0 @@ -72,6 +74,8 @@ typedef struct XlnxXpsEthLitePort { MemoryRegion txio; MemoryRegion rxio; + MemoryRegion txbuf; + MemoryRegion rxbuf; struct { uint32_t tx_len; @@ -100,7 +104,6 @@ struct XlnxXpsEthLite UnimplementedDeviceState mdio; XlnxXpsEthLitePort port[2]; - uint32_t regs[R_MAX]; }; static inline void eth_pulse_irq(XlnxXpsEthLite *s) @@ -118,16 +121,12 @@ static unsigned addr_to_port_index(hwaddr addr) static void *txbuf_ptr(XlnxXpsEthLite *s, unsigned port_index) { - unsigned int rxbase = port_index * (0x800 / 4); - - return &s->regs[rxbase + R_TX_BUF0]; + return memory_region_get_ram_ptr(&s->port[port_index].txbuf); } static void *rxbuf_ptr(XlnxXpsEthLite *s, unsigned port_index) { - unsigned int rxbase = port_index * (0x800 / 4); - - return &s->regs[rxbase + R_RX_BUF0]; + return memory_region_get_ram_ptr(&s->port[port_index].rxbuf); } static uint64_t port_tx_read(void *opaque, hwaddr addr, unsigned int size) @@ -252,53 +251,6 @@ static const MemoryRegionOps eth_portrx_ops = { }, }; -static uint64_t -eth_read(void *opaque, hwaddr addr, unsigned int size) -{ - XlnxXpsEthLite *s = opaque; - uint32_t r = 0; - - addr >>= 2; - - switch (addr) - { - default: - r = tswap32(s->regs[addr]); - break; - } - return r; -} - -static void -eth_write(void *opaque, hwaddr addr, - uint64_t val64, unsigned int size) -{ - XlnxXpsEthLite *s = opaque; - uint32_t value = val64; - - addr >>= 2; - switch (addr) - { - default: - s->regs[addr] = tswap32(value); - break; - } -} - -static const MemoryRegionOps eth_ops = { - .read = eth_read, - .write = eth_write, - .endianness = DEVICE_NATIVE_ENDIAN, - .impl = { - .min_access_size = 4, - .max_access_size = 4, - }, - .valid = { - .min_access_size = 4, - .max_access_size = 4 - } -}; - static bool eth_can_rx(NetClientState *nc) { XlnxXpsEthLite *s = qemu_get_nic_opaque(nc); @@ -354,6 +306,9 @@ static void xilinx_ethlite_realize(DeviceState *dev, Error **errp) { XlnxXpsEthLite *s = XILINX_ETHLITE(dev); + memory_region_init(&s->mmio, OBJECT(dev), + "xlnx.xps-ethernetlite", 0x2000); + object_initialize_child(OBJECT(dev), "ethlite.mdio", &s->mdio, TYPE_UNIMPLEMENTED_DEVICE); qdev_prop_set_string(DEVICE(&s->mdio), "name", "ethlite.mdio"); @@ -363,6 +318,10 @@ static void xilinx_ethlite_realize(DeviceState *dev, Error **errp) sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mdio), 0)); for (unsigned i = 0; i < 2; i++) { + memory_region_init_ram(&s->port[i].txbuf, OBJECT(dev), + i ? "ethlite.tx[1]buf" : "ethlite.tx[0]buf", + 0x07f4, &error_abort); + memory_region_add_subregion(&s->mmio, 0x0800 * i, &s->port[i].txbuf); memory_region_init_io(&s->port[i].txio, OBJECT(dev), ð_porttx_ops, s, i ? "ethlite.tx[1]io" : "ethlite.tx[0]io", @@ -370,6 +329,11 @@ static void xilinx_ethlite_realize(DeviceState *dev, Error **errp) memory_region_add_subregion(&s->mmio, i ? A_TX_BASE1 : A_TX_BASE0, &s->port[i].txio); + memory_region_init_ram(&s->port[i].rxbuf, OBJECT(dev), + i ? "ethlite.rx[1]buf" : "ethlite.rx[0]buf", + 0x07f4, &error_abort); + memory_region_add_subregion(&s->mmio, 0x1000 + 0x0800 * i, + &s->port[i].rxbuf); memory_region_init_io(&s->port[i].rxio, OBJECT(dev), ð_portrx_ops, s, i ? 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[176.184.27.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381ed970f68sm16118908f8f.11.2024.11.12.10.12.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 12 Nov 2024 10:12:48 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Richard Henderson , Peter Maydell , Anton Johansson , Jason Wang , qemu-arm@nongnu.org, =?utf-8?q?Marc-Andr?= =?utf-8?q?=C3=A9_Lureau?= , Thomas Huth , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 20/20] hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container' Date: Tue, 12 Nov 2024 19:10:44 +0100 Message-ID: <20241112181044.92193-21-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112181044.92193-1-philmd@linaro.org> References: <20241112181044.92193-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Having all its address range mapped by subregions, s->mmio MemoryRegion effectively became a container. Rename it as 'container' for clarity. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- hw/net/xilinx_ethlite.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index da453465ca..c65001cf46 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -93,7 +93,7 @@ struct XlnxXpsEthLite { SysBusDevice parent_obj; - MemoryRegion mmio; + MemoryRegion container; qemu_irq irq; NICState *nic; NICConf conf; @@ -306,7 +306,7 @@ static void xilinx_ethlite_realize(DeviceState *dev, Error **errp) { XlnxXpsEthLite *s = XILINX_ETHLITE(dev); - memory_region_init(&s->mmio, OBJECT(dev), + memory_region_init(&s->container, OBJECT(dev), "xlnx.xps-ethernetlite", 0x2000); object_initialize_child(OBJECT(dev), "ethlite.mdio", &s->mdio, @@ -314,31 +314,31 @@ static void xilinx_ethlite_realize(DeviceState *dev, Error **errp) qdev_prop_set_string(DEVICE(&s->mdio), "name", "ethlite.mdio"); qdev_prop_set_uint64(DEVICE(&s->mdio), "size", 4 * 4); sysbus_realize(SYS_BUS_DEVICE(&s->mdio), &error_fatal); - memory_region_add_subregion(&s->mmio, A_MDIO_BASE, + memory_region_add_subregion(&s->container, A_MDIO_BASE, sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mdio), 0)); for (unsigned i = 0; i < 2; i++) { memory_region_init_ram(&s->port[i].txbuf, OBJECT(dev), i ? "ethlite.tx[1]buf" : "ethlite.tx[0]buf", 0x07f4, &error_abort); - memory_region_add_subregion(&s->mmio, 0x0800 * i, &s->port[i].txbuf); + memory_region_add_subregion(&s->container, 0x0800 * i, &s->port[i].txbuf); memory_region_init_io(&s->port[i].txio, OBJECT(dev), ð_porttx_ops, s, i ? "ethlite.tx[1]io" : "ethlite.tx[0]io", 4 * TX_MAX); - memory_region_add_subregion(&s->mmio, i ? A_TX_BASE1 : A_TX_BASE0, + memory_region_add_subregion(&s->container, i ? A_TX_BASE1 : A_TX_BASE0, &s->port[i].txio); memory_region_init_ram(&s->port[i].rxbuf, OBJECT(dev), i ? "ethlite.rx[1]buf" : "ethlite.rx[0]buf", 0x07f4, &error_abort); - memory_region_add_subregion(&s->mmio, 0x1000 + 0x0800 * i, + memory_region_add_subregion(&s->container, 0x1000 + 0x0800 * i, &s->port[i].rxbuf); memory_region_init_io(&s->port[i].rxio, OBJECT(dev), ð_portrx_ops, s, i ? "ethlite.rx[1]io" : "ethlite.rx[0]io", 4 * RX_MAX); - memory_region_add_subregion(&s->mmio, i ? A_RX_BASE1 : A_RX_BASE0, + memory_region_add_subregion(&s->container, i ? A_RX_BASE1 : A_RX_BASE0, &s->port[i].rxio); } @@ -354,7 +354,7 @@ static void xilinx_ethlite_init(Object *obj) XlnxXpsEthLite *s = XILINX_ETHLITE(obj); sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq); - sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->container); } static Property xilinx_ethlite_properties[] = {