From patchwork Fri Nov 8 06:56:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 842008 Received: from mail-m121152.qiye.163.com (mail-m121152.qiye.163.com [115.236.121.152]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38DC6E567; Fri, 8 Nov 2024 07:02:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=115.236.121.152 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731049340; cv=none; b=RmC3YM+RmlY4lTGrD66RMOPDryf1E2UvpWkMeYLxzKhSr9/IS22ClSlMlLpN//JqjT9kw7ADvslAKEJ/WjdXetXgxprpaV0/mGXR0HbFZ0vX/cv4SnW471XQZ7RqqNvyQ0LbbQZRWmxcVAkMv9v40ok81oyncu1X4TuOYKDO67c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731049340; c=relaxed/simple; bh=kGTpQp8EW8XsjrZQ5quxicyfgsRmWzXgSlr5j0fuUKk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=qK4VUsVJhjmYKbXz5pbF0VlmQ0iG5MfMdTTINRWj907qWg2NJgLpEvPAJsZt5cN3Rlmh+sIsELRAditonDqe8JoXY0GXFLorc9ky4hBO0EASko1CpG2hbbzlxSZuh8FKzjnVxy8eCm9ALcakP3eThqdtMzG38WgiZCsiHX7Y/l8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=fK9EP0iA; arc=none smtp.client-ip=115.236.121.152 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="fK9EP0iA" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 22d35fe2; Fri, 8 Nov 2024 14:56:59 +0800 (GMT+08:00) From: Shawn Lin To: Rob Herring , "James E . J . Bottomley" , "Martin K . Petersen" , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Heiko Stuebner , "Rafael J . Wysocki" Cc: Manivannan Sadhasivam , Alim Akhtar , Avri Altman , Bart Van Assche , YiFeng Zhao , Liang Chen , linux-scsi@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Lin Subject: [PATCH v5 1/7] dt-bindings: ufs: Document Rockchip UFS host controller Date: Fri, 8 Nov 2024 14:56:20 +0800 Message-Id: <1731048987-229149-2-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1731048987-229149-1-git-send-email-shawn.lin@rock-chips.com> References: <1731048987-229149-1-git-send-email-shawn.lin@rock-chips.com> X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZQx9JGlZNQh5LTUNIGBkfQkNWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSUhCSE NVSktLVUpCS0tZBg++ X-HM-Tid: 0a930a8fd78d09cckunm22d35fe2 X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6NhQ6Pjo*IjIqLCo1US8IKz0i FTUwCRZVSlVKTEhKS09CS0lLQkhJVTMWGhIXVQgTGgwVVRcSFTsJFBgQVhgTEgsIVRgUFkVZV1kS C1lBWU5DVUlJVUxVSkpPWVdZCAFZQUhCSkM3Bg++ DKIM-Signature: a=rsa-sha256; b=fK9EP0iAzy9uJo0ZQzMFlE+yfD8QOuHvU0NMTPaDFRuBvwe9UEl6X4gZMbTBEzQXUzvRLZIYgv8FIw4D3qgDq5AYMD34qMdjfOU6FB1ePeB/Dxoj7NKZ0mDDbhIFk8sUPOAeL0W8ATX+c4pr9q184soJE/6GtYzEHnlAHMXGBTE=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=u73A+oVy3X2OjpkaOJXO2sj69eyrQLsFTXdCepRWpoE=; h=date:mime-version:subject:message-id:from; Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Document Rockchip UFS host controller for RK3576 SoC. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Shawn Lin --- Changes in v5: - use ufshc for devicetree example suggested by Mani Changes in v4: - properly describe reset-gpios Changes in v3: - rename the file to rockchip,rk3576-ufshc.yaml - add description for reset-gpios - use rockchip,rk3576-ufshc as compatible Changes in v2: - rename the file - add reset-gpios .../bindings/ufs/rockchip,rk3576-ufshc.yaml | 105 +++++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 Documentation/devicetree/bindings/ufs/rockchip,rk3576-ufshc.yaml diff --git a/Documentation/devicetree/bindings/ufs/rockchip,rk3576-ufshc.yaml b/Documentation/devicetree/bindings/ufs/rockchip,rk3576-ufshc.yaml new file mode 100644 index 0000000..7d6c038 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/rockchip,rk3576-ufshc.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/rockchip,rk3576-ufshc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip UFS Host Controller + +maintainers: + - Shawn Lin + +allOf: + - $ref: ufs-common.yaml + +properties: + compatible: + const: rockchip,rk3576-ufshc + + reg: + maxItems: 5 + + reg-names: + items: + - const: hci + - const: mphy + - const: hci_grf + - const: mphy_grf + - const: hci_apb + + clocks: + maxItems: 4 + + clock-names: + items: + - const: core + - const: pclk + - const: pclk_mphy + - const: ref_out + + power-domains: + maxItems: 1 + + resets: + maxItems: 4 + + reset-names: + items: + - const: biu + - const: sys + - const: ufs + - const: grf + + reset-gpios: + maxItems: 1 + description: | + GPIO specifiers for host to reset the whole UFS device including PHY and + memory. This gpio is active low and should choose the one whose high output + voltage is lower than 1.5V based on the UFS spec. + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - power-domains + - resets + - reset-names + - reset-gpios + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + ufshc: ufshc@2a2d0000 { + compatible = "rockchip,rk3576-ufshc"; + reg = <0x0 0x2a2d0000 0x0 0x10000>, + <0x0 0x2b040000 0x0 0x10000>, + <0x0 0x2601f000 0x0 0x1000>, + <0x0 0x2603c000 0x0 0x1000>, + <0x0 0x2a2e0000 0x0 0x10000>; + reg-names = "hci", "mphy", "hci_grf", "mphy_grf", "hci_apb"; + clocks = <&cru ACLK_UFS_SYS>, <&cru PCLK_USB_ROOT>, <&cru PCLK_MPHY>, + <&cru CLK_REF_UFS_CLKOUT>; + clock-names = "core", "pclk", "pclk_mphy", "ref_out"; + interrupts = ; + power-domains = <&power RK3576_PD_USB>; + resets = <&cru SRST_A_UFS_BIU>, <&cru SRST_A_UFS_SYS>, <&cru SRST_A_UFS>, + <&cru SRST_P_UFS_GRF>; + reset-names = "biu", "sys", "ufs", "grf"; + reset-gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>; + }; + }; From patchwork Fri Nov 8 06:56:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 842007 Received: from mail-m1973170.qiye.163.com (mail-m1973170.qiye.163.com [220.197.31.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 95DDEDDA8; Fri, 8 Nov 2024 07:12:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.31.70 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731049964; cv=none; b=Gcfpekv0llfqhDvri//LUFiFE5eFBDN3HFvLENVqdCKUr+zPS0flKW/tt5A8wipOfZArg887MX7z2atc79xLbEoitJB7L1srueEiImMzUnop/CtTNdVXepMlhsqld7iDDOktvCNwphx/lLfyQtJbUYOUu3UXcvtbujlLYucx048= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731049964; c=relaxed/simple; bh=BrnlGnnhDEsGBKrLrVaO+AkaSyBoaxe0H46xA1D5Kfs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=PoTGAQelvB2Q1G/CN8SX02UKHiUV611bZH8PRK9MtXgegTke5K0OGOOE12Z1xIpKp9QY/MIEv+8Dp+QYcbDQUrzpemj8jUPOiySYkVOwfFtEeMh9X0zbAUslHlVtVKCPzAwD8ADR1wrELanNMwhig90EKm+JOyi/wXrZWXYAAkU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=EvX9HFbg; arc=none smtp.client-ip=220.197.31.70 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="EvX9HFbg" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 22d55bed; Fri, 8 Nov 2024 14:57:14 +0800 (GMT+08:00) From: Shawn Lin To: Rob Herring , "James E . J . Bottomley" , "Martin K . Petersen" , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Heiko Stuebner , "Rafael J . Wysocki" Cc: Manivannan Sadhasivam , Alim Akhtar , Avri Altman , Bart Van Assche , YiFeng Zhao , Liang Chen , linux-scsi@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Lin Subject: [PATCH v5 2/7] soc: rockchip: add header for suspend mode SIP interface Date: Fri, 8 Nov 2024 14:56:21 +0800 Message-Id: <1731048987-229149-3-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1731048987-229149-1-git-send-email-shawn.lin@rock-chips.com> References: <1731048987-229149-1-git-send-email-shawn.lin@rock-chips.com> X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZQkseQlZCTk4dHk1NQk1NSh1WFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0 hVSktLVUpCS0tZBg++ X-HM-Tid: 0a930a90140009cckunm22d55bed X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6Pio6GAw5FjIZMCoREC8uKy4u OgkKChxVSlVKTEhKS09CS0hNT05LVTMWGhIXVQgTGgwVVRcSFTsJFBgQVhgTEgsIVRgUFkVZV1kS C1lBWU5DVUlJVUxVSkpPWVdZCAFZQUJMTjcG DKIM-Signature: a=rsa-sha256; b=EvX9HFbgHRds46heWcpaAQbr9uqJzx+7S0XO0IghFwtnEsDuyv6Eijkyn1YZki04D3RVMzt1qtBdciCIU+xxye+ZunJH8Q5C+1NpnGRijZnKprcGPqod64KvcCIvbt4w87c6v2TZxG/YSH62Tts4abGktyWb5OMBVh01dEdFZLs=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=HExq89J04oe4XAe0XhWdyylqjS+SWwit6uhZCVLqyMI=; h=date:mime-version:subject:message-id:from; Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Add ROCKCHIP_SIP_SUSPEND_MODE to pass down parameters to Trusted Firmware in order to decide suspend mode. Currently only add ROCKCHIP_SLEEP_PD_CONFIG which teaches firmware to power down controllers or not. Signed-off-by: Shawn Lin --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None include/soc/rockchip/rockchip_sip.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/soc/rockchip/rockchip_sip.h b/include/soc/rockchip/rockchip_sip.h index c46a9ae..501ad1f 100644 --- a/include/soc/rockchip/rockchip_sip.h +++ b/include/soc/rockchip/rockchip_sip.h @@ -6,6 +6,9 @@ #ifndef __SOC_ROCKCHIP_SIP_H #define __SOC_ROCKCHIP_SIP_H +#define ROCKCHIP_SIP_SUSPEND_MODE 0x82000003 +#define ROCKCHIP_SLEEP_PD_CONFIG 0xff + #define ROCKCHIP_SIP_DRAM_FREQ 0x82000008 #define ROCKCHIP_SIP_CONFIG_DRAM_INIT 0x00 #define ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE 0x01 From patchwork Fri Nov 8 06:56:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 842009 Received: from mail-m6093.netease.com (mail-m6093.netease.com [210.79.60.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E88D21D0E30; Fri, 8 Nov 2024 06:57:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.79.60.93 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731049081; cv=none; b=eGpO4EKwxy1YeJ1nhXjOt8WjAmMjUqYGOYSdls3pImVzm73EcHtmYqiPp6Y0zTu/a4WLiYn8gt252JsGJOtiVZLC9wdelfPW3gh5smvvF8vTbCpLDlrG9u/osB/7Up70sk+LYqPIAOD7Gy4YpD3v2CRHATXF+/PZvrjRcI9s8QE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731049081; c=relaxed/simple; bh=UcJC9L9802eGFZM5sKRgW3Du9kKWPCcH1zwqSk3Tl2E=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=rbFlmG29wgO+A0QfHCUpdcLKDv/gvebj9AezKUVnu+Xg+m8xPvJZqVKNfVagRB203kCnrhqZXvThTvJ0Bf0h9PoDbt0d5obOko2N1OBGro4I6UO8ymC07dzt3sH+G8+lT9jmMLWUUiz36robMxATvVYKKCcmwo3o1uI5BU7FY3E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=DSetdHpX; arc=none smtp.client-ip=210.79.60.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="DSetdHpX" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 22d55c8d; Fri, 8 Nov 2024 14:57:47 +0800 (GMT+08:00) From: Shawn Lin To: Rob Herring , "James E . J . Bottomley" , "Martin K . Petersen" , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Heiko Stuebner , "Rafael J . Wysocki" Cc: Manivannan Sadhasivam , Alim Akhtar , Avri Altman , Bart Van Assche , YiFeng Zhao , Liang Chen , linux-scsi@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Lin Subject: [PATCH v5 4/7] pmdomain: rockchip: Add smc call to inform firmware Date: Fri, 8 Nov 2024 14:56:23 +0800 Message-Id: <1731048987-229149-5-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1731048987-229149-1-git-send-email-shawn.lin@rock-chips.com> References: <1731048987-229149-1-git-send-email-shawn.lin@rock-chips.com> X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZQ0JCHlZPTUNCTUkaSUtMQxlWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSUhCSE NVSktLVUpCS0tZBg++ X-HM-Tid: 0a930a90928209cckunm22d55c8d X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PSo6HBw4MzIjNCoPUSpCKwhD Ci0wCQtVSlVKTEhKS09CS01DTUJKVTMWGhIXVQgTGgwVVRcSFTsJFBgQVhgTEgsIVRgUFkVZV1kS C1lBWU5DVUlJVUxVSkpPWVdZCAFZQUpDSk03Bg++ DKIM-Signature: a=rsa-sha256; b=DSetdHpXNXDwak1GGqzp4RY5M6CqTgfsKoF9DlaDV4FxCJqDmR2qyDXKTRun4/bxHzCENUzzqK+fXjcCie4MTCGJG+DqEbJ3wF0TtJux01lW3e/GJoEkD/kgoIy1QtTaF1WSgLCRDC4CcOxUDPzxE9QLq+4mo/4ZmO/WhdobHH4=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=2NyPYvYg2Dghh9vSnqVVMEZ1p9KuX17hf7zqDWcgQNg=; h=date:mime-version:subject:message-id:from; Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Inform firmware to keep the power domain on or off. Suggested-by: Ulf Hansson Signed-off-by: Shawn Lin --- Changes in v5: - fix a compile warning Changes in v4: None Changes in v3: None Changes in v2: None drivers/pmdomain/rockchip/pm-domains.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c index cb0f938..49842f1 100644 --- a/drivers/pmdomain/rockchip/pm-domains.c +++ b/drivers/pmdomain/rockchip/pm-domains.c @@ -5,6 +5,7 @@ * Copyright (c) 2015 ROCKCHIP, Co. Ltd. */ +#include #include #include #include @@ -20,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -540,6 +542,7 @@ static void rockchip_do_pmu_set_power_domain(struct rockchip_pm_domain *pd, struct generic_pm_domain *genpd = &pd->genpd; u32 pd_pwr_offset = pd->info->pwr_offset; bool is_on, is_mem_on = false; + struct arm_smccc_res res; if (pd->info->pwr_mask == 0) return; @@ -567,6 +570,11 @@ static void rockchip_do_pmu_set_power_domain(struct rockchip_pm_domain *pd, genpd->name, is_on); return; } + + /* Inform firmware to keep this pd on or off */ + arm_smccc_smc(ROCKCHIP_SIP_SUSPEND_MODE, ROCKCHIP_SLEEP_PD_CONFIG, + pmu->info->pwr_offset + pd_pwr_offset, + pd->info->pwr_mask, on, 0, 0, 0, &res); } static int rockchip_pd_power(struct rockchip_pm_domain *pd, bool power_on)