From patchwork Wed Nov 6 12:52:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?Wm9pZSBMaW4gKOael+emueWmoSk=?= X-Patchwork-Id: 841178 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6ECB71FB883; Wed, 6 Nov 2024 12:54:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730897688; cv=none; b=MttMTl5UHmkxUmbzb2m011gnB7YhZgj+ATwe6YxWHfquTmWXnb9zOOegMLq+mfkUR26aw9is4iIAJY1LcNmIAlHUj5c7enX4uyPf4/8UYlNcBQmfmPbxamr5yXYT6y7BhtYVF8pXx8Nu1ff+VnxxSgUL9SHc3LuqFvKHVOwqwIU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730897688; c=relaxed/simple; bh=PvOY9A2E8lcql5RnxAoTvCuDN2azL5F41W/oceLJfMo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=lSVm97pAm7J+5WdY+yaTN5cmyatZ1KzOrqXDoqSu+kDrvT4NaBBgxgbutuoalj2dtPZDBDZpmktIPNa9tfxB9bF3uTIj86UOhfA+ioPvMjk3TlaX5CsJfJAdCTmljgMahIH72oJn8n/fAYdoeOhtHuyprB6rt+J/L+f1N7Av2GE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=VA548Cbe; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="VA548Cbe" X-UUID: 4845e7009c3e11efbd192953cf12861f-20241106 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=g0st/8R2qgIpfSgF7sej0N9L/I6NYiIrFWt3AZT0jGc=; b=VA548CbeVyGMAY6hLMXrvccvBWcla1R+L3IgueH4D/FcVvZHAiVW7cBFKE8qBywxLDEZ2GBHLGQKS5jC+1NmSBIVoQmSH4Q0Zc3IWO+oBhzBPQdnwzsoislKCkLJsltJsIjQWGu2AcICZuVDy3lAinws257SgAANOlARSieiOLM=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.42, REQID:24f3b6a9-14cf-4b58-83dd-98e981579c63, IP:0, U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:b0fcdc3, CLOUDID:1c958122-a4fe-4046-b5be-d3379e31a9ef, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 4845e7009c3e11efbd192953cf12861f-20241106 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1589108266; Wed, 06 Nov 2024 20:54:38 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 6 Nov 2024 20:54:37 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 6 Nov 2024 20:54:37 +0800 From: Zoie Lin To: Qii Wang , Andi Shyti , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , , Zoie Lin Subject: [v2,1/1] i2c: mediatek: add runtime PM operations and bus regulator control Date: Wed, 6 Nov 2024 20:52:12 +0800 Message-ID: <20241106125212.27362-2-zoie.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20241106125212.27362-1-zoie.lin@mediatek.com> References: <20241106125212.27362-1-zoie.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This commit introduces support for runtime PM operations in the I2C driver, enabling runtime suspend and resume functionality. Although in the most platforms, the bus power of i2c are always on, some platforms disable the i2c bus power in order to meet low power request. This implementation includes bus regulator control to facilitate proper handling of the bus power based on platform requirements. Signed-off-by: Zoie Lin --- drivers/i2c/busses/i2c-mt65xx.c | 77 ++++++++++++++++++++++++++++----- 1 file changed, 65 insertions(+), 12 deletions(-) diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c index 5bd342047d59..4209daec1efa 100644 --- a/drivers/i2c/busses/i2c-mt65xx.c +++ b/drivers/i2c/busses/i2c-mt65xx.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -1245,8 +1246,8 @@ static int mtk_i2c_transfer(struct i2c_adapter *adap, int left_num = num; struct mtk_i2c *i2c = i2c_get_adapdata(adap); - ret = clk_bulk_enable(I2C_MT65XX_CLK_MAX, i2c->clocks); - if (ret) + ret = pm_runtime_resume_and_get(i2c->dev); + if (ret < 0) return ret; i2c->auto_restart = i2c->dev_comp->auto_restart; @@ -1299,7 +1300,9 @@ static int mtk_i2c_transfer(struct i2c_adapter *adap, ret = num; err_exit: - clk_bulk_disable(I2C_MT65XX_CLK_MAX, i2c->clocks); + pm_runtime_mark_last_busy(i2c->dev); + pm_runtime_put_autosuspend(i2c->dev); + return ret; } @@ -1370,6 +1373,40 @@ static int mtk_i2c_parse_dt(struct device_node *np, struct mtk_i2c *i2c) return 0; } +static int mtk_i2c_runtime_suspend(struct device *dev) +{ + struct mtk_i2c *i2c = dev_get_drvdata(dev); + + clk_bulk_disable(I2C_MT65XX_CLK_MAX, i2c->clocks); + if (i2c->adap.bus_regulator) + regulator_disable(i2c->adap.bus_regulator); + + return 0; +} + +static int mtk_i2c_runtime_resume(struct device *dev) +{ + int ret = 0; + struct mtk_i2c *i2c = dev_get_drvdata(dev); + + if (i2c->adap.bus_regulator) { + ret = regulator_enable(i2c->adap.bus_regulator); + if (ret) { + dev_err(dev, "enable regulator failed!\n"); + return ret; + } + } + + ret = clk_bulk_enable(I2C_MT65XX_CLK_MAX, i2c->clocks); + if (ret) { + if (i2c->adap.bus_regulator) + regulator_disable(i2c->adap.bus_regulator); + return ret; + } + + return 0; +} + static int mtk_i2c_probe(struct platform_device *pdev) { int ret = 0; @@ -1472,13 +1509,18 @@ static int mtk_i2c_probe(struct platform_device *pdev) } } - ret = clk_bulk_prepare_enable(I2C_MT65XX_CLK_MAX, i2c->clocks); + ret = clk_bulk_prepare(I2C_MT65XX_CLK_MAX, i2c->clocks); if (ret) { - dev_err(&pdev->dev, "clock enable failed!\n"); return ret; } + + platform_set_drvdata(pdev, i2c); + + ret = mtk_i2c_runtime_resume(i2c->dev); + if (ret < 0) + goto err_clk_bulk_unprepare; mtk_i2c_init_hw(i2c); - clk_bulk_disable(I2C_MT65XX_CLK_MAX, i2c->clocks); + mtk_i2c_runtime_suspend(i2c->dev); ret = devm_request_irq(&pdev->dev, irq, mtk_i2c_irq, IRQF_NO_SUSPEND | IRQF_TRIGGER_NONE, @@ -1486,19 +1528,22 @@ static int mtk_i2c_probe(struct platform_device *pdev) if (ret < 0) { dev_err(&pdev->dev, "Request I2C IRQ %d fail\n", irq); - goto err_bulk_unprepare; + goto err_clk_bulk_unprepare; } + pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_enable(&pdev->dev); i2c_set_adapdata(&i2c->adap, i2c); ret = i2c_add_adapter(&i2c->adap); if (ret) - goto err_bulk_unprepare; - - platform_set_drvdata(pdev, i2c); + goto err_pm_runtime_disable; return 0; -err_bulk_unprepare: +err_pm_runtime_disable: + pm_runtime_disable(&pdev->dev); +err_clk_bulk_unprepare: clk_bulk_unprepare(I2C_MT65XX_CLK_MAX, i2c->clocks); return ret; @@ -1510,6 +1555,7 @@ static void mtk_i2c_remove(struct platform_device *pdev) i2c_del_adapter(&i2c->adap); + pm_runtime_disable(&pdev->dev); clk_bulk_unprepare(I2C_MT65XX_CLK_MAX, i2c->clocks); } @@ -1518,6 +1564,10 @@ static int mtk_i2c_suspend_noirq(struct device *dev) struct mtk_i2c *i2c = dev_get_drvdata(dev); i2c_mark_adapter_suspended(&i2c->adap); + + if (!pm_runtime_status_suspended(dev)) + mtk_i2c_runtime_suspend(dev); + clk_bulk_unprepare(I2C_MT65XX_CLK_MAX, i2c->clocks); return 0; @@ -1536,7 +1586,8 @@ static int mtk_i2c_resume_noirq(struct device *dev) mtk_i2c_init_hw(i2c); - clk_bulk_disable(I2C_MT65XX_CLK_MAX, i2c->clocks); + if (pm_runtime_status_suspended(dev)) + mtk_i2c_runtime_suspend(dev); i2c_mark_adapter_resumed(&i2c->adap); @@ -1546,6 +1597,8 @@ static int mtk_i2c_resume_noirq(struct device *dev) static const struct dev_pm_ops mtk_i2c_pm = { NOIRQ_SYSTEM_SLEEP_PM_OPS(mtk_i2c_suspend_noirq, mtk_i2c_resume_noirq) + SET_RUNTIME_PM_OPS(mtk_i2c_runtime_suspend, mtk_i2c_runtime_resume, + NULL) }; static struct platform_driver mtk_i2c_driver = {