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[209.132.180.67]) by mx.google.com with ESMTP id d11si13053556pfe.419.2017.06.21.05.04.57; Wed, 21 Jun 2017 05:04:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@gmail.com header.b=LMLMYdUa; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751962AbdFUME4 (ORCPT + 10 others); Wed, 21 Jun 2017 08:04:56 -0400 Received: from mail-qt0-f195.google.com ([209.85.216.195]:36647 "EHLO mail-qt0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751976AbdFUMEz (ORCPT ); Wed, 21 Jun 2017 08:04:55 -0400 Received: by mail-qt0-f195.google.com with SMTP id s33so26944855qtg.3 for ; Wed, 21 Jun 2017 05:04:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=PrVd4SrD7Oz7wKFhTaKRJtz9JVFH3P4W0xX6dCygYKM=; b=LMLMYdUaHWfVPoAYiGK2VIaOsr6e1Bg4uQasZDu3V04FJPUR0lqycCmh8xwHyWpwKb NqHXU5csN4Q+XbgkRx6x9sqCZOTEN+s/3YXwVhj1erPFdOH9b/B3n/WF3QHT1v5pmQx+ jVwOYsPof36xiwX+BzCI+7rAxgjqMjKQP5hv8H24xOzLnFHkj8t2SyPAl5ntoaK46Qa+ 8Ll9aIIJh2GVLk5P+qsvKt8WH4Kk1HNV6grOAP/nikQOTtE+tsMlNq7fgPPpYW+iBKa2 ih75vg5aF7GbQmSnW4hNRqD6BhzKeUzmkXyOM9Sk4FdhzN4F32XN2HVZxzKynJXiDS0y D/PQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=PrVd4SrD7Oz7wKFhTaKRJtz9JVFH3P4W0xX6dCygYKM=; b=HgJ5+a0i7OIK6UpO7K7dLSlb0BcvIhX/H+O7uOiA65fyATAE17vGqkfpoaCfQlcE4D Uupq8Ogy52b8Qb57p9BD49RM4UrtIc205ZMF7XJkZy0VIvozqAH90uTzVjvxY0wpissJ hsbs2563maqMElD2E1pxiL8wo7jQ0X9WypQNHCMzXiFfgddMcW4xrILD/pEQD1UAPRnI 4v8pdbVoxDWJ16CafjG5e/2I53pEtUalondyxDhZMjZH4TEBCtG5/3hb6ND3fF1l00L8 ZMgn+eZHsArgJys3ioxpIKFRMLHz85htdM+hJdayUCdM56hRUpEAa+KTz35Aq9WGZqrq C9Dg== X-Gm-Message-State: AKS2vOyOW4YRS82oyJHtWga1UcHnEeunwhg37ezpcMpqQGlOsl5/t4nI 1V7LZu63+cL+/A== X-Received: by 10.200.57.164 with SMTP id v33mr37918462qte.144.1498046694641; Wed, 21 Jun 2017 05:04:54 -0700 (PDT) Received: from localhost ([144.121.20.162]) by smtp.gmail.com with ESMTPSA id o50sm10928938qto.55.2017.06.21.05.04.53 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 21 Jun 2017 05:04:53 -0700 (PDT) From: Rob Clark To: iommu@lists.linux-foundation.org Cc: linux-arm-msm@vger.kernel.org, Robin Murphy , Rob Herring , Will Deacon , Sricharan , Archit Taneja , Mark Rutland , Stanimir Varbanov , Rob Clark Subject: [RESEND PATCH 4/4] iommu: qcom: initialize secure page table Date: Wed, 21 Jun 2017 08:04:06 -0400 Message-Id: <20170621120406.2053-5-robdclark@gmail.com> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621120406.2053-1-robdclark@gmail.com> References: <20170621120406.2053-1-robdclark@gmail.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Stanimir Varbanov This basically gets the secure page table size, allocates memory for secure pagetables and passes the physical address to the trusted zone. Signed-off-by: Stanimir Varbanov Signed-off-by: Rob Clark --- drivers/iommu/qcom_iommu.c | 64 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) -- 2.9.4 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c index 860cad1..48b62aa 100644 --- a/drivers/iommu/qcom_iommu.c +++ b/drivers/iommu/qcom_iommu.c @@ -604,6 +604,51 @@ static void qcom_iommu_disable_clocks(struct qcom_iommu_dev *qcom_iommu) clk_disable_unprepare(qcom_iommu->iface_clk); } +static int qcom_iommu_sec_ptbl_init(struct device *dev) +{ + size_t psize = 0; + unsigned int spare = 0; + void *cpu_addr; + dma_addr_t paddr; + unsigned long attrs; + static bool allocated = false; + int ret; + + if (allocated) + return 0; + + ret = qcom_scm_iommu_secure_ptbl_size(spare, &psize); + if (ret) { + dev_err(dev, "failed to get iommu secure pgtable size (%d)\n", + ret); + return ret; + } + + dev_info(dev, "iommu sec: pgtable size: %zu\n", psize); + + attrs = DMA_ATTR_NO_KERNEL_MAPPING; + + cpu_addr = dma_alloc_attrs(dev, psize, &paddr, GFP_KERNEL, attrs); + if (!cpu_addr) { + dev_err(dev, "failed to allocate %zu bytes for pgtable\n", + psize); + return -ENOMEM; + } + + ret = qcom_scm_iommu_secure_ptbl_init(paddr, psize, spare); + if (ret) { + dev_err(dev, "failed to init iommu pgtable (%d)\n", ret); + goto free_mem; + } + + allocated = true; + return 0; + +free_mem: + dma_free_attrs(dev, psize, cpu_addr, paddr, attrs); + return ret; +} + static int get_asid(const struct device_node *np) { u32 reg; @@ -700,6 +745,17 @@ static struct platform_driver qcom_iommu_ctx_driver = { .remove = qcom_iommu_ctx_remove, }; +static bool qcom_iommu_has_secure_context(struct qcom_iommu_dev *qcom_iommu) +{ + struct device_node *child; + + for_each_child_of_node(qcom_iommu->dev->of_node, child) + if (of_device_is_compatible(child, "qcom,msm-iommu-v1-sec")) + return true; + + return false; +} + static int qcom_iommu_device_probe(struct platform_device *pdev) { struct device_node *child; @@ -744,6 +800,14 @@ static int qcom_iommu_device_probe(struct platform_device *pdev) return -ENODEV; } + if (qcom_iommu_has_secure_context(qcom_iommu)) { + ret = qcom_iommu_sec_ptbl_init(dev); + if (ret) { + dev_err(dev, "cannot init secure pg table(%d)\n", ret); + return ret; + } + } + platform_set_drvdata(pdev, qcom_iommu); pm_runtime_enable(dev);