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Signed-off-by: Lad Prabhakar --- v1->v2 - No change --- .../boot/dts/renesas/rzg3s-smarc-som.dtsi | 18 ---------------- arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 21 ------------------- 2 files changed, 39 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi index 71424e69939e..6e95933cd7ef 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi @@ -196,15 +196,6 @@ &sdhi2 { #endif &pinctrl { -#if SW_CONFIG3 == SW_ON - eth0-phy-irq-hog { - gpio-hog; - gpios = ; - input; - line-name = "eth0-phy-irq"; - }; -#endif - eth0_pins: eth0 { txc { pinmux = ; /* ET0_TXC */ @@ -239,15 +230,6 @@ mux { }; }; -#if SW_CONFIG3 == SW_ON - eth1-phy-irq-hog { - gpio-hog; - gpios = ; - input; - line-name = "eth1-phy-irq"; - }; -#endif - eth1_pins: eth1 { txc { pinmux = ; /* ET1_TXC */ diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi index 4509151344c4..baeca5ff5d61 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi @@ -71,27 +71,6 @@ &i2c0 { }; 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Fri, 25 Oct 2024 04:49:27 -0700 (PDT) Received: from prasmi.Home ([2a06:5906:61b:2d00:1044:9cc9:b89d:54cd]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4318b56741fsm45109785e9.22.2024.10.25.04.49.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2024 04:49:27 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 2/6] pinctrl: renesas: rzg2l: Release all the virq's in free callback Date: Fri, 25 Oct 2024 12:49:10 +0100 Message-ID: <20241025114914.714597-3-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241025114914.714597-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241025114914.714597-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar The `free` callback in `struct irq_domain_ops` expects to free nr_irqs interrupts starting from virq. Signed-off-by: Lad Prabhakar --- v1->v2 - No change --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 39 ++++++++++++++----------- 1 file changed, 22 insertions(+), 17 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 8ffb9430a134..1a09ccbfebad 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -2477,25 +2477,30 @@ static void rzg2l_gpio_irq_restore(struct rzg2l_pinctrl *pctrl) static void rzg2l_gpio_irq_domain_free(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs) { + struct rzg2l_pinctrl *pctrl; + irq_hw_number_t hwirq; + struct gpio_chip *gc; + unsigned long flags; struct irq_data *d; + unsigned int i, j; - d = irq_domain_get_irq_data(domain, virq); - if (d) { - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl, gpio_chip); - irq_hw_number_t hwirq = irqd_to_hwirq(d); - unsigned long flags; - unsigned int i; - - for (i = 0; i < RZG2L_TINT_MAX_INTERRUPT; i++) { - if (pctrl->hwirq[i] == hwirq) { - rzg2l_gpio_irq_endisable(pctrl, hwirq, false); - rzg2l_gpio_free(gc, hwirq); - spin_lock_irqsave(&pctrl->bitmap_lock, flags); - bitmap_release_region(pctrl->tint_slot, i, get_order(1)); - spin_unlock_irqrestore(&pctrl->bitmap_lock, flags); - pctrl->hwirq[i] = 0; - break; + for (j = 0; j < nr_irqs; j++) { + d = irq_domain_get_irq_data(domain, virq + j); + if (d) { + gc = irq_data_get_irq_chip_data(d); + pctrl = container_of(gc, struct rzg2l_pinctrl, gpio_chip); + hwirq = irqd_to_hwirq(d); + + for (i = 0; i < RZG2L_TINT_MAX_INTERRUPT; i++) { + if (pctrl->hwirq[i] == hwirq) { + rzg2l_gpio_irq_endisable(pctrl, hwirq, false); + rzg2l_gpio_free(gc, hwirq); + spin_lock_irqsave(&pctrl->bitmap_lock, flags); + bitmap_release_region(pctrl->tint_slot, i, get_order(1)); + spin_unlock_irqrestore(&pctrl->bitmap_lock, flags); + pctrl->hwirq[i] = 0; + break; + } } } } From patchwork Fri Oct 25 11:49:11 2024 Content-Type: text/plain; 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Thus move pinctrl_gpio_free() call at the very end in rzg2l_gpio_free() Signed-off-by: Lad Prabhakar --- v1->v2 - No change --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 1a09ccbfebad..d8b942fbf537 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -1774,8 +1774,6 @@ static void rzg2l_gpio_free(struct gpio_chip *chip, unsigned int offset) { unsigned int virq; - pinctrl_gpio_free(chip, offset); - virq = irq_find_mapping(chip->irq.domain, offset); if (virq) irq_dispose_mapping(virq); @@ -1785,6 +1783,8 @@ static void rzg2l_gpio_free(struct gpio_chip *chip, unsigned int offset) * drive the GPIO pin as an output. */ rzg2l_gpio_direction_input(chip, offset); + + pinctrl_gpio_free(chip, offset); } static const char * const rzg2l_gpio_names[] = { From patchwork Fri Oct 25 11:49:12 2024 Content-Type: text/plain; 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When GPIO pin is requested as interrupt through `gpios` DT property the gpio_request() is called through the code path and when releasing GPIO pin it goes through the gpio_free() path, so drop calling gpio_request() in rzg2l_gpio_child_to_parent_hwirq() path and also drop rzg2l_gpio_free() in rzg2l_gpio_irq_domain_free(). This fixes case where rzg2l_gpio_free() was being called twice after the GPIO interrupt pin is freed (after unbinding the module). When GPIO pin is requested as interrupt through `interrupt` DT property this doesn't go through gpio_request()/gpio_free() code path. Signed-off-by: Lad Prabhakar --- v1->v2 - No change --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 33 +++---------------------- 1 file changed, 3 insertions(+), 30 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index d8b942fbf537..b9a8bf43a92a 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -2372,26 +2372,6 @@ static const struct irq_chip rzg2l_gpio_irqchip = { GPIOCHIP_IRQ_RESOURCE_HELPERS, }; -static int rzg2l_gpio_interrupt_input_mode(struct gpio_chip *chip, unsigned int offset) -{ - struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip); - const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[offset]; - u64 *pin_data = pin_desc->drv_data; - u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data); - u8 bit = RZG2L_PIN_ID_TO_PIN(offset); - u8 reg8; - int ret; - - reg8 = readb(pctrl->base + PMC(off)); - if (reg8 & BIT(bit)) { - ret = rzg2l_gpio_request(chip, offset); - if (ret) - return ret; - } - - return rzg2l_gpio_direction_input(chip, offset); -} - static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc, unsigned int child, unsigned int child_type, @@ -2407,17 +2387,15 @@ static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc, if (gpioint < 0) return gpioint; - ret = rzg2l_gpio_interrupt_input_mode(gc, child); + ret = rzg2l_gpio_direction_input(gc, child); if (ret) return ret; spin_lock_irqsave(&pctrl->bitmap_lock, flags); irq = bitmap_find_free_region(pctrl->tint_slot, RZG2L_TINT_MAX_INTERRUPT, get_order(1)); spin_unlock_irqrestore(&pctrl->bitmap_lock, flags); - if (irq < 0) { - ret = -ENOSPC; - goto err; - } + if (irq < 0) + return -ENOSPC; rzg2l_gpio_irq_endisable(pctrl, child, true); pctrl->hwirq[irq] = child; @@ -2427,10 +2405,6 @@ static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc, *parent_type = IRQ_TYPE_LEVEL_HIGH; *parent = RZG2L_PACK_HWIRQ(gpioint, irq); return 0; - -err: - rzg2l_gpio_free(gc, child); - return ret; } static void rzg2l_gpio_irq_restore(struct rzg2l_pinctrl *pctrl) @@ -2494,7 +2468,6 @@ static void rzg2l_gpio_irq_domain_free(struct irq_domain *domain, unsigned int v for (i = 0; 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Fri, 25 Oct 2024 04:49:31 -0700 (PDT) Received: from prasmi.Home ([2a06:5906:61b:2d00:1044:9cc9:b89d:54cd]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4318b56741fsm45109785e9.22.2024.10.25.04.49.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2024 04:49:30 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 5/6] pinctrl: pinmux: Introduce API to check if a pin is requested Date: Fri, 25 Oct 2024 12:49:13 +0100 Message-ID: <20241025114914.714597-6-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241025114914.714597-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241025114914.714597-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Introduce `pin_requested` API to check if a pin is currently requested. This API allows pinctrl drivers to verify whether a pin is requested or not by checking if the pin is owned by either `gpio_owner` or `mux_owner`. GPIO pins used as interrupts through the `interrupts` DT property do not follow the usual `gpio_request`/`pin_request` path, unlike GPIO pins used as interrupts via the `gpios` property. As a result, such pins were reported as `UNCLAIMED` in the `pinmux-pins` sysfs file, even though they were in use as interrupts. With the newly introduced API, pinctrl drivers can check if a pin is already requested by the pinctrl core and ensure that pin is requested during when using as irq. This helps to ensure that the `pinmux-pins` sysfs file reflects the correct status of the pin. Signed-off-by: Lad Prabhakar Reviewed-by: Linus Walleij --- v1->v2 - Fixed build warning - Collected RB tag --- drivers/pinctrl/pinmux.c | 14 ++++++++++++++ drivers/pinctrl/pinmux.h | 6 ++++++ 2 files changed, 20 insertions(+) diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c index 02033ea1c643..6c3d18b162ad 100644 --- a/drivers/pinctrl/pinmux.c +++ b/drivers/pinctrl/pinmux.c @@ -99,6 +99,20 @@ bool pinmux_can_be_used_for_gpio(struct pinctrl_dev *pctldev, unsigned int pin) return !(ops->strict && !!desc->gpio_owner); } +bool pin_requested(struct pinctrl_dev *pctldev, int pin) +{ + struct pin_desc *desc; + + desc = pin_desc_get(pctldev, pin); + if (!desc) + return false; + + if (!desc->gpio_owner && !desc->mux_owner) + return false; + + return true; +} + /** * pin_request() - request a single pin to be muxed in, typically for GPIO * @pctldev: the associated pin controller device diff --git a/drivers/pinctrl/pinmux.h b/drivers/pinctrl/pinmux.h index 2965ec20b77f..df44dc4c8b84 100644 --- a/drivers/pinctrl/pinmux.h +++ b/drivers/pinctrl/pinmux.h @@ -42,6 +42,7 @@ int pinmux_map_to_setting(const struct pinctrl_map *map, void pinmux_free_setting(const struct pinctrl_setting *setting); int pinmux_enable_setting(const struct pinctrl_setting *setting); void pinmux_disable_setting(const struct pinctrl_setting *setting); +bool pin_requested(struct pinctrl_dev *pctldev, int pin); #else @@ -100,6 +101,11 @@ static inline void pinmux_disable_setting(const struct pinctrl_setting *setting) { } +static inline bool __maybe_unused pin_requested(struct pinctrl_dev *pctldev, int pin) +{ + return false; +} + #endif #if defined(CONFIG_PINMUX) && defined(CONFIG_DEBUG_FS) From patchwork Fri Oct 25 11:49:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lad, Prabhakar" X-Patchwork-Id: 838860 Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38C65204095; Fri, 25 Oct 2024 11:49:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Fri, 25 Oct 2024 04:49:32 -0700 (PDT) Received: from prasmi.Home ([2a06:5906:61b:2d00:1044:9cc9:b89d:54cd]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4318b56741fsm45109785e9.22.2024.10.25.04.49.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2024 04:49:31 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 6/6] pinctrl: renesas: pinctrl-rzg2l: Override irq_request/release_resources Date: Fri, 25 Oct 2024 12:49:14 +0100 Message-ID: <20241025114914.714597-7-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241025114914.714597-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241025114914.714597-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Override the default `irq_request_resources` and `irq_release_resources` functions with `rzg2l_gpio_irq_request_resources` and `rzg2l_gpio_irq_release_resources` in the RZ/G2L pinctrl driver. The `rzg2l_gpio_irq_request_resources()` function now ensures that the pin is requested by the pinctrl core before locking the GPIO as an IRQ. This ensures that the `pinmux-pins` file in sysfs correctly reports the pin as claimed. Additionally, the `rzg2l_gpio_direction_input()` call is moved into the `rzg2l_gpio_irq_request_resources()` callback, as it makes sense to configure the GPIO pin as an input after it has been requested. The `rzg2l_gpio_irq_release_resources()` function unlocks the GPIO as an IRQ and then frees the GPIO, ensuring proper cleanup when the IRQ is no longer needed. This guarantees that the `pinmux-pins` file in sysfs correctly reports the pin as unclaimed. Also add a `pin_requested()` check in `rzg2l_gpio_free()` to return early if the pin is already released. Signed-off-by: Lad Prabhakar --- v1->v2 - No change --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 41 +++++++++++++++++++++---- 1 file changed, 35 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index b9a8bf43a92a..47b3e296d094 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -1772,8 +1772,12 @@ static int rzg2l_gpio_get(struct gpio_chip *chip, unsigned int offset) static void rzg2l_gpio_free(struct gpio_chip *chip, unsigned int offset) { + struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip); unsigned int virq; + if (!pin_requested(pctrl->pctl, offset)) + return; + virq = irq_find_mapping(chip->irq.domain, offset); if (virq) irq_dispose_mapping(virq); @@ -2357,6 +2361,35 @@ static int rzg2l_gpio_irq_set_wake(struct irq_data *data, unsigned int on) return 0; } +static int rzg2l_gpio_irq_request_resources(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl, gpio_chip); + unsigned int child = irqd_to_hwirq(d); + int ret; + + if (!pin_requested(pctrl->pctl, child)) { + ret = rzg2l_gpio_request(gc, child); + if (ret) + return ret; + } + + ret = rzg2l_gpio_direction_input(gc, child); + if (ret) + return ret; + + return gpiochip_irq_reqres(d); +} + +static void rzg2l_gpio_irq_release_resources(struct irq_data *d) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + unsigned int child = irqd_to_hwirq(d); + + gpiochip_irq_relres(d); + rzg2l_gpio_free(gc, child); +} + static const struct irq_chip rzg2l_gpio_irqchip = { .name = "rzg2l-gpio", .irq_disable = rzg2l_gpio_irq_disable, @@ -2368,8 +2401,9 @@ static const struct irq_chip rzg2l_gpio_irqchip = { .irq_print_chip = rzg2l_gpio_irq_print_chip, .irq_set_affinity = irq_chip_set_affinity_parent, .irq_set_wake = rzg2l_gpio_irq_set_wake, + .irq_request_resources = rzg2l_gpio_irq_request_resources, + .irq_release_resources = rzg2l_gpio_irq_release_resources, .flags = IRQCHIP_IMMUTABLE, - GPIOCHIP_IRQ_RESOURCE_HELPERS, }; static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc, @@ -2381,16 +2415,11 @@ static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc, struct rzg2l_pinctrl *pctrl = gpiochip_get_data(gc); unsigned long flags; int gpioint, irq; - int ret; gpioint = rzg2l_gpio_get_gpioint(child, pctrl); if (gpioint < 0) return gpioint; - ret = rzg2l_gpio_direction_input(gc, child); - if (ret) - return ret; - spin_lock_irqsave(&pctrl->bitmap_lock, flags); irq = bitmap_find_free_region(pctrl->tint_slot, RZG2L_TINT_MAX_INTERRUPT, get_order(1)); spin_unlock_irqrestore(&pctrl->bitmap_lock, flags);