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[93.190.140.122]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cb6696b4easm4907816a12.12.2024.10.23.15.37.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Oct 2024 15:37:15 -0700 (PDT) From: Markuss Broks Date: Thu, 24 Oct 2024 01:36:33 +0300 Subject: [PATCH 02/12] dt-bindings: hwinfo: samsung,exynos-chipid: Add Samsung exynos9810 compatible Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241024-exynos9810-v1-2-ed14d0d60d08@gmail.com> References: <20241024-exynos9810-v1-0-ed14d0d60d08@gmail.com> In-Reply-To: <20241024-exynos9810-v1-0-ed14d0d60d08@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Tomasz Figa , Will Deacon , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Ivaylo Ivanov , Markuss Broks , Maksym Holovach X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1729723025; l=1025; i=markuss.broks@gmail.com; s=20241024; h=from:subject:message-id; bh=eegFh3p7v2cDf+inlqxOGvk4hoeYKqgh34JbZw/w8nI=; b=xZPPKOrxbtOyuJz/f7kwAfQvm5ahcxHo46m8pMr1CGweVvc1+tFT56z8xFY4ARW40FQxh/pGm 7bzG9rdzGZbBitxltfJL1lqhlydx7uiHJhw7tiN1n/ooUpjiZO/478B X-Developer-Key: i=markuss.broks@gmail.com; a=ed25519; pk=p3Bh4oPpeCrTpffJvGch5WsWNikteWHJ+4LBICPbZg0= Add the compatible for Samsung Exynos9810 chipid to schema. Co-authored-by: Maksym Holovach Signed-off-by: Markuss Broks --- Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml index 47a8d98346ebb83a7ea4d11e2fc7fc87df6bc5ad..385aac7161a0db9334a92d78a57a125f23ca1920 100644 --- a/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml +++ b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml @@ -24,6 +24,7 @@ properties: - enum: - samsung,exynos7885-chipid - samsung,exynos8895-chipid + - samsung,exynos9810-chipid - samsung,exynos990-chipid - samsung,exynosautov9-chipid - samsung,exynosautov920-chipid From patchwork Wed Oct 23 22:36:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markuss Broks X-Patchwork-Id: 837883 Received: from mail-ed1-f50.google.com (mail-ed1-f50.google.com [209.85.208.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 523EF1FE100; Wed, 23 Oct 2024 22:37:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729723042; cv=none; b=WcfJIa5Pqv7Z+hs03noOo3Nvv+9n2bxBroklZrCJeZBDd9hierWe10IhmORU/7wDI4x0xWFlc5NLYgKjw58qy0Ril0+fWA+Dfu8+LEdQMpIVp345+qM211Oy9F9Pc4AReeWi/sEADuiDPAY+JveLF6XYykwI3c+0Jz6vc0cKoHA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729723042; c=relaxed/simple; bh=7H6VJtJFgWBJwnqC87mXAK1t9DhYQWbUHewXwVI/pEw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=o9ltBswGp8bWuWk3azvtb2KGGTyd/71gL06skeTNdOTo/IqgNwhLwH3Gy+9Nwfqf5PYKGzV1VcdePT6QwlucbUYG1oGNXvYzx8Cj9Xf+4KfKmRk+Iaq5zoxBeOg5PzKA/yq3wvTKtNY3nByhU6kp8dR6IBwZvOn4MmP6MYcPN0c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Ws2AOFws; arc=none smtp.client-ip=209.85.208.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Ws2AOFws" Received: by mail-ed1-f50.google.com with SMTP id 4fb4d7f45d1cf-5cb72918bddso332685a12.3; Wed, 23 Oct 2024 15:37:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1729723039; x=1730327839; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=UqsIVZZa/U0N6/VUDWdRU6ufmGmH+Nhcx+B/uA68Obs=; b=Ws2AOFws8tBz/jwKkL0c8MtgLBeW/9LAxKiCaZiz0Du8PC6J5WtellnbpMQjJBmyYQ l75EZ1fnd39z9x/1pv5mYJ43xse2cm5cQmbptCbuLGTkG+q1zvhSpIBC7lz5983BLWlx zPSbNsyP4L+2nMI0MzflZ9ZyPPIyBqAqUDH9CKaGIMXu4ST9dqJSgEfnDVsWh4DO+bIS KNI7a9RCEWN6lvzXj8KEhjNl5Ph3v9+o2dGxW5n5riG2BDZ06rl+OzXnjl28FExnhM6i kQ+HXTAbusLbH9bz3fTn1Eo4OHLQl5bwwVUa4KGiTSG6ubXh3Vx3sf+Ed2Gc2wAEEETT ZFDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729723039; x=1730327839; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UqsIVZZa/U0N6/VUDWdRU6ufmGmH+Nhcx+B/uA68Obs=; b=mQbivz4KVidwHR+8cnvVIXi1fQWZ7QPj4EfxJeCCECDg/ToliyFFaarGMML2Kf8kH4 oJrMuiIn79iVm4kLYWMY7DTvxnuuUq92dy1SZegldma1pAqSwucw87ylOLrcf0FZNylR IupocvKT96ONbhpl9aD0edE9xWbG9g9Yq/9cYjrEyQ0DsmUncxVoRi6q2zVH4cv9Sysh 7FWQ/BznaKHAKyDQvuohuPUQglsG8K0k3Kq5l2qEfAaUoDHZ3fI3hPrOzc6MXBFwerxo kOfxNPi1nJkOIoSj1mOqp24EB43VXCGiEKgS1qkOyUkwLxc3/+1XS/H5xiHJYV2xG3DK 21nw== X-Forwarded-Encrypted: i=1; AJvYcCULgelwqvtBaWsrBuSsmBOIMvQVB5cxLjip3407bjaZkPoqwAAFyMam+L2Bw1yJgAo4nuHcetNy2HGaoLTF@vger.kernel.org, AJvYcCUkdBeZ2w2k9g3k7IuTdM/7oilyTcyYaXZIcunU7nGkhozzAkXEE82EfjhcAcA6KGnQ/r1/j6gywRvM@vger.kernel.org, AJvYcCXd/uQMa32xS0JHAsel9hCTEvvKe+nhbBnRYlONtTS/EbsER8edOovM5EXdkDUPrNSsYNM8JABEjat1Q+tfhqUXC8M=@vger.kernel.org X-Gm-Message-State: AOJu0YxBcRF/YVWfWXHrDF54WI73z6Ylm/0Ro7TJMiWVtWLuncr9RixV sJKXi4MVI29+T2ly1Fni53JldLfqAKZ4Y7ra/y29Asqw5lJ77xBr X-Google-Smtp-Source: AGHT+IEoQzCmWtUmspfTlIND7cTu5IdZanZZbCzIh7COe/LtmuTSwHdea/4nRvUfCfZcZ5SxWklmIg== X-Received: by 2002:a05:6402:13cc:b0:5c5:b9bb:c65a with SMTP id 4fb4d7f45d1cf-5cb8ac2d6fbmr3132944a12.1.1729723038599; Wed, 23 Oct 2024 15:37:18 -0700 (PDT) Received: from [192.168.122.1] (93-190-140-122.hosted-by-worldstream.net. [93.190.140.122]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cb6696b4easm4907816a12.12.2024.10.23.15.37.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Oct 2024 15:37:18 -0700 (PDT) From: Markuss Broks Date: Thu, 24 Oct 2024 01:36:35 +0300 Subject: [PATCH 04/12] dt-bindings: pinctrl: samsung: Add compatible for exynos9810-wakeup-eint Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241024-exynos9810-v1-4-ed14d0d60d08@gmail.com> References: <20241024-exynos9810-v1-0-ed14d0d60d08@gmail.com> In-Reply-To: <20241024-exynos9810-v1-0-ed14d0d60d08@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Tomasz Figa , Will Deacon , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Ivaylo Ivanov , Markuss Broks , Maksym Holovach X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1729723025; l=1084; i=markuss.broks@gmail.com; s=20241024; h=from:subject:message-id; bh=7H6VJtJFgWBJwnqC87mXAK1t9DhYQWbUHewXwVI/pEw=; b=erQFkuiY537nV6Oskge00QJ7SJyLbWLjp1lUt6Nm7JR+k8rWGNo+DDdqiqpzjcdfDxjYE5EIZ a8f4+kWVObYBxotF6PFP4rax7mUZrBhtLprZ9O7ZdGo7DcSehtKE+sS X-Developer-Key: i=markuss.broks@gmail.com; a=ed25519; pk=p3Bh4oPpeCrTpffJvGch5WsWNikteWHJ+4LBICPbZg0= Add the compatible for Samsung Exynos9810 pinctrl eint block to the schema. Co-authored-by: Maksym Holovach Signed-off-by: Markuss Broks --- .../devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml index 565cacadb6be77b1be1a7423f88564dd950c44db..68ed714eb0a178c46228bac142d69bbd6baa6277 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml @@ -47,6 +47,7 @@ properties: - items: - enum: - google,gs101-wakeup-eint + - samsung,exynos9810-wakeup-eint - samsung,exynos990-wakeup-eint - samsung,exynosautov9-wakeup-eint - const: samsung,exynos850-wakeup-eint From patchwork Wed Oct 23 22:36:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markuss Broks X-Patchwork-Id: 837882 Received: from mail-ed1-f43.google.com (mail-ed1-f43.google.com [209.85.208.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 75F88200BAB; Wed, 23 Oct 2024 22:37:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729723045; cv=none; b=dRYLvpm0D47Oo97/DfcvP14rlBg3JuQ9OFVDIfXbIsW5R8O/PGh+LirY0gVo/6RxEaN4+4dnRjAi7O03F4lD8aQDpfcL1U2lABrUd7MGtCX7IlrT+3AUnVtoAXbT/KQlMkCtqVvD+OufyG32rh79tKyP2KBeR48jXEhVCTZ26Vo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729723045; c=relaxed/simple; bh=mDrRM2vw6yzIeJi/+7tORTimRHVKBC8rcLZLB3YC2lk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gnN4ecujfxiJ2gdk6fU5a05pRp39tDZZP/D6LDmqqZ3MbspohtCf1j+3NVBTyrxIaoICLjwFLL/FuoU0QhL8kyo1m2ZgQ3wCUd1G5VWqDaIm9fT08jBdSJwXrkqgYBXvvyg8mjr7zsdHdS+opXkyDvnz051OxgplmatjFNcb0Vw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=cFW4we39; arc=none smtp.client-ip=209.85.208.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="cFW4we39" Received: by mail-ed1-f43.google.com with SMTP id 4fb4d7f45d1cf-5cacb76e924so355974a12.0; Wed, 23 Oct 2024 15:37:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1729723042; x=1730327842; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=OWmtqH5N2P1BU0MprmjFDoO+HGgjxkNsdCcT7wh2gr4=; b=cFW4we399HO/Fizeyjq93vIJiR2fcHRTixUWQowS/VEkEmplRKyYYJKMhMGrMFNQy+ EY5S8dWmZVeZndrD/qcfKJJb4eM9pp2d3Odmvg3O6E75L9EV8fAytVU4vQlwLLeUtvt2 ZNP2CBb3+McWCVlSX+3+IQl+FpUknBQKRWn5rXaehvpculNs1bWO7FtAuzChQJA1+uo0 ygV6mhuPtNhMf6VsdgeNFWta8VXLK1StpV9qfmoB0GU5DLSTxb43RG1EY1pWcZMP0VvB QDnALxPsJJPemjutzpgbmSCPZxpLH2cHCasCmqDBr9vlzPXmRHY6/7FYvmI3HMSJVvFi NOfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729723042; x=1730327842; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OWmtqH5N2P1BU0MprmjFDoO+HGgjxkNsdCcT7wh2gr4=; b=cXBDzsGjRrbCfneUWzutXVQYRUUfNypkjXFgrihKuxQ1Vg5//iJTZ9SzG+cpYSrUXq hv8EWseWXGdyzmPpJjEcrakgYjNwBPGEpjL1oAIo6OIYEXujhiZXwS6Xu9LjULo6Ooze yJ7Lj/k8FHIjP5oApL2PxMzB5f4t2ZnAaleZMGczuxJtHVVhzftFSk5JuQHbelxYtjjK qMUMhuxN9dU/ggIngRHraEt+NAo1uDsZgIvqtJp2fQnTbIR+29HJRWNvQs3Jw4cMI98e Z8HPODPSlrRXDWkj009XZ2ejFGvp0b7SRBOwUNrrmTuWS+GEaEBrGBnFhRk3471w43Np cTvA== X-Forwarded-Encrypted: i=1; AJvYcCUuzKXUskVgarW7ZAvNff/N74flEj16VXeRJHirKE6AeFQu2eDrE1BPOw28HlHdLkpDuTsJpTKjEron@vger.kernel.org, AJvYcCVOQZAbsEQhsU83c9/P+lJqOVUb2vmvGx6DjTap8BFKxKGDxJp+vCIiz5dy8/89/GVjIn1wU5B231w7CUpAfLFORMA=@vger.kernel.org, AJvYcCVZu7zE5OcZ1qmKyDz4CSalMT3CDFlEKSU7H1eEoJicUtk/9mDyhFVoU7XijijvXv2plul51JzJiGn3wExN@vger.kernel.org X-Gm-Message-State: AOJu0Yzgivwju01IH3un1ejbRwSqzFO001NCtWiy4joWDj62xyce2MSO wTWJFCzvmmEkco8LbPOeHmpq/fhOWo5XGk/ADwe31/w/jWNe8MhV X-Google-Smtp-Source: AGHT+IFzgo2JsQ869WZYlAgaH+b7Atn/Vy2II8EQ4rEQzpHOsgtaGvwMKQGxGaJKoqZmvNgB6r9Vzg== X-Received: by 2002:a05:6402:1e92:b0:5c8:9f3e:1419 with SMTP id 4fb4d7f45d1cf-5cb8ae70636mr3554294a12.5.1729723041789; Wed, 23 Oct 2024 15:37:21 -0700 (PDT) Received: from [192.168.122.1] (93-190-140-122.hosted-by-worldstream.net. [93.190.140.122]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cb6696b4easm4907816a12.12.2024.10.23.15.37.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Oct 2024 15:37:21 -0700 (PDT) From: Markuss Broks Date: Thu, 24 Oct 2024 01:36:37 +0300 Subject: [PATCH 06/12] dt-bindings: arm: samsung: Document Exynos9810 and starlte board binding Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241024-exynos9810-v1-6-ed14d0d60d08@gmail.com> References: <20241024-exynos9810-v1-0-ed14d0d60d08@gmail.com> In-Reply-To: <20241024-exynos9810-v1-0-ed14d0d60d08@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Tomasz Figa , Will Deacon , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Ivaylo Ivanov , Markuss Broks , Maksym Holovach X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1729723025; l=1179; i=markuss.broks@gmail.com; s=20241024; h=from:subject:message-id; bh=mDrRM2vw6yzIeJi/+7tORTimRHVKBC8rcLZLB3YC2lk=; b=dlXnErUtfJ/958tawHUHA0uCxWUUQJON3A0WPPEbbxCfpUTu6mkRraEbrWIh4MRKibiMhRJLq QLl7xL0FdHHCMI24G3+dDBIhfnL9b134SuVfqVs7zsmZS9MSk79W3ZL X-Developer-Key: i=markuss.broks@gmail.com; a=ed25519; pk=p3Bh4oPpeCrTpffJvGch5WsWNikteWHJ+4LBICPbZg0= Add the compatibles for Exynos9810 SoC and samsung,starlte board to the list of boards. Co-authored-by: Maksym Holovach Signed-off-by: Markuss Broks --- Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index d25a17e697256f8d868e24bea47d21accd1184ed..b5ba5ffc36d687a6fdbc625e6d95c37a8a2e2b93 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -230,6 +230,12 @@ properties: - samsung,dreamlte # Samsung Galaxy S8 (SM-G950F) - const: samsung,exynos8895 + - description: Exynos9810 based boards + items: + - enum: + - samsung,starlte # Samsung Galaxy S9 (SM-G960F) + - const: samsung,exynos9810 + - description: Exynos990 based boards items: - enum: From patchwork Wed Oct 23 22:36:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markuss Broks X-Patchwork-Id: 837881 Received: from mail-ed1-f54.google.com (mail-ed1-f54.google.com [209.85.208.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D0001FF03F; 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This just adds the names and links to DT compatible strings. Co-authored-by: Maksym Holovach Signed-off-by: Markuss Broks --- drivers/perf/arm_pmuv3.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c index 0afe02f879b45a8600b9cea1bfd88e6a68096a67..9eb5603e1dda18c4bdd2745304737932a27fde8a 100644 --- a/drivers/perf/arm_pmuv3.c +++ b/drivers/perf/arm_pmuv3.c @@ -1364,6 +1364,8 @@ PMUV3_INIT_SIMPLE(armv8_neoverse_v3ae) PMUV3_INIT_SIMPLE(armv8_nvidia_carmel) PMUV3_INIT_SIMPLE(armv8_nvidia_denver) +PMUV3_INIT_SIMPLE(armv8_samsung_mongoose) + PMUV3_INIT_MAP_EVENT(armv8_cortex_a35, armv8_a53_map_event) PMUV3_INIT_MAP_EVENT(armv8_cortex_a53, armv8_a53_map_event) PMUV3_INIT_MAP_EVENT(armv8_cortex_a57, armv8_a57_map_event) @@ -1409,6 +1411,7 @@ static const struct of_device_id armv8_pmu_of_device_ids[] = { {.compatible = "brcm,vulcan-pmu", .data = armv8_brcm_vulcan_pmu_init}, {.compatible = "nvidia,carmel-pmu", .data = armv8_nvidia_carmel_pmu_init}, {.compatible = "nvidia,denver-pmu", .data = armv8_nvidia_denver_pmu_init}, + {.compatible = "samsung,mongoose-pmu", .data = armv8_samsung_mongoose_pmu_init}, {}, }; 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[93.190.140.122]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cb6696b4easm4907816a12.12.2024.10.23.15.37.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Oct 2024 15:37:27 -0700 (PDT) From: Markuss Broks Date: Thu, 24 Oct 2024 01:36:41 +0300 Subject: [PATCH 10/12] pinctrl: samsung: Add Exynos9810 SoC specific data Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241024-exynos9810-v1-10-ed14d0d60d08@gmail.com> References: <20241024-exynos9810-v1-0-ed14d0d60d08@gmail.com> In-Reply-To: <20241024-exynos9810-v1-0-ed14d0d60d08@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Tomasz Figa , Will Deacon , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Ivaylo Ivanov , Markuss Broks , Maksym Holovach X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1729723025; l=9443; i=markuss.broks@gmail.com; s=20241024; h=from:subject:message-id; bh=TiIPfYt0RbveUi7nl+E5H8W22i+gt+I/IW+gTN3LGVI=; b=ys8MFnZ47aYyWibdD8vyNhiwzfo6GJsmFHH20zw/a2X4b0ROVXgiywHp54YMkmloTSnA0m4GO yF/2tcu80qiCaMA67AdrXUwIY0/pEjLfKtWNBjsnhXnHHiooLtbRLjH X-Developer-Key: i=markuss.broks@gmail.com; a=ed25519; pk=p3Bh4oPpeCrTpffJvGch5WsWNikteWHJ+4LBICPbZg0= Add Samsung Exynos9810 SoC specific data to enable pinctrl support for platforms based on Exynos9810. Co-authored-by: Maksym Holovach Signed-off-by: Markuss Broks --- drivers/pinctrl/samsung/pinctrl-exynos-arm64.c | 154 +++++++++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-samsung.c | 2 + drivers/pinctrl/samsung/pinctrl-samsung.h | 1 + 3 files changed, 157 insertions(+) diff --git a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c index f07c26d374425505019447161150929f7677f91d..3ea7106ce5eae3c21f11790b5a40037042c1d407 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c @@ -767,6 +767,160 @@ const struct samsung_pinctrl_of_match_data exynos990_of_data __initconst = { .num_ctrl = ARRAY_SIZE(exynos990_pin_ctrl), }; +/* pin banks of exynos9810 pin-controller 0 (ALIVE) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks0[] __initconst = { + EXYNOS850_PIN_BANK_EINTN(6, 0x000, "etc1"), + EXYNOS850_PIN_BANK_EINTW(8, 0x020, "gpa0", 0x00), + EXYNOS850_PIN_BANK_EINTW(8, 0x040, "gpa1", 0x04), + EXYNOS850_PIN_BANK_EINTW(8, 0x060, "gpa2", 0x08), + EXYNOS850_PIN_BANK_EINTW(8, 0x080, "gpa3", 0x0c), + EXYNOS850_PIN_BANK_EINTN(6, 0x0A0, "gpq0"), + EXYNOS850_PIN_BANK_EINTW(2, 0x0C0, "gpa4", 0x10), +}; + +/* pin banks of exynos9810 pin-controller 1 (AUD) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks1[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00), + EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpb1", 0x04), + EXYNOS850_PIN_BANK_EINTG(4, 0x040, "gpb2", 0x08), +}; + +/* pin banks of exynos9810 pin-controller 2 (CHUB) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks2[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gph0", 0x00), + EXYNOS850_PIN_BANK_EINTG(5, 0x020, "gph1", 0x04), +}; + +/* pin banks of exynos9810 pin-controller 3 (CMGP) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks3[] __initconst = { + EXYNOS850_PIN_BANK_EINTW(1, 0x000, "gpm0", 0x00), + EXYNOS850_PIN_BANK_EINTW(1, 0x020, "gpm1", 0x04), + EXYNOS850_PIN_BANK_EINTW(1, 0x040, "gpm2", 0x08), + EXYNOS850_PIN_BANK_EINTW(1, 0x060, "gpm3", 0x0C), + EXYNOS850_PIN_BANK_EINTW(1, 0x080, "gpm4", 0x10), + EXYNOS850_PIN_BANK_EINTW(1, 0x0A0, "gpm5", 0x14), + EXYNOS850_PIN_BANK_EINTW(1, 0x0C0, "gpm6", 0x18), + EXYNOS850_PIN_BANK_EINTW(1, 0x0E0, "gpm7", 0x1C), + EXYNOS850_PIN_BANK_EINTW(1, 0x100, "gpm10", 0x20), + EXYNOS850_PIN_BANK_EINTW(1, 0x120, "gpm11", 0x24), + EXYNOS850_PIN_BANK_EINTW(1, 0x140, "gpm12", 0x28), + EXYNOS850_PIN_BANK_EINTW(1, 0x160, "gpm13", 0x2C), + EXYNOS850_PIN_BANK_EINTW(1, 0x180, "gpm14", 0x30), + EXYNOS850_PIN_BANK_EINTW(1, 0x1A0, "gpm15", 0x34), + EXYNOS850_PIN_BANK_EINTW(1, 0x1C0, "gpm16", 0x38), + EXYNOS850_PIN_BANK_EINTW(1, 0x1E0, "gpm17", 0x3C), + EXYNOS850_PIN_BANK_EINTW(1, 0x200, "gpm40", 0x40), + EXYNOS850_PIN_BANK_EINTW(1, 0x220, "gpm41", 0x44), + EXYNOS850_PIN_BANK_EINTW(1, 0x240, "gpm42", 0x48), + EXYNOS850_PIN_BANK_EINTW(1, 0x260, "gpm43", 0x4C), +}; + +/* pin banks of exynos9810 pin-controller 4 (FSYS0) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks4[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(2, 0x000, "gpf0", 0x00), +}; + +/* pin banks of exynos9810 pin-controller 5 (FSYS1) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks5[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(7, 0x000, "gpf1", 0x00), + EXYNOS850_PIN_BANK_EINTG(6, 0x020, "gpf2", 0x04), +}; + +/* pin banks of exynos9810 pin-controller 6 (PERIC0) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks6[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp0", 0x00), + EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp1", 0x04), + EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpp2", 0x08), + EXYNOS850_PIN_BANK_EINTG(4, 0x060, "gpp3", 0x0C), + EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpg0", 0x10), + EXYNOS850_PIN_BANK_EINTG(8, 0x0A0, "gpg1", 0x14), + EXYNOS850_PIN_BANK_EINTG(8, 0x0C0, "gpg2", 0x18), +}; + +/* pin banks of exynos9810 pin-controller 7 (PERIC1) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks7[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp4", 0x00), + EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp5", 0x04), + EXYNOS850_PIN_BANK_EINTG(4, 0x040, "gpp6", 0x08), + EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpc0", 0x0C), + EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpc1", 0x10), + EXYNOS850_PIN_BANK_EINTG(4, 0x0A0, "gpd0", 0x14), + EXYNOS850_PIN_BANK_EINTG(7, 0x0C0, "gpg3", 0x18), +}; + +/* pin banks of exynos9810 pin-controller 8 (VTS) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks8[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(3, 0x000, "gpt0", 0x00), +}; + +static const struct samsung_pin_ctrl exynos9810_pin_ctrl[] __initconst = { + { + /* pin-controller instance 0 ALIVE data */ + .pin_banks = exynos9810_pin_banks0, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks0), + .eint_wkup_init = exynos_eint_wkup_init, + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 1 AUD data */ + .pin_banks = exynos9810_pin_banks1, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks1), + }, { + /* pin-controller instance 2 CHUB data */ + .pin_banks = exynos9810_pin_banks2, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks2), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 3 CMGP data */ + .pin_banks = exynos9810_pin_banks3, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks3), + .eint_wkup_init = exynos_eint_wkup_init, + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 4 FSYS0 data */ + .pin_banks = exynos9810_pin_banks4, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks4), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 5 FSYS1 data */ + .pin_banks = exynos9810_pin_banks5, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks5), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 6 PERIC0 data */ + .pin_banks = exynos9810_pin_banks6, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks6), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 7 PERIC1 data */ + .pin_banks = exynos9810_pin_banks7, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks7), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 8 VTS data */ + .pin_banks = exynos9810_pin_banks8, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks8), + }, +}; + +const struct samsung_pinctrl_of_match_data exynos9810_of_data __initconst = { + .ctrl = exynos9810_pin_ctrl, + .num_ctrl = ARRAY_SIZE(exynos9810_pin_ctrl), +}; + /* pin banks of exynosautov9 pin-controller 0 (ALIVE) */ static const struct samsung_pin_bank_data exynosautov9_pin_banks0[] __initconst = { EXYNOS850_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00), diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index 42e40860841bcc94e3c11bf313df792da10ab00b..bbedd980ec67234aad847b757f40af5002b11ebb 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1479,6 +1479,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { .data = &exynos850_of_data }, { .compatible = "samsung,exynos8895-pinctrl", .data = &exynos8895_of_data }, + { .compatible = "samsung,exynos9810-pinctrl", + .data = &exynos9810_of_data }, { .compatible = "samsung,exynos990-pinctrl", .data = &exynos990_of_data }, { .compatible = "samsung,exynosautov9-pinctrl", diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h index 615048f945243d4173d40142f1e62c8aeefe5b7e..bb0689d52ea0b4392714fa9bcdcbae8d253c73a1 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -385,6 +385,7 @@ extern const struct samsung_pinctrl_of_match_data exynos7_of_data; extern const struct samsung_pinctrl_of_match_data exynos7885_of_data; extern const struct samsung_pinctrl_of_match_data exynos850_of_data; extern const struct samsung_pinctrl_of_match_data exynos8895_of_data; +extern const struct samsung_pinctrl_of_match_data exynos9810_of_data; extern const struct samsung_pinctrl_of_match_data exynos990_of_data; extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data; extern const struct samsung_pinctrl_of_match_data exynosautov920_of_data; From patchwork Wed Oct 23 22:36:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markuss Broks X-Patchwork-Id: 837879 Received: from mail-ej1-f50.google.com (mail-ej1-f50.google.com [209.85.218.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EDBFC206E8F; Wed, 23 Oct 2024 22:37:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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[93.190.140.122]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cb6696b4easm4907816a12.12.2024.10.23.15.37.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Oct 2024 15:37:29 -0700 (PDT) From: Markuss Broks Date: Thu, 24 Oct 2024 01:36:43 +0300 Subject: [PATCH 12/12] arm64: dts: exynos: Add initial support for Samsung Galaxy S9 (SM-G960F) Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241024-exynos9810-v1-12-ed14d0d60d08@gmail.com> References: <20241024-exynos9810-v1-0-ed14d0d60d08@gmail.com> In-Reply-To: <20241024-exynos9810-v1-0-ed14d0d60d08@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Tomasz Figa , Will Deacon , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Ivaylo Ivanov , Markuss Broks , Maksym Holovach X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1729723025; l=4396; i=markuss.broks@gmail.com; s=20241024; h=from:subject:message-id; bh=uGxvRrGiZ9uLBWYdiZjpDfcJUgUDjLtTL5MMaS3Y99c=; b=qPBGU4g4UzTmbyW8K01GZbAhJ3thwrS3nfygRW+CZyRP6QN6HO9I+K97XuAksgJIsecePUf7I rEf03pG5egjBT1CsyGfHrc9Ut5Fp/ZIomu0fA2F+mFTrWbl3/YBjz9p X-Developer-Key: i=markuss.broks@gmail.com; a=ed25519; pk=p3Bh4oPpeCrTpffJvGch5WsWNikteWHJ+4LBICPbZg0= Samsung Galaxy S9 (SM-G960F), codenamed starlte, is a mobile phone released in 2017. It has 4GB of RAM, 64GB of UFS storage, Exynos9810 SoC and 1440x2960 Super AMOLED display. This initial device tree enables the framebuffer pre-initialised by bootloader and physical buttons of the device, with more support to come in the future. Co-authored-by: Maksym Holovach Signed-off-by: Markuss Broks --- arch/arm64/boot/dts/exynos/Makefile | 1 + arch/arm64/boot/dts/exynos/exynos9810-starlte.dts | 119 ++++++++++++++++++++++ 2 files changed, 120 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile index 7a934499b235892eef38cd926905e02f0ce08278..6760b3d59e819fb52bc8cf4dc6877a0b9db9ce47 100644 --- a/arch/arm64/boot/dts/exynos/Makefile +++ b/arch/arm64/boot/dts/exynos/Makefile @@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \ exynos7885-jackpotlte.dtb \ exynos850-e850-96.dtb \ exynos8895-dreamlte.dtb \ + exynos9810-starlte.dtb \ exynos990-c1s.dtb \ exynosautov9-sadk.dtb \ exynosautov920-sadk.dtb diff --git a/arch/arm64/boot/dts/exynos/exynos9810-starlte.dts b/arch/arm64/boot/dts/exynos/exynos9810-starlte.dts new file mode 100644 index 0000000000000000000000000000000000000000..f3a1910402b8d686dd7bd156a691ec541e10ad08 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos9810-starlte.dts @@ -0,0 +1,119 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung Galaxy S9 (starlte/SM-G960F) device tree source + * + * Copyright (c) 2024 Markuss Broks + * Copyright (c) 2024 Maksym Holovach + */ + +/dts-v1/; +#include "exynos9810.dtsi" +#include +#include + +/ { + model = "Samsung Galaxy S9 (SM-G960F)"; + compatible = "samsung,starlte", "samsung,exynos9810"; + chassis-type = "handset"; + + chosen { + #address-cells = <2>; + #size-cells = <1>; + ranges; + + framebuffer@cc000000 { + compatible = "simple-framebuffer"; + reg = <0x0 0xcc000000 (1440 * 2960 * 4)>; + width = <1440>; + height = <2960>; + stride = <(1440 * 4)>; + format = "a8r8g8b8"; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x3c800000>, + <0x8 0x80000000 0x80000000>, + <0x0 0xc0000000 0x20000000>, + <0x0 0xe1900000 0x1e700000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <1>; + ranges; + + framebuffer@cc000000 { + reg = <0x0 0xcc000000 (1440 * 2960 * 4)>; + no-map; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&key_voldown &key_volup &key_bixby &key_power>; + pinctrl-names = "default"; + + /* In stock firmware used for assistant. Map it as a camera button for now */ + bixby-key { + label = "Bixby"; + linux,code = ; + gpios = <&gpa0 6 GPIO_ACTIVE_LOW>; + }; + + power-key { + label = "Power"; + linux,code = ; + gpios = <&gpa2 4 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + + volup-key { + label = "Volume Up"; + linux,code = ; + gpios = <&gpa0 3 GPIO_ACTIVE_LOW>; + }; + + voldown-key { + label = "Volume Down"; + linux,code = ; + gpios = <&gpa0 4 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&oscclk { + clock-frequency = <26000000>; +}; + +&pinctrl_alive { + key_bixby: key-bixby-pins { + samsung,pins = "gpa0-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + key_volup: key-volup-pins { + samsung,pins = "gpa0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + key_voldown: key-voldown-pins { + samsung,pins = "gpa0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + key_power: key-power-pins { + samsung,pins = "gpa2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; +};