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Fri, 11 Oct 2024 07:49:56 -0700 (PDT) From: Linus Walleij Date: Fri, 11 Oct 2024 16:49:54 +0200 Subject: [PATCH v2 1/4] mtd: rawnand: brcmnand: Add BCMBCA RAW NAND driver MIME-Version: 1.0 Message-Id: <20241011-bcmbca-nand-support-v2-1-1fe928e5b933@linaro.org> References: <20241011-bcmbca-nand-support-v2-0-1fe928e5b933@linaro.org> In-Reply-To: <20241011-bcmbca-nand-support-v2-0-1fe928e5b933@linaro.org> To: u-boot@lists.denx.de, Dario Binacchi , Michael Trimarchi , Anand Gore , William Zhang , Kursad Oney , Philippe Reynes Cc: Linus Walleij X-Mailer: b4 0.14.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The Broadcom BCA platforms are broadband access SoCs. This is a port of the upstream Linux driver to U-Boot. It was based on drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c from Linux v6.11. Reviewed-by: Michael Trimarchi Signed-off-by: Linus Walleij --- drivers/mtd/nand/raw/Kconfig | 7 ++ drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c | 152 ++++++++++++++++++++++++++++ 3 files changed, 160 insertions(+) diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 9f3f1267cbd1..c345fc1f1fba 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -120,6 +120,13 @@ config NAND_BRCMNAND Enable the driver for NAND flash on platforms using a Broadcom NAND controller. +config NAND_BRCMNAND_BCMBCA + bool "Support Broadcom NAND controller on BCMBCA platforms" + depends on NAND_BRCMNAND && ARCH_BCMBCA + help + Enable support for broadcom nand driver on BCA (broadband + access) platforms such as BCM6846. + config NAND_BRCMNAND_6368 bool "Support Broadcom NAND controller on bcm6368" depends on NAND_BRCMNAND && ARCH_BMIPS diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index 0c6325aaa618..24d0d5684490 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_NAND_BRCMNAND_6753) += bcm6753_nand.o obj-$(CONFIG_NAND_BRCMNAND_68360) += bcm68360_nand.o obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o +obj-$(CONFIG_NAND_BRCMNAND_BCMBCA) += bcmbca_nand.o obj-$(CONFIG_NAND_BRCMNAND_IPROC) += iproc_nand.o obj-$(CONFIG_NAND_BRCMNAND) += brcmnand.o obj-$(CONFIG_NAND_BRCMNAND) += brcmnand_compat.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c new file mode 100644 index 000000000000..2753783ae70f --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c @@ -0,0 +1,152 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "brcmnand.h" + +struct bcmbca_nand_soc { + struct brcmnand_soc soc; + void __iomem *base; +}; + +#define BCMBCA_NAND_INT 0x00 +#define BCMBCA_NAND_STATUS_SHIFT 0 +#define BCMBCA_NAND_STATUS_MASK (0xfff << BCMBCA_NAND_STATUS_SHIFT) + +#define BCMBCA_NAND_INT_EN 0x04 +#define BCMBCA_NAND_ENABLE_SHIFT 0 +#define BCMBCA_NAND_ENABLE_MASK (0xffff << BCMBCA_NAND_ENABLE_SHIFT) + +enum { + BCMBCA_NP_READ = BIT(0), + BCMBCA_BLOCK_ERASE = BIT(1), + BCMBCA_COPY_BACK = BIT(2), + BCMBCA_PAGE_PGM = BIT(3), + BCMBCA_CTRL_READY = BIT(4), + BCMBCA_DEV_RBPIN = BIT(5), + BCMBCA_ECC_ERR_UNC = BIT(6), + BCMBCA_ECC_ERR_CORR = BIT(7), +}; + +#if defined(CONFIG_ARM64) +#define ALIGN_REQ 8 +#else +#define ALIGN_REQ 4 +#endif + +static inline bool bcmbca_nand_is_buf_aligned(void *flash_cache, void *buffer) +{ + return IS_ALIGNED((uintptr_t)buffer, ALIGN_REQ) && + IS_ALIGNED((uintptr_t)flash_cache, ALIGN_REQ); +} + +static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct bcmbca_nand_soc *priv = + container_of(soc, struct bcmbca_nand_soc, soc); + void __iomem *mmio = priv->base + BCMBCA_NAND_INT; + u32 val = brcmnand_readl(mmio); + + if (val & (BCMBCA_CTRL_READY << BCMBCA_NAND_STATUS_SHIFT)) { + /* Ack interrupt */ + val &= ~BCMBCA_NAND_STATUS_MASK; + val |= BCMBCA_CTRL_READY << BCMBCA_NAND_STATUS_SHIFT; + brcmnand_writel(val, mmio); + return true; + } + + return false; +} + +static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct bcmbca_nand_soc *priv = + container_of(soc, struct bcmbca_nand_soc, soc); + void __iomem *mmio = priv->base + BCMBCA_NAND_INT_EN; + u32 val = brcmnand_readl(mmio); + + /* Don't ack any interrupts */ + val &= ~BCMBCA_NAND_STATUS_MASK; + + if (en) + val |= BCMBCA_CTRL_READY << BCMBCA_NAND_ENABLE_SHIFT; + else + val &= ~(BCMBCA_CTRL_READY << BCMBCA_NAND_ENABLE_SHIFT); + + brcmnand_writel(val, mmio); +} + +static void bcmbca_read_data_bus(struct brcmnand_soc *soc, + void __iomem *flash_cache, u32 *buffer, int fc_words) +{ + /* + * memcpy can do unaligned aligned access depending on source + * and dest address, which is incompatible with nand cache. Fallback + * to the memcpy_fromio in such case + */ + if (bcmbca_nand_is_buf_aligned((void __force *)flash_cache, buffer)) + memcpy((void *)buffer, (void __force *)flash_cache, fc_words * 4); + else + memcpy_fromio((void *)buffer, flash_cache, fc_words * 4); +} + +static int bcmbca_nand_probe(struct udevice *dev) +{ + struct udevice *pdev = dev; + struct bcmbca_nand_soc *priv = dev_get_priv(dev); + struct brcmnand_soc *soc; + struct resource res; + + soc = &priv->soc; + + dev_read_resource_byname(pdev, "nand-int-base", &res); + priv->base = devm_ioremap(dev, res.start, resource_size(&res)); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + soc->ctlrdy_ack = bcmbca_nand_intc_ack; + soc->ctlrdy_set_enabled = bcmbca_nand_intc_set; + soc->read_data_bus = bcmbca_read_data_bus; + + /* Disable and ack all interrupts */ + brcmnand_writel(0, priv->base + BCMBCA_NAND_INT_EN); + brcmnand_writel(0, priv->base + BCMBCA_NAND_INT); + + return brcmnand_probe(pdev, soc); +} + +static const struct udevice_id bcmbca_nand_dt_ids[] = { + { + .compatible = "brcm,nand-bcm63138", + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(bcmbca_nand) = { + .name = "bcmbca-nand", + .id = UCLASS_MTD, + .of_match = bcmbca_nand_dt_ids, + .probe = bcmbca_nand_probe, + .priv_auto = sizeof(struct bcmbca_nand_soc), +}; + +void board_nand_init(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MTD, + DM_DRIVER_GET(bcmbca_nand), &dev); + if (ret && ret != -ENODEV) + pr_err("Failed to initialize %s. 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Reviewed-by: Michael Trimarchi Signed-off-by: Linus Walleij --- arch/arm/mach-bcmbca/bcm6846/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-bcmbca/bcm6846/Kconfig b/arch/arm/mach-bcmbca/bcm6846/Kconfig index 229ab88dbb0d..5ef9535369ec 100644 --- a/arch/arm/mach-bcmbca/bcm6846/Kconfig +++ b/arch/arm/mach-bcmbca/bcm6846/Kconfig @@ -8,6 +8,9 @@ if BCM6846 config TARGET_BCM96846 bool "Broadcom 6846 Reference Board" depends on ARCH_BCMBCA + imply MTD_RAW_NAND + imply NAND_BRCMNAND + imply NAND_BRCMNAND_BCMBCA config SYS_SOC default "bcm6846" From patchwork Fri Oct 11 14:49:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 834583 Delivered-To: patch@linaro.org Received: by 2002:adf:b352:0:b0:37d:45d0:187 with SMTP id k18csp842258wrd; Fri, 11 Oct 2024 07:50:29 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXbEs/wkwNqpoJKmcfWH7FiIOz6PTVxzGmWQ16nJokXNMMF9dgn5ACcfF5/6aq6nrSq5voBlQ==@linaro.org X-Google-Smtp-Source: AGHT+IHy09rEs5nJBogILB5uF9JCJ6gieaVslWfLKJrdyh4eaQLvUo6nvexz3h+4Fm+L3D2EAp9r X-Received: by 2002:a05:6602:630e:b0:835:2ef4:3aa4 with SMTP id ca18e2360f4ac-837930e6be1mr200974339f.8.1728658229267; Fri, 11 Oct 2024 07:50:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1728658229; cv=none; d=google.com; s=arc-20240605; b=G8C3VunCyDIhYfqRLbu3xXA5cpbgrd5lRKMTlfVG1xhi6Sj6t9uiVwMQtvw8lHRbDM IyR1c1mO4ZWJwCFHbeLZ3V/Sn2imxMJ00elTtrVwFutobB9nrW/lpKM75N/Legdzrdfi 5U71j3foqzd1fr2rkK6EMwCEDcJvil14v9Q5L38/KxVNhzLv8u72eJDER0eh4peBtuV4 aS5ToMTg/3pGLNWhndazZ1RzBw/9jQX8IJFa9cWi5Fscg+2ZNeRLPIFUug0N5LuSbyRd /Nxhi5rfNy+9CfC8xaohv18h5vRm6t29wAYcNCPQVmjzkLWiOd5C/xr+/v3hFGPJzPSz UvIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=xpxk8zWtiiezqa9rdeiLgwUHWEFbvu+/7Ih6E577aIc=; fh=ftQntzGq59ruF58t30aRXV87AbbvorkS2P8ZbONQbrM=; b=b6oPWGLu+yiLbQR8Nop73pBOnIpA1dYy4iHuVQkh3tGnODyKmnYOIo+l+vYLYPbUZK b7M9aJg1Ff0d7BEYFlld6F0OCUzsk9OpxGSK7jE2cGnN+Kc6KNh9MgBQxFBxzMGYX1DJ QgO4SprMzqC6lqs0XUWswcufeaAJTq0iVaq+Ia81d4e2SrOw3vXCh/vfre8koqw7KZBQ PQLxRoi+1QtiCJJfCeedsamNQpA9GGyKprDLT5KQSAna++p/fNg7su4rq9jTcTHrH2E+ A/CcXwzFYvkRjx7negQsEtZfLgykuJglDuWk+Nc0tvQuwyLeEnM3RWf8C6FzfKRsy3Jg 2o2w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oNrVN3Sp; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Fri, 11 Oct 2024 07:50:01 -0700 (PDT) From: Linus Walleij Date: Fri, 11 Oct 2024 16:49:56 +0200 Subject: [PATCH v2 3/4] board: bcm96846: Enable NAND options MIME-Version: 1.0 Message-Id: <20241011-bcmbca-nand-support-v2-3-1fe928e5b933@linaro.org> References: <20241011-bcmbca-nand-support-v2-0-1fe928e5b933@linaro.org> In-Reply-To: <20241011-bcmbca-nand-support-v2-0-1fe928e5b933@linaro.org> To: u-boot@lists.denx.de, Dario Binacchi , Michael Trimarchi , Anand Gore , William Zhang , Kursad Oney , Philippe Reynes Cc: Linus Walleij X-Mailer: b4 0.14.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This adds reasonable NAND options to the BCM96846 reference design: - CMD_NAND, MTD_RAW_NAND - Disable SYS_NAND_ONFI_DETECTION as this just give error messages - MTD, MTDPARTS with DM and related config options - CMD_UBI and CMD_UBIFS as this is likely used with ubi/ubifs What I didn't add was something like the following: CONFIG_MTDPARTS_DEFAULT="nand0:256k(cfi),257024k(image)" Because I don't actually have a BCM96846 reference design. These are only available to Broadcom and their customers I think, but perhaps the people at Broadcom can provide the detail of the flash layout for BCM96846 so we can add this too so the bcm96846_config is usable out of the box. Signed-off-by: Linus Walleij --- configs/bcm96846_defconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/configs/bcm96846_defconfig b/configs/bcm96846_defconfig index ea643eddcc66..2f94bd295122 100644 --- a/configs/bcm96846_defconfig +++ b/configs/bcm96846_defconfig @@ -18,5 +18,17 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CACHE=y +CONFIG_CMD_NAND=y +CONFIG_CMD_UBI=y +CONFIG_CMD_UBIFS=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_MTDPARTS=y CONFIG_OF_EMBED=y CONFIG_CLK=y +CONFIG_MTD=y +CONFIG_MTDIDS_DEFAULT="nand0=nand0" +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_UBI_FASTMAP=y +CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 +CONFIG_SYS_NAND_ONFI_DETECTION=n From patchwork Fri Oct 11 14:49:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 834584 Delivered-To: patch@linaro.org Received: by 2002:adf:b352:0:b0:37d:45d0:187 with SMTP id k18csp842339wrd; Fri, 11 Oct 2024 07:50:39 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXyWVhOnjP/+IQjyoe+xTFdlIhY4FUHdaFCj3+O1O489bB7ETRP7tiDc+SAeZbl2lk2eczCTw==@linaro.org X-Google-Smtp-Source: AGHT+IF0WoYQ64xjpKf7COmVMxYw5/7Mei5JUGcf6xHbOAM6fQZ0usccpWS5M+E0jcK50MnGpcPo X-Received: by 2002:a05:6602:620a:b0:82c:f7b1:a9fb with SMTP id ca18e2360f4ac-83782bf3c81mr168602039f.5.1728658239074; Fri, 11 Oct 2024 07:50:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1728658239; cv=none; d=google.com; s=arc-20240605; b=cCbS5WKTFkohAANJPNg4p1n4BJfloBtw3UaWX4XcKqMOFOm1nYZc/GbHCTxgqIA1Lu a2Mrm7kJYxX++rEJcFffVz7LdEuD/p38EMoIMgY/ElZxWmzAEsy1LRKW9E56Hd1ZCHfV vuX9yr3BDmxzpV/T1uGQULnqS98UFMssN+rAyBhiO0ACzRcjcXFgw4I5XbTD93JwOA2D 9ijhbc3J90cKrICvowI71KW4ghNsllnvC27Sx2bwtwuCxoTgiUdQOxsRzfMY+0dOOU8u c56/YcWOuq1zysEfGBXkmgQUh2YMRIf/vrkclV3kgK5gZ9ZPJ4b97sYbp3+A4D8qMxOW N1OQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=DMVMD5T4sThdc6qVxxpvgWj2sN/Scbdgfur5rORi3rw=; fh=keKqWWtDMdblEqnrekmyMyFPqEfoMAfxePYGptGkOyI=; b=D9Ok6EXxRB6eRmNnjAyXE9zg+eMudSAHxHf14ATmkBbPRO/7IEDzvha1g+utc5GRc4 GTADVtEEzkyqtdPyR4E3dMXvzOGSCoAFD8lpDNuUczJ+6aYbw3ZKdx4qQUkS6hhd5trW G0678jjhujtV/Sfx7kMrKcoTZtqm4z0DqAivPmozeGWXqvEGCq/OOna1Jn3UvrKfN8+N Km4dsHOWu43oPY2RkLAaPDgx3w/QYJkMeRciIQJUyDaSSbP2ik7gJyNEOTTN1cnZoIV1 lUOd3f5Cf7EJhNmPpAKjYgH3zlz8FZUdpORNCoct5e6uRQ42TgaWB4mrIQrNKZ0Myi0U Vd1w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PGXU1hso; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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This makes the NAND driver work. Suggested-by: Neil Armstrong Signed-off-by: Linus Walleij --- arch/arm/dts/bcm6846.dtsi | 103 ----------------------------------- arch/arm/dts/bcm96846.dts | 30 ---------- arch/arm/mach-bcmbca/bcm6846/Kconfig | 1 + configs/bcm96846_defconfig | 3 +- 4 files changed, 3 insertions(+), 134 deletions(-) diff --git a/arch/arm/dts/bcm6846.dtsi b/arch/arm/dts/bcm6846.dtsi deleted file mode 100644 index 8aa47a2583b2..000000000000 --- a/arch/arm/dts/bcm6846.dtsi +++ /dev/null @@ -1,103 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright 2022 Broadcom Ltd. - */ - -#include -#include - -/ { - compatible = "brcm,bcm6846", "brcm,bcmbca"; - #address-cells = <1>; - #size-cells = <1>; - - interrupt-parent = <&gic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - CA7_0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x0>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - }; - - CA7_1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x1>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - }; - - L2_0: l2-cache0 { - compatible = "cache"; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = , - , - , - ; - arm,cpu-registers-not-fw-configured; - }; - - pmu: pmu { - compatible = "arm,cortex-a7-pmu"; - interrupts = , - ; - interrupt-affinity = <&CA7_0>, <&CA7_1>; - }; - - clocks: clocks { - periph_clk: periph-clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; - }; - }; - - psci { - compatible = "arm,psci-0.2"; - method = "smc"; - }; - - axi@81000000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x81000000 0x8000>; - - gic: interrupt-controller@1000 { - compatible = "arm,cortex-a7-gic"; - #interrupt-cells = <3>; - interrupt-controller; - interrupts = ; - reg = <0x1000 0x1000>, - <0x2000 0x2000>, - <0x4000 0x2000>, - <0x6000 0x2000>; - }; - }; - - bus@ff800000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0xff800000 0x800000>; - - uart0: serial@640 { - compatible = "brcm,bcm6345-uart"; - reg = <0x640 0x1b>; - interrupts = ; - clocks = <&periph_clk>; - clock-names = "refclk"; - status = "disabled"; - }; - }; -}; diff --git a/arch/arm/dts/bcm96846.dts b/arch/arm/dts/bcm96846.dts deleted file mode 100644 index c70ebccabc19..000000000000 --- a/arch/arm/dts/bcm96846.dts +++ /dev/null @@ -1,30 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright 2022 Broadcom Ltd. - */ - -/dts-v1/; - -#include "bcm6846.dtsi" - -/ { - model = "Broadcom BCM96846 Reference Board"; - compatible = "brcm,bcm96846", "brcm,bcm6846", "brcm,bcmbca"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x08000000>; - }; -}; - -&uart0 { - status = "okay"; -}; diff --git a/arch/arm/mach-bcmbca/bcm6846/Kconfig b/arch/arm/mach-bcmbca/bcm6846/Kconfig index 5ef9535369ec..1f5639f46dfb 100644 --- a/arch/arm/mach-bcmbca/bcm6846/Kconfig +++ b/arch/arm/mach-bcmbca/bcm6846/Kconfig @@ -8,6 +8,7 @@ if BCM6846 config TARGET_BCM96846 bool "Broadcom 6846 Reference Board" depends on ARCH_BCMBCA + imply OF_UPSTREAM imply MTD_RAW_NAND imply NAND_BRCMNAND imply NAND_BRCMNAND_BCMBCA diff --git a/configs/bcm96846_defconfig b/configs/bcm96846_defconfig index 2f94bd295122..877a606a9651 100644 --- a/configs/bcm96846_defconfig +++ b/configs/bcm96846_defconfig @@ -9,11 +9,12 @@ CONFIG_TARGET_BCM96846=y CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 -CONFIG_DEFAULT_DEVICE_TREE="bcm96846" +CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcm96846" CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_IDENT_STRING=" Broadcom BCM6846" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_OF_UPSTREAM=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y