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[209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-45f0960a0d0si12034851cf.498.2024.10.08.20.25.15 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 08 Oct 2024 20:25:15 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nongnu.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1syNJr-0004p3-OZ; Tue, 08 Oct 2024 23:24:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1syNJn-0004iN-4y; Tue, 08 Oct 2024 23:24:55 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1syNJl-0004ix-2o; Tue, 08 Oct 2024 23:24:54 -0400 Received: from mail.maildlp.com (unknown [172.18.186.231]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4XNdXy335Zz6K9F9; Wed, 9 Oct 2024 11:24:34 +0800 (CST) Received: from frapeml500007.china.huawei.com (unknown [7.182.85.172]) by mail.maildlp.com (Postfix) with ESMTPS id 14727140A34; Wed, 9 Oct 2024 11:24:51 +0800 (CST) Received: from 00293818-MRGF.huawei.com (10.126.173.89) by frapeml500007.china.huawei.com (7.182.85.172) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Wed, 9 Oct 2024 05:24:31 +0200 To: , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH RFC V4 16/33] hw/acpi: Make _MAT method optional Date: Wed, 9 Oct 2024 04:17:58 +0100 Message-ID: <20241009031815.250096-17-salil.mehta@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241009031815.250096-1-salil.mehta@huawei.com> References: <20241009031815.250096-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.126.173.89] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To frapeml500007.china.huawei.com (7.182.85.172) Received-SPF: pass client-ip=185.176.79.56; envelope-from=salil.mehta@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Salil Mehta X-Patchwork-Original-From: Salil Mehta via From: Salil Mehta Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Jean-Philippe Brucker The GICC interface on arm64 vCPUs is statically defined in the MADT, and doesn't require a _MAT entry. Although the GICC is indicated as present by the MADT entry, it can only be used from vCPU sysregs, which aren't accessible until hot-add. Signed-off-by: Jean-Philippe Brucker Reviewed-by: Gavin Shan Signed-off-by: Salil Mehta --- hw/acpi/cpu.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c index 5cb60ca8bc..2d6afcfff7 100644 --- a/hw/acpi/cpu.c +++ b/hw/acpi/cpu.c @@ -671,10 +671,13 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts, aml_append(dev, method); /* build _MAT object */ - build_madt_cpu(i, arch_ids, madt_buf, true); /* set enabled flag */ - aml_append(dev, aml_name_decl("_MAT", + if (build_madt_cpu) { + build_madt_cpu(i, arch_ids, madt_buf, + true); /* set enabled flag */ + aml_append(dev, aml_name_decl("_MAT", aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data))); - g_array_free(madt_buf, true); + g_array_free(madt_buf, true); + } if (CPU(arch_ids->cpus[i].cpu) != first_cpu) { method = aml_method("_EJ0", 1, AML_NOTSERIALIZED); From patchwork Wed Oct 9 03:37:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 833939 Delivered-To: patch@linaro.org Received: by 2002:adf:a1d9:0:b0:367:895a:4699 with SMTP id v25csp609048wrv; Tue, 8 Oct 2024 20:39:37 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCU1+w2E1b8DeVFhPQZX0u5aeGdCYCSjhIMyjQJGLKede3XQ4MVAvMzgR8I3tG9vKVoPnYoTwQ==@linaro.org X-Google-Smtp-Source: AGHT+IFClsC+C1M4tnD7Y4tzHQ6KSaG2HGASEEsb8Eim/0v4iLIkkl3qEtcmX3kjrjC3BOMUwJgW X-Received: by 2002:a17:907:e61e:b0:a99:420c:80b2 with SMTP id a640c23a62f3a-a998d214755mr73859766b.27.1728445177244; Tue, 08 Oct 2024 20:39:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1728445177; cv=none; d=google.com; s=arc-20240605; b=cS6bNd7lR9jdPzdaJBsH4GyXF30B9UV4aIydiLupAf9Bx3uLcxnr3Cdy5KCLhfXME0 bAkrhnOS37bKIaDKp/URErQM5qwWzUqRGznYCOgDoulEYQrLKqoeCjEYE+WB6s4DnSH3 /KUxizilPok7sTnkHK8BEkLQ8o9/T2NFeLDKIr5Al5N3YaaRhxIJ+VEVcIBLmVytFfgQ LIEXJzh3mMklIpXHH8yJT8mlfw8/rgtTd7WUb5iV83x1TZ6vLnq75ts5S+b0ks36f8bN ugGNygVidAJoxiXqUhm42NOjEKY6RbncdOVFeQgNCUrg7b5GkiwM/IbvaXEuz4UnmFSA QGzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:from:reply-to:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to; bh=QrQ7+ib6Ph5JrDrptaoX41E6MZEWipo8dXs9ekABYyI=; fh=4Dgx8jc1gJCFDIGNl8iT3gucG+cuHYR9XmJ7yDXtNzA=; b=Ih3Xxltmg9Q30okFeidQAfZYeD6H9BFgnP4ghTywNmQx/VqW2odiVpZMxuWdY2jtU+ eb/+AP7X6p8Q5h2cT2ZCyicYy1dgEFAD8XHcr9077lwkTO4eoCxwl2ichkfqwc9zYR7f iOs6FLsNN9JAts4GAkWaBz3bU1B6Y/2yo34iAb8ehv4p/U3OQd45/746eV2yo3oJhYFQ OENL2VTHZjVlYBgnGs2dH2UKffhkZst32JLXe9MsBvny/8wY2JR3tB+4JiS2ZEvDgRYN KcFyTc1P5dDf9Mx6mUJeOq1F3tZ9StCtfs3zkIPvMQwRvRSzZvYRF6U+ebXtDMZRfO+m VBJQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id a640c23a62f3a-a9962034dbcsi283073466b.801.2024.10.08.20.39.37 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 08 Oct 2024 20:39:37 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nongnu.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1syNX1-0001Oc-Ue; Tue, 08 Oct 2024 23:38:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1syNWg-0001M3-0R; Tue, 08 Oct 2024 23:38:14 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1syNWe-0006Ly-Dr; Tue, 08 Oct 2024 23:38:13 -0400 Received: from mail.maildlp.com (unknown [172.18.186.231]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4XNdrK1XBmz6K9Gg; Wed, 9 Oct 2024 11:37:53 +0800 (CST) Received: from frapeml500007.china.huawei.com (unknown [7.182.85.172]) by mail.maildlp.com (Postfix) with ESMTPS id DBEDE140B3C; Wed, 9 Oct 2024 11:38:09 +0800 (CST) Received: from 00293818-MRGF.huawei.com (10.126.173.89) by frapeml500007.china.huawei.com (7.182.85.172) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Wed, 9 Oct 2024 05:37:50 +0200 To: , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH RFC V4 31/33] target/arm/kvm: Write vCPU's state back to KVM on cold-reset Date: Wed, 9 Oct 2024 04:37:02 +0100 Message-ID: <20241009033704.250287-2-salil.mehta@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241009033704.250287-1-salil.mehta@huawei.com> References: <20241009031815.250096-1-salil.mehta@huawei.com> <20241009033704.250287-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.126.173.89] X-ClientProxiedBy: dggems704-chm.china.huawei.com (10.3.19.181) To frapeml500007.china.huawei.com (7.182.85.172) Received-SPF: pass client-ip=185.176.79.56; envelope-from=salil.mehta@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Salil Mehta X-Patchwork-Original-From: Salil Mehta via From: Salil Mehta Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Jean-Philippe Brucker Previously, all `PSCI_CPU_{ON, OFF}` calls were handled directly by KVM. However, with the introduction of vCPU hotplug, these hypervisor calls are now trapped to QEMU for policy checks. This shift can lead to inconsistent vCPU states between KVM and QEMU, particularly when the vCPU has been recently plugged in and is transitioning from the unparked state in QOM. Therefore, it is crucial to synchronize the vCPU state with KVM, especially in the context of a cold reset of the QOM vCPU. To ensure this synchronization, mark the QOM vCPU as "dirty" to trigger a call to `kvm_arch_put_registers()`. This guarantees that KVM’s `MP_STATE` is updated accordingly, forcing synchronization of the `mp_state` between QEMU and KVM. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Salil Mehta --- target/arm/kvm.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 9a51249a42..a3c98fa213 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -1038,6 +1038,7 @@ void kvm_arm_cpu_post_load(ARMCPU *cpu) void kvm_arm_reset_vcpu(ARMCPU *cpu) { int ret; + CPUState *cs = CPU(cpu); /* Re-init VCPU so that all registers are set to * their respective reset values. @@ -1059,6 +1060,12 @@ void kvm_arm_reset_vcpu(ARMCPU *cpu) * for the same reason we do so in kvm_arch_get_registers(). */ write_list_to_cpustate(cpu); + + /* + * Ensure we call kvm_arch_put_registers(). The vCPU isn't marked dirty if + * it was parked in KVM and is now booting from a PSCI CPU_ON call. + */ + cs->vcpu_dirty = true; } void kvm_arm_create_host_vcpu(ARMCPU *cpu)