From patchwork Wed Nov 27 10:29:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 180280 Delivered-To: patches@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp5914281ilf; Wed, 27 Nov 2019 02:29:19 -0800 (PST) X-Received: by 2002:a2e:7405:: with SMTP id p5mr14779363ljc.34.1574850559286; Wed, 27 Nov 2019 02:29:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574850559; cv=none; d=google.com; s=arc-20160816; b=Uui1kG7Nt3UZq5SFjebYUdLrKJu5/BnKBL84Hd5L6lUwP4pt7D+W1gnSfW9fo+JdxG mBi2bKQQelBNaw6kuZfrcb9VBdYyMVNYC/AT3sIrSnrCFBxKZ+O/RFvlJATJ7tX1nvkj HHtLQEEhNVEK8GelsAW5/jlFFbTeR+axE/W7bSq8vKv2QtY4HqzspdFCasbOg9cia0gH woY3aEl3sOk9y9zriO3GtOqeIOtbxYf+ZAGUZZDpE9OjRapdTQCMe4J+hbIeAGNQjVRp xmKusH6fvNuXzMB4LZB1PphZaIYuJRX3Y9b9Ik+kaZ5kzkVpD/rwnh3Y09+51HUKzmGH kZog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=75TMc1cT7FH1sabSgSiOxKjblChN2q0Nv5wC1JCjNcA=; b=w5mxcf7LWvg2FeGGrCSbfHjJ1xrNNGVGK9T5RdKjV1BxA0oWxUivLvHzUyDWEzSZhh gWJftciQNyvLrOOM7Wan3wBn1VMEifVG9lfAV94+t3kOsLcwDNSTsALC1uQGDQmOifYW qqBveip8QBfycQCSzuwIf+mePZayJqK8Du9abFPIoiYuuNW0M6g/TJVXyu5wV3Cj54np p1js4IHVrRb2Bz4aNfBo2YqcGNgnw3Wqd84H9Lhnp0USkkdYPTUFtdLm064jtblGmcq1 0v2wL83vQTnxM3pNyRA0CbGh39ILUGPGJfcbqe+0/aelSFycqGotvORS481qjKmbglel oiZA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yfkFQHGS; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id p19sor7981916lji.41.2019.11.27.02.29.19 for (Google Transport Security); Wed, 27 Nov 2019 02:29:19 -0800 (PST) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yfkFQHGS; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=75TMc1cT7FH1sabSgSiOxKjblChN2q0Nv5wC1JCjNcA=; b=yfkFQHGSTi+m76i8sYvYqdEiuggix6PnBHJpJpmRd1TB3+HBk28IT3r3QivTmsosW3 P5rPoeO+FgUBK3MOmVvO1JUHb3eLFY79MhHRnE+icFW+jjT2WL7HFRR4tp1G8qN/A2sn IIk4sfepSYFdvVBdNHNiNtnCUlt8z8lm4+AI1Ls/4Cvp4dN4v5vpvGLeGmY3v9m51pCV 1RtoYLhYErI+uFTBrPbHuDMbEngyxAmo7PHnH4UB7Eu/VvccG3FfcCkbWvfKNP5FdLhC 1DlAD7Zg1BdRyBzmBv/jdXinAsrYRjK3KNI+WtKDTJtemO4A9AWbEjfPE5iReHNipErB ByLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=75TMc1cT7FH1sabSgSiOxKjblChN2q0Nv5wC1JCjNcA=; b=RKKebYorAN7huOzeOjwKiQo981Z3h3FNHiIpckjZ6IJ1fK4hAYvXjzPDETMDRZw3li Mw4wcwgUwx4L3CBSGIxF4driTAA5vNV4FOm8co4RZ5PlM2v5HMW1fXNMEbELbqaT6GUn 2t8+ySvSF+Gq6Mxnd4oyiK71LMSrPlo5+ZLNznFHAIfDm4fsthljYdMpqGkMzIR3yJ+7 Ok+zeetg5/zPZJ0Mmzbjos0Mo1DrMzhywHFDZdzPyezUTmldNgQ/e6O2LEQJ1oHzuc2f SvxKPStKg6KpFKFsTEXLGS1oQSSVFNcy1ZbPrhGTQ/Sek845vXDQOuZvtgUesZq/bSmS GViA== X-Gm-Message-State: APjAAAUqjgxPrgvIlaTEIi/+XWKf+zTgKDrl1QBTZHf1JN4D5EeVh/4U YwTS+NpLQJKTzIa/6/f/pDEt872W X-Google-Smtp-Source: APXvYqyU1IApp4NI9wl22/OIUXj5aD2EpYZqlLflyJ4cORj4qNdhYEZOz8nnWtIV00rgXD1rv0nt9g== X-Received: by 2002:a2e:b818:: with SMTP id u24mr15059006ljo.33.1574850558878; Wed, 27 Nov 2019 02:29:18 -0800 (PST) Return-Path: Received: from uffe-XPS-13-9360.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id t9sm6868260ljj.19.2019.11.27.02.29.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2019 02:29:18 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 01/13] cpuidle: psci: Align psci_power_state count with idle state count Date: Wed, 27 Nov 2019 11:29:02 +0100 Message-Id: <20191127102914.18729-2-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191127102914.18729-1-ulf.hansson@linaro.org> References: <20191127102914.18729-1-ulf.hansson@linaro.org> From: Sudeep Holla Instead of allocating 'n-1' states in psci_power_state to manage 'n' idle states which include "ARM WFI" state, it would be simpler to have 1:1 mapping between psci_power_state and cpuidle driver states. ARM WFI state(i.e. idx == 0) is handled specially in the generic macro CPU_PM_CPU_IDLE_ENTER_PARAM and hence state[-1] is not possible. However for sake of code readability, it is better to have 1:1 mapping and not use [idx - 1] to access psci_power_state corresponding to driver cpuidle state for idx. psci_power_state[0] is default initialised to 0 and is never accessed while entering WFI state. Reported-by: Ulf Hansson Signed-off-by: Sudeep Holla Reviewed-by: Ulf Hansson --- Changes in v3: - None. --- drivers/cpuidle/cpuidle-psci.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index f3c1a2396f98..361985f52ddd 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -30,7 +30,7 @@ static int psci_enter_idle_state(struct cpuidle_device *dev, u32 *state = __this_cpu_read(psci_power_state); return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, - idx, state[idx - 1]); + idx, state[idx]); } static struct cpuidle_driver psci_idle_driver __initdata = { @@ -89,12 +89,14 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) if (!count) return -ENODEV; + count++; /* Add WFI state too */ psci_states = kcalloc(count, sizeof(*psci_states), GFP_KERNEL); if (!psci_states) return -ENOMEM; - for (i = 0; i < count; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); + for (i = 1; i < count; i++) { + state_node = of_parse_phandle(cpu_node, "cpu-idle-states", + i - 1); ret = psci_dt_parse_state_node(state_node, &psci_states[i]); of_node_put(state_node); From patchwork Wed Nov 27 10:29:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 180281 Delivered-To: patches@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp5914312ilf; Wed, 27 Nov 2019 02:29:21 -0800 (PST) X-Received: by 2002:a2e:844e:: with SMTP id u14mr16874379ljh.17.1574850560892; Wed, 27 Nov 2019 02:29:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574850560; cv=none; d=google.com; s=arc-20160816; b=1DyDH8FTd3v7kx1JzPhYnjBWr0uLQxNXuqnZyxH8UTQgyhh43rRdGqvtqGiB/fPkjy mA+rQ1dPbcIZ6S6jdE04WOFlaSJurMQYhIkvWW1wDUGGJuhwc7RJxoE4pMDRY0j2+Q+N PzoeUIZZ8eZCa23G1vgkNCzoD9lZ8qJYTr/xVSwQhAyj93Rr4CueY6W/uGiA7u2q7quK iMDW2nhKIwKaJJzlOJfKD9NbLh//5DAf/EobiqY2DH5cA5wLOwPLJYqQOXQtim+X3euw muP9XCF+whf/RFKKRWWxN/tT49pdQ60Kps1/Z8YcBX87S26pMwihdTbrjtK2f5dGa0DU AVbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sCVWNeBJQqE/5xyPRPgEm2JhEV906v9Oz0Oq1T8bJNI=; b=VCyZrmpyO0FZshpk3lUbgJVoUYwchfn87uzVuhVEuEka5ovUcwMOVyhWRs1+POBVhf ntwZh0f88XLqZLd9X3fGAR+nE0Fki9thvfTvtXA0365rmbjAHXo+ElFTTB+jl5c0BQNU pPf8ZDS4kIPJNuqDQ2+ENTx7sZMydnFUCjzFLWVViAsfQYdQrR2/lor5fwGdDJJGAOp2 ABElkqabFVywIJkVjs6wMLz1H1bpz4weLf4WupQvb4kZ9srsPYwrUfpQKNmvYYt+ZfOk JNe89s9AtRnNEwlWMPxhHzC9JNAXDQl7Pd9M3CrZM3Abr1NrzURsLZJyLZpT5JSeQv1s JNtw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YvFWt71U; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id e10sor7999932ljp.2.2019.11.27.02.29.20 for (Google Transport Security); Wed, 27 Nov 2019 02:29:20 -0800 (PST) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YvFWt71U; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sCVWNeBJQqE/5xyPRPgEm2JhEV906v9Oz0Oq1T8bJNI=; b=YvFWt71U882ckxf/LB6gEUlRbjQnxw2v4HSpTtRA/CIRR1fdiPx/bBK1w0X47GcArH 2b9y2zcZfgC0lb0vg3dJclAJXeV3ERi2wWSVYb6FyWacBlStC+t9YTkvGRCm18vwu+Az yuQLsVYJum5iZFqaWYVgDK8Xb9Ccn1AsZjD0FRB3DKOHxmyLVfnk0GqW9rhBk4X6nFwk zSiXEt6IUYn6CtLibeLt9S0fPMSNivoSo5fGoS3gHmW+PL43rwvlE7LjlE2vJDLtPz4W pzfj/w0oRH7NucNFnlBau1FCnAgxYxvlF1TEAP+NqRDGnjkmLTZzG3s6CiGzNgOj3pic tm8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sCVWNeBJQqE/5xyPRPgEm2JhEV906v9Oz0Oq1T8bJNI=; b=Mbwp198c+XxKNoNGCc22HFUKX1mOI+pXWiZkp5rnHx5Pcix1XyR8YbB9B3jwIrhosK GrCWnGzkpvwPMsQ+IdBesB2p0qZzwd0EUKBpSNRYT01f6eTj2lCLyZLEyt9wFrjX5JP4 g58sq5ut9oTk8PVqhMmkyopV8Y0TttzOwla/LLVwLwPdr/AQ5lCjYzYVy9Q9FO6AGuEc +xG0gBU9Yf1LkqZ1vqdV9fNN1mzS977/WBqtDvVF6Hy25DctHgFB9Ap6KXuK0PLwk4DE ZmbSkI7YdZ8l4Q+o2Vzf1lImWTz3Q2KbLpLM09sM64ZdN11tWKyllMIyp9wrSEEjbfGT c3pQ== X-Gm-Message-State: APjAAAXqXCb4CqsVVxVy2X4z0W91g8OZj+kenDnSc+bDZI6ITUwnH9Yp q+8hGxW69MZ48kLvAMZhzaOvz7dz X-Google-Smtp-Source: APXvYqwp8QFzKd9gx47/plPp96c8HGRuP0rFEep/FiEuLZuC3rMt3DrkVicIFLwEUpX8FVCTCDvBKA== X-Received: by 2002:a2e:7204:: with SMTP id n4mr28853360ljc.139.1574850560358; Wed, 27 Nov 2019 02:29:20 -0800 (PST) Return-Path: Received: from uffe-XPS-13-9360.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id t9sm6868260ljj.19.2019.11.27.02.29.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2019 02:29:19 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v3 02/13] dt: psci: Update DT bindings to support hierarchical PSCI states Date: Wed, 27 Nov 2019 11:29:03 +0100 Message-Id: <20191127102914.18729-3-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191127102914.18729-1-ulf.hansson@linaro.org> References: <20191127102914.18729-1-ulf.hansson@linaro.org> Update PSCI DT bindings to allow to represent idle states for CPUs and the CPU topology, by using a hierarchical layout. Primarily this is done by re-using the existing DT bindings for PM domains [1] and for PM domain idle states [2]. Let's also add an example into the document for the PSCI DT bindings, to clearly show the new hierarchical based layout. The currently supported flattened layout, is already described in the ARM idle states bindings [3], so let's leave that as is. [1] Documentation/devicetree/bindings/power/power_domain.txt [2] Documentation/devicetree/bindings/power/domain-idle-state.txt [3] Documentation/devicetree/bindings/arm/idle-states.txt Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Reviewed-by: Sudeep Holla Signed-off-by: Ulf Hansson --- Changes in v3: - Updated example to make it compile with "make dt_binding_check". --- .../devicetree/bindings/arm/cpus.yaml | 15 +++ .../devicetree/bindings/arm/psci.yaml | 104 ++++++++++++++++++ 2 files changed, 119 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index cb30895e3b67..92a775d6fc0e 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -241,6 +241,21 @@ properties: where voltage is in V, frequency is in MHz. + power-domains: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + description: + List of phandles and PM domain specifiers, as defined by bindings of the + PM domain provider (see also ../power_domain.txt). + + power-domain-names: + $ref: '/schemas/types.yaml#/definitions/string-array' + description: + A list of power domain name strings sorted in the same order as the + power-domains property. + + For PSCI based platforms, the name corresponding to the index of the PSCI + PM domain provider, must be "psci". + qcom,saw: $ref: '/schemas/types.yaml#/definitions/phandle' description: | diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index 7abdf58b335e..8ef85420b2ab 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -102,6 +102,34 @@ properties: [1] Kernel documentation - ARM idle states bindings Documentation/devicetree/bindings/arm/idle-states.txt + "#power-domain-cells": + description: + The number of cells in a PM domain specifier as per binding in [3]. + Must be 0 as to represent a single PM domain. + + ARM systems can have multiple cores, sometimes in an hierarchical + arrangement. This often, but not always, maps directly to the processor + power topology of the system. Individual nodes in a topology have their + own specific power states and can be better represented hierarchically. + + For these cases, the definitions of the idle states for the CPUs and the + CPU topology, must conform to the binding in [3]. The idle states + themselves must conform to the binding in [4] and must specify the + arm,psci-suspend-param property. + + It should also be noted that, in PSCI firmware v1.0 the OS-Initiated + (OSI) CPU suspend mode is introduced. Using a hierarchical representation + helps to implement support for OSI mode and OS implementations may choose + to mandate it. + + [3] Documentation/devicetree/bindings/power/power_domain.txt + [4] Documentation/devicetree/bindings/power/domain-idle-state.txt + + power-domains: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + description: + List of phandles and PM domain specifiers, as defined by bindings of the + PM domain provider. required: - compatible @@ -160,4 +188,80 @@ examples: cpu_on = <0x95c10002>; cpu_off = <0x95c10001>; }; + + - |+ + + // Case 4: CPUs and CPU idle states described using the hierarchical model. + + cpus { + #size-cells = <0>; + #address-cells = <1>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0>; + enable-method = "psci"; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + reg = <0x100>; + enable-method = "psci"; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; + }; + + idle-states { + + CPU_PWRDN: cpu-power-down { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0000001>; + entry-latency-us = <10>; + exit-latency-us = <10>; + min-residency-us = <100>; + }; + + CLUSTER_RET: cluster-retention { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000011>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-power-down { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000031>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + domain-idle-states = <&CPU_PWRDN>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + domain-idle-states = <&CPU_PWRDN>; + power-domains = <&CLUSTER_PD>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + }; + }; ... From patchwork Wed Nov 27 10:29:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 180282 Delivered-To: patches@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp5914350ilf; Wed, 27 Nov 2019 02:29:23 -0800 (PST) X-Received: by 2002:ac2:5dcc:: with SMTP id x12mr28009245lfq.163.1574850562884; Wed, 27 Nov 2019 02:29:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574850562; cv=none; d=google.com; s=arc-20160816; b=sJ3S4zpHwQSsfcP5PJKkDUUENF2nnraO6I51nXCYgH4x+yqELbCVVzej7EvCuXnLUE TjETC8HmaamR5HOZjEXzvc2/0YcubCNZghC6g1/nH2BJ9dmMUMQBmJWMmHv2l9witJjN nab5HurWG/Oi4CDJISigtbX3CNggq+M3MoYoxyLQGyn45mrMIOUCflz/DxvwrWc1pNiQ 6wk0ribsiFwDqLyG2NQUPLFinWuQJrciX70OKSK7/3BveH8AHgqVsvNMjwmjsyrNv4Sx t4R2M+mfvdiy4C1YsUelCT9NOIPgYf15Qo1eyk2iQix3CbWiGfKD6NLggN1CYlsQKeEo tgYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=HTpoNIOk6QVHLkL5hD/y3Oh3mM1LWBHn64GrXkiktTA=; b=UDqA6uRaNfO6vzt7vzcmP2UZFIeuRproz1pMguhE1giXIXiT5yIUG5raBv/HrXCk05 0XZpzYG7MArZ+OS/Pbulscc59yjPWFxzIegAPZ2JgH3xGapwuV8CRVBaj91pIkyz+NUb zboLuPaZOkcaFhDcVCzoGao/Vn8JQ6spKz+6UPk2X9pcymUmN1KlOPRm5qM+zUqA9udB Akb/MfFaBzG/XHuVWepShaBx0t/IKQ/BvpI+9XMOP91OWgjN2aQ90v9jKGYafQH6A4kL Cj8BFn58qHLGVrkG8ZB1KMPJ1JUe5IqTwXIbnt2jUQsgh2e7Z5/gD4a6XK6KjnCJoSVq OCfA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AyUxtvbc; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id s3sor3783626lfo.24.2019.11.27.02.29.22 for (Google Transport Security); Wed, 27 Nov 2019 02:29:22 -0800 (PST) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AyUxtvbc; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=HTpoNIOk6QVHLkL5hD/y3Oh3mM1LWBHn64GrXkiktTA=; b=AyUxtvbcofFh17U604la4Y1G39mBOWKGJg5dHe2xNMOmUM+72q8KFL+MRj9MXbX1cg 6TGADlEWGQG3IeUrcLndrG52Pb3xsYv/O4+js502Oo4yMQF+CBIfC6qa+QnnT5sGyBP2 TBoTGuANUAcOEiHVUgGaySfBTjOTRiGHqALcwOsEdIhI2aK06Qcf6q+7cHDOX/EEt6m9 408m8uS7ul/++ymsVs+h1d0qHZ4rTaqbZH/E6Jsnx4XhbHYMMq9nKxz5tLDMlr6qXfUf JfF4LZpBdnWLuZ9iIxL9MNTFOhBS4AwUO8u59tKLkSbAMxjg+Ymn4a6pqkfGJM72On3K FllA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HTpoNIOk6QVHLkL5hD/y3Oh3mM1LWBHn64GrXkiktTA=; b=DdQP2lh/18wJg7llrLERZL99AlerDfZ9v+0oky5+VE76njwI1oj+rZxTWh+9SqjPwW Ifsk9+qVZzgDTHvmZyaDK6Lwxat12UkR3zwk1RPq9DfLZu+3b5PXHkGaC3gvXF25eo/+ 61egdrMdw73x05c2tFG2WrEsuyX2+NEE8sHyPzcgljeKp0hhXvpcUd6jZj7BZZBKKbsi NRXMgkNL6Yi5ZcA1bLR44/eOg15ytzzs32/KuE/MFpV0YDHx5VUz0MLnOvsmNIh9+U1f QccFWvhpoTufoNgg0gObafcriEQeXi+s2W0m0CwcO67/cCR9VY9SRYL7C/UbCJq6FJz8 QoNg== X-Gm-Message-State: APjAAAV8P/DdYHqQfpYD39Gh8X1DtjiWi26e/3RmlgNRqvW+1p1Wb6p1 G8hXVjiQ7W+k6Lk23Ar/bt3p/1ga X-Google-Smtp-Source: APXvYqwFJjqYM7aDnhXGNf9deKSkKCg+5HFB9vXDa+I/5Qtw5VKdR0KMezOx2PnWjK5Zoh8cIB0ztg== X-Received: by 2002:ac2:55a3:: with SMTP id y3mr17405016lfg.108.1574850562474; Wed, 27 Nov 2019 02:29:22 -0800 (PST) Return-Path: Received: from uffe-XPS-13-9360.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id t9sm6868260ljj.19.2019.11.27.02.29.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2019 02:29:21 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 03/13] firmware: psci: Export functions to manage the OSI mode Date: Wed, 27 Nov 2019 11:29:04 +0100 Message-Id: <20191127102914.18729-4-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191127102914.18729-1-ulf.hansson@linaro.org> References: <20191127102914.18729-1-ulf.hansson@linaro.org> To allow subsequent changes to implement support for OSI mode through the cpuidle-psci driver, export the existing psci_has_osi_support(). Export also a new function, psci_set_osi_mode(), that allows its caller to enable the OS-initiated CPU-suspend mode in the PSCI FW. To deal with backwards compatibility for a kernel started through a kexec call, default to set the CPU-suspend mode to the Platform Coordinated mode during boot. Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v3: - None. --- drivers/firmware/psci/psci.c | 18 ++++++++++++++++-- include/linux/psci.h | 2 ++ 2 files changed, 18 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index b3b6c15e7b36..2937d44b5df4 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -97,7 +97,7 @@ static inline bool psci_has_ext_power_state(void) PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK; } -static inline bool psci_has_osi_support(void) +bool psci_has_osi_support(void) { return psci_cpu_suspend_feature & PSCI_1_0_OS_INITIATED; } @@ -162,6 +162,15 @@ static u32 psci_get_version(void) return invoke_psci_fn(PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0); } +int psci_set_osi_mode(void) +{ + int err; + + err = invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, + PSCI_1_0_SUSPEND_MODE_OSI, 0, 0); + return psci_to_linux_errno(err); +} + static int psci_cpu_suspend(u32 state, unsigned long entry_point) { int err; @@ -544,9 +553,14 @@ static int __init psci_1_0_init(struct device_node *np) if (err) return err; - if (psci_has_osi_support()) + if (psci_has_osi_support()) { pr_info("OSI mode supported.\n"); + /* Default to PC mode. */ + invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, + PSCI_1_0_SUSPEND_MODE_PC, 0, 0); + } + return 0; } diff --git a/include/linux/psci.h b/include/linux/psci.h index ebe0a881d13d..a67712b73b6c 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -18,6 +18,8 @@ bool psci_tos_resident_on(int cpu); int psci_cpu_suspend_enter(u32 state); bool psci_power_state_is_valid(u32 state); +int psci_set_osi_mode(void); +bool psci_has_osi_support(void); enum smccc_version { SMCCC_VERSION_1_0, From patchwork Wed Nov 27 10:29:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 180283 Delivered-To: patches@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp5914393ilf; Wed, 27 Nov 2019 02:29:24 -0800 (PST) X-Received: by 2002:ac2:528e:: with SMTP id q14mr26902030lfm.151.1574850564644; Wed, 27 Nov 2019 02:29:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574850564; cv=none; d=google.com; s=arc-20160816; b=cDWC501gRSg2ghMkZITOeEPyJiT9GrK6gYLJ6Tq4AVCg//7VejOtBZwfacTsEdpsZk xVWJdjwpESVkZEx58WOzYZvzQgd+aqQQzg3AVs4jU7IE4n7fGdVJteH5llsKbEb76wnR 56UmO3nxbhfs1BqaNujrMVttHPuT5mI/gFG+3JZYuOT5Y4qiQEUdwuFh12wroqeX621q JeLbutve7+lZ4MH0htKI/U+UoZHMCNSN5sZByOfTU+HfwTafAIMEokAAQidqkzcTR2/i NVlCzI2D0hQbReAcDUUbJNOw6qUPMGvLcTI1p26ElvAOHvbhtmmCEqlONczOZ/4PuEoK napA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=hR3fATInnhJT0Il8OsjH3yU7lJcZN7xcMci8RIbbM2k=; b=E83D3DaMMt8uPZN2Wu2CPhaZqt8nOwFlK2uq7mmKTIM8lXKe3LtFG+Bi9s8t7ZCBjQ 58n/sdqSf/EQahswnQ4gOen9YWGNjuYuNN53m967P8GZ/SUR4OmvarTNh1BBH6bbXwNy 5BMbmwvIO0/NLLUudvGPsJK15zWZ1wZJNqPk/UeYidzBuYeSvEdigqXfY1wrBHRYIjXS G9iMAsANV0Iy3o+bGiCAUye0tol6xNoCPL9UfPr4b35Eh2fwYvSR4s1qni2CjGr1VxRM /sYwnEFjRcY9KpoD+2usILlBfJ9lJGdIoDNV4tggp9ralQaaznP6uFSFh3D426RYJPqe Pqqg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hV6JyPoe; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id k1sor7941610lji.47.2019.11.27.02.29.24 for (Google Transport Security); Wed, 27 Nov 2019 02:29:24 -0800 (PST) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hV6JyPoe; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hR3fATInnhJT0Il8OsjH3yU7lJcZN7xcMci8RIbbM2k=; b=hV6JyPoeJ6ScqrZKdsERvcTAjECHZPKrEpiECJjJ2opXh0u63rwgTFmXVvsdu2X0H5 ICa9gP/wcirISvdKCLUGE/oSc075kXCJPeVFk1ObygGjfw01gIFsrcO6TnfrHFBHoWH7 DKuK5ax/e4uTVk6L9WIaN3h5ifumDU4XlNesZNqqm8c8D/7Me9f0kHQCaK+30B43RfwD gfKgt3Uwxz1lWHtEj3Hpt//hH10XK3vYERtLGm136PpCMUIvS22JkORRZXKwpoE7WT6X AR7s38eXNR6p/BkAh2p5qx4ND2GJqCjIu427zkHIbuXE71HMxpb5zXF0EbXTFojvke0C GOuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hR3fATInnhJT0Il8OsjH3yU7lJcZN7xcMci8RIbbM2k=; b=d3Y5fh/VFwHYut4fFzL2hzHxrTY+wkptl07rciMVTN1goYASVp6njpiw23HTL7fa1G TYvDe9BB8lqcd8JQJ71tfHFBIKK95unsLm+9YzqesSFRekytxJ2Flz0n42IXLnKNcPNt /tRxD/77wJf8uSuqdEixIL7tvgcsYCQ+rPFmwbP79t8dkGU57wYs24gdgnC4s7btfOBi ehy4QKTMhDAkMxaVpff96jEdCBBDi78F5+gtZWJGOOHFNM9SNef20930kTbDhH+FR5YM hmlx5VxJ/p+v6/zuOs/i2ejkzl+egkYJlRjwfi0NstChmtgS7IZSuO0xnka9iPG4mMdh uglQ== X-Gm-Message-State: APjAAAVSOqt3qlWsEGVWyBW3XqWGXKvHof6VMwEx0DDjHqed/Xq2z17/ HvBUMDAwWnePN+NWNyYNLKVLx5rH X-Google-Smtp-Source: APXvYqwCBgszickFdMaiVIID+IrQo2mOi4OX8ab6dEe54mVNp2DqUjt/6Yig54hA/QaPvMO1ZC4nzA== X-Received: by 2002:a2e:6c0c:: with SMTP id h12mr30985887ljc.24.1574850564180; Wed, 27 Nov 2019 02:29:24 -0800 (PST) Return-Path: Received: from uffe-XPS-13-9360.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id t9sm6868260ljj.19.2019.11.27.02.29.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2019 02:29:23 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v3 04/13] of: base: Add of_get_cpu_state_node() to get idle states for a CPU node Date: Wed, 27 Nov 2019 11:29:05 +0100 Message-Id: <20191127102914.18729-5-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191127102914.18729-1-ulf.hansson@linaro.org> References: <20191127102914.18729-1-ulf.hansson@linaro.org> The CPU's idle state nodes are currently parsed at the common cpuidle DT library, but also when initializing data for specific CPU idle operations, as in the PSCI cpuidle driver case and qcom-spm cpuidle case. To avoid open-coding, let's introduce of_get_cpu_state_node(), which takes the device node for the CPU and the index to the requested idle state node, as in-parameters. In case a corresponding idle state node is found, it returns the node with the refcount incremented for it, else it returns NULL. Moreover, for PSCI there are two options to describe the CPU's idle states [1], either via a flattened description or a hierarchical layout. Hence, let's take both options into account. [1] Documentation/devicetree/bindings/arm/psci.yaml Suggested-by: Sudeep Holla Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Reviewed-by: Rob Herring Reviewed-by: Daniel Lezcano Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v3: - None. --- drivers/of/base.c | 36 ++++++++++++++++++++++++++++++++++++ include/linux/of.h | 8 ++++++++ 2 files changed, 44 insertions(+) -- 2.17.1 diff --git a/drivers/of/base.c b/drivers/of/base.c index 1d667eb730e1..0e4cdf0f3864 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -477,6 +477,42 @@ int of_cpu_node_to_id(struct device_node *cpu_node) } EXPORT_SYMBOL(of_cpu_node_to_id); +/** + * of_get_cpu_state_node - Get CPU's idle state node at the given index + * + * @cpu_node: The device node for the CPU + * @index: The index in the list of the idle states + * + * Two generic methods can be used to describe a CPU's idle states, either via + * a flattened description through the "cpu-idle-states" binding or via the + * hierarchical layout, using the "power-domains" and the "domain-idle-states" + * bindings. This function check for both and returns the idle state node for + * the requested index. + * + * In case an idle state node is found at @index, the refcount is incremented + * for it, so call of_node_put() on it when done. Returns NULL if not found. + */ +struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index) +{ + struct of_phandle_args args; + int err; + + err = of_parse_phandle_with_args(cpu_node, "power-domains", + "#power-domain-cells", 0, &args); + if (!err) { + struct device_node *state_node = + of_parse_phandle(args.np, "domain-idle-states", index); + + of_node_put(args.np); + if (state_node) + return state_node; + } + + return of_parse_phandle(cpu_node, "cpu-idle-states", index); +} +EXPORT_SYMBOL(of_get_cpu_state_node); + /** * __of_device_is_compatible() - Check if the node matches given constraints * @device: pointer to node diff --git a/include/linux/of.h b/include/linux/of.h index 844f89e1b039..c669c0a4732f 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -351,6 +351,8 @@ extern const void *of_get_property(const struct device_node *node, int *lenp); extern struct device_node *of_get_cpu_node(int cpu, unsigned int *thread); extern struct device_node *of_get_next_cpu_node(struct device_node *prev); +extern struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index); #define for_each_property_of_node(dn, pp) \ for (pp = dn->properties; pp != NULL; pp = pp->next) @@ -765,6 +767,12 @@ static inline struct device_node *of_get_next_cpu_node(struct device_node *prev) return NULL; } +static inline struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index) +{ + return NULL; +} + static inline int of_n_addr_cells(struct device_node *np) { return 0; From patchwork Wed Nov 27 10:29:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 180286 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp5914527ilf; Wed, 27 Nov 2019 02:29:30 -0800 (PST) X-Google-Smtp-Source: APXvYqzp4IzeuhXKIXm678SWeOw6P6GIJ2Ba220ErESfhpW9tLbJ4mrRg2nRq6ExhAb310vED34E X-Received: by 2002:aa7:c6c9:: with SMTP id b9mr30942453eds.1.1574850570162; Wed, 27 Nov 2019 02:29:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574850570; cv=none; d=google.com; s=arc-20160816; b=r9DweXxXCQM7JRGpV62+3Yk01M0Ky/NyI+dRewZNO9LNrrNBuhW9dZ+840X5TOuV2P lFyRr+K4Ou1v5lGQHZNVPaA21auShX2PV2xWLJtFSHxzRIB2HFKdSn1Bkz4sK75NunXm nYEAwYBp/FpVBpaOZzdFr/fXuJskzrOR0RFEG9JuzLGog8sOjQj8BXJV6CR/h5wlqdNb C8DtDhBg79R+f1I84kuYPrsEdgq/xXj5YUSw2UusoXuCicBwkUTA7WSIGYFmSo4gnlsa yrBuRnaQVJqPchz2qQs36y3XycovIsU82UnhdapnhK7wSZW8GgNXUgkOlgIC3hmvKyiT rvRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=r6EEdyR4M7hIjNiPTtCqyqL+HPCjuTmwEmLVgwUWsTU=; b=ycL7kOCn40HhZUEuvSbIS/4D0gxc7ltGAG5k3n43ZbGBuXQkPYpCJs8Ikk+FNnOFFK FmHIRWIolpn85AY0J0oBPddfju0b+TLgINgwY8mXXElRxfRnFpPoVPX5fPyAkjCg/9Ut EWGVDK9Gk/c4i3NPHRqlhfsgVPsaAZlYnvLKd3otGkoo20KKj7J5GJh99cwgiiJf7Juh biDX0w15DfCG8NmtVujnYVgbvovi1XnTooz/dk5kEPoxQc68NC/qeQbX0azJIOHtHz3z 2HKbB34D+17lCVVE9YgmHyXKvINVZ1eAzFBer7OX8Giml5OKoGx6efpTeHrwJCrwlxiI uZ7A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Aip1jwmE; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p24si8751899eja.385.2019.11.27.02.29.29; Wed, 27 Nov 2019 02:29:30 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Aip1jwmE; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727118AbfK0K33 (ORCPT + 10 others); Wed, 27 Nov 2019 05:29:29 -0500 Received: from mail-lj1-f196.google.com ([209.85.208.196]:36885 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727120AbfK0K31 (ORCPT ); Wed, 27 Nov 2019 05:29:27 -0500 Received: by mail-lj1-f196.google.com with SMTP id d5so23865758ljl.4 for ; Wed, 27 Nov 2019 02:29:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=r6EEdyR4M7hIjNiPTtCqyqL+HPCjuTmwEmLVgwUWsTU=; b=Aip1jwmEw77XvaXpoL0a2PBc9sDNiZm0UnDB/ADxUDwNIdVBCF2fbWHwfRbLBh+J/f rNrtGsubiNSfVnOXDIWZxJI5cIfoHXYOsf2tU/Jp6JogK4w14ZwKmJrcTOT3i2RGsDsV M1la93McdDg0aO5+NKv0TLCjde3s6HRBOmsOITA8BHF5EtqF1v3yWPqU/ti7tNNznW0P /LUD/N322Ey8nbLpdeNyUCiu9IzUItBdR1Xq6E/MlfJ1NJIcymH8YguzuU7RhtgFoB7c kjswnEdVZx8pNx1lGAECS7NzZOznr2GSXxds6fBP0oSdXyQ6S8vb+mSpSTKtsJPQH0bZ MK/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=r6EEdyR4M7hIjNiPTtCqyqL+HPCjuTmwEmLVgwUWsTU=; b=UTqbtBUrgnv3FW1c05ykAkP/G3/SpDnNXGq6mUy6sLJZymerFIcIOIwF23mCY6wO9r oUFlxqAzolTIP/fNLLIEWlyW2LklYvlZfAgsHcqQeBgZ5ALQydXuM1XcdWaU23qcPfIU uzza7fz1UuI5s7+icEJMFCvB/dra3mSsdwTdzkH1ZetTLVOSFNFdTtXfwEg4BxCPDkYz A1AwlTUjza8ejJGLFsuSa+heMSSmTrJRD4VBs+yVj8j94XZShay2Ul3QljZPOXwWBl6k yowyk/tnjWD+LLa5X7EqsFQIHJ7JIg+cYfUKxvwpa15thHjBH6nJBiTt7Ljndh/mJESQ W/hw== X-Gm-Message-State: APjAAAWRBIs2sy06UFTdHMubWU5iP+NwcpQ+6bXevBZ+QX/fCV7TWKP3 dfD/NWRK5PTqKfGVUBPY09hlFg== X-Received: by 2002:a05:651c:c4:: with SMTP id 4mr1316779ljr.171.1574850565883; Wed, 27 Nov 2019 02:29:25 -0800 (PST) Received: from uffe-XPS-13-9360.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id t9sm6868260ljj.19.2019.11.27.02.29.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2019 02:29:25 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v3 05/13] cpuidle: dt: Support hierarchical CPU idle states Date: Wed, 27 Nov 2019 11:29:06 +0100 Message-Id: <20191127102914.18729-6-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191127102914.18729-1-ulf.hansson@linaro.org> References: <20191127102914.18729-1-ulf.hansson@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Lina Iyer Currently CPU's idle states are represented using the flattened model. Let's add support for the hierarchical layout, via converting to use of_get_cpu_state_node(). Suggested-by: Sudeep Holla Signed-off-by: Lina Iyer Reviewed-by: Daniel Lezcano Co-developed-by: Ulf Hansson Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v3: - None. --- drivers/cpuidle/dt_idle_states.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/dt_idle_states.c b/drivers/cpuidle/dt_idle_states.c index d06d21a9525d..252f2a9686a6 100644 --- a/drivers/cpuidle/dt_idle_states.c +++ b/drivers/cpuidle/dt_idle_states.c @@ -111,8 +111,7 @@ static bool idle_state_valid(struct device_node *state_node, unsigned int idx, for (cpu = cpumask_next(cpumask_first(cpumask), cpumask); cpu < nr_cpu_ids; cpu = cpumask_next(cpu, cpumask)) { cpu_node = of_cpu_device_node_get(cpu); - curr_state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - idx); + curr_state_node = of_get_cpu_state_node(cpu_node, idx); if (state_node != curr_state_node) valid = false; @@ -170,7 +169,7 @@ int dt_init_idle_driver(struct cpuidle_driver *drv, cpu_node = of_cpu_device_node_get(cpumask_first(cpumask)); for (i = 0; ; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); + state_node = of_get_cpu_state_node(cpu_node, i); if (!state_node) break; From patchwork Wed Nov 27 10:29:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 180284 Delivered-To: patches@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp5914460ilf; Wed, 27 Nov 2019 02:29:27 -0800 (PST) X-Received: by 2002:a2e:b007:: with SMTP id y7mr30053425ljk.69.1574850567598; Wed, 27 Nov 2019 02:29:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574850567; cv=none; d=google.com; s=arc-20160816; b=Kxrn8tw3yzpsom0urrvUXA+ivHZh4ZXInFA7mCq/Ok+LgQw8M6aiVH3UM/80p1vgCT bTYK9skZGry8RkCsd+dXA28ezu4v+SjUitDbX8GOHozvrrKaHSgxClZh6ZMhpgD055ce Yh9tFJYXAv6OGdoWTo369BQ7oszj3Cf17ImOsVfQrS5ByNXCeGpWO/nWeYAY5U5Y2GX8 QyQjH7bCYkzRWWJ56pQQ8KwDEsfgTZwR/p/rBkfKu2H/lhKtWTCRcOg0qjvXy3s6hiOE 12vzjXDVCtbWNAstGINkQ2HQ5CrYvCADa+hivvSduvpN2xE3DT2WCRP1N9NbVD1e7Jg9 Sn7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0I9CQqrUBNSTNqaPoYCSgGHqC9smjnctVcF6YeNShSQ=; b=mUms9UEetzyRxdOgb9ugaj7C7vRlsCA52nuoLj/pcRgbyDGuoPtYIeuIMoQxHn/9B/ 99kN4WlYiVKLVAtFOBr/pr4wEQQd4MWqzA+mWFcqEgEQmNBQKoXFOtKNoyNp+6tfj7Ix /J8UzMLN0x5s36hnPMasX22SHDfJCYAUocriHkhMMD65UHYMJ6KLNIJfhd6Jco5GO1jq 2drStTwyh2cILO0P2cy9R0AxeGLY3cWBX81Vm6ypmB6wopZvo89RZ472WJdU6ZjKARnn mqemTuTqDa10Kt0KTC9Gjq5tKm9yVrpZ1RyDXlEtPm9AhjwNx5zuegoRAX6pNdIzcO6U AYDw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vZ1vOFaH; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id o68sor3736361lff.59.2019.11.27.02.29.27 for (Google Transport Security); Wed, 27 Nov 2019 02:29:27 -0800 (PST) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vZ1vOFaH; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0I9CQqrUBNSTNqaPoYCSgGHqC9smjnctVcF6YeNShSQ=; b=vZ1vOFaHIZmtCdVywrWmJBZGQYGImGUJFdgpnJpTpl9g9lZQrdtiKa347hWKoVT80M 2ui5XajnnMJ2OqZe4jTjaj6WoYmEaPHvpSpjJVAlkpqIEfv0Y1TLqmeCOQq1i+nWax2E 5ZwTRG1xMvRIj8zQ/E/62lyspn9awdC/GJEmr5HNssUDKOjdv8LcTflXAXXYepmrrwSQ fQ4DEY6vociDIPd9KFLaCtvFZo9F0nNRnCCwSaoFWrz4OdLn2wETIbPvI6Drbgzbezzl vCXF1Jm6ldsz1uIfzHl8kckcS66a8S5yo1Vd03uGTo2LXIXjUj92xStSzceDPHBUe0bI n5Nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0I9CQqrUBNSTNqaPoYCSgGHqC9smjnctVcF6YeNShSQ=; b=tJyn09WMwjb1OwiNGPMMrcqlCvHlFqhRrmrmms7eVhhe0xhES6FAzbDwAZCQjBDOvD 0FuoX9knJcLOP0STIztBumcVdGc8Adq5QNxY1d2Ws/kvl1U4SZEYSgXeoetmLC1IJ91y gIlDTPllzPTJmfd7LnhwhlnC7XRzX3umxVtjGC43Mnj7DSLq1teyMAiQpZOvXoZG46Yg vKEvuxFrAYfhmU5lBeLnSJQC5eLw3aFpMlX6zFfzkcDSXAJGLi9yY7fK9u2JVpSZ3r+N dbVonkzyGP5gVOMU4NAlegiR//bD7Hw0TagcT34xuKmvjiMmqRrjIyicISsDFL14nU7z 4hjQ== X-Gm-Message-State: APjAAAU+Ww+7CjB+BkWQqrkRWb34idEjdHwLP4Lrql1tbYJQrJjhHfJt gHMDeIhyYk0ZoSg0QbXGsj0wd+yG X-Google-Smtp-Source: APXvYqwNFTas3Bs6wwHxVh132p8pvVvuXzBhsyjzWLzItUAMqGGEB3v2xG26muuVMBiwA8d0S7N2BQ== X-Received: by 2002:ac2:5ec3:: with SMTP id d3mr1270912lfq.176.1574850567136; Wed, 27 Nov 2019 02:29:27 -0800 (PST) Return-Path: Received: from uffe-XPS-13-9360.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id t9sm6868260ljj.19.2019.11.27.02.29.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2019 02:29:26 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 06/13] cpuidle: psci: Simplify OF parsing of CPU idle state nodes Date: Wed, 27 Nov 2019 11:29:07 +0100 Message-Id: <20191127102914.18729-7-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191127102914.18729-1-ulf.hansson@linaro.org> References: <20191127102914.18729-1-ulf.hansson@linaro.org> Iterating through the idle state nodes in DT, to find out the number of states that needs to be allocated is unnecessary, as it has already been done from dt_init_idle_driver(). Therefore, drop the iteration and use the number we already have at hand. Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v3: - None. --- drivers/cpuidle/cpuidle-psci.c | 35 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 18 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 361985f52ddd..761359be50f2 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -73,30 +73,24 @@ static int __init psci_dt_parse_state_node(struct device_node *np, u32 *state) return 0; } -static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) +static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, + unsigned int state_count, int cpu) { - int i, ret = 0, count = 0; + int i, ret = 0; u32 *psci_states; struct device_node *state_node; - /* Count idle states */ - while ((state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - count))) { - count++; - of_node_put(state_node); - } - - if (!count) - return -ENODEV; - - count++; /* Add WFI state too */ - psci_states = kcalloc(count, sizeof(*psci_states), GFP_KERNEL); + state_count++; /* Add WFI state too */ + psci_states = kcalloc(state_count, sizeof(*psci_states), GFP_KERNEL); if (!psci_states) return -ENOMEM; - for (i = 1; i < count; i++) { + for (i = 1; i < state_count; i++) { state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i - 1); + if (!state_node) + break; + ret = psci_dt_parse_state_node(state_node, &psci_states[i]); of_node_put(state_node); @@ -106,6 +100,11 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) pr_debug("psci-power-state %#x index %d\n", psci_states[i], i); } + if (i != state_count) { + ret = -ENODEV; + goto free_mem; + } + /* Idle states parsed correctly, initialize per-cpu pointer */ per_cpu(psci_power_state, cpu) = psci_states; return 0; @@ -115,7 +114,7 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) return ret; } -static __init int psci_cpu_init_idle(unsigned int cpu) +static __init int psci_cpu_init_idle(unsigned int cpu, unsigned int state_count) { struct device_node *cpu_node; int ret; @@ -131,7 +130,7 @@ static __init int psci_cpu_init_idle(unsigned int cpu) if (!cpu_node) return -ENODEV; - ret = psci_dt_cpu_init_idle(cpu_node, cpu); + ret = psci_dt_cpu_init_idle(cpu_node, state_count, cpu); of_node_put(cpu_node); @@ -187,7 +186,7 @@ static int __init psci_idle_init_cpu(int cpu) /* * Initialize PSCI idle states. */ - ret = psci_cpu_init_idle(cpu); + ret = psci_cpu_init_idle(cpu, ret); if (ret) { pr_err("CPU %d failed to PSCI idle\n", cpu); goto out_kfree_drv; From patchwork Wed Nov 27 10:29:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 180285 Delivered-To: patches@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp5914486ilf; Wed, 27 Nov 2019 02:29:28 -0800 (PST) X-Received: by 2002:a19:f510:: with SMTP id j16mr14778349lfb.30.1574850568776; Wed, 27 Nov 2019 02:29:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574850568; cv=none; d=google.com; s=arc-20160816; b=n2JYtgKsnYlwqLWy9GE/2r9EkCDNTD/FT28M/BXWun7SyEabf5/Y9Ww7l/mvj90bmb qmso0Xm1CfmhbpUG+ctYB/D5fKseS2Ct1I2VZmkCb/LvqF32z6tVntTiykrRJNUh7YFc bJzjhwtEEJedAxeC2rhF41t0f3JgM3JuYKV5tqJ2ixr+R1n79vr0nEXyoQjpVW6yELG/ 78SNAuvYBq/65iKWtqzDSh/ZujUCL70nE4HGHf0NtoxLopbL5iwzgxYFKSOd0rUvHVLt gNxAg9AN64AlS+vOMKZ+zIWZAhSMFmy1l5bDsGTlbOsmp7ApBGSg6uZgnpfFoSWWJRCA Y/oA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=pCpbFgjGEgfPklFZJxNcT3sX+taTfAQr4roju7E3lrg=; b=Ydt6Glt++6+iqJYma73SRJ6skoZKJGZmb8gPj5PDNNiAjiOkHSVD5ZgBVYvpIpLyZP 0UKkIk9kv9JHY9fo3tTvAG69X1+X1cEZ9VcHn1M0mT914K6p6Njfi2iAyGDf10EodMkO XqtSAXQoQSEiFZFtKONwvOMQ0jrjThes/TdVOsf12SHWVykh4wsdUNBTra+o3eF0gBt3 Is6xo5w76xhYJ5oZnJb/iJa+Ez3QXIn9d6vmwlrY0QBMntqiTbU3ESkMaV5IhdlfcM6C PIBXohR31YiHZlZEntJSo61L0middbwuOwXSD0CJtoyosskhhzs0tH8ajYKdwIzvNpl/ 7i+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=F6S0qqMG; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id k19sor7911374ljj.36.2019.11.27.02.29.28 for (Google Transport Security); Wed, 27 Nov 2019 02:29:28 -0800 (PST) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=F6S0qqMG; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pCpbFgjGEgfPklFZJxNcT3sX+taTfAQr4roju7E3lrg=; b=F6S0qqMGVu24iWB5xlEUSenjorh1CqR7WhxPvplxFREi9q67F98DX7cpAJ0g1E3MEG x2OgkDcfshrPloOeK6km8it8DJciTEPHEKCPWYCEJgDI7fd8OhHudj7Wu4ZThoWMAjk0 +BSufJfudRGkRs8vxAs1hjbf7XsUFeSbpJgvCwtyxAqe7ZboPbj8K6QqqZk4aNFAlxqD EFrKZ7dQwLv6pcbRk/6RXsBH9zT557UEKXxHVX4LXIY7NnK/eZmRJb9qIPgKCwiG8uko Oov56PJE88Y/KVECS1Wbg9wwXvvSPUJYZFt8UZ7ui5CX2WJsFUq0pdp0NFWzt5/TUmOW ZaSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pCpbFgjGEgfPklFZJxNcT3sX+taTfAQr4roju7E3lrg=; b=DX8cZJ4lwR29U5kesOjVr/FS1+UqQuQ2MuViEP+qBm7xMMv56L0r41K6JRjAKJciR9 uyl7riUOyXe69vFVnLLgtsx80LjxyQ4iiLa8i0cM5MtCEaN56RVZBtM0VtUDqcEQrISi weHDcRseXjg57nwY24jt1B8D1WaFWHvG4sJ5NLwcnZwnGkbrGa+1wMK1o5FhSzKecW7L VK5FmtCOOhEGG3R99dWlbMY0h45GknJ6Gy2ivj8r1LP29s76xWIs4UlaoCAaiPcw7zPU 3zMzybk9V/CEhiIzRivPwQxoQnPMD8Tl1K6VBW3U+JErGfgLbGiVC525lxE1ZG0myCZ2 ynSw== X-Gm-Message-State: APjAAAXdxbSfDahw+mdifFgmvKPaXTxw7vx/bQCelZwCoMvx07xdJOgn 7Cz0GDDA2llY+2AEEuqpnQy+8QE1 X-Google-Smtp-Source: APXvYqzTXEyPT0SJHyyvevP9BWE50w3KY6/GovtjKu17I96JMN6sVEEIl4LfjTP/gkozAdXLVnmHfw== X-Received: by 2002:a2e:9083:: with SMTP id l3mr31130772ljg.127.1574850568391; Wed, 27 Nov 2019 02:29:28 -0800 (PST) Return-Path: Received: from uffe-XPS-13-9360.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id t9sm6868260ljj.19.2019.11.27.02.29.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2019 02:29:27 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 07/13] cpuidle: psci: Support hierarchical CPU idle states Date: Wed, 27 Nov 2019 11:29:08 +0100 Message-Id: <20191127102914.18729-8-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191127102914.18729-1-ulf.hansson@linaro.org> References: <20191127102914.18729-1-ulf.hansson@linaro.org> Currently CPU's idle states are represented using the flattened model. Let's add support for the hierarchical layout, via converting to use of_get_cpu_state_node(). Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v3: - None. --- drivers/cpuidle/cpuidle-psci.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 761359be50f2..830995b8a56f 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -86,8 +86,7 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, return -ENOMEM; for (i = 1; i < state_count; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - i - 1); + state_node = of_get_cpu_state_node(cpu_node, i - 1); if (!state_node) break; From patchwork Wed Nov 27 10:29:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 180291 Delivered-To: patches@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp5916179ilf; Wed, 27 Nov 2019 02:30:53 -0800 (PST) X-Received: by 2002:ac2:4357:: with SMTP id o23mr28839513lfl.51.1574850570198; Wed, 27 Nov 2019 02:29:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574850570; cv=none; d=google.com; s=arc-20160816; b=QZinizpxyrE9TzheOHopR6G+rWCAWtNXq2ZHcxhZjb8j+QU3BiYtXQqSh6Bnw6rARk 5FVTqCFqkfuEpgL0hGUhO1wUgZZ4uvbUUuLHO2sd2x+ZuYJXHqDQzT7S4OQ7yGZ3zfiv pKzw19Y0J4YpirxTNQI2uZjaP55xcOxSvotV2PfBT7NDHeVGED6tlCCUN7usVexBpG0d aWNtlfDbO7LAd0wylhNZNPL0XaKoeqSuyBJa1yqEZ0Rblj7jxqS7NXR2ZkOfQq31IIZX 2bFW/+7OKh2KtX5K1JYrABDTUHcNNwHsQwBCR0ks8p00+x2+AA9dt6JnsiSk/6T1Xh4v iGtg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=SHPjR9zZ7uq0Kj/IaV5FCx5nyj5I/bGlCTsLFROfK7Q=; b=nJs4tPK6u52ANAIiL+X8vHaWuRQ/YGxoODpFCm31NK83gMXizwCffXKrvi4HX+yqXj bBa2EfZw7eZMJpgE8QTrpxSm5ww3VLx1p1QUurWT6gANxsDRvOMHtUG23b4rtHL6utmA Qj5lGCK3hoI6tqZHM6K9IJgJibPpbD1q0OF4VXeKT+z5cxBGvQJ5ct1ot+r49/q4s+Zl OKViua7dfSENQQFTHyLQZb3ucZXPgLLA5Vv8KNu9k+9ULFKMozlxi72Kep35gaZgM1st HgyO1yMIg6MM9qXyKh2izHxlYU1+cCUmiKsbXjkKEHZyeeMj+HSRAfsPQS3024kajfkD jkgQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SpKow93T; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id r4sor755750lfn.69.2019.11.27.02.29.30 for (Google Transport Security); Wed, 27 Nov 2019 02:29:30 -0800 (PST) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SpKow93T; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SHPjR9zZ7uq0Kj/IaV5FCx5nyj5I/bGlCTsLFROfK7Q=; b=SpKow93TEIjeXQjtQiOs3Xwd8CuMBf0zXNBrjjIn1bEdIvtZtHvQhEPY5pQzU0bVJW pdcv+s2kEU6Qz7/PWhSyBwIqZmOGha0i5j4ktryefoH2e4vK2DMfoIuw91Kw4YKjUBld s8z83GMKLj6qPxMqs5aRmxjXH2Z6OnWyoDkEd+SayE1WBAU+OgkbS7UyXudARePKUOCp 155TWhdsIrS5XtWfS6TX5oGKGGo66sB2uR7ZpMS3JkALDcoWZk6ZkiyVF0+xqhKzutxD YrkCUjwTJnc5jgoaZZaTQNQirBpZBBftlCFWx54snz3N8yM/ac8lF1KuRuDCQS1v8Bij TMow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SHPjR9zZ7uq0Kj/IaV5FCx5nyj5I/bGlCTsLFROfK7Q=; b=ZhgYHxQr477f8LsFV6wr7x3LqYj5iZKeBJuX80TpdJqYftcbAClw+2eT6wHmJFS4wI 1sINqT66xg7FHz/1mOld3YiyUUvBYB6gcdUo8OrFTbpaUINxzKhBpNQPi2bmt9v2fmnJ v8F5qd0ZRTsiVQBAA3JAOznaKzYPM+Ef+jKN4L0J9cRYxSylm3Lw5Xc2xutvXiDSQz9h AFsdpSD1WuiGgpVE3NeWgwj9r2JZZz6qDYWwtlNXFQbg59wKbL+tnq5cc6fY08/xLeIq XKfVLuBTiIXplJPg4zixyJ/o17XqtMVdk74Qm0KplvYQ3qvZ7gBNhklwYar1e7AsmqUj MC5Q== X-Gm-Message-State: APjAAAXD2f6KMW2atk0mbdQu1t8jI+rOlsZeN1dsyCFlQ94AsgcK6Iq1 dSjlxglN4lb0buCEveLY9GUh16OE X-Google-Smtp-Source: APXvYqxkmkb3820IUsRaukyCsGnVs+nkOdYxPeLsccuW5B67YbC/Kw/2Tts/IPcs+rrCdKFXCsMFOA== X-Received: by 2002:a2e:7202:: with SMTP id n2mr27337481ljc.194.1574850569746; Wed, 27 Nov 2019 02:29:29 -0800 (PST) Return-Path: Received: from uffe-XPS-13-9360.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id t9sm6868260ljj.19.2019.11.27.02.29.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2019 02:29:29 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 08/13] cpuidle: psci: Add a helper to attach a CPU to its PM domain Date: Wed, 27 Nov 2019 11:29:09 +0100 Message-Id: <20191127102914.18729-9-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191127102914.18729-1-ulf.hansson@linaro.org> References: <20191127102914.18729-1-ulf.hansson@linaro.org> Introduce a PSCI DT helper function, psci_dt_attach_cpu(), which takes a CPU number as an in-parameter and tries to attach the CPU's struct device to its corresponding PM domain. Let's makes use of dev_pm_domain_attach_by_name(), as it allows us to specify "psci" as the "name" of the PM domain to attach to. Additionally, let's also prepare the attached device to be power managed via runtime PM. Note that, the implementation of the new helper function is in a new separate c-file, which may seems a bit too much at this point. However, subsequent changes that implements the remaining part of the PM domain support for cpuidle-psci, helps to justify this split. Signed-off-by: Ulf Hansson --- Changes in v3: - None. --- drivers/cpuidle/Makefile | 4 ++- drivers/cpuidle/cpuidle-psci-domain.c | 36 +++++++++++++++++++++++++++ drivers/cpuidle/cpuidle-psci.h | 12 +++++++++ 3 files changed, 51 insertions(+), 1 deletion(-) create mode 100644 drivers/cpuidle/cpuidle-psci-domain.c create mode 100644 drivers/cpuidle/cpuidle-psci.h -- 2.17.1 diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile index ee70d5cc5b99..cc8c769d7fa9 100644 --- a/drivers/cpuidle/Makefile +++ b/drivers/cpuidle/Makefile @@ -21,7 +21,9 @@ obj-$(CONFIG_ARM_U8500_CPUIDLE) += cpuidle-ux500.o obj-$(CONFIG_ARM_AT91_CPUIDLE) += cpuidle-at91.o obj-$(CONFIG_ARM_EXYNOS_CPUIDLE) += cpuidle-exynos.o obj-$(CONFIG_ARM_CPUIDLE) += cpuidle-arm.o -obj-$(CONFIG_ARM_PSCI_CPUIDLE) += cpuidle-psci.o +obj-$(CONFIG_ARM_PSCI_CPUIDLE) += cpuidle_psci.o +cpuidle_psci-y := cpuidle-psci.o +cpuidle_psci-$(CONFIG_PM_GENERIC_DOMAINS_OF) += cpuidle-psci-domain.o ############################################################################### # MIPS drivers diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidle-psci-domain.c new file mode 100644 index 000000000000..bc7df4dc0686 --- /dev/null +++ b/drivers/cpuidle/cpuidle-psci-domain.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PM domains for CPUs via genpd - managed by cpuidle-psci. + * + * Copyright (C) 2019 Linaro Ltd. + * Author: Ulf Hansson + * + */ + +#include +#include +#include +#include +#include +#include + +#include "cpuidle-psci.h" + +struct device *psci_dt_attach_cpu(int cpu) +{ + struct device *dev; + + /* Currently limit the hierarchical topology to be used in OSI mode. */ + if (!psci_has_osi_support()) + return NULL; + + dev = dev_pm_domain_attach_by_name(get_cpu_device(cpu), "psci"); + if (IS_ERR_OR_NULL(dev)) + return dev; + + pm_runtime_irq_safe(dev); + if (cpu_online(cpu)) + pm_runtime_get_sync(dev); + + return dev; +} diff --git a/drivers/cpuidle/cpuidle-psci.h b/drivers/cpuidle/cpuidle-psci.h new file mode 100644 index 000000000000..0cadbb71dc55 --- /dev/null +++ b/drivers/cpuidle/cpuidle-psci.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __CPUIDLE_PSCI_H +#define __CPUIDLE_PSCI_H + +#ifdef CONFIG_PM_GENERIC_DOMAINS_OF +struct device *psci_dt_attach_cpu(int cpu); +#else +static inline struct device *psci_dt_attach_cpu(int cpu) { return NULL; } +#endif + +#endif /* __CPUIDLE_PSCI_H */ From patchwork Wed Nov 27 10:29:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 180290 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp5916178ilf; Wed, 27 Nov 2019 02:30:53 -0800 (PST) X-Google-Smtp-Source: APXvYqzBzjtIptWJqZr72adFZ6mBBOWwJtYcLtlaEyfVCcdzbgbKrtEQVCJbqwmVo63JEiGgrFC1 X-Received: by 2002:a50:ac81:: with SMTP id x1mr30339836edc.200.1574850576064; Wed, 27 Nov 2019 02:29:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574850576; cv=none; d=google.com; s=arc-20160816; b=WwE9X9YuQTM0gFKCasAbr7efBl4WtfClmVEMMomre0vk4wH5FA/f+WlcKCvJImHR91 EX2QZZdLPAxlPybR9XAC5+PSL51Qpwq6qS+7k2DQ5DgOgcEK/akUC49nOfqvwy7Zwfqa CYaLSK9GE/lmFDGx04NrSWGq3/gFTkILiW2UT2UJgRx42D0sdGbCAddBQ+IQW4fwGa5x ocFBwVUusUkvm5wytmdZWAhg8Kt+/QSXhTfSuu/9ZtDAs8Q1cQ3uqtECH/osV5i0gkDg r9gmXF811gsf3E284U57JLvJ8Mw4MetP1oOf/iU82+cwhYHvQbMO8+jKkSRAMmCv9B+v GQaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=H5+j5Ryi1tcJuLiRKgHOPY8E8R9ryoJD8uowAry+jGY=; b=NliDf5j4y47Lb+Rfp8Stt0S84/ZwPWEUrqDyepO+uIC8kx1igE4sN/rlFHeDeXSgZG s7slsXIlj8ryXijp+y8Zm5B0kD0ckggS30gVNi2Om6fl6QOM0wttRPNVeWVnDHe9Os6F AZPDoLBh92a6E+tfH28cGM53jTTZ8D9LDnWwbllkthyajFyWpm0yaOHZi7P8wNwHMCfA XCQVspttu6A0E+qNa4qTiszNbkJEMrO9OAAwCbmar+RiiWfvyA4SvMeXP4DLMxEPSiOQ f+LZvOhd3zPyZ4gpThoRaVlmtudwKGU4Ucq7/bzFmZ3sibf2jv9DKf2eUAEWmSCM+G6q pXKw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=N7r2gMe8; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p24si8751899eja.385.2019.11.27.02.29.35; Wed, 27 Nov 2019 02:29:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=N7r2gMe8; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727126AbfK0K3f (ORCPT + 10 others); Wed, 27 Nov 2019 05:29:35 -0500 Received: from mail-lf1-f66.google.com ([209.85.167.66]:33427 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727116AbfK0K3f (ORCPT ); Wed, 27 Nov 2019 05:29:35 -0500 Received: by mail-lf1-f66.google.com with SMTP id d6so16736726lfc.0 for ; Wed, 27 Nov 2019 02:29:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=H5+j5Ryi1tcJuLiRKgHOPY8E8R9ryoJD8uowAry+jGY=; b=N7r2gMe8G20i4xmM7Fj5dmDMNSlBcg92v0Zsh8Zkfro8HKOvwra+VU7kUM/k15UbmK wsSJOn5K0mvUtqKKaDCKfZW/kfDmH9dkVz985JblmnDAefBdwkBUnxZha3ALcPmALmxQ XFG0eCAjobF34aNMzFbcKlFhIorfiDhJdnIQNU7iOtc93ROi0bXG2r93CuJmbJBPkHwS pSnk/gyjQdBF2MBy3QVva+bnO9+SeUxN0xuIzwXvuSaUa159rXefXFHi1RRSXwyMKmtD /uIlo2tu8tJOqVtmqpzICZIy00kfTjrmT819Ph4Rr9XSkdHn9WHwW8IEM6DdsM8hLkGV NkBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=H5+j5Ryi1tcJuLiRKgHOPY8E8R9ryoJD8uowAry+jGY=; b=QFiX36mytwzg0mOG5imzJ4AEJkViGaW4XVuiIvTDvhWLQsW/iw85orYRI1zJxRNri6 0zdTeYMV3bPf9DMH1IUUvEanucsXewOsFvIycOGqCwt4m3n61TBehMfQedfhe2KslpaM ZGyyzfFiQHfZYLvYceafb8Ods3mDV73cep5gCgn27jXtHgHtJpAI4ztD2i/MTvRaWgsy J7/MigPRZImlRElill50y7Es575dcf7syrSh5HyER8lAlZql5oqkJzTvywvt+y3QsLFX OH96GxoT9fc3q32wWF0jIPtth/NznOOV+eNeckgj3XV1LOoNTper3esNO0YdER4+5X6Z 2Z3w== X-Gm-Message-State: APjAAAV5NvAsJ2cLDRzQFVPPwm7Mt25tWpEfBi4RmyyRJJh5m3y5lVD9 wraE3E0c3n/NqLP2JlUh8/5hkA== X-Received: by 2002:ac2:5464:: with SMTP id e4mr28237342lfn.47.1574850572190; Wed, 27 Nov 2019 02:29:32 -0800 (PST) Received: from uffe-XPS-13-9360.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id t9sm6868260ljj.19.2019.11.27.02.29.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2019 02:29:31 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v3 10/13] cpuidle: psci: Prepare to use OS initiated suspend mode via PM domains Date: Wed, 27 Nov 2019 11:29:11 +0100 Message-Id: <20191127102914.18729-11-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191127102914.18729-1-ulf.hansson@linaro.org> References: <20191127102914.18729-1-ulf.hansson@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The per CPU variable psci_power_state, contains an array of fixed values, which reflects the corresponding arm,psci-suspend-param parsed from DT, for each of the available CPU idle states. This isn't sufficient when using the hierarchical CPU topology in DT, in combination with having PSCI OS initiated (OSI) mode enabled. More precisely, in OSI mode, Linux is responsible of telling the PSCI FW what idle state the cluster (a group of CPUs) should enter, while in PSCI Platform Coordinated (PC) mode, each CPU independently votes for an idle state of the cluster. For this reason, introduce a per CPU variable called domain_state and implement two helper functions to read/write its value. Then let the domain_state take precedence over the regular selected state, when entering and idle state. To avoid executing the above OSI specific code in the ->enter() callback, while operating in the default PSCI Platform Coordinated mode, let's also add a new enter-function and use it for OSI. Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v3: - Avoid executing any OSI specific code in psci_enter_idle_state(), while operating in the default PSCI Platform Coordinated mode. --- drivers/cpuidle/cpuidle-psci.c | 52 ++++++++++++++++++++++++++++++---- 1 file changed, 46 insertions(+), 6 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 167249d0493f..fd664e134c3f 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -29,14 +29,47 @@ struct psci_cpuidle_data { }; static DEFINE_PER_CPU_READ_MOSTLY(struct psci_cpuidle_data, psci_cpuidle_data); +static DEFINE_PER_CPU(u32, domain_state); + +static inline void psci_set_domain_state(u32 state) +{ + __this_cpu_write(domain_state, state); +} + +static inline u32 psci_get_domain_state(void) +{ + return __this_cpu_read(domain_state); +} + +static inline int psci_enter_state(int idx, u32 state) +{ + return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, idx, state); +} + +static int psci_enter_domain_idle_state(struct cpuidle_device *dev, + struct cpuidle_driver *drv, int idx) +{ + struct psci_cpuidle_data *data = this_cpu_ptr(&psci_cpuidle_data); + u32 *states = data->psci_states; + u32 state = psci_get_domain_state(); + int ret; + + if (!state) + state = states[idx]; + + ret = psci_enter_state(idx, state); + + /* Clear the domain state to start fresh when back from idle. */ + psci_set_domain_state(0); + return ret; +} static int psci_enter_idle_state(struct cpuidle_device *dev, struct cpuidle_driver *drv, int idx) { u32 *state = __this_cpu_read(psci_cpuidle_data.psci_states); - return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, - idx, state[idx]); + return psci_enter_state(idx, state[idx]); } static struct cpuidle_driver psci_idle_driver __initdata = { @@ -79,7 +112,8 @@ static int __init psci_dt_parse_state_node(struct device_node *np, u32 *state) return 0; } -static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, +static int __init psci_dt_cpu_init_idle(struct cpuidle_driver *drv, + struct device_node *cpu_node, unsigned int state_count, int cpu) { int i, ret = 0; @@ -118,6 +152,11 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, goto free_mem; } + /* Manage the deepest state via a dedicated enter-function. */ + if (dev) + drv->states[state_count - 1].enter = + psci_enter_domain_idle_state; + data->dev = dev; /* Idle states parsed correctly, store them in the per-cpu struct. */ @@ -129,7 +168,8 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, return ret; } -static __init int psci_cpu_init_idle(unsigned int cpu, unsigned int state_count) +static __init int psci_cpu_init_idle(struct cpuidle_driver *drv, + unsigned int cpu, unsigned int state_count) { struct device_node *cpu_node; int ret; @@ -145,7 +185,7 @@ static __init int psci_cpu_init_idle(unsigned int cpu, unsigned int state_count) if (!cpu_node) return -ENODEV; - ret = psci_dt_cpu_init_idle(cpu_node, state_count, cpu); + ret = psci_dt_cpu_init_idle(drv, cpu_node, state_count, cpu); of_node_put(cpu_node); @@ -201,7 +241,7 @@ static int __init psci_idle_init_cpu(int cpu) /* * Initialize PSCI idle states. */ - ret = psci_cpu_init_idle(cpu, ret); + ret = psci_cpu_init_idle(drv, cpu, ret); if (ret) { pr_err("CPU %d failed to PSCI idle\n", cpu); goto out_kfree_drv; From patchwork Wed Nov 27 10:29:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 180292 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp5916345ilf; Wed, 27 Nov 2019 02:31:02 -0800 (PST) X-Google-Smtp-Source: APXvYqyh087uv3pUWBozvmJwUnyDM/G2PDKIzPMwHYMmIqIUd2891kqaSnOVojR4GjGuKl36joBf X-Received: by 2002:a50:ee96:: with SMTP id f22mr30584026edr.86.1574850577279; Wed, 27 Nov 2019 02:29:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574850577; cv=none; d=google.com; s=arc-20160816; b=B3ugQ8V01UiPqxK/F8zmh+IA7XYzwVJLI/LIN+mCHKCfHRmSyTbkxmQ1rsx38OGM+Z XW/rLzr1rr8XDB9taGHXjHRDGn5dDoZF6iEc+p/Ti7vhbBe0h3dZT46ZPNiV4gOF6sR6 QbTXkl4ix5QOzF1Pqiq2HVQKRn70rNCPJ7e5e94n6u/Rj0u7WYngWyCu45XJr0V6MW7m xBpaO3c92BlP0zLWbr1zDxkSWTYpX0sVxXB/6AWOG1bVNhBqLiqxKC6B4Lhv8/0fJ7lM j1bmYPS03Po5d/c7Fqj3oy1EHDM24QPWkOyOZi/ngjx9DoXQUMotC9QfZ8s0O0hs9nYg AN9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=9WNvBkAbCPmItbuJwau3VVcwaQ3svcRnmaumQExcBPY=; b=xlsxfgAUOFvkZeqbbBtWXOIbaZDlD3whSAArnLR8KfrjFiMgeBKpJTvy9mswPszeae 1md1OmN+yBT93I/bonM2rAYjUTuP9ksepeVl3EClE4l1SPKbZKx49Gi/iqPTCPOTrQMZ Ax/9F1Jg0cFV+cyi02pPKKP7IjI/WVVThT5jOVp3kNzBT/gRyDZkt++XNQPa9oLp4dlh KNP6oNQUtbe9BPoQluQwGCZavaDm375hq3MoHBMLA9XK1AWR27WgUVv2ToEJU/kKNtFS Tstv4oCzYllntjjfeaPfLLzX62G4nabNkHLYMVe9xGm3+jV3Ew1a2BwURVTKw/5PppT+ rGTA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LVyx7O2W; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p24si8751899eja.385.2019.11.27.02.29.37; Wed, 27 Nov 2019 02:29:37 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LVyx7O2W; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727120AbfK0K3g (ORCPT + 10 others); Wed, 27 Nov 2019 05:29:36 -0500 Received: from mail-lf1-f68.google.com ([209.85.167.68]:36506 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727142AbfK0K3g (ORCPT ); Wed, 27 Nov 2019 05:29:36 -0500 Received: by mail-lf1-f68.google.com with SMTP id f16so16727474lfm.3 for ; Wed, 27 Nov 2019 02:29:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9WNvBkAbCPmItbuJwau3VVcwaQ3svcRnmaumQExcBPY=; b=LVyx7O2W4qGw1a4q/S1Yriak16eQr191zdaPkA2t1RAdn2hi6FFOjti6ZrYVNL10DX RJ+WW95uhdNfmuZRig1tBSv/JMjWpg2BvY9fHYN5vuR/Ns4VGoBlNzrmJacvs5mWJtWX gaSvfQ7eTU8Q1nxVVjkpaWtZIcfi/GE6HURMotCbiwX00oXBD158f9x+TVIgJ/3ZH7/h xZxZiv+9oQiDI8L2bE5YSYH0cmDP9/6phxaCR2dA3EjHx3DBO93b+vMkfbgzGN/mhSgG 1oXq4QU9PiRHlmui545BrHmoZKkPIC/CMAAQ5rX9b+o1nys9wnH9b+OaoOBTod0wJMSx SXwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9WNvBkAbCPmItbuJwau3VVcwaQ3svcRnmaumQExcBPY=; b=imC0takUQsGLP9kThFsTXEWLLarFhGvhSsj0+GxF04VIA6g43td+11P/yi35cscp61 onNhK4kLt8DuBLVd3lTSpNwBkXTHdKW99H3G1RbzvJWQJcU6fGyywANiGK5wbmnFrF03 2o6vFiyzo6W2aTwji2Ke4tfOqP0Ra0jjdcHnA6QrCn60wCht2IX74JzHoAM/G4yljmY5 PmeOb8CGUk1jIchabZwBGWZUSAz3wK6HHuNac1lgP07GCblsWAtl/TpMwnoM7xEVvP5b LW1z42xYEDK6TsPKJGhnnfyRJN34tr/GyhZ+D7ualPtISRW7GLqyiQD/nnDefz57f6HG Ldjw== X-Gm-Message-State: APjAAAVVbDInToIUPEGZZXj0WivL3ITbyJRoFbm1Ym4fXj1CqUyYAY2P BPy+/pOVCcg+TGytIcO88XHO8Q== X-Received: by 2002:a19:9149:: with SMTP id y9mr29230817lfj.15.1574850573630; Wed, 27 Nov 2019 02:29:33 -0800 (PST) Received: from uffe-XPS-13-9360.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id t9sm6868260ljj.19.2019.11.27.02.29.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2019 02:29:32 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 11/13] cpuidle: psci: Manage runtime PM in the idle path Date: Wed, 27 Nov 2019 11:29:12 +0100 Message-Id: <20191127102914.18729-12-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191127102914.18729-1-ulf.hansson@linaro.org> References: <20191127102914.18729-1-ulf.hansson@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org In case we have succeeded to attach a CPU to its PM domain, let's deploy runtime PM support for the corresponding attached device, to allow the CPU to be powered-managed accordingly. The triggering point for when runtime PM reference counting should be done, has been selected to the deepest idle state for the CPU. However, from the hierarchical point view, there may be good reasons to do runtime PM reference counting even on shallower idle states, but at this point this isn't supported, mainly due to limitations set by the generic PM domain. Signed-off-by: Ulf Hansson --- Changes in v3: - Rebased. --- drivers/cpuidle/cpuidle-psci.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index fd664e134c3f..0707222a40bd 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -51,14 +52,21 @@ static int psci_enter_domain_idle_state(struct cpuidle_device *dev, { struct psci_cpuidle_data *data = this_cpu_ptr(&psci_cpuidle_data); u32 *states = data->psci_states; - u32 state = psci_get_domain_state(); + struct device *pd_dev = data->dev; + u32 state; int ret; + /* Do runtime PM to manage a hierarchical CPU toplogy. */ + pm_runtime_put_sync_suspend(pd_dev); + + state = psci_get_domain_state(); if (!state) state = states[idx]; ret = psci_enter_state(idx, state); + pm_runtime_get_sync(pd_dev); + /* Clear the domain state to start fresh when back from idle. */ psci_set_domain_state(0); return ret; From patchwork Wed Nov 27 10:29:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 180288 Delivered-To: patches@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp5914665ilf; Wed, 27 Nov 2019 02:29:36 -0800 (PST) X-Received: by 2002:a2e:93d5:: with SMTP id p21mr18387125ljh.50.1574850576791; Wed, 27 Nov 2019 02:29:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574850576; cv=none; d=google.com; s=arc-20160816; b=0PfgX+bzAdsUNLtDr45d5ugnmt6w5LXimiPFnE6/LUKaAVcP2QiXgxDYmnH1ynNigG iLCF7xlg59ArI6qaDnBPPgMu3KtSQ3eh1bKH1/Fv/+BiY3GAfgewOjJY+mPyuEbPBxTz eDq/8UGWl4HrOkR4v0Faja1xHaatGuHjQ1/1GFeFmJ3bXoqmvksTVCKZ1PW1Qy6ICRUo 4bMqmTLw6PPBTf1TorsZ0hsl+juMdwvlkO0tsoZfUXublUc7TbknJSumUdqsVCOLy0tg /GIvEFpYffl4K2qbWnCyKc3WHEzi71cWJwkWVe/qS+C4LKjrBL47uQJwz8gpji5Ie3GS lXdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ojwf4ly83xUW6dp5+GMXCBlvMV1YbXRntOyZUrl5OUs=; b=LYUsdfMMqUwE2pGgQO0JqKHwTClLQDWB8OEIWWcnRXh+JRsxC8U4xU2QR9xIFVDS30 HWpeva75S4RyI6G+0poekCH1fM7/3oKnW3742ccy94/L1+TKxLfVFhweDsu+i6LtJU0+ Rkqe1MnPLE5s3hTe1yUYDFxZyES8SLaE3STLX51QI5PvDgwaQIMg9BGAQro9xaTOOsxD S0EjP5kK5E0LJ5b/A+dc8Uk3AnboPvOKiNShGIxzFIuc+wHWtMPFjIiXY3+3DkD0KSIL ljLjAv1nMa7wcU3HY6cQZNWnGV1FRRQsnXlyz6D8jrOQDa5y4Mfu7VPMKXhkz/TCgLcJ Wfyg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QgfDNcaW; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id k19sor7911567ljj.36.2019.11.27.02.29.36 for (Google Transport Security); Wed, 27 Nov 2019 02:29:36 -0800 (PST) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QgfDNcaW; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ojwf4ly83xUW6dp5+GMXCBlvMV1YbXRntOyZUrl5OUs=; b=QgfDNcaWwKS5maCkGGbNpmSdSl/WAalIAc/5R/ZXnVBMsZZgArohJaxvBkhuNgmFdu x4fnF8qGa42tHrcucj7lYauL0So26pAO7RnIEAS5zm1scv1phGjPJxhWtnqJJUoEa/na EcdYO5kuPFju1CBlKVUcMbmG8ZE/MRGT9Yyl1sR2dfZppVVMKB97/2nVtptw2CTaKFjx dWxXLkziNsEwDI5R04CJIriYCSkzzNOpt68rzcQVnXaT1raB41QjBryDPzyy/gb5Hcuh VPE+LUs6LRkF5AtPpE9TV4qKFiMZZEiE3rHIRTAXw4f0H5asiFq8SetwbUP6Qs4ofVOx DYjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ojwf4ly83xUW6dp5+GMXCBlvMV1YbXRntOyZUrl5OUs=; b=oAIa59Qm4iVla+UpEFtC4Tke0UrUeExpfWLv8TKaXyTKt87fh/W1b4vlUguaSW0lzb tLnUhiP+MNcVewfj4tzV30MLO0gMNMzAkQFG8Ix60Mieis7EqmlF+F1TZlgyLpg6BWDn Xn6sittKFzLd/ELyP29gHwDVjWW65ktlaqkhe9GgnIeRezQO1OgpAt8PksCgkorsbLE0 ncAhmeT0o4oPJboDAWNAbX/EEGtIgWo9rz+Ke11CsDPPJ+6tbql4Bq4tPr1ZSszU4zG2 +9NT4JNUajKNbYqCiU3CfXC83rApHKvudblh8FUmox69B1a7C3z8O/2CJ7ir6fbVApmU unFw== X-Gm-Message-State: APjAAAXwXiGANvqL1dqpfoVgSyGEPYeYVAwYsPrzWicRa4q2YibFqBRp 6tXE7io/QATpDCZin0pS6FtH/OnGsX35iw== X-Google-Smtp-Source: APXvYqxSrADzY+DNQH6KW7/kvRcSzE/0+zwazwzkYrgGsO2J2TR75kSdIzocGBWy1mQNQ1Gtuf/ChQ== X-Received: by 2002:a2e:8695:: with SMTP id l21mr29828905lji.53.1574850576223; Wed, 27 Nov 2019 02:29:36 -0800 (PST) Return-Path: Received: from uffe-XPS-13-9360.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id t9sm6868260ljj.19.2019.11.27.02.29.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2019 02:29:35 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v3 12/13] cpuidle: psci: Add support for PM domains by using genpd Date: Wed, 27 Nov 2019 11:29:13 +0100 Message-Id: <20191127102914.18729-13-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191127102914.18729-1-ulf.hansson@linaro.org> References: <20191127102914.18729-1-ulf.hansson@linaro.org> When the hierarchical CPU topology layout is used in DT and the PSCI OSI mode is supported by the PSCI FW, let's initialize a corresponding PM domain topology by using genpd. This enables a CPU and a group of CPUs, when attached to the topology, to be power-managed accordingly. To trigger the attempt to initialize the genpd data structures let's use a subsys_initcall, which should be early enough to allow CPUs, but also other devices to be attached. The initialization consists of parsing the PSCI OF node for the topology and the "domain idle states" DT bindings. In case the idle states are compatible with "domain-idle-state", the initialized genpd becomes responsible of selecting an idle state for the PM domain, via assigning it a genpd governor. Note that, a successful initialization of the genpd data structures, is followed by a call to psci_set_osi_mode(), as to try to enable the OSI mode in the PSCI FW. In case this fails, we fall back into a degraded mode rather than bailing out and returning an error code. Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v3: - None. --- drivers/cpuidle/cpuidle-psci-domain.c | 266 ++++++++++++++++++++++++++ drivers/cpuidle/cpuidle-psci.c | 4 +- drivers/cpuidle/cpuidle-psci.h | 5 + 3 files changed, 273 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidle-psci-domain.c index bc7df4dc0686..7429fd7626a1 100644 --- a/drivers/cpuidle/cpuidle-psci-domain.c +++ b/drivers/cpuidle/cpuidle-psci-domain.c @@ -7,15 +7,281 @@ * */ +#define pr_fmt(fmt) "CPUidle PSCI: " fmt + #include #include #include #include #include #include +#include +#include #include "cpuidle-psci.h" +struct psci_pd_provider { + struct list_head link; + struct device_node *node; +}; + +static LIST_HEAD(psci_pd_providers); +static bool osi_mode_enabled; + +static int psci_pd_power_off(struct generic_pm_domain *pd) +{ + struct genpd_power_state *state = &pd->states[pd->state_idx]; + u32 *pd_state; + + /* If we have failed to enable OSI mode, then abort power off. */ + if (!osi_mode_enabled) + return -EBUSY; + + if (!state->data) + return 0; + + /* OSI mode is enabled, set the corresponding domain state. */ + pd_state = state->data; + psci_set_domain_state(*pd_state); + + return 0; +} + +static int __init psci_pd_parse_state_nodes(struct genpd_power_state *states, + int state_count) +{ + int i, ret; + u32 psci_state, *psci_state_buf; + + for (i = 0; i < state_count; i++) { + ret = psci_dt_parse_state_node(to_of_node(states[i].fwnode), + &psci_state); + if (ret) + goto free_state; + + psci_state_buf = kmalloc(sizeof(u32), GFP_KERNEL); + if (!psci_state_buf) { + ret = -ENOMEM; + goto free_state; + } + *psci_state_buf = psci_state; + states[i].data = psci_state_buf; + } + + return 0; + +free_state: + i--; + for (; i >= 0; i--) + kfree(states[i].data); + return ret; +} + +static int __init psci_pd_parse_states(struct device_node *np, + struct genpd_power_state **states, int *state_count) +{ + int ret; + + /* Parse the domain idle states. */ + ret = of_genpd_parse_idle_states(np, states, state_count); + if (ret) + return ret; + + /* Fill out the PSCI specifics for each found state. */ + ret = psci_pd_parse_state_nodes(*states, *state_count); + if (ret) + kfree(*states); + + return ret; +} + +static void psci_pd_free_states(struct genpd_power_state *states, + unsigned int state_count) +{ + int i; + + for (i = 0; i < state_count; i++) + kfree(states[i].data); + kfree(states); +} + +static int __init psci_pd_init(struct device_node *np) +{ + struct generic_pm_domain *pd; + struct psci_pd_provider *pd_provider; + struct dev_power_governor *pd_gov; + struct genpd_power_state *states = NULL; + int ret = -ENOMEM, state_count = 0; + + pd = kzalloc(sizeof(*pd), GFP_KERNEL); + if (!pd) + goto out; + + pd_provider = kzalloc(sizeof(*pd_provider), GFP_KERNEL); + if (!pd_provider) + goto free_pd; + + pd->name = kasprintf(GFP_KERNEL, "%pOF", np); + if (!pd->name) + goto free_pd_prov; + + /* + * Parse the domain idle states and let genpd manage the state selection + * for those being compatible with "domain-idle-state". + */ + ret = psci_pd_parse_states(np, &states, &state_count); + if (ret) + goto free_name; + + pd->free_states = psci_pd_free_states; + pd->name = kbasename(pd->name); + pd->power_off = psci_pd_power_off; + pd->states = states; + pd->state_count = state_count; + pd->flags |= GENPD_FLAG_IRQ_SAFE | GENPD_FLAG_CPU_DOMAIN; + + /* Use governor for CPU PM domains if it has some states to manage. */ + pd_gov = state_count > 0 ? &pm_domain_cpu_gov : NULL; + + ret = pm_genpd_init(pd, pd_gov, false); + if (ret) { + psci_pd_free_states(states, state_count); + goto free_name; + } + + ret = of_genpd_add_provider_simple(np, pd); + if (ret) + goto remove_pd; + + pd_provider->node = of_node_get(np); + list_add(&pd_provider->link, &psci_pd_providers); + + pr_debug("init PM domain %s\n", pd->name); + return 0; + +remove_pd: + pm_genpd_remove(pd); +free_name: + kfree(pd->name); +free_pd_prov: + kfree(pd_provider); +free_pd: + kfree(pd); +out: + pr_err("failed to init PM domain ret=%d %pOF\n", ret, np); + return ret; +} + +static void __init psci_pd_remove(void) +{ + struct psci_pd_provider *pd_provider, *it; + struct generic_pm_domain *genpd; + + list_for_each_entry_safe(pd_provider, it, &psci_pd_providers, link) { + of_genpd_del_provider(pd_provider->node); + + genpd = of_genpd_remove_last(pd_provider->node); + if (!IS_ERR(genpd)) + kfree(genpd); + + of_node_put(pd_provider->node); + list_del(&pd_provider->link); + kfree(pd_provider); + } +} + +static int __init psci_pd_init_topology(struct device_node *np) +{ + struct device_node *node; + struct of_phandle_args child, parent; + int ret; + + for_each_child_of_node(np, node) { + if (of_parse_phandle_with_args(node, "power-domains", + "#power-domain-cells", 0, &parent)) + continue; + + child.np = node; + child.args_count = 0; + + ret = of_genpd_add_subdomain(&parent, &child); + of_node_put(parent.np); + if (ret) { + of_node_put(node); + return ret; + } + } + + return 0; +} + +static const struct of_device_id psci_of_match[] __initconst = { + { .compatible = "arm,psci" }, + { .compatible = "arm,psci-0.2" }, + { .compatible = "arm,psci-1.0" }, + {} +}; + +static int __init psci_idle_init_domains(void) +{ + struct device_node *np = of_find_matching_node(NULL, psci_of_match); + struct device_node *node; + int ret = 0, pd_count = 0; + + if (!np) + return -ENODEV; + + /* Currently limit the hierarchical topology to be used in OSI mode. */ + if (!psci_has_osi_support()) + goto out; + + /* + * Parse child nodes for the "#power-domain-cells" property and + * initialize a genpd/genpd-of-provider pair when it's found. + */ + for_each_child_of_node(np, node) { + if (!of_find_property(node, "#power-domain-cells", NULL)) + continue; + + ret = psci_pd_init(node); + if (ret) + goto put_node; + + pd_count++; + } + + /* Bail out if not using the hierarchical CPU topology. */ + if (!pd_count) + goto out; + + /* Link genpd masters/subdomains to model the CPU topology. */ + ret = psci_pd_init_topology(np); + if (ret) + goto remove_pd; + + /* Try to enable OSI mode. */ + ret = psci_set_osi_mode(); + if (ret) + pr_warn("failed to enable OSI mode: %d\n", ret); + else + osi_mode_enabled = true; + + of_node_put(np); + pr_info("Initialized CPU PM domain topology\n"); + return pd_count; + +put_node: + of_node_put(node); +remove_pd: + if (pd_count) + psci_pd_remove(); + pr_err("failed to create CPU PM domains ret=%d\n", ret); +out: + of_node_put(np); + return ret; +} +subsys_initcall(psci_idle_init_domains); + struct device *psci_dt_attach_cpu(int cpu) { struct device *dev; diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 0707222a40bd..835c7c3aa118 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -32,7 +32,7 @@ struct psci_cpuidle_data { static DEFINE_PER_CPU_READ_MOSTLY(struct psci_cpuidle_data, psci_cpuidle_data); static DEFINE_PER_CPU(u32, domain_state); -static inline void psci_set_domain_state(u32 state) +void psci_set_domain_state(u32 state) { __this_cpu_write(domain_state, state); } @@ -103,7 +103,7 @@ static const struct of_device_id psci_idle_state_match[] __initconst = { { }, }; -static int __init psci_dt_parse_state_node(struct device_node *np, u32 *state) +int __init psci_dt_parse_state_node(struct device_node *np, u32 *state) { int err = of_property_read_u32(np, "arm,psci-suspend-param", state); diff --git a/drivers/cpuidle/cpuidle-psci.h b/drivers/cpuidle/cpuidle-psci.h index 0cadbb71dc55..d2e55cad9ac6 100644 --- a/drivers/cpuidle/cpuidle-psci.h +++ b/drivers/cpuidle/cpuidle-psci.h @@ -3,6 +3,11 @@ #ifndef __CPUIDLE_PSCI_H #define __CPUIDLE_PSCI_H +struct device_node; + +void psci_set_domain_state(u32 state); +int __init psci_dt_parse_state_node(struct device_node *np, u32 *state); + #ifdef CONFIG_PM_GENERIC_DOMAINS_OF struct device *psci_dt_attach_cpu(int cpu); #else From patchwork Wed Nov 27 10:29:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 180289 Delivered-To: patches@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp5914691ilf; Wed, 27 Nov 2019 02:29:38 -0800 (PST) X-Received: by 2002:ac2:47e6:: with SMTP id b6mr13531042lfp.96.1574850578155; Wed, 27 Nov 2019 02:29:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574850578; cv=none; d=google.com; s=arc-20160816; b=OotCL1FpYJlEgT07iF4TV8Xumt56OdmHtqoP9S+hc1zUC+vLklo3scKFpOQT3XC+Xp MbcvW33Yxubj6+l/+A6AwVZzOtdNa3Xe0td6Mfd4ww+MUX06PJQmUVxBUwDVeEBfJWgz f9W0yz0mvnNuVIg4x440qwkHOkIV2Tj+alI/4jLWa7dZKbHhlqYxEfCoIux1LkzGkowT wDiZYWpUUFKGBePuX8Uc2gIfY6XuhqoIYT0kxfqwz5f5T92/dTVb9tIgGYo1JC3Y4Yst xZfGXyY4LFWyxmItDS2M4Bnqq8XmSBg0yPUMmouc9Wh2kuSoxfpLRlVVEvyX1ik8f/oH Ujxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=YE8YvkurDwcmK3uqareXLGBcqQwJuyVozrMdvAFxIY4=; b=SORwtVHxu36zn6ZW3rBG1kktySWEFn46K3NqK4vRpJNUtw+M4X01Wkikzrrnb8Uh3v 2apxsdI9Yo7M/7gBz+WeaNw4C2PdUAh3NHk0IaH5CZXoRnU4huiicxs+bMRNd0QuzWUi JLKRkB4yYxWRq22GafUk55cOIDBMBwyNDVYz7payOCQrCB4x8xpKqMR6Ijy6ia1YRVd7 A6NbDHvuNvxiOw/kGxIKMcQ0nJoPZTcUYDA70Sa2Mf8YBe+tSWAYzrhHCbpgpx1yKD7i 1ll72IebtkOeWFTZLmp5ss187L8jEm40NNrWVaqw3GqdxKZipnx2XYN7lNroXovXeO8t k4kQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=V0sHWW+6; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id f9sor3689466lfk.60.2019.11.27.02.29.37 for (Google Transport Security); Wed, 27 Nov 2019 02:29:38 -0800 (PST) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=V0sHWW+6; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YE8YvkurDwcmK3uqareXLGBcqQwJuyVozrMdvAFxIY4=; b=V0sHWW+6lT6XzspaGhjr68xPBxpq7cPOhMWh1T+Yuzw50GwEW9jikpXcj4Xys51BZG +uEZgF33ABgUWs+x7CUqOSTxvnuanzhxSRePKrmiiqBpnMsbA9sZbF7VmOpPS/SNkGPm BIparBEt6Symbx9RStqtt6zw4wByrXDGWpP1pkjmBBNf+j2SYGbQn7tZOFc8OmK4X6LG HBj6c6FBilNnoTc9kiephZw+sT4KpxSMylomgmXHxbP21AhsU00DviVyClbq2NucHpB2 lPNQAS61sJFOUXirZNTvRAMgUOUuuPQroVBFt2umHunxgvkAe+QY+F9rKUVTNv7HP6o8 Hegg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YE8YvkurDwcmK3uqareXLGBcqQwJuyVozrMdvAFxIY4=; b=Q5g8c/6zClbBxk2r7sy7boUkkvyAz1xlG5ehfzUi2JSArZ0bWF/lfpnA8y0sqjRKll owgA/Y5DF/BiiEO10SaJ0CBQ0q9qxyLlbTfY0uje6Bjiv1DwynuSLfjvstMIPbAP4pa7 cJPlGoeXqSKocTPm7v9EC/ShyywhzkCURg4r6EN5i3wYJaKEDYuipVa2Gyj/3BFQM0Ot Qw06nld1YNqvkrFG2MLKpMgtuwPWKtQ7BPs3zvSueX6vNtNB+WmhFkdCBG7pqIeH0FYx luX0uyAz/x5AMXhl1OBSGmihX3hBsK7lqq83Q0A+M0WDVOCtjDZly0T1TuKDPquSbwwC Bt5w== X-Gm-Message-State: APjAAAUH+Qsnu03RaS1iAcErktT4sV9kId/0FyypXX9zIABsxsukj5I5 j0ps+ymbKEa4iOMocwmZRm/GGjMluCIdxA== X-Google-Smtp-Source: APXvYqzfK7p4G4XeXLmvxRBXQfax0x8CjKcQ8ndzaEP1RnAz44tx+i8EzhOqNotZjQZFL/St0ciykg== X-Received: by 2002:a19:8c4e:: with SMTP id i14mr14761604lfj.90.1574850577700; Wed, 27 Nov 2019 02:29:37 -0800 (PST) Return-Path: Received: from uffe-XPS-13-9360.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id t9sm6868260ljj.19.2019.11.27.02.29.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Nov 2019 02:29:37 -0800 (PST) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Rob Herring , linux-pm@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Mark Rutland , Lina Iyer , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v3 13/13] arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916 Date: Wed, 27 Nov 2019 11:29:14 +0100 Message-Id: <20191127102914.18729-14-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191127102914.18729-1-ulf.hansson@linaro.org> References: <20191127102914.18729-1-ulf.hansson@linaro.org> To enable the OS to better support PSCI OS initiated CPU suspend mode, let's convert from the flattened layout to the hierarchical layout. In the hierarchical layout, let's create a power domain provider per CPU and describe the idle states for each CPU inside the power domain provider node. To group the CPUs into a cluster, let's add another power domain provider and make it act as the master domain. Note that, the CPU's idle states remains compatible with "arm,idle-state", while the cluster's idle state becomes compatible with "domain-idle-state". Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v3: - None. --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 57 +++++++++++++++++++++++++-- 1 file changed, 53 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 5ea9fb8f2f87..1ece0c763592 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -102,10 +102,11 @@ reg = <0x0>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; }; CPU1: cpu@1 { @@ -114,10 +115,11 @@ reg = <0x1>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; }; CPU2: cpu@2 { @@ -126,10 +128,11 @@ reg = <0x2>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; }; CPU3: cpu@3 { @@ -138,10 +141,11 @@ reg = <0x3>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; }; L2_0: l2-cache { @@ -161,12 +165,57 @@ min-residency-us = <2000>; local-timer-stop; }; + + CLUSTER_RET: cluster-retention { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x41000012>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-gdhs { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x41000032>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + }; }; pmu {