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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM MAILING LIST), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCHv2 1/5] ARM: dts: qcom: ipq4019: use nvmem-layout Date: Thu, 3 Oct 2024 17:00:11 -0700 Message-ID: <20241004000015.544297-2-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241004000015.544297-1-rosenp@gmail.com> References: <20241004000015.544297-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev --- .../boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi index 0d23c03fae33..a6d4390efa7c 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dtsi @@ -166,16 +166,19 @@ partition@170000 { label = "ART"; reg = <0x00170000 0x00010000>; read-only; - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - precal_art_1000: precal@1000 { - reg = <0x1000 0x2f20>; - }; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; - precal_art_5000: precal@5000 { - reg = <0x5000 0x2f20>; + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; From patchwork Fri Oct 4 00:00:12 2024 Content-Type: text/plain; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM MAILING LIST), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCHv2 2/5] arm64: dts: bcm4908: nvmem-layout conversion Date: Thu, 3 Oct 2024 17:00:12 -0700 Message-ID: <20241004000015.544297-3-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241004000015.544297-1-rosenp@gmail.com> References: <20241004000015.544297-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev --- .../dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts index 999d93730240..df47fc75fa3a 100644 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts @@ -144,16 +144,18 @@ partitions { #size-cells = <1>; partition@0 { - compatible = "nvmem-cells"; label = "cferom"; reg = <0x0 0x100000>; - - #address-cells = <1>; - #size-cells = <1>; ranges = <0 0x0 0x100000>; - base_mac_addr: mac@106a0 { - reg = <0x106a0 0x6>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + base_mac_addr: mac@106a0 { + reg = <0x106a0 0x6>; + }; }; }; From patchwork Fri Oct 4 00:00:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rosen Penev X-Patchwork-Id: 832471 Received: from mail-pf1-f170.google.com (mail-pf1-f170.google.com [209.85.210.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A7931D07BA; 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Thu, 03 Oct 2024 17:00:27 -0700 (PDT) Received: from ryzen.lan ([2601:644:8200:dab8::a86]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71dd9cb0b28sm1983047b3a.0.2024.10.03.17.00.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Oct 2024 17:00:27 -0700 (PDT) From: Rosen Penev To: devicetree@vger.kernel.org Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM MAILING LIST), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCHv2 3/5] arm64: dts: armada-3720-gl-mv1000: use nvmem-layout Date: Thu, 3 Oct 2024 17:00:13 -0700 Message-ID: <20241004000015.544297-4-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241004000015.544297-1-rosenp@gmail.com> References: <20241004000015.544297-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev --- .../dts/marvell/armada-3720-gl-mv1000.dts | 30 +++++++++---------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts index 56930f2ce481..7b801b60862d 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts @@ -98,10 +98,24 @@ partition@f0000 { reg = <0xf0000 0x8000>; }; - factory: partition@f8000 { + partition@f8000 { label = "factory"; reg = <0xf8000 0x8000>; read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_factory_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_factory_6: macaddr@6 { + reg = <0x6 0x6>; + }; + }; }; partition@100000 { @@ -221,17 +235,3 @@ fixed-link { full-duplex; }; }; - -&factory { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_factory_0: macaddr@0 { - reg = <0x0 0x6>; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM MAILING LIST), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCHv2 4/5] arm64: dts: mediatek: 7886cax: use nvmem-layout Date: Thu, 3 Oct 2024 17:00:14 -0700 Message-ID: <20241004000015.544297-5-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241004000015.544297-1-rosenp@gmail.com> References: <20241004000015.544297-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 nvmem-layout is a more flexible replacement for nvmem-cells. Signed-off-by: Rosen Penev --- arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts b/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts index 08b3b0827436..9a6625d8660f 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-acelink-ew-7886cax.dts @@ -121,7 +121,6 @@ partition@100000 { }; partition@180000 { - compatible = "nvmem-cells"; reg = <0x180000 0x200000>; label = "factory"; read-only; From patchwork Fri Oct 4 00:00:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rosen Penev X-Patchwork-Id: 832470 Received: from mail-pf1-f174.google.com (mail-pf1-f174.google.com [209.85.210.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DAD41D1E9B; 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Thu, 03 Oct 2024 17:00:33 -0700 (PDT) Received: from ryzen.lan ([2601:644:8200:dab8::a86]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71dd9cb0b28sm1983047b3a.0.2024.10.03.17.00.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Oct 2024 17:00:32 -0700 (PDT) From: Rosen Penev To: devicetree@vger.kernel.org Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , William Zhang , Anand Gore , Kursad Oney , Florian Fainelli , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Matthias Brugger , AngeloGioacchino Del Regno , Rosen Penev , Manivannan Sadhasivam , Christian Marangi , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list), netdev@vger.kernel.org (open list:NETWORKING DRIVERS), linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM MAILING LIST), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCMBCA ARM ARCHITECTURE), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support) Subject: [PATCHv2 5/5] documentation: use nvmem-layout in examples Date: Thu, 3 Oct 2024 17:00:15 -0700 Message-ID: <20241004000015.544297-6-rosenp@gmail.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241004000015.544297-1-rosenp@gmail.com> References: <20241004000015.544297-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 nvmem-cells are deprecated and replaced with nvmem-layout. For these examples, replace. They're not relevant to the main point of the document anyway. Signed-off-by: Rosen Penev --- .../mtd/partitions/qcom,smem-part.yaml | 19 +++++++++++-------- .../bindings/net/marvell,aquantia.yaml | 13 ++++++++----- 2 files changed, 19 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml b/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml index 1c2b4e780ca9..8ae149534b23 100644 --- a/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml +++ b/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml @@ -45,17 +45,20 @@ examples: compatible = "qcom,smem-part"; partition-art { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; label = "0:art"; - macaddr_art_0: macaddr@0 { - reg = <0x0 0x6>; - }; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; - macaddr_art_6: macaddr@6 { - reg = <0x6 0x6>; + macaddr_art_6: macaddr@6 { + reg = <0x6 0x6>; + }; }; }; }; diff --git a/Documentation/devicetree/bindings/net/marvell,aquantia.yaml b/Documentation/devicetree/bindings/net/marvell,aquantia.yaml index 9854fab4c4db..5d118553228b 100644 --- a/Documentation/devicetree/bindings/net/marvell,aquantia.yaml +++ b/Documentation/devicetree/bindings/net/marvell,aquantia.yaml @@ -98,15 +98,18 @@ examples: /* ... */ partition@650000 { - compatible = "nvmem-cells"; label = "0:ethphyfw"; reg = <0x650000 0x80000>; read-only; - #address-cells = <1>; - #size-cells = <1>; - aqr_fw: aqr_fw@0 { - reg = <0x0 0x5f42a>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + aqr_fw: aqr_fw@0 { + reg = <0x0 0x5f42a>; + }; }; };