From patchwork Wed Oct 2 15:12:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parker Newman X-Patchwork-Id: 832915 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EBFE31D096F; Wed, 2 Oct 2024 15:13:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.208.4.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727881987; cv=none; b=Hc9oGoffq+zdMdJTY6Ru0L/563DmkbC6euTHHjqs4QhQ79BpDIhv20Q2PR3Hmhsoj/bWWpwrPN1LZoJYNdPHilsQWgv0mmnhYuyQACE5K8IDKF8ZYFKBkIlgqfsk6IVB1isC+0LqYNhJQ7ajMnoDn4m9q+I3pZFjEDSMxxiTw7Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727881987; c=relaxed/simple; bh=tY70Ze/CHWwT5bdbgC6inckAJYqueXmmMbOmrFgxhLY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PQf32XF7YKp69C7yqVqkVCOvOffWUkgkcbFe5WItRb3zp4wElOoXhWomYCeHdGjT05NB0p1DYtBuVblxbqS9MMHe11BCKAClbIVJhfeW3mj5TfAZwn2fvULOXsKxtu8W1Bk9uHaGBU41PUVEWTdLVAZrB67AXlJYqTfdmcGj3O0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=finest.io; spf=pass smtp.mailfrom=finest.io; dkim=pass (2048-bit key) header.d=finest.io header.i=parker@finest.io header.b=Js/UIovm; arc=none smtp.client-ip=74.208.4.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=finest.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=finest.io Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=finest.io header.i=parker@finest.io header.b="Js/UIovm" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=finest.io; s=s1-ionos; t=1727881975; x=1728486775; i=parker@finest.io; bh=Mt9PJle5Skz6w5r8Bol4+nvFpa1B3jTPEiwNoAdON2E=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:Message-ID:In-Reply-To: References:MIME-Version:Content-Transfer-Encoding:cc: content-transfer-encoding:content-type:date:from:message-id: mime-version:reply-to:subject:to; b=Js/UIovmefFM1gurV1mmphYdcPZaYeQky9Ufv0SN5qfNySZDMqsZLquE4+GWPWGM VnNPa/I+7ZxDSZvsZ8cPI0nHCajP1HK2puyMLPS7KHUpdtUCPY8W19rD3FHq0nvOv OB/6JShVKkXvYpruwSZyeNEmVBFz0kt0wtyT781UyUd21XZbMGahk7OHQvzWsTy7i pklRXWYdkDnDR+gChxlBHM0S35xEXRAzbcYOepKLWTXGT2iyqnEGZSPRyQtT8baDA A9r/Z9tNQAo16OKc2L8VTWr/mXfqmesEye81eHRvwmzCvn2aK+Dpj+BEH7Sk/vaPb mKRAuVVXCyeJSyu6Ww== X-UI-Sender-Class: 55c96926-9e95-11ee-ae09-1f7a4046a0f6 Received: from finest.io ([98.159.241.229]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0LqBHC-1sIZXj0anY-00krAw; Wed, 02 Oct 2024 17:12:55 +0200 From: Parker Newman To: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Cc: Parker Newman Subject: [PATCH v4 1/5] misc: eeprom: eeprom_93cx6: Add quirk for extra read clock cycle Date: Wed, 2 Oct 2024 11:12:33 -0400 Message-ID: <0f23973efefccd2544705a0480b4ad4c2353e407.1727880931.git.pnewman@connecttech.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Provags-ID: V03:K1:fFVlQdoOksGNgvYqYzX3MV3voUlaHvA47a8twACPN+rbVGsPhH7 vjxK5DVeFyviuKJz1wkUeqQwCndMBrjWaTBJjcGm3VigFqj41Xp0Ln8pWPbmRhNMTAmyTX9 wmRBH/lmo+GgXcNCGavT6OHVANrgrXgkRGcZ09BLGpEU7UGr2NtcDPEbF+SjVoPRfwrWozl +rGAUiVbkQjsCp3SoQfYg== X-Spam-Flag: NO UI-OutboundReport: notjunk:1;M01:P0:Mxd/X1rVyMk=;4GIIT9aT+ckUyyYciL64cClzFN4 7jWFw6JVxKVJR61U0TuIfh7cl3pARnP6IpbnEE0XbTIXZ0DVbSLIrT93NIaGtLu8hA9Nhp8eK I2GZ2wU3prpdC3JQU9K/VWZYz3zqYGoOYe0LjI+hwy1tWx5g+Iq6TZApN3EBFrluCkyn/pJWO Nor/DXm4ep2rUiSz8nqavBGN6OZFNTgbX8kwyDL9zUZSXLT+PLoXlyEaTIAYOyus8y/8jLHur Y4I9z+5b/NZTFi9yO488N/Ffo61rBe/bFHZqOINpdDh/h8/uKku2PpbSKaiS1M8dhfDr63EVB ezwLLM2v0ftIetXXPFCT1toBugXjopi5rMjXYNTD+sdKhT1G6ls0Os1QQ139oqQIgF3waeUfj vge0g/qoiZQCDbNV9b95ZsNVb8ApocT10K9ZOOom2eDfHEZb4KPeezN0PTHrlHUO7ya17hFas quk50mg5YcgkLnAuPRTxN57vSB0oOoSS41E9Xt5Hz3fJm0Wamehx3ymbwWMYTWijhgLJ4ykDn MQnvcdsdyb8McD3r4DcREgXhy9EGVtbcJa5TFhCs7gHJZmnyZ+ez806zagH4NZAwnm8Lo1BVl I7M4RpGF3kx9Nr2ET8vdsj+M7+gqk0GrtIAqdXyfb4xczSqHFSWCcuL061EVww244dj8aIYdV oR7qkkaWvLZa8TrI9DLGe/GGALu7IlR1+lfmpv13dEOpjRBYjU6REoJ8kBW8xCFAgiCMLIzvG obq96ghNTyRRfqx7VEWtvb2rCaBOm+VhA== From: Parker Newman Add a quirk similar to eeprom_93xx46 to add an extra clock cycle before reading data from the EEPROM. The 93Cx6 family of EEPROMs output a "dummy 0 bit" between the writing of the op-code/address from the host to the EEPROM and the reading of the actual data from the EEPROM. More info can be found on page 6 of the AT93C46 datasheet (linked below). Similar notes are found in other 93xx6 datasheets. In summary the read operation for a 93Cx6 EEPROM is: Write to EEPROM: 110[A5-A0] (9 bits) Read from EEPROM: 0[D15-D0] (17 bits) Where: 110 is the start bit and READ OpCode [A5-A0] is the address to read from 0 is a "dummy bit" preceding the actual data [D15-D0] is the actual data. Looking at the READ timing diagrams in the 93Cx6 datasheets the dummy bit should be clocked out on the last address bit clock cycle meaning it should be discarded naturally. However, depending on the hardware configuration sometimes this dummy bit is not discarded. This is the case with Exar PCI UARTs which require an extra clock cycle between sending the address and reading the data. Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-5193-SEEPROM-AT93C46D-Datasheet.pdf Reviewed-by: Andy Shevchenko Signed-off-by: Parker Newman --- Changes in v2: - Moved quirk define into struct eeprom_93cx6. - Moved has_quirk_extra_read_cycle() from eeprom_93cx6.c into eeprom_93cx6.h. - Fixed commit message formatting. Changes in v3: - Commit message wording. - Rebased to v6.12-rc1. Changes in v4: - Remove trailing newline. drivers/misc/eeprom/eeprom_93cx6.c | 10 ++++++++++ include/linux/eeprom_93cx6.h | 11 +++++++++++ 2 files changed, 21 insertions(+) -- 2.46.0 diff --git a/drivers/misc/eeprom/eeprom_93cx6.c b/drivers/misc/eeprom/eeprom_93cx6.c index 9627294fe3e9..4c9827fe9217 100644 --- a/drivers/misc/eeprom/eeprom_93cx6.c +++ b/drivers/misc/eeprom/eeprom_93cx6.c @@ -186,6 +186,11 @@ void eeprom_93cx6_read(struct eeprom_93cx6 *eeprom, const u8 word, eeprom_93cx6_write_bits(eeprom, command, PCI_EEPROM_WIDTH_OPCODE + eeprom->width); + if (has_quirk_extra_read_cycle(eeprom)) { + eeprom_93cx6_pulse_high(eeprom); + eeprom_93cx6_pulse_low(eeprom); + } + /* * Read the requested 16 bits. */ @@ -252,6 +257,11 @@ void eeprom_93cx6_readb(struct eeprom_93cx6 *eeprom, const u8 byte, eeprom_93cx6_write_bits(eeprom, command, PCI_EEPROM_WIDTH_OPCODE + eeprom->width + 1); + if (has_quirk_extra_read_cycle(eeprom)) { + eeprom_93cx6_pulse_high(eeprom); + eeprom_93cx6_pulse_low(eeprom); + } + /* * Read the requested 8 bits. */ diff --git a/include/linux/eeprom_93cx6.h b/include/linux/eeprom_93cx6.h index c860c72a921d..3a485cc0e0fa 100644 --- a/include/linux/eeprom_93cx6.h +++ b/include/linux/eeprom_93cx6.h @@ -11,6 +11,8 @@ Supported chipsets: 93c46, 93c56 and 93c66. */ +#include + /* * EEPROM operation defines. */ @@ -34,6 +36,7 @@ * @register_write(struct eeprom_93cx6 *eeprom): handler to * write to the eeprom register by using all reg_* fields. * @width: eeprom width, should be one of the PCI_EEPROM_WIDTH_* defines + * @quirks: eeprom or controller quirks * @drive_data: Set if we're driving the data line. * @reg_data_in: register field to indicate data input * @reg_data_out: register field to indicate data output @@ -50,6 +53,9 @@ struct eeprom_93cx6 { void (*register_write)(struct eeprom_93cx6 *eeprom); int width; + unsigned int quirks; +/* Some EEPROMs require an extra clock cycle before reading */ +#define PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE BIT(0) char drive_data; char reg_data_in; @@ -71,3 +77,8 @@ extern void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom, bool enable); extern void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom, u8 addr, u16 data); + +static inline bool has_quirk_extra_read_cycle(struct eeprom_93cx6 *eeprom) +{ + return eeprom->quirks & PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE; +} From patchwork Wed Oct 2 15:12:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parker Newman X-Patchwork-Id: 832916 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C5D81D0964; Wed, 2 Oct 2024 15:13:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.208.4.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727881986; cv=none; b=hRDHZkwyw0+tJfNlDhdS8w2bQSBGXCMlFUMUDbj00wFWNNoE+Zfw/BVWvoo/AyDxIgwMVU3BQWt9QxtPnQTvZpDoGpZPPtebYh14W4SuZ5TSu3MOR/0/5cp7l2/KevHespPC+wUvuaFLcf2xmRK25t1xCGcwpYMAdfiPG0J1LgI= ARC-Message-Signature: i=1; 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Reviewed-by: Andy Shevchenko Signed-off-by: Parker Newman --- drivers/misc/eeprom/eeprom_93cx6.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- 2.46.0 diff --git a/drivers/misc/eeprom/eeprom_93cx6.c b/drivers/misc/eeprom/eeprom_93cx6.c index 4c9827fe9217..e6f0e0fc1ca2 100644 --- a/drivers/misc/eeprom/eeprom_93cx6.c +++ b/drivers/misc/eeprom/eeprom_93cx6.c @@ -8,6 +8,7 @@ * Supported chipsets: 93c46 & 93c66. */ +#include #include #include #include @@ -102,7 +103,7 @@ static void eeprom_93cx6_write_bits(struct eeprom_93cx6 *eeprom, /* * Check if this bit needs to be set. */ - eeprom->reg_data_in = !!(data & (1 << (i - 1))); + eeprom->reg_data_in = !!(data & BIT(i - 1)); /* * Write the bit to the eeprom register. @@ -152,7 +153,7 @@ static void eeprom_93cx6_read_bits(struct eeprom_93cx6 *eeprom, * Read if the bit has been set. */ if (eeprom->reg_data_out) - buf |= (1 << (i - 1)); + buf |= BIT(i - 1); eeprom_93cx6_pulse_low(eeprom); } From patchwork Wed Oct 2 15:12:35 2024 Content-Type: text/plain; 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Wed, 02 Oct 2024 17:12:56 +0200 From: Parker Newman To: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Cc: Parker Newman Subject: [PATCH v4 3/5] serial: 8250_exar: Replace custom EEPROM read with eeprom_93cx6 Date: Wed, 2 Oct 2024 11:12:35 -0400 Message-ID: <1bf2214ae27130ca58b9e779c4d65a0e5db06fc1.1727880931.git.pnewman@connecttech.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Provags-ID: V03:K1:dPLw+BuVb9CMuO25grPqcD8IxpQjtLvEVIvXoRICljJFIGXG6T0 viyO7o7hsU/uj3eL2z32ieXKVawsNKsck+hMYLjeW8x7rTZQlmpvxGQMYRhK083Eq2uaoK3 3dglVn5a5bQFDSPSZnuXUxwAdf0Q+UDTn2vWTX5aYfj07neMcZIqoiClizGfHkmHekrQGzT yrJPFdqdD7cjG1Idz0Ecw== X-Spam-Flag: NO UI-OutboundReport: notjunk:1;M01:P0:CY/kJ1zzMeY=;NTHqWwMK5pmTga44nqty2ZDxR8R mjWUIXUKzwB8gUIPtlyheLYFaWj7fAhOHzUlRkKGYquT2O9lB1I3zQnseAi2QQP5kaHEGNZ8s GyDjQNu5+VwnlLG5lCLOkQ5c2ig34+eeoEfMLlnKiTK0Xt1vLqxYzhYpSUbC8XJeL9CgF7L13 Vpie43MFyq8S/GwaYdjAZ/j/QxnS32ooBqxaganqIpK2NfT9ZJgdNU0LLzVoEbqPuU4ypEal0 hq9Gfxmn9oHE4cMPsL4bi8fXt2LucSY+9zS4sP9qWcRPjgaBtpRj2KrTG97TMxL/hD1X9Oeb5 Y+PiGSswix7dLbDsBMYiGXNRAZPrGJwlOaYAC0SBXwnA4N0d35YCUStGhYBr8XYNfrh0d+gxs QcfGdjv0OJD/5GIRx6uO0+tXbkRE4OxgFfAOP3E0Nlp9mEeZRkXbN9RaykpFKuiVFnAAzGgZi 1mMlsgyxoHLdAEFs8orxy0qI4h0S0rVepXhf06DcNnmJ69OaLg5KGHFtkgNDg5fAPYfuJ6PnM liBN2SZgiPuPlVsPOcl8+cCUXpHHMQeHdUO+OpofFIlnZkNId0rnFgWq3F8sxHO0cQ3Q+593m ZGlPvGGhj7vDsL6t0pXNweLbU0JnMkJEqLDKTI/Fj+GUmINr7pxkdhKhk06MqAIGF5R1TsQMB 5mmW6GQbTf4zfrzcg/iBeIpjlB0vbbyum86HXztEpqSOD5G3by9Anb1xzG0qtCexiTPU5V78x d6lpKaWks33dTiTcdEFJiWYEWUSOuWYog== From: Parker Newman Replace the custom 93cx6 EEPROM read functions with the eeprom_93cx6 driver. This removes duplicate code and improves code readability. Replace exar_ee_read() calls with eeprom_93cx6_read() or eeprom_93cx6_multiread(). Add "select EEPROM_93CX6" to config SERIAL_8250_EXAR to ensure eeprom_93cx6 driver is also compiled when 8250_exar driver is selected. Note: Old exar_ee_read() and associated functions are removed in next patch in this series. Link to mailing list discussion with Andy Shevchenko for reference. Link: https://lore.kernel.org/linux-serial/Ztr5u2wEt8VF1IdI@black.fi.intel.com/ Reviewed-by: Andy Shevchenko Signed-off-by: Parker Newman --- Changes in v2: - Refactored cti_read_osc_freq() based on feedback. - Moved Kconfig change into this patch. - Sorted headers. - Fixed comment. Changes in v3: - Commit message wording. - Rebased to v6.12-rc1. Changes in v4: - Move CTI_EE_MASK_OSC_FREQ change from patch 4 to this patch. drivers/tty/serial/8250/8250_exar.c | 58 ++++++++++++++++++++++------- drivers/tty/serial/8250/Kconfig | 1 + 2 files changed, 46 insertions(+), 13 deletions(-) -- 2.46.0 diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c index b7a75db15249..e9f57516fbee 100644 --- a/drivers/tty/serial/8250/8250_exar.c +++ b/drivers/tty/serial/8250/8250_exar.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -189,8 +190,7 @@ #define CTI_EE_OFF_XR17V35X_PORT_FLAGS 0x14 /* 1 word */ #define CTI_EE_MASK_PORT_FLAGS_TYPE GENMASK(7, 0) -#define CTI_EE_MASK_OSC_FREQ_LOWER GENMASK(15, 0) -#define CTI_EE_MASK_OSC_FREQ_UPPER GENMASK(31, 16) +#define CTI_EE_MASK_OSC_FREQ GENMASK(31, 0) #define CTI_FPGA_RS485_IO_REG 0x2008 #define CTI_FPGA_CFG_INT_EN_REG 0x48 @@ -252,6 +252,7 @@ struct exar8250 { unsigned int nr; unsigned int osc_freq; struct exar8250_board *board; + struct eeprom_93cx6 eeprom; void __iomem *virt; int line[]; }; @@ -355,6 +356,39 @@ static u16 exar_ee_read(struct exar8250 *priv, u8 ee_addr) return data; } +static void exar_eeprom_93cx6_reg_read(struct eeprom_93cx6 *eeprom) +{ + struct exar8250 *priv = eeprom->data; + u8 regb = exar_read_reg(priv, UART_EXAR_REGB); + + /* EECK and EECS always read 0 from REGB so only set EEDO */ + eeprom->reg_data_out = regb & UART_EXAR_REGB_EEDO; +} + +static void exar_eeprom_93cx6_reg_write(struct eeprom_93cx6 *eeprom) +{ + struct exar8250 *priv = eeprom->data; + u8 regb = 0; + + if (eeprom->reg_data_in) + regb |= UART_EXAR_REGB_EEDI; + if (eeprom->reg_data_clock) + regb |= UART_EXAR_REGB_EECK; + if (eeprom->reg_chip_select) + regb |= UART_EXAR_REGB_EECS; + + exar_write_reg(priv, UART_EXAR_REGB, regb); +} + +static void exar_eeprom_init(struct exar8250 *priv) +{ + priv->eeprom.data = priv; + priv->eeprom.register_read = exar_eeprom_93cx6_reg_read; + priv->eeprom.register_write = exar_eeprom_93cx6_reg_write; + priv->eeprom.width = PCI_EEPROM_WIDTH_93C46; + priv->eeprom.quirks |= PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE; +} + /** * exar_mpio_config_output() - Configure an Exar MPIO as an output * @priv: Device's private structure @@ -696,20 +730,16 @@ static int cti_plx_int_enable(struct exar8250 *priv) */ static int cti_read_osc_freq(struct exar8250 *priv, u8 eeprom_offset) { - u16 lower_word; - u16 upper_word; + __le16 ee_words[2]; + u32 osc_freq; - lower_word = exar_ee_read(priv, eeprom_offset); - // Check if EEPROM word was blank - if (lower_word == 0xFFFF) - return -EIO; + eeprom_93cx6_multiread(&priv->eeprom, eeprom_offset, ee_words, ARRAY_SIZE(ee_words)); - upper_word = exar_ee_read(priv, (eeprom_offset + 1)); - if (upper_word == 0xFFFF) + osc_freq = le16_to_cpu(ee_words[0]) | (le16_to_cpu(ee_words[1]) << 16); + if (osc_freq == CTI_EE_MASK_OSC_FREQ) return -EIO; - return FIELD_PREP(CTI_EE_MASK_OSC_FREQ_LOWER, lower_word) | - FIELD_PREP(CTI_EE_MASK_OSC_FREQ_UPPER, upper_word); + return osc_freq; } /** @@ -833,7 +863,7 @@ static enum cti_port_type cti_get_port_type_xr17v35x(struct exar8250 *priv, u8 offset; offset = CTI_EE_OFF_XR17V35X_PORT_FLAGS + port_num; - port_flags = exar_ee_read(priv, offset); + eeprom_93cx6_read(&priv->eeprom, offset, &port_flags); port_type = FIELD_GET(CTI_EE_MASK_PORT_FLAGS_TYPE, port_flags); if (CTI_PORT_TYPE_VALID(port_type)) @@ -1551,6 +1581,8 @@ exar_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *ent) if (rc) return rc; + exar_eeprom_init(priv); + for (i = 0; i < nr_ports && i < maxnr; i++) { rc = board->setup(priv, pcidev, &uart, i); if (rc) { diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig index 47ff50763c04..94910ced8238 100644 --- a/drivers/tty/serial/8250/Kconfig +++ b/drivers/tty/serial/8250/Kconfig @@ -150,6 +150,7 @@ config SERIAL_8250_EXAR tristate "8250/16550 Exar/Commtech PCI/PCIe device support" depends on SERIAL_8250 && PCI select SERIAL_8250_PCILIB + select EEPROM_93CX6 default SERIAL_8250 help This builds support for XR17C1xx, XR17V3xx and some Commtech From patchwork Wed Oct 2 15:12:36 2024 Content-Type: text/plain; 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Wed, 02 Oct 2024 17:12:56 +0200 From: Parker Newman To: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Cc: Parker Newman Subject: [PATCH v4 4/5] serial: 8250_exar: Remove old exar_ee_read() and other unneeded code Date: Wed, 2 Oct 2024 11:12:36 -0400 Message-ID: X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Provags-ID: V03:K1:ZKkEuX/vMv7rEaPVRwC0sf+1njpjqxPAsqiC7f8hdLwjoRUgm7z v2b1OECESfTwR0Bsmhg3Pxm3WhxlsH3w0pxh56fDZNpLmpFdRzJdRGkpSSv/W6d2bgz1Lvz 5xWzGFMJA4V6CZSEY4NZE4s0UxuC6cKOv0Y9jXHTk8MPjPi9J3/39werSCEsYw2tVzaSrNP ZMp/wZup94Jyoi0MTJNyg== X-Spam-Flag: NO UI-OutboundReport: notjunk:1;M01:P0:Lkc8gQo12cs=;lQy7r91v9ageP7IeRhij/V60axi P/WYJhZk1ycLWtSsMSm7jECy8SpAWJlMwV6Coc9rOGPetZOO2ilEESHlrCyMeXPcJEPbym/PU 9Tbq5emy76/IpP7WCgKXkVFXFHZxlzncxx6Pcv2QjHlalWp/7EUkD6rR2mM+v2vF+k8F48ffF MEh5lBH3LuIim24aooKOqkI0dprdr6LEFiP65wFIlV8DYs4VpLkRtzkCO0FmxJhhXfTySoVwi BkliZtMTHYqsrL/FNnZhWkwqsvaSXANT2+GCn8Q9Yv+3N9Dx7/bTNKEwu1Kc7xE3taJTZJYu0 enVCJYpaWDZA2RfO7i8ebsYjYDku9gWKbRvb6+QIomHXWRddkX4iLTzwYD3T4XuQiLX10Xmyu WfMMg5vUBY9C0weBJZUJj9A1ONivdJ2cUN3R/qdHkpJcaFJZA9FFzdxmvXBMkTBpGwz6nEfFQ D3+mupH43sjJA0kijLwAWRHhLHtWboV5yxlI4mecQeftOms9Ld8vmUDQYX6fQqq0PCRW1eqB6 Cn8nXBYQU8dxywMH4s8Q992c6GZ8D4Ca0fnO6Ofx0/80IQobDyOm1YLv5o5g5nyY50bFEQuoK JJTGFY8bxeNqSq7fxF+Owfnm//VTq7aZ6Ai52pA20kjoZiVVCGCUz+axXkzlufwdvvidwjIdo BJHkxLjV8W6fR1Z//W9JHpavfldovY9Vlyse5EaWcyfpgokMEWvIowLbZ72LQJwPuRITRs7eo oWrLPTonv6ghRrph2alEKK3+nnyOFhxgw== From: Parker Newman Remove the old exar_ee_read() and associated helper functions. Remove defines that are no longer needed after the switch to using the eeprom_93cx6 driver. Reviewed-by: Andy Shevchenko Signed-off-by: Parker Newman --- Changes in v3: - Commit message wording. - Rebased to v6.12-rc1. - Remove CTI_EE_MASK_OSC_FREQ_LOWER and CTI_EE_MASK_OSC_FREQ_UPPER. - Add CTI_EE_MASK_OSC_FREQ define. Changes in v4: - Move CTI_EE_MASK_OSC_FREQ change from this patch to patch 3. drivers/tty/serial/8250/8250_exar.c | 90 ----------------------------- 1 file changed, 90 deletions(-) -- 2.46.0 diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c index e9f57516fbee..470e8128c79a 100644 --- a/drivers/tty/serial/8250/8250_exar.c +++ b/drivers/tty/serial/8250/8250_exar.c @@ -136,8 +136,6 @@ #define UART_EXAR_REGB_EECS BIT(5) #define UART_EXAR_REGB_EEDI BIT(6) #define UART_EXAR_REGB_EEDO BIT(7) -#define UART_EXAR_REGB_EE_ADDR_SIZE 6 -#define UART_EXAR_REGB_EE_DATA_SIZE 16 #define UART_EXAR_XR17C15X_PORT_OFFSET 0x200 #define UART_EXAR_XR17V25X_PORT_OFFSET 0x200 @@ -268,94 +266,6 @@ static inline u8 exar_read_reg(struct exar8250 *priv, unsigned int reg) return readb(priv->virt + reg); } -static inline void exar_ee_select(struct exar8250 *priv) -{ - // Set chip select pin high to enable EEPROM reads/writes - exar_write_reg(priv, UART_EXAR_REGB, UART_EXAR_REGB_EECS); - // Min ~500ns delay needed between CS assert and EEPROM access - udelay(1); -} - -static inline void exar_ee_deselect(struct exar8250 *priv) -{ - exar_write_reg(priv, UART_EXAR_REGB, 0x00); -} - -static inline void exar_ee_write_bit(struct exar8250 *priv, u8 bit) -{ - u8 value = UART_EXAR_REGB_EECS; - - if (bit) - value |= UART_EXAR_REGB_EEDI; - - // Clock out the bit on the EEPROM interface - exar_write_reg(priv, UART_EXAR_REGB, value); - // 2us delay = ~500khz clock speed - udelay(2); - - value |= UART_EXAR_REGB_EECK; - - exar_write_reg(priv, UART_EXAR_REGB, value); - udelay(2); -} - -static inline u8 exar_ee_read_bit(struct exar8250 *priv) -{ - u8 regb; - u8 value = UART_EXAR_REGB_EECS; - - // Clock in the bit on the EEPROM interface - exar_write_reg(priv, UART_EXAR_REGB, value); - // 2us delay = ~500khz clock speed - udelay(2); - - value |= UART_EXAR_REGB_EECK; - - exar_write_reg(priv, UART_EXAR_REGB, value); - udelay(2); - - regb = exar_read_reg(priv, UART_EXAR_REGB); - - return (regb & UART_EXAR_REGB_EEDO ? 1 : 0); -} - -/** - * exar_ee_read() - Read a word from the EEPROM - * @priv: Device's private structure - * @ee_addr: Offset of EEPROM to read word from - * - * Read a single 16bit word from an Exar UART's EEPROM. - * The type of the EEPROM is AT93C46D. - * - * Return: EEPROM word - */ -static u16 exar_ee_read(struct exar8250 *priv, u8 ee_addr) -{ - int i; - u16 data = 0; - - exar_ee_select(priv); - - // Send read command (opcode 110) - exar_ee_write_bit(priv, 1); - exar_ee_write_bit(priv, 1); - exar_ee_write_bit(priv, 0); - - // Send address to read from - for (i = UART_EXAR_REGB_EE_ADDR_SIZE - 1; i >= 0; i--) - exar_ee_write_bit(priv, ee_addr & BIT(i)); - - // Read data 1 bit at a time starting with a dummy bit - for (i = UART_EXAR_REGB_EE_DATA_SIZE; i >= 0; i--) { - if (exar_ee_read_bit(priv)) - data |= BIT(i); - } - - exar_ee_deselect(priv); - - return data; -} - static void exar_eeprom_93cx6_reg_read(struct eeprom_93cx6 *eeprom) { struct exar8250 *priv = eeprom->data; From patchwork Wed Oct 2 15:12:37 2024 Content-Type: text/plain; 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Wed, 02 Oct 2024 17:12:57 +0200 From: Parker Newman To: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Cc: Parker Newman Subject: [PATCH v4 5/5] serial: 8250_exar: Group CTI EEPROM offsets by device Date: Wed, 2 Oct 2024 11:12:37 -0400 Message-ID: X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Provags-ID: V03:K1:TrKMNWs0cbQ0ImVyjc2k9DSkBHDNrcj9RpDUcnBiWLapN24muAv ufRG0+hp8u8dCcb4jRgZ4DWd4l5jwo87Oq44d1DpLM5gouK9LQGKfzFqcx9qErCDiVkpWvT raDPjhfltBlNqc2cBaG1U4iHTgJJrH+Tparfngwuf3c5+qJpAQ+ll98aWcawxMn6EVSv0QQ hpjW3W5fkUL6aJ7IEYGjw== X-Spam-Flag: NO UI-OutboundReport: notjunk:1;M01:P0:R/vd+dXcmjM=;Tpvcr6grkeMUm93I+xp4RRUNB85 frwamVHv0PnQk2Z3z4wrPJZ2RBbrQhMFIbpC9tOxPzSKjsGxD4IWIFJ9PHcHvI6rQJci2pA4Y 3xZ2owZ6FEZnyuA67eRdHzNW+qnQULonqORtPYryyf1ZoMw5KRujAnJ2QV/yVJGvW0+0w/AZV JQs0EBJzEUweK21Nja0utd9eDpXNU4SNRwFSzWF+byTQAYXIT+coSyB0TfrAIT1uXWjIS+5mm nzgImDTC6v03/Fx+psQbxQatVhpF3RHJsAj+QcRP/iWKYCFAFgQ4tFxmzWS35x3COodKf+0hu kyD1FsvuOZIFVnhxx+lpLvhEuhBa25YzowKzIftYV0iOKYQ4cjwd5CavgnDfI2VrgB+o+p8Lf Y7pBJkC/RlHYBu46U5O3AA1UBPQCWH4mpxGR1Mtsh7w/G747o4sWsQquSQTSMJRJtWQBAm2N2 mmchRlShEk70OSeD3y63KRIiXYRYwdyaNDEzkiaF6yQAlQxGWCn41ueonxBEnXhEYDz1RQ+rH DXurUuL0ja3xraD4qWBJDEtV/pOaP0ByW8bXBNdnjYOjHYGYL6Fmb9wY/Iw4A6XxhT6+zTxlX y//UgZACiE0eEi/erh6jRYTMGPR+SGXup4bh2NjKUGkIEffrRRdkbJN+pNmMkoTgWrksfC7qn i+UNHgu3heC3N4f11ZCWj8fk42JcXfXgU2YY/QRIvguhWVGYAy79IbwpcInYnnNOUM2V+WNr3 tzHKnubxG3nQvnMxBbrf3ddYrIF2Rl8OQ== From: Andy Shevchenko It's not obvious from the first glance that the list of the CTI EEPROM offsets covers three different models, let's group them accordingly for better readability. Signed-off-by: Andy Shevchenko Signed-off-by: Parker Newman --- drivers/tty/serial/8250/8250_exar.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 2.46.0 diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c index 470e8128c79a..e37c10b60a7e 100644 --- a/drivers/tty/serial/8250/8250_exar.c +++ b/drivers/tty/serial/8250/8250_exar.c @@ -178,11 +178,13 @@ /* CTI EEPROM offsets */ #define CTI_EE_OFF_XR17C15X_OSC_FREQ 0x04 /* 2 words */ -#define CTI_EE_OFF_XR17V25X_OSC_FREQ 0x08 /* 2 words */ #define CTI_EE_OFF_XR17C15X_PART_NUM 0x0A /* 4 words */ -#define CTI_EE_OFF_XR17V25X_PART_NUM 0x0E /* 4 words */ #define CTI_EE_OFF_XR17C15X_SERIAL_NUM 0x0E /* 1 word */ + +#define CTI_EE_OFF_XR17V25X_OSC_FREQ 0x08 /* 2 words */ +#define CTI_EE_OFF_XR17V25X_PART_NUM 0x0E /* 4 words */ #define CTI_EE_OFF_XR17V25X_SERIAL_NUM 0x12 /* 1 word */ + #define CTI_EE_OFF_XR17V35X_SERIAL_NUM 0x11 /* 2 word */ #define CTI_EE_OFF_XR17V35X_BRD_FLAGS 0x13 /* 1 word */ #define CTI_EE_OFF_XR17V35X_PORT_FLAGS 0x14 /* 1 word */