From patchwork Wed Sep 25 12:49:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TWljaGFsIFZva8OhxI0=?= X-Patchwork-Id: 830721 Received: from uho.ysoft.cz (uho.ysoft.cz [81.19.3.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B5D591A2866; Wed, 25 Sep 2024 12:49:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=81.19.3.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727268578; cv=none; b=JuP6diImsoh22uw8ejvW7QL0FmNfHmKBXS43Lsej8O52ZNXpbrhaypzE1HxZbNAbQUEwM+yNIsYp0vGugHAJfXZqbpRt1kukdwZytsyVZ8nAIid6hMRv8kXnSUj2hx/JZFNp5DfUDPtKsgcKW38qNVgoMjnJlojxzApoZSzfR1M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727268578; c=relaxed/simple; bh=pOpCdNDWE7AOs2h//XUIygbEAbG/8yJofHY4Quh7DXU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=BviSPRRLLcmqiBxHogL99GmfdUCQbPdpWVEUbiouerSuNyBVJf2+1Wv04t6pjdK2c/8gMjxlbOsJoziU9YzmQJ0AS8zl1RWkLRYrO75VUY3ltnGpvM4DMszOcCQnDaNGRUzrsKIB5SnJ6Hk1efoUpvr6IpsEpaXHywPVAvGydYY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ysoft.com; spf=pass smtp.mailfrom=ysoft.com; dkim=pass (1024-bit key) header.d=ysoft.com header.i=@ysoft.com header.b=dDFrbvLr; arc=none smtp.client-ip=81.19.3.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ysoft.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ysoft.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ysoft.com header.i=@ysoft.com header.b="dDFrbvLr" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ysoft.com; s=20160406-ysoft-com; t=1727268574; bh=ZNoWTEQsqc34AgTnGl6LHBfTCISxnDjwkPLJBXG2qA0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dDFrbvLrElO5T5DTtm3e6uAMU+pJf36qke0NzDKSiHyQxVP/4LdB59Wjyww5SP0Es Xg0SofsmJlXstfAr030jQT9aRXy7SrrbVJAlmTzivBgx2EQr3IAupH+45TywQBA/Je etNYa8jyeXGfDzo/+nLiG9G2Bvdb3DIkkWiZiQpw= Received: from vokac-nb.ysoft.local (unknown [10.1.8.111]) by uho.ysoft.cz (Postfix) with ESMTP id 94FF8A055B; Wed, 25 Sep 2024 14:49:34 +0200 (CEST) From: =?utf-8?b?TWljaGFsIFZva8OhxI0=?= To: Shawn Guo , Petr Benes , Marco Felsch Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Herburger , Hiago De Franco , Hugo Villeneuve , Joao Paulo Goncalves , Michael Walle , Alexander Stein , Mathieu Othacehe , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, =?utf-8?b?TWljaGFsIFZva8OhxI0=?= , Krzysztof Kozlowski Subject: [PATCH v5 1/2] dt-bindings: arm: Add i.MX8MP IOTA2 Lumpy board Date: Wed, 25 Sep 2024 14:49:02 +0200 Message-ID: <20240925124903.1837869-2-michal.vokac@ysoft.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240925124903.1837869-1-michal.vokac@ysoft.com> References: <20240925124903.1837869-1-michal.vokac@ysoft.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add new board from the Y Soft IOTA family. This one is based on the i.MX8MP SoC. It is basically a stripped-down clone of the EVK board with some minor additions. Acked-by: Krzysztof Kozlowski Signed-off-by: Michal Vokáč --- v5: - none v4: - none v3: - none v2: - Added tag from Krzysztof. Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index b39a7e031177..a3389f2d06e6 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1088,6 +1088,7 @@ properties: - toradex,verdin-imx8mp # Verdin iMX8M Plus Modules - toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Modules without Wi-Fi / BT - toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Modules + - ysoft,imx8mp-iota2-lumpy # Y Soft i.MX8MP IOTA2 Lumpy Board - const: fsl,imx8mp - description: Avnet (MSC Branded) Boards with SM2S i.MX8M Plus Modules From patchwork Wed Sep 25 12:49:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TWljaGFsIFZva8OhxI0=?= X-Patchwork-Id: 830720 Received: from uho.ysoft.cz (uho.ysoft.cz [81.19.3.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 112081A264C; Wed, 25 Sep 2024 12:49:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=81.19.3.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727268579; cv=none; b=q/3b4dqTe5kugycmQSI9Y3/MKQcq2/GbMfZ47J64ck9aIe7WIYf6OREE3nZPlGjF4AHZ86O8TzYQwKUQ/nvWCUpiiXHA46uy4T4ObN6XQ7rc3hIIkxGg9jIPbjRJTIQ9XgLx+UGmXRvAjGRHQYM0LMW+O/XuhiQ+bv9t4utRWVI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727268579; c=relaxed/simple; bh=+CQ28V6qSh0LPyCcz9YtqwhFkDYi61Hp2sM49W11wMQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=nKxuluemPbpz1P06xXR9wAtMje5xi7DU7hc/xZ0QyuYDRKxqoP+2Mxv12GRTiCU/0v1t75pQ+MD3NB4WB+4EuiQJKtKYo5Uo92lkpIaliNqdKMXUl1yxr9fat8WNQ2arwmOAMXgdC25gmQTrTjv9ucJuce7B7bxZiSUizhCilBU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ysoft.com; spf=pass smtp.mailfrom=ysoft.com; dkim=pass (1024-bit key) header.d=ysoft.com header.i=@ysoft.com header.b=n7agWfwF; arc=none smtp.client-ip=81.19.3.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ysoft.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ysoft.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ysoft.com header.i=@ysoft.com header.b="n7agWfwF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ysoft.com; s=20160406-ysoft-com; t=1727268575; bh=5XJmN7WDokcbaJ4vuczzaEPkRF03MRdLA9b+8aENL8I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n7agWfwFImsP5jHCUwPEOY/72RMVF5lyDngjHgQBD6O+3UW51gYPmXsTutSsuQhYh QjBbrN202JIbpSj6PVzGxihC8EBhBVtiKgxtF8l39bMyRppWCKgmLOu5UHkWl7eWAs Z1K87VnpUPfGHYedksmRGzRvanYpiWgVMMZMaNTA= Received: from vokac-nb.ysoft.local (unknown [10.1.8.111]) by uho.ysoft.cz (Postfix) with ESMTP id 014FCA05E5; Wed, 25 Sep 2024 14:49:34 +0200 (CEST) From: =?utf-8?b?TWljaGFsIFZva8OhxI0=?= To: Shawn Guo , Petr Benes , Marco Felsch Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Herburger , Hiago De Franco , Hugo Villeneuve , Joao Paulo Goncalves , Michael Walle , Alexander Stein , Mathieu Othacehe , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, =?utf-8?b?TWljaGFsIFZva8OhxI0=?= Subject: [PATCH v5 2/2] arm64: dts: imx: Add imx8mp-iota2-lumpy board Date: Wed, 25 Sep 2024 14:49:03 +0200 Message-ID: <20240925124903.1837869-3-michal.vokac@ysoft.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240925124903.1837869-1-michal.vokac@ysoft.com> References: <20240925124903.1837869-1-michal.vokac@ysoft.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The IOTA2 Lumpy board is based on the i.MX8MPlus EVK. Basic features are: - 4GB LPDDR4 - 64GB eMMC - 2x 1GB Ethernet - USB 3.0 Type-C dual role port, without power delivery - USB 3.0 Type-A host port - RGB LED - PWM driven - speaker - PWM driven - RTC with super capacitor backup Reviewed-by: Marco Felsch Signed-off-by: Michal Vokáč --- v5: - Moved the gpio and enable-active-high properties below the regulatro-* properties in reg_usb_host node. - Moved the micrel,led-mode properties bellow the reset-* properties in ethphy nodes. - Collected R-b tag from Marco. v4: - Moved the iomuxc node to the end of the file. - Moved the bus-width and non-removeable properties below the pinctrl-* properties in &usdhc3 node. - Moved the fsl,ext-reset-output below the pinctrl-* properties in &wdog1 node. v3: - Dropped pinctrl-names property from &usb_dwc3_1 node. v2: - Dropped unused property from pwm4 node. - Sorted all nodes and properties using dt-format tool from Frank. arch/arm64/boot/dts/freescale/Makefile | 1 + .../boot/dts/freescale/imx8mp-iota2-lumpy.dts | 423 ++++++++++++++++++ 2 files changed, 424 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 9d3df8b218a2..aa26a50b7bb4 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -171,6 +171,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mp-iota2-lumpy.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts new file mode 100644 index 000000000000..f48cf22b423d --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts @@ -0,0 +1,423 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2023 Y Soft + */ + +/dts-v1/; + +#include "imx8mp.dtsi" + +/ { + compatible = "ysoft,imx8mp-iota2-lumpy", "fsl,imx8mp"; + model = "Y Soft i.MX8MPlus IOTA2 Lumpy board"; + + beeper { + compatible = "pwm-beeper"; + pwms = <&pwm4 0 500000 0>; + }; + + chosen { + stdout-path = &uart2; + }; + + gpio_keys: gpio-keys { + compatible = "gpio-keys"; + pinctrl-0 = <&pinctrl_gpio_keys>; + pinctrl-names = "default"; + + button-reset { + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + label = "Factory RESET"; + linux,code = ; + }; + }; + + reg_usb_host: regulator-usb-host { + compatible = "regulator-fixed"; + pinctrl-0 = <&pinctrl_usb_host_vbus>; + pinctrl-names = "default"; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb-host"; + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + memory@40000000 { + reg = <0x0 0x40000000 0 0x80000000>, + <0x1 0x00000000 0 0x80000000>; + device_type = "memory"; + }; +}; + +&A53_0 { + cpu-supply = <®_arm>; +}; + +&A53_1 { + cpu-supply = <®_arm>; +}; + +&A53_2 { + cpu-supply = <®_arm>; +}; + +&A53_3 { + cpu-supply = <®_arm>; +}; + +&eqos { + phy-handle = <ðphy0>; + phy-mode = "rgmii-id"; + pinctrl-0 = <&pinctrl_eqos>; + pinctrl-names = "default"; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + reg = <0>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio3>; + pinctrl-0 = <&pinctrl_ethphy0>; + pinctrl-names = "default"; + reset-assert-us = <1000>; + reset-deassert-us = <1000>; + reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; + micrel,led-mode = <0>; + }; + }; +}; + +&fec { + fsl,magic-packet; + phy-handle = <ðphy1>; + phy-mode = "rgmii-id"; + pinctrl-0 = <&pinctrl_fec>; + pinctrl-names = "default"; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy1: ethernet-phy@0 { + reg = <0>; + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio3>; + pinctrl-0 = <&pinctrl_ethphy1>; + pinctrl-names = "default"; + reset-assert-us = <1000>; + reset-deassert-us = <1000>; + reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; + micrel,led-mode = <0>; + }; + }; +}; + +&i2c1 { + clock-frequency = <400000>; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-names = "default"; + status = "okay"; + + pmic@25 { + compatible = "nxp,pca9450c"; + reg = <0x25>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio1>; + pinctrl-0 = <&pinctrl_pmic>; + pinctrl-names = "default"; + + regulators { + BUCK1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1000000>; + regulator-min-microvolt = <720000>; + regulator-name = "BUCK1"; + regulator-ramp-delay = <3125>; + }; + + reg_arm: BUCK2 { + nxp,dvs-run-voltage = <950000>; + nxp,dvs-standby-voltage = <850000>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1025000>; + regulator-min-microvolt = <720000>; + regulator-name = "BUCK2"; + regulator-ramp-delay = <3125>; + }; + + BUCK4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3600000>; + regulator-min-microvolt = <3000000>; + regulator-name = "BUCK4"; + }; + + BUCK5 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1950000>; + regulator-min-microvolt = <1650000>; + regulator-name = "BUCK5"; + }; + + BUCK6 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1155000>; + regulator-min-microvolt = <1045000>; + regulator-name = "BUCK6"; + }; + + LDO1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1950000>; + regulator-min-microvolt = <1650000>; + regulator-name = "LDO1"; + }; + + LDO3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1890000>; + regulator-min-microvolt = <1710000>; + regulator-name = "LDO3"; + }; + + LDO4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <950000>; + regulator-min-microvolt = <850000>; + regulator-name = "LDO4"; + }; + + LDO5 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; + regulator-name = "LDO5"; + }; + }; + }; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-names = "default"; + status = "okay"; + + rtc: rtc@68 { + compatible = "dallas,ds1341"; + reg = <0x68>; + }; +}; + +&pwm4 { + pinctrl-0 = <&pinctrl_pwm4>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&pinctrl_uart2>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&usb3_phy1 { + vbus-supply = <®_usb_host>; + status = "okay"; +}; + +&usb_dwc3_1 { + dr_mode = "host"; + status = "okay"; +}; + +&usdhc3 { + assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; + assigned-clock-rates = <400000000>; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&wdog1 { + pinctrl-0 = <&pinctrl_wdog>; + pinctrl-names = "default"; + fsl,ext-reset-output; + status = "okay"; +}; + +&iomuxc { + pinctrl_eqos: eqosgrp { + fsl,pins = < + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2 + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2 + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90 + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90 + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90 + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90 + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90 + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90 + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16 + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16 + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16 + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16 + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16 + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16 + >; + }; + + pinctrl_ethphy0: ethphy0grp { + fsl,pins = < + MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x10 + MX8MP_IOMUXC_SAI5_RXD1__GPIO3_IO22 0x10 + >; + }; + + pinctrl_ethphy1: ethphy1grp { + fsl,pins = < + MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19 0x10 + MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20 0x10 + >; + }; + + pinctrl_fec: fecgrp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2 + MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2 + MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90 + MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90 + MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90 + MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90 + MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90 + MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90 + MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16 + MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16 + MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16 + MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16 + MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16 + MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16 + >; + }; + + pinctrl_gpio_keys: gpiokeysgrp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x80 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2 + MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2 + >; + }; + + pinctrl_pmic: pmicgrp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x1c0 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT 0x102 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x0 + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x0 + >; + }; + + pinctrl_usb_host_vbus: usb1grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO14__USB2_OTG_PWR 0x0 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { + fsl,pins = < + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4 + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4 + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4 + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4 + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4 + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4 + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { + fsl,pins = < + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196 + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6 + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6 + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6 + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6 + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6 + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6 + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6 + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6 + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6 + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0 + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0 + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0 + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0 + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0 + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0 + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166 + >; + }; +};