From patchwork Wed Sep 18 22:57:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 829442 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E53B1CB515; Wed, 18 Sep 2024 22:57:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700278; cv=none; b=FR0x5hthvlNYVVDS/IGOUBKMFAacZXgJ68w9IeCkrOAqt+ImQ0EIXgAWvavSX9hyiiyqfRY0BqI5/ERvzDwvfXezsL6UAxyAjb6oLhBgUk50tVyL0ALlxevktEGk3LCWkrA4iK/z3IlZP7rVvHDJ9gMupoA4/O/dnV0txAQxzL8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700278; c=relaxed/simple; bh=9Xbdr1pTl7lYm6kqYHAJ7Pr5h+ltrNyYvsLJzKXgVnM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=h2B2hYkWGfAsMj7EA6RvFpOolKXBp45f9fixatDaYsglR/SyeAp4MEI8iyRavpvZxk3qvIeLAbpxidcheTvVJoJbDnn0hr/a1FdBTy29iN1eJ4lfMUqlfVSkk2R1c3OgAH89MnuoJtx/FEdQe0rzOtkiQTJX93gInFdYyFwSKw0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=no1i+sPF; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="no1i+sPF" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BA1DBC4CEC2; Wed, 18 Sep 2024 22:57:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700277; bh=9Xbdr1pTl7lYm6kqYHAJ7Pr5h+ltrNyYvsLJzKXgVnM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=no1i+sPFDWzZuHZsFi0rWmfwoc5a8IUh4Jia8nY7EgVF+Np5lmcgeuMcf0M/JZIaS wpchAEbUvJgHQKDXRAL78AV9E61Cu7Lko2Xr014dASRoUT8VVFSE4uXxGiuiAfFqZL DOprQO/9IaJNs9F6MvJNJkvgcnWcwnGeCzJhH0C1DpWTnmsPk7jy1A+qE9VEChj0jP b2AXbpDu8Ai6p2V+BeJoamns4PCP6EmI9OTrqFJWVSS3EYr9B+zWRRCMxMvdUB56/r JJaNcOipOUw9dMveSRUDwXEhaTHYPS0yPT96DE+CE2MOABrgjIn3n5wbRlWc0HocAU yPLjAsTS3nuhA== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:15 +0200 Subject: [PATCH RFC 02/11] arm64: dts: qcom: sc7180: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-2-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=999; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=TocsrPaJ8I1VAyg6H1MUXOkr4BtJGYiVHFeGO5oxys4=; b=GD2PXDTF6K9gyC92vamg0mELPyevvegAlpXgPdzvUxMVJ4d8VF2VfwRwyR3SXK4jSiNNGBMVk kJHbwk+Tt4IDckyA6jc7I8c8IrvvMCpfeRb7YmQliMJWRARIWWSNmGJ X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index b5ebf89803251203a8d38f6a4690aa052a9e8e61..ed258b4ab486af1765b882164962c56935210898 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3625,6 +3625,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; intc: interrupt-controller@17a00000 { From patchwork Wed Sep 18 22:57:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 829441 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DB021CC172; Wed, 18 Sep 2024 22:58:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700285; cv=none; b=EufsRgJzsoAily4IvnkF+5FSjd5jyabZV6lEcZu87E2pwEbwYYdl0G+xkFCdtd3/GSr42t7mYPWJHPNczGqT/IEQPXJ6L8zNuLIbSyMIIH71dJSGsb13l7F/+DrEhgfjPPVw8QVVTkb+E1rTFVu6RhPTc7fAbRPQG+QHZun5A7M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700285; c=relaxed/simple; bh=yxkJqeag+cHRDOW655uJqun2ar+bn6DrpicUSLT0eAk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WitZNAQ9oxNk6bAej49Qy9RvxRkc6uAKv7tIevcU+kbAysIlZ5GxxuPIHdJqCDvl/Q4wMk1dO8xwsscCf5CY6DQbpQ90DbwFW652XqDqUgq4pdsPw3qHsGjjyJPEtVVmFs+qd3FpqM76JtSBbImnaQywUzEC2Tt0m685lu/2p8w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LKxKYpKf; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LKxKYpKf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 60510C4CECF; Wed, 18 Sep 2024 22:58:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700285; bh=yxkJqeag+cHRDOW655uJqun2ar+bn6DrpicUSLT0eAk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=LKxKYpKfRcpxQAY8yuTwYz7eKJiG9H7TTC2Vft9ehdcUOt5CGiA4f3Bq29A1DsRJ1 /iZYp0Qm5DkO+oHkM+Kr4ufVkBMjvJVDFkW3KFgyqKqLuL35PCyAD3cfgdRUt2Selx EH0Z9g1z9lkVZ15zu0uUbgG5xIXgzCRpuIHYn3Qg1HK27ROhWG2Jc5N3maF/OFgT/c 0bl20mkK3dmJ8P+DlP1uwV2F2fpJJGtTaS9zlOlEnv32TmiiEhJwk0+13tq3lUVwRT SiXat3mp79F6N7l98hSwLmZgugjizUj3PimU2KlHnEcQgx41oAP+jRQSEpoZQ+eLES QFWeTLBrzmEYA== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:17 +0200 Subject: [PATCH RFC 04/11] arm64: dts: qcom: sc8280xp: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-4-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=1009; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=QpUw8ZaJCUB4takBAlqMpvVgFRDLxf4g8S0BjQz9WeQ=; b=w/tvXpvFBerXuTddXSslIncKx1/PjB6TbrQ/q9cmad5MzljTy/MspsUdC3WpomcZOxqc8p7qS xqH9/4CSHO5A1IrPvVDGoGk/DmSoDnQj9Yz8Lz+ZHo7qRTvNJ3oFoLA X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 80a57aa228397e23e3e2d5643c0b563a60d71170..d36f677ae4cd857388dcd5821160a6472a0904b4 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -5008,6 +5008,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; intc: interrupt-controller@17a00000 { From patchwork Wed Sep 18 22:57:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 829440 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A98A1CBEAC; Wed, 18 Sep 2024 22:58:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700293; cv=none; b=pzg1x+U4XmaMn6fFKVU9jRJrMePJ6/mdThvOsP5G9wC1WWvd5PPc4Apyg2hxNNoWrc9coRuDj4KOgwco2yq6Teew4E2NJIv2QtC1TxMYYqm/cH0ZaS9kb0FzN80sgiiANBjSE+9gmkQBIIuel8LUT7R8nPB/XhwPfPzQgLmkyqc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700293; c=relaxed/simple; bh=mmj9k/5wzoOZV6DQSW73lInky+Ha7Es9GsL3JQUu8D0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Uclc5gTU0WIkX+DfNL7TXdGEADTZGQl8lUrJXSRgC0k1fKEtHJAkcHFA5h6JfH0IIU7wj7y0XVfmUskG8N7EaCoC+BazdxNYcDHFsQu/rE93bdGqioQWjfqFDeFFgRDNMNUWZDnaec8Q38mwttj18ToWe/CNDNC17CeUj/4279Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OfWebyUY; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OfWebyUY" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 315C5C4CED1; Wed, 18 Sep 2024 22:58:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700293; bh=mmj9k/5wzoOZV6DQSW73lInky+Ha7Es9GsL3JQUu8D0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=OfWebyUYkjxcfZWV/YwUfqYglTa3lVOn0FuJ7qX8LUIzrEps3EUOPEy4qAhCexVq8 zSWSS1nNv6tQZYSiSB02KoK+N2+cPqYuVrIVLSe/miovHmHRF16IJlqpLF9KYfg+uu djDBPZZF7GKOE/4Uh2jN3TmojoPrl7tbhmwqdSrkX1YuwgKjhb0b8T5rNHUaN4Vd6F n5F4SCVdG7/Uc8DALAzk6XvrX9ETWywIiJYnXKgM4JkoUT5xOv3SGwEuh8H86LlFUp z0R+FroEjLxqm+PcCVuwrOOyvMabLTJMW3s1AveXcVt8vXvAK4iWw4ORxLJ/S/kvvO fG68ZXfarifgQ== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:19 +0200 Subject: [PATCH RFC 06/11] arm64: dts: qcom: sdm845: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-6-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=988; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=UZMF5MnsUbzsHMthR4Ow1hPxixbpxGwRvIlbTvumHUE=; b=6KbOYn1tyI0IsSLsMiQ+CqJCuSkm2gOZxp+N/YJNZqAK/sIKvIDjAgVN8kD9ph5kx+fJVrZDd XUjX1534QJSCINCfBmwayJsfRg1/c6PszsQ2xilBVe5a+ys0yP290uv X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 54077549b9da7f0ece69a01d370692d9d716bbb5..49440d1b2cf6caf6da9d97c635cbd751f0700326 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -5159,6 +5159,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; anoc_1_tbu: tbu@150c5000 { From patchwork Wed Sep 18 22:57:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 829439 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF7B61CBEBE; Wed, 18 Sep 2024 22:58:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700299; cv=none; b=bLhDuYITrBlfRVFqJfVJzkQp7xrkLw15HEvvNFb8DTuhsgsrRNQRo6Mgkj0LbkIdMK/KcVo8z33rvoFVXGuwpZ+CgGHSL9ccUUvW8iCRTon36jslAi/rEaUDCMIRUvqQwshPSpiHMXpMeGlgk607fSp5I6FU1WK7vwxoEfYrJqc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700299; c=relaxed/simple; bh=QBoB4Ot7K+O4Obyl3HKNUXhThAi16EowUegHMtqCUIM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eiqOeDfStMLgcGlEcVcE2JUPEsHs+ZWYV7t+kLolREhwLltQceWUlZ1BQJPXPUOeHASqBr5n6W1d0wu/Fi06Kj3HRegduKd+AcnIszAQt+PqjIZsCxg1XHqO+z6Vl+lRtdUHSPVhTwV0GmjpCZQZ28WkqqJe4gF09FCP+o/qa3o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SzSM6405; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SzSM6405" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E1712C4CEC3; Wed, 18 Sep 2024 22:58:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700299; bh=QBoB4Ot7K+O4Obyl3HKNUXhThAi16EowUegHMtqCUIM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=SzSM6405yLBVU1koWb31yvaReURCjG9mqfPJFtEX49SRRBykYHwylAZ6DVgHtoVB3 //9W0HTWgyKPmCiju/MJAK1rn8ZCr16h9NpL19CZeDcNW7tiUuu981QV+U+4O/fyrp YNZzx5jIHfpoStjIBf6R2bnAleg8p7kUvp/gp6uvMqW5QhYmKvHAQHec1NJMnJGs7l IsAdaQS8fehXRp5XL0KUy5ejagwlA+WNkjt6sxAgJD90LP3OvNetHQH85W4x3ZexgZ XrPEL3F2kQcd8YkyyQKqd5q1ukPa4ZtArGxxgec01i59yJog308C5QGLyWi+2t5sGJ UDBo4ZKioOsLw== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:21 +0200 Subject: [PATCH RFC 08/11] arm64: dts: qcom: sm8150: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-8-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=1000; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=bNTOagUjuIT9eHqmrzEiDX4QJTZgAhZ+fZt6gBTJGDA=; b=ba3+Ql0LiulBh7MP0mcaWqcqciZl8E4CMnoVuMDLBTRibQ7K+Boz0AE1d58KwaIEp74f/T7zt XZ64hG7JZKLDF7FJIu9sN8VHEt7xsIJlLGWQL6SWsNp7WMtn2ovlG7V X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 27f87835bc5595f5023319f77878a8ea4090a3f6..28e57ad885f4f64abbf429c337d45504ff2830ad 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -4296,6 +4296,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; remoteproc_adsp: remoteproc@17300000 { From patchwork Wed Sep 18 22:57:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 829438 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 034781CCEC4; Wed, 18 Sep 2024 22:58:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700306; cv=none; b=owz5+SpLaE2euRZM/w0FtBfO6M2Dg1FsepMmun2UxPIMKsAdYNkcnY8VJ1NS2AWy0y3B7aWj5nP2k5yBkO1RMWJuwvjqOwCcQYFkaQRBAY6g9yD0rkpM4JoR6KtcVOfjgqdI6dySFC9XjrDYRJ0G4++oyRrRfnhQoG5ubxl5eEc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726700306; c=relaxed/simple; bh=ZcAFn2XSRIW73riEtufmOHMyBIaaTuxA2BmJWLS6aMA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RWWednfCDZRnCqDEYAVdi3xwXYC4RpjX+yrttylpiujJPG4yeTKEJSpg6+fR/DwKjSkHQf9V5BsQIZwgDSmYEjImfrNKRDpa71DAVtZQwfaKBFBu1h0XpHdSvJUBZNRVNXmt7LeBTDU7AQdlmcKnE6zINqUV1Ta8Hc2Lo2JdCRY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=pl+/Wge8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="pl+/Wge8" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5D8CBC4CEC2; Wed, 18 Sep 2024 22:58:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726700305; bh=ZcAFn2XSRIW73riEtufmOHMyBIaaTuxA2BmJWLS6aMA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=pl+/Wge8stfTkbXUv7jeJ7MYCicj7dHcskhgSmrrETEsPvzBM4iNPWShsbcm4+sJf 7FZquLMwQ/jjco8GV4Rz4YS39ZySNd3UttxN682eFaebEwxODWSG8GlFWlb8rLp3gZ Iy8QQTIIMk0N+JJ8OqPndLnmQcAgUtsanW4QsCznFBBMdor29TK0XRoxFd2kEQgs+y 95He8oUUdujdcgiWIfYIhf6ZSj8Ul25weS60B1FOGiPg79tJ3e1GgSwmT1fi8aUvtp eUtGXZH3sDUCnaB65RgVLtJn7LY4imUI6KV0rabpDwzNlnL2nydjbwYVBcWECtCLjy jKgdi0PiVq0PQ== From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:23 +0200 Subject: [PATCH RFC 10/11] arm64: dts: qcom: sm8450: Affirm IDR0.CCTW on apps_smmu Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240919-topic-apps_smmu_coherent-v1-10-5b3a8662403d@quicinc.com> References: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> In-Reply-To: <20240919-topic-apps_smmu_coherent-v1-0-5b3a8662403d@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1726700267; l=999; i=quic_kdybcio@quicinc.com; s=20230215; h=from:subject:message-id; bh=7lG88rwMoxIAeoJSLU9mOYtSapn72lOPZLltuZ/GUsY=; b=Q1yrT3u0v4bzdrFXFTSFStWb/zZ0SBZaFefbJ1Dtf6FP5qbqRUEKLdsaMPMcp2KTVZ24Z/Nfz BW/A4nD0r2TB0LmuNDTURwj5rOiToeQN6tUQyMIr4514eLMqcmadg2o X-Developer-Key: i=quic_kdybcio@quicinc.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 9bafb3b350ff627277514be83910b72a283c1935..a22112cb4bb5ba2f20e45f8136d9ec2d75dd7571 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -4257,6 +4257,7 @@ apps_smmu: iommu@15000000 { , , ; + dma-coherent; }; intc: interrupt-controller@17100000 {