From patchwork Tue Nov 19 14:16:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 179748 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp697114ilf; Tue, 19 Nov 2019 06:17:14 -0800 (PST) X-Google-Smtp-Source: APXvYqxlcfqZvTUCrlBcuenGDFDKyyk0ZKpbDuCK6hxO1w58l5PIsYTwT1gtkcavwMTFFZxmOQ2K X-Received: by 2002:a17:906:7812:: with SMTP id u18mr4182361ejm.6.1574173034515; Tue, 19 Nov 2019 06:17:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574173034; cv=none; d=google.com; s=arc-20160816; b=uPDsL8dzRG0HrehnOVc6WyCnQgsPGQ8Y2A0msccsCS2xeIa/OgKxXGfCl0A9mirnlV cAiO4hTJwKRSS6b+9orYrrdBhTQL3aHqzQvgR6S1nxUD+zgvVyjaIWEgxudWlg8Qrab9 iXpn6Lpb8lA/dy9H09QH4BeAEjv7ndaehY4bh9oGdONLJbNZwfxhU7muFHFYIZ0WOXLr xVz5GTHgQSEg3OxbeJi38E/Mdxpsva0xni26zGHWZ6TL6jqzkKscz9VaBJP1oGjZqeBy ll+BOW23w5MCVa65GWSRfZnxTQx7rJtqQoTMwrLpqsu/PsEFFvwxA7rJr3Kr/E3ogg2O DvDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=Lgg5bXJHY0qY+5AccL1ycGrlw4bWEgR7u9c7jOSQD8I=; b=e5luRmb3O88rbzo50seixfeMSuwvNjF8FUVet0695lf0daeZ0ZHE9399O+VyeEbTXs 7Z5xRy5v2G5wigIvC3YKQEuxfZ21bGNqPHgheJnRM8KsYXDoUy0A6v6cd2R8DhuZgNHh YuE5aBFJ4yO9qU16YRoQv/aEhepWrcYqt6YfzoDGwWDD5UmmeVScqeXa+9hy+kD3w1bt utjvsPfRscpKRUbf/FEI3LkV4TRQwSr0NQGON/qjhw7kTv1RpTAL4m/nQNGd7+GhbUAP mbXbwGxaJTInSvP9GhtBE/tU5ao8XGK7SbX4K4TlMSQCqlhdjZzR1mirc1Vatf6hkKQs AcOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=mErrAcuG; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ov27si13744486ejb.197.2019.11.19.06.17.14; Tue, 19 Nov 2019 06:17:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=mErrAcuG; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728025AbfKSORN (ORCPT + 5 others); Tue, 19 Nov 2019 09:17:13 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:39784 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728022AbfKSORM (ORCPT ); Tue, 19 Nov 2019 09:17:12 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id xAJEH7x9077134; Tue, 19 Nov 2019 08:17:07 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1574173028; bh=Lgg5bXJHY0qY+5AccL1ycGrlw4bWEgR7u9c7jOSQD8I=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=mErrAcuGeqygCHb17I/tjGQfHTCV/5lol15MgTz+WbqQZugzAqOjYutstCwNxOOJz GHxNNBN/9qk+/17TXTGqLBB4e+pGQqVv2nAoeQp6AZgAcHIP5HvPTwCfI8SzIsxPzg GNGCMUenevGdU38k3nweViR9hJ7bH4B0UBv1ZgLk= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xAJEH7Pn053795 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 19 Nov 2019 08:17:07 -0600 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 19 Nov 2019 08:17:04 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 19 Nov 2019 08:17:03 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xAJEGvYt027070; Tue, 19 Nov 2019 08:17:02 -0600 From: Tero Kristo To: , , CC: , , , Tony Lindgren , Tero Kristo Subject: [PATCHv2 02/15] remoteproc/omap: Add device tree support Date: Tue, 19 Nov 2019 16:16:32 +0200 Message-ID: <20191119141645.19777-3-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191119141645.19777-1-t-kristo@ti.com> References: <20191119141645.19777-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna OMAP4+ SoCs support device tree boot only. The OMAP remoteproc driver is enhanced to support remoteproc devices created through Device Tree, support for legacy platform devices has been deprecated. The current DT support handles the IPU and DSP processor subsystems on OMAP4 and OMAP5 SoCs. The OMAP remoteproc driver relies on the ti-sysc, reset, and syscon layers for performing clock, reset and boot vector management (DSP remoteprocs only) of the devices, but some of these are limited only to the machine-specific layers in arch/arm. The dependency against control module API for boot vector management of the DSP remoteprocs has now been removed with added logic to parse the boot register from the DT node and program it appropriately directly within the driver. The OMAP remoteproc driver expects the firmware names to be provided via device tree entries (firmware-name.) These are used to load the proper firmware during boot of the remote processor. Cc: Tony Lindgren Signed-off-by: Suman Anna [t-kristo@ti.com: converted to use ti-sysc framework] Signed-off-by: Tero Kristo --- v2: - read firmware name from DT entry (firmware-name) rather than hardcode it in driver drivers/remoteproc/omap_remoteproc.c | 191 +++++++++++++++++++++++---- 1 file changed, 168 insertions(+), 23 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 6398194075aa..558634624590 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -2,7 +2,7 @@ /* * OMAP Remote Processor driver * - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2011-2019 Texas Instruments Incorporated - http://www.ti.com/ * Copyright (C) 2011 Google, Inc. * * Ohad Ben-Cohen @@ -16,27 +16,53 @@ #include #include #include +#include #include #include #include #include #include - -#include +#include +#include +#include #include "omap_remoteproc.h" #include "remoteproc_internal.h" +/** + * struct omap_rproc_boot_data - boot data structure for the DSP omap rprocs + * @syscon: regmap handle for the system control configuration module + * @boot_reg: boot register offset within the @syscon regmap + */ +struct omap_rproc_boot_data { + struct regmap *syscon; + unsigned int boot_reg; +}; + /** * struct omap_rproc - omap remote processor state * @mbox: mailbox channel handle * @client: mailbox client to request the mailbox channel + * @boot_data: boot data structure for setting processor boot address * @rproc: rproc handle + * @reset: reset handle */ struct omap_rproc { struct mbox_chan *mbox; struct mbox_client client; + struct omap_rproc_boot_data *boot_data; struct rproc *rproc; + struct reset_control *reset; +}; + +/** + * struct omap_rproc_dev_data - device data for the omap remote processor + * @device_name: device name of the remote processor + * @has_bootreg: true if this remote processor has boot register + */ +struct omap_rproc_dev_data { + const char *device_name; + bool has_bootreg; }; /** @@ -92,6 +118,21 @@ static void omap_rproc_kick(struct rproc *rproc, int vqid) ret); } +/** + * omap_rproc_write_dsp_boot_addr - set boot address for a DSP remote processor + * @rproc: handle of a remote processor + * + * Set boot address for a supported DSP remote processor. + */ +static void omap_rproc_write_dsp_boot_addr(struct rproc *rproc) +{ + struct omap_rproc *oproc = rproc->priv; + struct omap_rproc_boot_data *bdata = oproc->boot_data; + u32 offset = bdata->boot_reg; + + regmap_write(bdata->syscon, offset, rproc->bootaddr); +} + /* * Power up the remote processor. * @@ -103,13 +144,11 @@ static int omap_rproc_start(struct rproc *rproc) { struct omap_rproc *oproc = rproc->priv; struct device *dev = rproc->dev.parent; - struct platform_device *pdev = to_platform_device(dev); - struct omap_rproc_pdata *pdata = pdev->dev.platform_data; int ret; struct mbox_client *client = &oproc->client; - if (pdata->set_bootaddr) - pdata->set_bootaddr(rproc->bootaddr); + if (oproc->boot_data) + omap_rproc_write_dsp_boot_addr(rproc); client->dev = dev; client->tx_done = NULL; @@ -117,7 +156,7 @@ static int omap_rproc_start(struct rproc *rproc) client->tx_block = false; client->knows_txdone = false; - oproc->mbox = omap_mbox_request_channel(client, pdata->mbox_name); + oproc->mbox = mbox_request_channel(client, 0); if (IS_ERR(oproc->mbox)) { ret = -EBUSY; dev_err(dev, "mbox_request_channel failed: %ld\n", @@ -138,11 +177,7 @@ static int omap_rproc_start(struct rproc *rproc) goto put_mbox; } - ret = pdata->device_enable(pdev); - if (ret) { - dev_err(dev, "omap_device_enable failed: %d\n", ret); - goto put_mbox; - } + reset_control_deassert(oproc->reset); return 0; @@ -154,15 +189,9 @@ static int omap_rproc_start(struct rproc *rproc) /* power off the remote processor */ static int omap_rproc_stop(struct rproc *rproc) { - struct device *dev = rproc->dev.parent; - struct platform_device *pdev = to_platform_device(dev); - struct omap_rproc_pdata *pdata = pdev->dev.platform_data; struct omap_rproc *oproc = rproc->priv; - int ret; - ret = pdata->device_shutdown(pdev); - if (ret) - return ret; + reset_control_assert(oproc->reset); mbox_free_channel(oproc->mbox); @@ -175,12 +204,122 @@ static const struct rproc_ops omap_rproc_ops = { .kick = omap_rproc_kick, }; +static const struct omap_rproc_dev_data omap4_dsp_dev_data = { + .device_name = "dsp", + .has_bootreg = true, +}; + +static const struct omap_rproc_dev_data omap4_ipu_dev_data = { + .device_name = "ipu", +}; + +static const struct omap_rproc_dev_data omap5_dsp_dev_data = { + .device_name = "dsp", + .has_bootreg = true, +}; + +static const struct omap_rproc_dev_data omap5_ipu_dev_data = { + .device_name = "ipu", +}; + +static const struct of_device_id omap_rproc_of_match[] = { + { + .compatible = "ti,omap4-dsp", + .data = &omap4_dsp_dev_data, + }, + { + .compatible = "ti,omap4-ipu", + .data = &omap4_ipu_dev_data, + }, + { + .compatible = "ti,omap5-dsp", + .data = &omap5_dsp_dev_data, + }, + { + .compatible = "ti,omap5-ipu", + .data = &omap5_ipu_dev_data, + }, + { + /* end */ + }, +}; +MODULE_DEVICE_TABLE(of, omap_rproc_of_match); + +static const char *omap_rproc_get_firmware(struct platform_device *pdev) +{ + const char *fw_name; + int ret; + + ret = of_property_read_string(pdev->dev.of_node, "firmware-name", + &fw_name); + if (ret) + return ERR_PTR(ret); + + return fw_name; +} + +static int omap_rproc_get_boot_data(struct platform_device *pdev, + struct rproc *rproc) +{ + struct device_node *np = pdev->dev.of_node; + struct omap_rproc *oproc = rproc->priv; + const struct omap_rproc_dev_data *data; + int ret; + + data = of_device_get_match_data(&pdev->dev); + if (!data) + return -ENODEV; + + if (!data->has_bootreg) + return 0; + + oproc->boot_data = devm_kzalloc(&pdev->dev, sizeof(*oproc->boot_data), + GFP_KERNEL); + if (!oproc->boot_data) + return -ENOMEM; + + if (!of_property_read_bool(np, "ti,bootreg")) { + dev_err(&pdev->dev, "ti,bootreg property is missing\n"); + return -EINVAL; + } + + oproc->boot_data->syscon = + syscon_regmap_lookup_by_phandle(np, "ti,bootreg"); + if (IS_ERR(oproc->boot_data->syscon)) { + ret = PTR_ERR(oproc->boot_data->syscon); + return ret; + } + + if (of_property_read_u32_index(np, "ti,bootreg", 1, + &oproc->boot_data->boot_reg)) { + dev_err(&pdev->dev, "couldn't get the boot register\n"); + return -EINVAL; + } + + return 0; +} + static int omap_rproc_probe(struct platform_device *pdev) { - struct omap_rproc_pdata *pdata = pdev->dev.platform_data; + struct device_node *np = pdev->dev.of_node; struct omap_rproc *oproc; struct rproc *rproc; + const char *firmware; int ret; + struct reset_control *reset; + + if (!np) { + dev_err(&pdev->dev, "only DT-based devices are supported\n"); + return -ENODEV; + } + + reset = devm_reset_control_array_get_optional_exclusive(&pdev->dev); + if (IS_ERR(reset)) + return PTR_ERR(reset); + + firmware = omap_rproc_get_firmware(pdev); + if (IS_ERR(firmware)) + return PTR_ERR(firmware); ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); if (ret) { @@ -188,16 +327,21 @@ static int omap_rproc_probe(struct platform_device *pdev) return ret; } - rproc = rproc_alloc(&pdev->dev, pdata->name, &omap_rproc_ops, - pdata->firmware, sizeof(*oproc)); + rproc = rproc_alloc(&pdev->dev, dev_name(&pdev->dev), &omap_rproc_ops, + firmware, sizeof(*oproc)); if (!rproc) return -ENOMEM; oproc = rproc->priv; oproc->rproc = rproc; + oproc->reset = reset; /* All existing OMAP IPU and DSP processors have an MMU */ rproc->has_iommu = true; + ret = omap_rproc_get_boot_data(pdev, rproc); + if (ret) + goto free_rproc; + platform_set_drvdata(pdev, rproc); ret = rproc_add(rproc); @@ -226,6 +370,7 @@ static struct platform_driver omap_rproc_driver = { .remove = omap_rproc_remove, .driver = { .name = "omap-rproc", + .of_match_table = omap_rproc_of_match, }, }; From patchwork Tue Nov 19 14:16:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 179746 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp697059ilf; Tue, 19 Nov 2019 06:17:12 -0800 (PST) X-Google-Smtp-Source: APXvYqytdXmRq9E2mjGrxfsaw+X90HBl+DVRzgUgSEgd9krXNenMncfDd61sb1akjVlFDA7D6Tp0 X-Received: by 2002:a2e:9bc3:: with SMTP id w3mr4251942ljj.94.1574173032176; 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[209.132.180.67]) by mx.google.com with ESMTP id ov27si13744486ejb.197.2019.11.19.06.17.12; Tue, 19 Nov 2019 06:17:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=QVZjfxW9; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727894AbfKSORI (ORCPT + 5 others); Tue, 19 Nov 2019 09:17:08 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:58498 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726682AbfKSORH (ORCPT ); Tue, 19 Nov 2019 09:17:07 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id xAJEH6q2117134; Tue, 19 Nov 2019 08:17:06 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1574173026; bh=Z0UZgul79dMd1dzpnJXaYuVp++fe7lVa0f6QkAu6WoM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=QVZjfxW9ULGfXKF8XF4tuXJ7b3Z0aJWH47Hpji8XU+dUKRDxVBsgSo3gk0BEvSUR+ 3o+mDxlyz++wxJ5AQyC7H3tPG+EldengTjAqMHg8QtTqu+JwKNtts/hXlVc9hPwPle VLmLvqNEWDXSmr+4zPOu8ruOoJi7IR+kIXroCnrY= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xAJEH6ws022581 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 19 Nov 2019 08:17:06 -0600 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 19 Nov 2019 08:17:05 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 19 Nov 2019 08:17:05 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xAJEGvYu027070; Tue, 19 Nov 2019 08:17:04 -0600 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCHv2 03/15] remoteproc/omap: Add a sanity check for DSP boot address alignment Date: Tue, 19 Nov 2019 16:16:33 +0200 Message-ID: <20191119141645.19777-4-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191119141645.19777-1-t-kristo@ti.com> References: <20191119141645.19777-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna The DSP remote processors on OMAP SoCs require a boot register to be programmed with a boot address, and this boot address needs to be on a 1KB boundary. The current code is simply masking the boot address appropriately without performing any sanity checks before releasing the resets. An unaligned boot address results in an undefined execution behavior and can result in various bus errors like MMU Faults or L3 NoC errors. Such errors are hard to debug and can be easily avoided by adding a sanity check for the alignment before booting a DSP remote processor. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Reviewed-by: Bjorn Andersson --- drivers/remoteproc/omap_remoteproc.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 558634624590..d80f5d7b5931 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -124,13 +124,22 @@ static void omap_rproc_kick(struct rproc *rproc, int vqid) * * Set boot address for a supported DSP remote processor. */ -static void omap_rproc_write_dsp_boot_addr(struct rproc *rproc) +static int omap_rproc_write_dsp_boot_addr(struct rproc *rproc) { + struct device *dev = rproc->dev.parent; struct omap_rproc *oproc = rproc->priv; struct omap_rproc_boot_data *bdata = oproc->boot_data; u32 offset = bdata->boot_reg; + if (rproc->bootaddr & (SZ_1K - 1)) { + dev_err(dev, "invalid boot address 0x%x, must be aligned on a 1KB boundary\n", + rproc->bootaddr); + return -EINVAL; + } + regmap_write(bdata->syscon, offset, rproc->bootaddr); + + return 0; } /* @@ -147,8 +156,11 @@ static int omap_rproc_start(struct rproc *rproc) int ret; struct mbox_client *client = &oproc->client; - if (oproc->boot_data) - omap_rproc_write_dsp_boot_addr(rproc); + if (oproc->boot_data) { + ret = omap_rproc_write_dsp_boot_addr(rproc); + if (ret) + return ret; + } client->dev = dev; client->tx_done = NULL; From patchwork Tue Nov 19 14:16:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 179747 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp697100ilf; Tue, 19 Nov 2019 06:17:13 -0800 (PST) X-Google-Smtp-Source: APXvYqxk6buErtPEAOFlC53WB354R9TIdDhMjH0WGxR+zIL2ZZPsm39qw6wMcKo8JVxwZzkcsG0H X-Received: by 2002:a17:906:5c4d:: with SMTP id c13mr31544560ejr.80.1574173033839; Tue, 19 Nov 2019 06:17:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574173033; cv=none; d=google.com; s=arc-20160816; b=vmGf391DdTwLgHYEYfiIlAn/e6DCTtP3m8TLTX3vBuo9wMBAnGKdsOxVwudnGq3RbN 5Jymt9GKTgBL11Zb4+fJDRrxqGg1nAjKFqWYHoFecL56RnFJp3Xc3MMUIpe/iT/0KoDA ThvTAp8Q6Ma9rrZaAuF1xHBcfO/Kgx/WgoOTd70+YM3ZjAXuonRrOtAii2NsGuSijHAu L0tSbeajCOFnBqM238IwxsU6gcas2DmOOv7+qqvlgbVYcaOdGmvkt9iby3XmRJz3Rfo1 hqyW9pxh4MBAELOwZe5akoO7vH80NBGW/HOoi/Gdq0QTOxnDWBxEM6VvfznH6Hiv0A1S oLUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=gzN+csH+cNpDlcV0eI0tAQ132xROOJb6F8eGF7m8GSg=; b=wh0eltZtax4ig9OaCYrtGizwtrxlQnGWUISfUlsW+7SYCAVjC2axB3z5cSkPuXfAj+ 6mDoZS1XyHP8U7E8MN0+5JnDNIjUYvBEoi1b3c/GlxWx25EHHoyzfJ5UYTwQcwbxTqGM XUg8dpMb5+zoN6MtQHi016PR07tGowHSJVXGIXdAgSLN1v2QUc5PhyC+5lP8+eqhS1h6 GiuiHGGScpIx1kpyQRxPW0HO662sf57S2i9Tv9LfvOIpXOAiN3i+pY3IuEqiFjVcDCRE oT6CizS9VzDC7FICWMIb27ONTt06AhhJow3V60KShwf7ag6+N/UlOuoiqFDGrGM1lxLQ Vb1g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=CpP9mdpJ; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ov27si13744486ejb.197.2019.11.19.06.17.13; Tue, 19 Nov 2019 06:17:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=CpP9mdpJ; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728014AbfKSORK (ORCPT + 5 others); Tue, 19 Nov 2019 09:17:10 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:58514 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727991AbfKSORK (ORCPT ); Tue, 19 Nov 2019 09:17:10 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id xAJEH91c117164; Tue, 19 Nov 2019 08:17:09 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1574173029; bh=gzN+csH+cNpDlcV0eI0tAQ132xROOJb6F8eGF7m8GSg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=CpP9mdpJG8tWHq3zEtO/Doo41lf62UO3+wgSDOYYYAW4u6cVBJXKGUstDcZgLTkDR 2nIrAKjOIMdRHjX7rhJQuJjDBIMTjkYlI+14t5fD7kX0mPNiZgh/tcksWFCGhqyO6I hSImooPRZPJJcRlJD2RT0ReRZiPLNJ2tKMbqG8WM= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id xAJEH9D5083879; Tue, 19 Nov 2019 08:17:09 -0600 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 19 Nov 2019 08:17:08 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 19 Nov 2019 08:17:08 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xAJEGvYv027070; Tue, 19 Nov 2019 08:17:06 -0600 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCHv2 04/15] remoteproc/omap: Add support to parse internal memories from DT Date: Tue, 19 Nov 2019 16:16:34 +0200 Message-ID: <20191119141645.19777-5-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191119141645.19777-1-t-kristo@ti.com> References: <20191119141645.19777-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna The OMAP remoteproc driver has been enhanced to parse and store the kernel mappings for different internal RAM memories that may be present within each remote processor IP subsystem. Different devices have varying memories present on current SoCs. The current support handles the L2RAM for all IPU devices on OMAP4+ SoCs. The DSPs on OMAP4/OMAP5 only have Unicaches and do not have any L1 or L2 RAM memories. IPUs are expected to have the L2RAM at a fixed device address of 0x20000000, based on the current limitations on Attribute MMU configurations. NOTE: The current logic doesn't handle the parsing of memories for DRA7 remoteproc devices, and will be added alongside the DRA7 support. Signed-off-by: Suman Anna [t-kristo: converted to parse mem names / device addresses from pdata] Signed-off-by: Tero Kristo --- v2: - add remote proc memory info under pdata, rather than doing extensive OF compatible checks in code drivers/remoteproc/omap_remoteproc.c | 86 ++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index d80f5d7b5931..844703507a74 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -39,11 +39,27 @@ struct omap_rproc_boot_data { unsigned int boot_reg; }; +/* + * struct omap_rproc_mem - internal memory structure + * @cpu_addr: MPU virtual address of the memory region + * @bus_addr: bus address used to access the memory region + * @dev_addr: device address of the memory region from DSP view + * @size: size of the memory region + */ +struct omap_rproc_mem { + void __iomem *cpu_addr; + phys_addr_t bus_addr; + u32 dev_addr; + size_t size; +}; + /** * struct omap_rproc - omap remote processor state * @mbox: mailbox channel handle * @client: mailbox client to request the mailbox channel * @boot_data: boot data structure for setting processor boot address + * @mem: internal memory regions data + * @num_mems: number of internal memory regions * @rproc: rproc handle * @reset: reset handle */ @@ -51,6 +67,8 @@ struct omap_rproc { struct mbox_chan *mbox; struct mbox_client client; struct omap_rproc_boot_data *boot_data; + struct omap_rproc_mem *mem; + int num_mems; struct rproc *rproc; struct reset_control *reset; }; @@ -59,10 +77,14 @@ struct omap_rproc { * struct omap_rproc_dev_data - device data for the omap remote processor * @device_name: device name of the remote processor * @has_bootreg: true if this remote processor has boot register + * @mem_names: memory names for this remote processor + * @dev_addrs: device addresses corresponding to the memory names */ struct omap_rproc_dev_data { const char *device_name; bool has_bootreg; + const char * const *mem_names; + const u32 *dev_addrs; }; /** @@ -216,6 +238,14 @@ static const struct rproc_ops omap_rproc_ops = { .kick = omap_rproc_kick, }; +static const char * const ipu_mem_names[] = { + "l2ram", NULL +}; + +static const u32 ipu_dev_addrs[] = { + 0x20000000, +}; + static const struct omap_rproc_dev_data omap4_dsp_dev_data = { .device_name = "dsp", .has_bootreg = true, @@ -223,6 +253,8 @@ static const struct omap_rproc_dev_data omap4_dsp_dev_data = { static const struct omap_rproc_dev_data omap4_ipu_dev_data = { .device_name = "ipu", + .mem_names = ipu_mem_names, + .dev_addrs = ipu_dev_addrs, }; static const struct omap_rproc_dev_data omap5_dsp_dev_data = { @@ -232,6 +264,8 @@ static const struct omap_rproc_dev_data omap5_dsp_dev_data = { static const struct omap_rproc_dev_data omap5_ipu_dev_data = { .device_name = "ipu", + .mem_names = ipu_mem_names, + .dev_addrs = ipu_dev_addrs, }; static const struct of_device_id omap_rproc_of_match[] = { @@ -311,6 +345,54 @@ static int omap_rproc_get_boot_data(struct platform_device *pdev, return 0; } +static int omap_rproc_of_get_internal_memories(struct platform_device *pdev, + struct rproc *rproc) +{ + struct omap_rproc *oproc = rproc->priv; + struct device *dev = &pdev->dev; + const struct omap_rproc_dev_data *data; + struct resource *res; + int num_mems; + int i; + + data = of_device_get_match_data(&pdev->dev); + if (!data) + return -ENODEV; + + if (!data->mem_names) + return 0; + + for (num_mems = 0; data->mem_names[num_mems]; num_mems++) + ; + + oproc->mem = devm_kcalloc(dev, num_mems, sizeof(*oproc->mem), + GFP_KERNEL); + if (!oproc->mem) + return -ENOMEM; + + for (i = 0; i < num_mems; i++) { + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + data->mem_names[i]); + oproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res); + if (IS_ERR(oproc->mem[i].cpu_addr)) { + dev_err(dev, "failed to parse and map %s memory\n", + data->mem_names[i]); + return PTR_ERR(oproc->mem[i].cpu_addr); + } + oproc->mem[i].bus_addr = res->start; + oproc->mem[i].dev_addr = data->dev_addrs[i]; + oproc->mem[i].size = resource_size(res); + + dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %p da 0x%x\n", + data->mem_names[i], &oproc->mem[i].bus_addr, + oproc->mem[i].size, oproc->mem[i].cpu_addr, + oproc->mem[i].dev_addr); + } + oproc->num_mems = num_mems; + + return 0; +} + static int omap_rproc_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -350,6 +432,10 @@ static int omap_rproc_probe(struct platform_device *pdev) /* All existing OMAP IPU and DSP processors have an MMU */ rproc->has_iommu = true; + ret = omap_rproc_of_get_internal_memories(pdev, rproc); + if (ret) + goto free_rproc; + ret = omap_rproc_get_boot_data(pdev, rproc); if (ret) goto free_rproc; From patchwork Tue Nov 19 14:16:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 179749 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp697134ilf; Tue, 19 Nov 2019 06:17:15 -0800 (PST) X-Google-Smtp-Source: APXvYqwbtzqFtKZSUjSXgkRNQ3vWZ6Jz29d9P6EEWNig8JrA8Cm/6YV005XVZdAyTq48CenUr/ix X-Received: by 2002:a17:906:404d:: with SMTP id y13mr36190586ejj.276.1574173035419; Tue, 19 Nov 2019 06:17:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574173035; cv=none; d=google.com; s=arc-20160816; b=RrFU8rcls89NpHfJLcX7GmZmgKXzabOcdf6qnQdJmHb+gJ/Fij318aYxIuPlsH78X8 aaX1EL9xpR+KefMKHKV0cQl2ch+aZ44ThyJai2pCw3CPG1RmlMA1XuR5czvwLEIyMEYh sgrPF1ENEuEDbFVQk589VOhJ+M2eoTahMcEzz3XHdiNpV7VW2wFLEnfF8zFdUSTPeMrm I8GadmvR9TDUcvnJ18b28GkG5AhxC7QvmQeZC+MM4VOZ36UOinR/csm4U1aJNszgak4v +C/qT1RAEDouci4l8qlMT/Xxej3Z0ksD3r8FuM3CQvCHC4bB8i0Snga79IrsTUuKrKjJ 8T8A== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id ov27si13744486ejb.197.2019.11.19.06.17.15; Tue, 19 Nov 2019 06:17:15 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=qtprrkhC; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728068AbfKSORN (ORCPT + 5 others); Tue, 19 Nov 2019 09:17:13 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:58518 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728040AbfKSORM (ORCPT ); Tue, 19 Nov 2019 09:17:12 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id xAJEHBGI117175; Tue, 19 Nov 2019 08:17:11 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1574173031; bh=/riSbTGFb04QZzBqTbkVcs7lENw6NXmNR+s7C5cYK1I=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=qtprrkhC8/zt7ANCSvodvCu90HnCNmDrBBFBCu9SxgrvainVvEpqW3KKbhHviFneD L+3UT28wGwp9UewgWgGHWQOTV+y8c0XQtsYvzLPascLwg02B7QgLrzyQdv1WsBasGU gcYqUe5EGVlaNsPiPmIh8nb2JYgDf5mKDDGFvDAU= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xAJEHBq7022649 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 19 Nov 2019 08:17:11 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 19 Nov 2019 08:17:10 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 19 Nov 2019 08:17:10 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xAJEGvYw027070; Tue, 19 Nov 2019 08:17:08 -0600 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCHv2 05/15] remoteproc/omap: Add the rproc ops .da_to_va() implementation Date: Tue, 19 Nov 2019 16:16:35 +0200 Message-ID: <20191119141645.19777-6-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191119141645.19777-1-t-kristo@ti.com> References: <20191119141645.19777-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna An implementation for the rproc ops .da_to_va() has been added that provides the address translation between device addresses to kernel virtual addresses for internal RAMs present on that particular remote processor device. The implementation provides the translations based on the addresses parsed and stored during the probe. This ops gets invoked by the exported rproc_da_to_va() function and allows the remoteproc core's ELF loader to be able to load program data directly into the internal memories. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- v2: - minor cleanups of code, fixed kerneldoc comments drivers/remoteproc/omap_remoteproc.c | 39 ++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 844703507a74..28f14e24b389 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -232,10 +232,49 @@ static int omap_rproc_stop(struct rproc *rproc) return 0; } +/** + * omap_rproc_da_to_va() - internal memory translation helper + * @rproc: remote processor to apply the address translation for + * @da: device address to translate + * @len: length of the memory buffer + * + * Custom function implementing the rproc .da_to_va ops to provide address + * translation (device address to kernel virtual address) for internal RAMs + * present in a DSP or IPU device). The translated addresses can be used + * either by the remoteproc core for loading, or by any rpmsg bus drivers. + * Returns the translated virtual address in kernel memory space, or NULL + * in failure. + */ +static void *omap_rproc_da_to_va(struct rproc *rproc, u64 da, int len) +{ + struct omap_rproc *oproc = rproc->priv; + int i; + u32 offset; + + if (len <= 0) + return NULL; + + if (!oproc->num_mems) + return NULL; + + for (i = 0; i < oproc->num_mems; i++) { + if (da >= oproc->mem[i].dev_addr && da + len <= + oproc->mem[i].dev_addr + oproc->mem[i].size) { + offset = da - oproc->mem[i].dev_addr; + /* __force to make sparse happy with type conversion */ + return (__force void *)(oproc->mem[i].cpu_addr + + offset); + } + } + + return NULL; +} + static const struct rproc_ops omap_rproc_ops = { .start = omap_rproc_start, .stop = omap_rproc_stop, .kick = omap_rproc_kick, + .da_to_va = omap_rproc_da_to_va, }; static const char * const ipu_mem_names[] = { From patchwork Tue Nov 19 14:16:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 179759 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp698393ilf; Tue, 19 Nov 2019 06:18:09 -0800 (PST) X-Google-Smtp-Source: APXvYqwnRivpAq34GqaVcphIk7QTFasqnUXBFakUCg71e5pRSVjV534U3pKFVVqixHKOmCsoidH8 X-Received: by 2002:a7b:c10e:: with SMTP id w14mr6246773wmi.40.1574173089212; Tue, 19 Nov 2019 06:18:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574173089; cv=none; d=google.com; s=arc-20160816; b=IdVlf2khY+fT/2d9DITd3XwM9Z9jok/bl7YfVMHIsic+yNPh7Uv37YOthPKipHEv1I 6HzLklEyPl5iAKiUSjrpLfjnx/xy8j+IkoNMm7nHmVq5LDVjHrccRynChacHz5CV3Dr5 inuQmaTiPUtIQGE0+W8Pt3jj8gebBaDU4NS+8OJIPMSQ+TrIl96lUvAh69sS8vD1thYR mLcLp0eSpxhTWJUHxJc28E9F6xFlXHdUMLKxiAFUeq+QFaCdJxAJkPrsVuuwnRZdNrA9 4RIdmESDZscyCogPCqw1hVXP+UZBTy2GIND2oTO4gD+1SuGMek0jwWxIAs98WNPiyI3e i6kw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=N8L22jtFlFM+1lmOBiRwEbibBb0hxH7QgTw5pjPN5G8=; b=kDCEj3TqJiA+4Qf1hHEyKEVm3mYV29Vz841f/mUPN8TfDmPM9DZC/98r6MlP/77t+H 4DSyZ1e2PcHz/tsC9c/fp17ROAUcjenw9i476cxuwt22dBEz2M6lz9NOv8CXCLEMvcHM x9ZEHH6r0KPV2dl2kgRiYFh86XOZmr6uOJWTl6wXbhoGjfg6Pdaj9xQPaVL0zXhUjcr9 YfXlrlt9ZA8jNCgqMmT7IxFyaUtvodrztSHsIYG2Qp5WOme3BU0gwQgBhcaq/b7sG+RR UxHUrr5dfhKyZjlxdvRqI5WwsO52eDjOF/UxwBbqxyjcgl8bDZ5rwHZvhG6M4dUhYT9p 28eA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=P3AMXFHF; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s38si14876719edd.351.2019.11.19.06.18.08; Tue, 19 Nov 2019 06:18:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=P3AMXFHF; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728122AbfKSOSH (ORCPT + 5 others); Tue, 19 Nov 2019 09:18:07 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:39804 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728157AbfKSORT (ORCPT ); Tue, 19 Nov 2019 09:17:19 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id xAJEHIVI077203; Tue, 19 Nov 2019 08:17:18 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1574173038; bh=N8L22jtFlFM+1lmOBiRwEbibBb0hxH7QgTw5pjPN5G8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=P3AMXFHFFYnir0L7P/DNWptI3S1+ppg/gKipimsIuCYFAZD+HPxOYlHKOgEGNatdp h/eTsbMBPWgaM3dJyN80Tqq+u+pXsR95tTUVMEbnBELFl8f7+7Gj/xQQKyLhnjHEgu CmaXVL3g4ZvsU2lw3t06wQ+G2KvEmA0qiVgyMoc0= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xAJEHIvX054002 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 19 Nov 2019 08:17:18 -0600 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 19 Nov 2019 08:17:18 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 19 Nov 2019 08:17:18 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xAJEGvZ2027070; Tue, 19 Nov 2019 08:17:16 -0600 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCHv2 09/15] remoteproc/omap: Remove the omap_rproc_reserve_cma declaration Date: Tue, 19 Nov 2019 16:16:39 +0200 Message-ID: <20191119141645.19777-10-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191119141645.19777-1-t-kristo@ti.com> References: <20191119141645.19777-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna The omap_rproc_reserve_cma() function is not defined at the moment. This prototype was to be used to define a function to declare a remoteproc device-specific CMA pool. The remoteproc devices will be defined through DT going forward. A device specific CMA pool will be defined under the reserved-memory node, and will be associated with the appropriate remoteproc device node. This function prototype will no longer be needed and has therefore been cleaned up. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Reviewed-by: Bjorn Andersson --- include/linux/platform_data/remoteproc-omap.h | 12 ------------ 1 file changed, 12 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/include/linux/platform_data/remoteproc-omap.h b/include/linux/platform_data/remoteproc-omap.h index 6bea01e199fe..49c78805916f 100644 --- a/include/linux/platform_data/remoteproc-omap.h +++ b/include/linux/platform_data/remoteproc-omap.h @@ -21,16 +21,4 @@ struct omap_rproc_pdata { int (*device_shutdown)(struct platform_device *pdev); }; -#if defined(CONFIG_OMAP_REMOTEPROC) || defined(CONFIG_OMAP_REMOTEPROC_MODULE) - -void __init omap_rproc_reserve_cma(void); - -#else - -static inline void __init omap_rproc_reserve_cma(void) -{ -} - -#endif - #endif /* _PLAT_REMOTEPROC_H */ From patchwork Tue Nov 19 14:16:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 179756 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp697864ilf; Tue, 19 Nov 2019 06:17:48 -0800 (PST) X-Google-Smtp-Source: APXvYqwuxVbJjvmUQHm0D015SGSx/kQnFjfKUjvWWL0o9I5fBJ6nP8jfQXU/05hlKp2e/CR4tHpG X-Received: by 2002:a17:906:2615:: with SMTP id h21mr35673778ejc.212.1574173068558; Tue, 19 Nov 2019 06:17:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574173068; cv=none; d=google.com; s=arc-20160816; b=UwymfPcnsoe9INnxXtRfYUPnP8q8XAaGEZ4LqLJ7azlqVo70ephcq2ni6JySqq6akj riHq7uO28Q3DpQ1TMvj8SvRkhqgaAP/fEbc7d/nMTUzsBwrNm/YsHC93F6PvPtuJFyy8 tBRA0LWY3ZeLaLLoESa+nBj34LY/tpBJ0rioBm0s78zP83RR4Yzwz/NkI/LCZvL9w/OX JjAF8zOwd+6K0kfn2cms8DoaIjwXkFQkzINuxCC1lKG+qB+/DALa59vuBiQqDes6XeXB eXYnXFsdR7U4MB53Vw+J57TrqI/u4FLJrKCAlYKj0sNz5NE8KYXmyTRP/ffkKhKkJ8in pAFg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=xBV3M3vnwtt6F0EDSEVXe8547Gb8axeNK9DVBJQ1Cnw=; b=f7EggflGU3QB4dhmVBqyoGx6CgM+hyLIBby6GkcVif+4KyHOwwZkDoaBu7+5RM8tYz 1MKC6h8ePue/Z31lcG0/qEty7PSIbDd7/NAvhtkuxseEaMLEFOcxa0M8hZYNDyuxMbpB OkurApkMtlGMgL8E31Do5sp9uxparPmxShZbCkrPeB08qBipcbnbze3lWVJ1/ZDC6jp5 n9pm1sGf/Yy7/NbFcY6A3cgLbP2awn1ZHD4YWAV2/LqCqtSJcdUoLD8OhYq0/5YQmtMe rDnG6+BBknuxcJ5tzoXu0PPg7OKhZDl4po3jKSpRWl8n9vLIB23y9UWnyKNfP/gGFeVt ifFg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=RI4qJIgz; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i13si13215840ejj.367.2019.11.19.06.17.48; Tue, 19 Nov 2019 06:17:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=RI4qJIgz; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728256AbfKSORq (ORCPT + 5 others); Tue, 19 Nov 2019 09:17:46 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:47376 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728181AbfKSOR1 (ORCPT ); Tue, 19 Nov 2019 09:17:27 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id xAJEHQ0u128393; Tue, 19 Nov 2019 08:17:26 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1574173046; bh=xBV3M3vnwtt6F0EDSEVXe8547Gb8axeNK9DVBJQ1Cnw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=RI4qJIgzqAsU+RYecQiNuPCvlsBb7oOVLIJZ2/fzRiUvmR9yOlzhc4z+z63pBtIpP qfSpeO8Ct0ZYhwc3omnoxiwXHm9vGmH6R+sB306z4bCjDN3jvObVaRgdd2lgbQLNAT qWXL8LCAFMbt2ybqu8NA6DT747P3+dqfIQuUUjeg= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xAJEHQU5054175 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 19 Nov 2019 08:17:26 -0600 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 19 Nov 2019 08:17:22 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 19 Nov 2019 08:17:22 -0600 Received: from sokoban.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xAJEGvZ4027070; Tue, 19 Nov 2019 08:17:20 -0600 From: Tero Kristo To: , , CC: , , , Tero Kristo Subject: [PATCHv2 11/15] remoteproc/omap: Request a timer(s) for remoteproc usage Date: Tue, 19 Nov 2019 16:16:41 +0200 Message-ID: <20191119141645.19777-12-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191119141645.19777-1-t-kristo@ti.com> References: <20191119141645.19777-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna The remote processors in OMAP4+ SoCs are equipped with internal timers, like the internal SysTick timer in a Cortex M3/M4 NVIC or the CTM timer within Unicache in IPU & DSP. However, these timers are gated when the processor subsystem clock is gated, making them rather difficult to use as OS tick sources. They will not be able to wakeup the processor from any processor-sleep induced clock-gating states. This can be avoided by using an external timer as the tick source, which can be controlled independently by the OMAP remoteproc driver code, but still allowing the processor subsystem clock to be auto-gated when the remoteproc cores are idle. This patch adds the support for OMAP remote processors to request timer(s) to be used by the remoteproc. The timers are enabled and disabled in line with the enabling/disabling of the remoteproc. The timer data is not mandatory if the advanced device management features are not required. The core timer functionality is provided by the OMAP DMTimer clocksource driver, which does not export any API. The logic is implemented through the timer device's platform data ops. The OMAP remoteproc driver mainly requires ops to request/free a dmtimer, and to start/stop a timer. The split ops helps in controlling the timer state without having to request and release a timer everytime it needs to use the timer. NOTE: If the gptimer is already in use by the time IPU and/or DSP are loaded, the processors will fail to boot. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo --- v2: - converted to use dev_err instead of pr_err - changed to use of_count_phandle_with_args - converted to use ti,timers property drivers/remoteproc/omap_remoteproc.c | 258 +++++++++++++++++++++++++++ 1 file changed, 258 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 62734eaafaad..287d0856f4ba 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -26,6 +26,9 @@ #include #include #include +#include + +#include #include "omap_remoteproc.h" #include "remoteproc_internal.h" @@ -58,6 +61,16 @@ struct omap_rproc_mem { size_t size; }; +/** + * struct omap_rproc_timer - data structure for a timer used by a omap rproc + * @odt: timer pointer + * @timer_ops: OMAP dmtimer ops for @odt timer + */ +struct omap_rproc_timer { + struct omap_dm_timer *odt; + const struct omap_dm_timer_ops *timer_ops; +}; + /** * struct omap_rproc - omap remote processor state * @mbox: mailbox channel handle @@ -65,6 +78,8 @@ struct omap_rproc_mem { * @boot_data: boot data structure for setting processor boot address * @mem: internal memory regions data * @num_mems: number of internal memory regions + * @num_timers: number of rproc timer(s) + * @timers: timer(s) info used by rproc * @rproc: rproc handle * @reset: reset handle */ @@ -74,6 +89,8 @@ struct omap_rproc { struct omap_rproc_boot_data *boot_data; struct omap_rproc_mem *mem; int num_mems; + int num_timers; + struct omap_rproc_timer *timers; struct rproc *rproc; struct reset_control *reset; }; @@ -94,6 +111,213 @@ struct omap_rproc_dev_data { const u32 *dev_addrs; }; +/** + * omap_rproc_request_timer() - request a timer for a remoteproc + * @dev: device requesting the timer + * @np: device node pointer to the desired timer + * @timer: handle to a struct omap_rproc_timer to return the timer handle + * + * This helper function is used primarily to request a timer associated with + * a remoteproc. The returned handle is stored in the .odt field of the + * @timer structure passed in, and is used to invoke other timer specific + * ops (like starting a timer either during device initialization or during + * a resume operation, or for stopping/freeing a timer). + * + * Returns 0 on success, otherwise an appropriate failure + */ +static int omap_rproc_request_timer(struct device *dev, struct device_node *np, + struct omap_rproc_timer *timer) +{ + int ret; + + timer->odt = timer->timer_ops->request_by_node(np); + if (!timer->odt) { + dev_err(dev, "request for timer node %p failed\n", np); + return -EBUSY; + } + + ret = timer->timer_ops->set_source(timer->odt, OMAP_TIMER_SRC_SYS_CLK); + if (ret) { + dev_err(dev, "error setting OMAP_TIMER_SRC_SYS_CLK as source for timer node %p\n", + np); + timer->timer_ops->free(timer->odt); + return ret; + } + + /* clean counter, remoteproc code will set the value */ + timer->timer_ops->set_load(timer->odt, 0, 0); + + return 0; +} + +/** + * omap_rproc_start_timer - start a timer for a remoteproc + * @timer: handle to a OMAP rproc timer + * + * This helper function is used to start a timer associated with a remoteproc, + * obtained using the request_timer ops. The helper function needs to be + * invoked by the driver to start the timer (during device initialization) + * or to just resume the timer. + * + * Returns 0 on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_start_timer(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->start(timer->odt); +} + +/** + * omap_rproc_stop_timer - stop a timer for a remoteproc + * @timer: handle to a OMAP rproc timer + * + * This helper function is used to disable a timer associated with a + * remoteproc, and needs to be called either during a device shutdown + * or suspend operation. The separate helper function allows the driver + * to just stop a timer without having to release the timer during a + * suspend operation. + * + * Returns 0 on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_stop_timer(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->stop(timer->odt); +} + +/** + * omap_rproc_release_timer - release a timer for a remoteproc + * @timer: handle to a OMAP rproc timer + * + * This helper function is used primarily to release a timer associated + * with a remoteproc. The dmtimer will be available for other clients to + * use once released. + * + * Returns 0 on success, otherwise a failure as returned by DMTimer ops + */ +static inline int omap_rproc_release_timer(struct omap_rproc_timer *timer) +{ + return timer->timer_ops->free(timer->odt); +} + +/** + * omap_rproc_enable_timers - enable the timers for a remoteproc + * @rproc: handle of a remote processor + * @configure: boolean flag used to acquire and configure the timer handle + * + * This function is used primarily to enable the timers associated with + * a remoteproc. The configure flag is provided to allow the driver to + * to either acquire and start a timer (during device initialization) or + * to just start a timer (during a resume operation). + */ +static int omap_rproc_enable_timers(struct rproc *rproc, bool configure) +{ + int i; + int ret = 0; + struct platform_device *tpdev; + struct dmtimer_platform_data *tpdata; + const struct omap_dm_timer_ops *timer_ops; + struct omap_rproc *oproc = rproc->priv; + struct omap_rproc_timer *timers = oproc->timers; + struct device *dev = rproc->dev.parent; + struct device_node *np = NULL; + + if (oproc->num_timers <= 0) + return 0; + + if (!configure) + goto start_timers; + + for (i = 0; i < oproc->num_timers; i++) { + np = of_parse_phandle(dev->of_node, "ti,timers", i); + if (!np) { + ret = -ENXIO; + dev_err(dev, "device node lookup for timer at index %d failed: %d\n", + i, ret); + goto free_timers; + } + + tpdev = of_find_device_by_node(np); + if (!tpdev) { + ret = -ENODEV; + dev_err(dev, "could not get timer platform device\n"); + goto put_node; + } + + tpdata = dev_get_platdata(&tpdev->dev); + put_device(&tpdev->dev); + if (!tpdata) { + ret = -EINVAL; + dev_err(dev, "dmtimer pdata structure NULL\n"); + goto put_node; + } + + timer_ops = tpdata->timer_ops; + if (!timer_ops || !timer_ops->request_by_node || + !timer_ops->set_source || !timer_ops->set_load || + !timer_ops->free || !timer_ops->start || + !timer_ops->stop) { + ret = -EINVAL; + dev_err(dev, "device does not have required timer ops\n"); + goto put_node; + } + + timers[i].timer_ops = timer_ops; + ret = omap_rproc_request_timer(dev, np, &timers[i]); + if (ret) { + dev_err(dev, "request for timer %p failed: %d\n", np, + ret); + goto put_node; + } + of_node_put(np); + } + +start_timers: + for (i = 0; i < oproc->num_timers; i++) + omap_rproc_start_timer(&timers[i]); + return 0; + +put_node: + of_node_put(np); +free_timers: + while (i--) { + omap_rproc_release_timer(&timers[i]); + timers[i].odt = NULL; + timers[i].timer_ops = NULL; + } + + return ret; +} + +/** + * omap_rproc_disable_timers - disable the timers for a remoteproc + * @rproc: handle of a remote processor + * @configure: boolean flag used to release the timer handle + * + * This function is used primarily to disable the timers associated with + * a remoteproc. The configure flag is provided to allow the driver to + * to either stop and release a timer (during device shutdown) or to just + * stop a timer (during a suspend operation). + */ +static int omap_rproc_disable_timers(struct rproc *rproc, bool configure) +{ + int i; + struct omap_rproc *oproc = rproc->priv; + struct omap_rproc_timer *timers = oproc->timers; + + if (oproc->num_timers <= 0) + return 0; + + for (i = 0; i < oproc->num_timers; i++) { + omap_rproc_stop_timer(&timers[i]); + if (configure) { + omap_rproc_release_timer(&timers[i]); + timers[i].odt = NULL; + timers[i].timer_ops = NULL; + } + } + + return 0; +} + /** * omap_rproc_mbox_callback() - inbound mailbox message handler * @client: mailbox client pointer used for requesting the mailbox channel @@ -229,6 +453,12 @@ static int omap_rproc_start(struct rproc *rproc) goto put_mbox; } + ret = omap_rproc_enable_timers(rproc, true); + if (ret) { + dev_err(dev, "omap_rproc_enable_timers failed: %d\n", ret); + goto put_mbox; + } + reset_control_deassert(oproc->reset); return 0; @@ -242,9 +472,14 @@ static int omap_rproc_start(struct rproc *rproc) static int omap_rproc_stop(struct rproc *rproc) { struct omap_rproc *oproc = rproc->priv; + int ret; reset_control_assert(oproc->reset); + ret = omap_rproc_disable_timers(rproc, true); + if (ret) + return ret; + mbox_free_channel(oproc->mbox); return 0; @@ -529,6 +764,29 @@ static int omap_rproc_probe(struct platform_device *pdev) if (ret) goto free_rproc; + /* + * Timer nodes are directly used in client nodes as phandles, so + * retrieve the count using appropriate size + */ + oproc->num_timers = of_count_phandle_with_args(np, "ti,timers", NULL); + if (oproc->num_timers <= 0) { + dev_dbg(&pdev->dev, "device does not have timers, status = %d\n", + oproc->num_timers); + oproc->num_timers = 0; + } + + if (oproc->num_timers) { + oproc->timers = devm_kzalloc(&pdev->dev, sizeof(*oproc->timers) + * oproc->num_timers, GFP_KERNEL); + if (!oproc->timers) { + ret = -ENOMEM; + goto free_rproc; + } + + dev_dbg(&pdev->dev, "device has %d tick timers\n", + oproc->num_timers); + } + ret = of_reserved_mem_device_init(&pdev->dev); if (ret) { dev_err(&pdev->dev, "device does not have specific CMA pool\n");