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Tue, 10 Sep 2024 02:20:28 -0700 (PDT) From: Neil Armstrong Date: Tue, 10 Sep 2024 11:20:18 +0200 Subject: [PATCH 01/13] ufs: allocate descriptors with size aligned with DMA_MINALIGN MIME-Version: 1.0 Message-Id: <20240910-topic-ufs-enhancements-v1-1-3ee0bffacc64@linaro.org> References: <20240910-topic-ufs-enhancements-v1-0-3ee0bffacc64@linaro.org> In-Reply-To: <20240910-topic-ufs-enhancements-v1-0-3ee0bffacc64@linaro.org> To: Tom Rini , Bhupesh Sharma , Neha Malcom Francis Cc: u-boot@lists.denx.de, u-boot-qcom@groups.io, Neil Armstrong X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1349; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=ZHS2jy/EiG6hVskbTeagCeI2IfA8YWfz33iJ6L6mEhs=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBm4A9W+13nYUZOgKbKnDZBdG3CNOrFO2d/WPHOz900 UrTEM5KJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZuAPVgAKCRB33NvayMhJ0cleEA CuGrlxaP+IMpUuTe3DFqooewrSRYv0JzdvigwWr1h0mmdZI9K2kZns2vCxa/ig8ZCvb+kpF9h7CpdR 6dlwWKi5uWK27KvAGWof7VU96gEDHOKlv/AD4wEYG9kOwsSn/rT8H+QnB3ODqT1suHUlqzykK0NPQr eHbI56TAB1ms8vguBraQWhDD2J8X6dYb2DIuPapWCSzC5555qtsjBItHgeM1FwbivpcGEFvvR09QhN /xqI+1mzUaczSxDvQUx3z1LCst8POhlRo5asdDuOWPepIw+kRnIm3e1Qx6IA7phdshTDBjfWVadmwr i0dXwngfzuD78Cn+WVrC5iyAEwo5sL9AHfq5xfuFhNeQzUY3Uv9eAZ0l4ICC6yRJhdQXC0y22nv9ZM BUBJyTMjGdXIkgK3lQS61plEFibVvPM+TSBVO57o8ZAsixl+zeoI8Njb6CtUuFv+YJzKdFNo6f8k0L HqRe/ynwA8SuM1BMykqFxTYbyzxLpALPkVk2hQvPbjNpQAezVfJR7SdPlkNkbDcTHyTfdHV9ioKuH8 6s+troki6LqagvUazf2FFlPYNRr/qnb3hlYkmZfxfvEkqkL4ta2qmw3disosghIF1anS5kiGz/eA74 QcpelNn3b9trouqWPYOTfOX3hD0LQoW4P6lps2HC+J5k7/ZBW5mhSkEmJBMA== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Align the allocation size with DMA_MINALIGN to make sure we do not flush/invalidate data from following allocations. Signed-off-by: Neil Armstrong Reviewed-by: Neha Malcom Francis --- drivers/ufs/ufs.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index be64bf971f1..e005cc90608 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -633,7 +633,9 @@ static int ufshcd_memory_alloc(struct ufs_hba *hba) /* Allocate one Transfer Request Descriptor * Should be aligned to 1k boundary. */ - hba->utrdl = memalign(1024, sizeof(struct utp_transfer_req_desc)); + hba->utrdl = memalign(1024, + ALIGN(sizeof(struct utp_transfer_req_desc), + ARCH_DMA_MINALIGN)); if (!hba->utrdl) { dev_err(hba->dev, "Transfer Descriptor memory allocation failed\n"); return -ENOMEM; @@ -642,7 +644,9 @@ static int ufshcd_memory_alloc(struct ufs_hba *hba) /* Allocate one Command Descriptor * Should be aligned to 1k boundary. */ - hba->ucdl = memalign(1024, sizeof(struct utp_transfer_cmd_desc)); + hba->ucdl = memalign(1024, + ALIGN(sizeof(struct utp_transfer_cmd_desc), + ARCH_DMA_MINALIGN)); if (!hba->ucdl) { dev_err(hba->dev, "Command descriptor memory allocation failed\n"); return -ENOMEM; From patchwork Tue Sep 10 09:20:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 826944 Delivered-To: patch@linaro.org Received: by 2002:adf:ab1c:0:b0:367:895a:4699 with SMTP id q28csp205709wrc; Tue, 10 Sep 2024 02:20:46 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUqilDj3M6yEbdNBgdn/nLtWodDo/DH9EU05Dqg4fV/0J7YhYf6TB0nJu7tXTdPuVrjYzI3rg==@linaro.org X-Google-Smtp-Source: AGHT+IExuPs/KDOkvmzUNWpkLwVeYHB8+1gvsqlfcWVsdxVSZI5oMNl8oUgMJ8K1ocy1Cur2MOaW X-Received: by 2002:a05:6000:1e88:b0:374:c90e:9909 with SMTP id ffacd0b85a97d-37894a03f20mr6008626f8f.28.1725960046457; Tue, 10 Sep 2024 02:20:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725960046; cv=none; d=google.com; s=arc-20240605; b=LrBYi35xn5ByKpk8yfx7jcgyf5+lYEoK2AakIuq1LL7VNsXR8nyqa5v3iCDc2l1k19 qIgc7Sqb+cSSdqRAigAb+c90fn9b+KJ8Xglz6JikrvLP5T+INHtdpy4FO+ah2U4EwUBU VaDDENXw5JonHFmhxLz6k27GoKAXm5gclg8K6PrgvNqp3Wzw5aoCPklBJvV4GHhYtvSy 6VfR/+/NKvjx80XodRcggWl/BR3z/NMD0dmh/ePZ7SmEOWdTMCM9eKsUF2VFtTxD3G2k kfVEkLCGEQcL+9nA5+WnNapVcU98IcxicoZoeRiPJfaidzsVQG9FkRMXQb+Mz2tPRJfr kTnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=XbxLFe5fzwN6Jt4d+R2OdF/xYcYZgzxGRtyCuZrKV3I=; fh=MpQxDFwiapfMzPUCjtB/tGQ74Yoee5eRTjQ1h4khh8w=; b=kdtpl3cqYA++jj3X11hMknnqk0mU4elFQUSFp7ZTh6HZE1FnlXYVf8uWm5sIe/AfmK WjaTVfTBDkrcgitToi5ezmNAJPXPGFPxEhVnJoa0J6DcKu9krvZ2xjpxpkNZh4i5dGKy //Z8KRbbSrzZ5TCciHGtr+w5y/XY0+QBpeOlYVh9UEMvRE6ufxT8h0anK75HIwv0Nbbf z77SqeGN/kOVJe4ojU5UG3vOHDCfn5HNBLo28XMMry/yC5x2rNc4SpOnVnJlT3XOX6xd 92Mo8oDNZKnMVxPSari9cBa2IxFmJlCwMCgBSgU8E7Q9lAq5y1CytZq9AS3jajJ3YIOZ t3BA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Gats2Xex; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The current calculation will omit doing a flush/invalidate on the last cacheline if the base address is not aligned with DMA_MINALIGN. This causes commands failures and write corruptions on Qualcomm platforms. Signed-off-by: Neil Armstrong Reviewed-by: Neha Malcom Francis --- drivers/ufs/ufs.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index e005cc90608..3d9a7d7ee12 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -703,11 +703,11 @@ static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba) */ static void ufshcd_cache_flush_and_invalidate(void *addr, unsigned long size) { - uintptr_t aaddr = (uintptr_t)addr & ~(ARCH_DMA_MINALIGN - 1); - unsigned long asize = ALIGN(size, ARCH_DMA_MINALIGN); + uintptr_t start_addr = (uintptr_t)addr & ~(ARCH_DMA_MINALIGN - 1); + uintptr_t end_addr = ALIGN((uintptr_t)addr + size, ARCH_DMA_MINALIGN); - flush_dcache_range(aaddr, aaddr + asize); - invalidate_dcache_range(aaddr, aaddr + asize); + flush_dcache_range(start_addr, end_addr); + invalidate_dcache_range(start_addr, end_addr); } /** @@ -1466,13 +1466,13 @@ static void prepare_prdt_table(struct ufs_hba *hba, struct scsi_cmd *pccb) } if (pccb->dma_dir == DMA_TO_DEVICE) { /* Write to device */ - flush_dcache_range(aaddr, aaddr + - ALIGN(datalen, ARCH_DMA_MINALIGN)); + flush_dcache_range(aaddr, + ALIGN((uintptr_t)pccb->pdata + datalen, ARCH_DMA_MINALIGN)); } /* In any case, invalidate cache to avoid stale data in it. */ - invalidate_dcache_range(aaddr, aaddr + - ALIGN(datalen, ARCH_DMA_MINALIGN)); + invalidate_dcache_range(aaddr, + ALIGN((uintptr_t)pccb->pdata + datalen, ARCH_DMA_MINALIGN)); table_length = DIV_ROUND_UP(pccb->datalen, MAX_PRDT_ENTRY); buf = pccb->pdata; From patchwork Tue Sep 10 09:20:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 826945 Delivered-To: patch@linaro.org Received: by 2002:adf:ab1c:0:b0:367:895a:4699 with SMTP id q28csp205770wrc; Tue, 10 Sep 2024 02:20:56 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXRSLlLHiqccwRgWUpMgwhNdWbsVb6zIRAXIuuXSNR6MEv62lfJZwyuvaVvnmgjecbPEAnxUQ==@linaro.org X-Google-Smtp-Source: AGHT+IGJ7rN23xaoWl8BaFlz7VY4jPrcAkSnnUZ/JQD0KBN69UObaoaSNL9xQ0Y00WX35/YOFo3T X-Received: by 2002:a05:600c:34d1:b0:42c:b995:20b6 with SMTP id 5b1f17b1804b1-42cb99524b1mr37417695e9.2.1725960056326; Tue, 10 Sep 2024 02:20:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725960056; cv=none; d=google.com; s=arc-20240605; b=VytvaBT5ex8zWy7NRIpgHbSor4HENeKZpUvhyy9BUIyxTn1eY0HeuMWJRDN02+j9KP U3j0KE6xUZJfnunPlgV3rviyldzpLt/3amn+gOZdEGsg9+TjCYC4Ze0B1FmANA9RTfXy xU7q2S7CMKr+6bXs3ywht3d96tJIFfTJBTc4qeprX48A0hVtsaPw2yT0eSzuSdjSGJU1 LxvmJujG/B8lxj7D9DVr/FmQ+ZPmuMNMtjO9QjZ4jVNoKFi1gLO7uzjSUJQ9Y0Xfyygm GbvR0n9Z2Nv8uyGhjsthKjSV2C0t5yDsdStcogGi3SjCdnMPTK3AWCA3RR5wxHgdQQ90 xBRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=LEhQDQDoxZL1RsT+VpAi2rzEIb8vUqNrn2fMKbW+JY8=; fh=MpQxDFwiapfMzPUCjtB/tGQ74Yoee5eRTjQ1h4khh8w=; b=VuqAcnFNthYP4HvptvKSRz/nXi6NvjF1CQjT7nExEcnlLZYhHUOyZmS2y1/I4EshBk tqQrYasFBkc4rzph3mjYEYH1rATXhmuDvoD9zJA/38jHJVQ8WL6684180VUpQ/poV8wF 3iNZWVlpJfdvvivrM9ztbYQ/xZMsIr4uorlzRQnNXq8zJYKlIBSHmnrDAA4Wa/0uxfrE XQzaB5DiBYzc/ay8OQFpEqb0Rro2Cbm4Yl67aOpSWwzNLMsi8JbJjwnHP6cQfENiOv3K ZGh13xjZ5HWYLkk7MR0MU033FN/8vnsYJmAcSUCITlIeog+vIHgZovasHwNvmMFt7JOv 7rUQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ittsiPOG; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean There is no need to flush and invalidate all data updated by the driver, mainly because on ARM platforms flush also invalidates the cachelines. Split the function in two and add the appropriate cacheline invalidates after the UFS DMA operation finishes to make sure we read from memory. Flushing then invalidating cacheline unaligned data causes data corruption issues on Qualcomm platforms, and is largely unnecessary anyway, so let's cleanup the cache operations. Signed-off-by: Neil Armstrong Reviewed-by: Neha Malcom Francis --- drivers/ufs/ufs.c | 45 ++++++++++++++++++++++++++++++--------------- 1 file changed, 30 insertions(+), 15 deletions(-) diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index 3d9a7d7ee12..5845fd694d3 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -696,17 +696,28 @@ static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba) } /** - * ufshcd_cache_flush_and_invalidate - Flush and invalidate cache + * ufshcd_cache_flush - Flush cache * - * Flush and invalidate cache in aligned address..address+size range. - * The invalidation is in place to avoid stale data in cache. + * Flush cache in aligned address..address+size range. */ -static void ufshcd_cache_flush_and_invalidate(void *addr, unsigned long size) +static void ufshcd_cache_flush(void *addr, unsigned long size) { uintptr_t start_addr = (uintptr_t)addr & ~(ARCH_DMA_MINALIGN - 1); uintptr_t end_addr = ALIGN((uintptr_t)addr + size, ARCH_DMA_MINALIGN); flush_dcache_range(start_addr, end_addr); +} + +/** + * ufshcd_cache_invalidate - Invalidate cache + * + * Invalidate cache in aligned address..address+size range. + */ +static void ufshcd_cache_invalidate(void *addr, unsigned long size) +{ + uintptr_t start_addr = (uintptr_t)addr & ~(ARCH_DMA_MINALIGN - 1); + uintptr_t end_addr = ALIGN((uintptr_t)addr + size, ARCH_DMA_MINALIGN); + invalidate_dcache_range(start_addr, end_addr); } @@ -754,7 +765,7 @@ static void ufshcd_prepare_req_desc_hdr(struct ufs_hba *hba, req_desc->prd_table_length = 0; - ufshcd_cache_flush_and_invalidate(req_desc, sizeof(*req_desc)); + ufshcd_cache_flush(req_desc, sizeof(*req_desc)); } static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba, @@ -785,13 +796,13 @@ static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba, /* Copy the Descriptor */ if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC) { memcpy(ucd_req_ptr + 1, query->descriptor, len); - ufshcd_cache_flush_and_invalidate(ucd_req_ptr, 2 * sizeof(*ucd_req_ptr)); + ufshcd_cache_flush(ucd_req_ptr, 2 * sizeof(*ucd_req_ptr)); } else { - ufshcd_cache_flush_and_invalidate(ucd_req_ptr, sizeof(*ucd_req_ptr)); + ufshcd_cache_flush(ucd_req_ptr, sizeof(*ucd_req_ptr)); } memset(hba->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp)); - ufshcd_cache_flush_and_invalidate(hba->ucd_rsp_ptr, sizeof(*hba->ucd_rsp_ptr)); + ufshcd_cache_flush(hba->ucd_rsp_ptr, sizeof(*hba->ucd_rsp_ptr)); } static inline void ufshcd_prepare_utp_nop_upiu(struct ufs_hba *hba) @@ -809,8 +820,8 @@ static inline void ufshcd_prepare_utp_nop_upiu(struct ufs_hba *hba) memset(hba->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp)); - ufshcd_cache_flush_and_invalidate(ucd_req_ptr, sizeof(*ucd_req_ptr)); - ufshcd_cache_flush_and_invalidate(hba->ucd_rsp_ptr, sizeof(*hba->ucd_rsp_ptr)); + ufshcd_cache_flush(ucd_req_ptr, sizeof(*ucd_req_ptr)); + ufshcd_cache_flush(hba->ucd_rsp_ptr, sizeof(*hba->ucd_rsp_ptr)); } /** @@ -877,6 +888,8 @@ static int ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag) */ static inline int ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr) { + ufshcd_cache_invalidate(ucd_rsp_ptr, sizeof(*ucd_rsp_ptr)); + return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24; } @@ -888,6 +901,8 @@ static inline int ufshcd_get_tr_ocs(struct ufs_hba *hba) { struct utp_transfer_req_desc *req_desc = hba->utrdl; + ufshcd_cache_invalidate(req_desc, sizeof(*req_desc)); + return le32_to_cpu(req_desc->header.dword_2) & MASK_OCS; } @@ -1437,8 +1452,8 @@ void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufs_hba *hba, memcpy(ucd_req_ptr->sc.cdb, pccb->cmd, cdb_len); memset(hba->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp)); - ufshcd_cache_flush_and_invalidate(ucd_req_ptr, sizeof(*ucd_req_ptr)); - ufshcd_cache_flush_and_invalidate(hba->ucd_rsp_ptr, sizeof(*hba->ucd_rsp_ptr)); + ufshcd_cache_flush(ucd_req_ptr, sizeof(*ucd_req_ptr)); + ufshcd_cache_flush(hba->ucd_rsp_ptr, sizeof(*hba->ucd_rsp_ptr)); } static inline void prepare_prdt_desc(struct ufshcd_sg_entry *entry, @@ -1461,7 +1476,7 @@ static void prepare_prdt_table(struct ufs_hba *hba, struct scsi_cmd *pccb) if (!datalen) { req_desc->prd_table_length = 0; - ufshcd_cache_flush_and_invalidate(req_desc, sizeof(*req_desc)); + ufshcd_cache_flush(req_desc, sizeof(*req_desc)); return; } @@ -1487,8 +1502,8 @@ static void prepare_prdt_table(struct ufs_hba *hba, struct scsi_cmd *pccb) prepare_prdt_desc(&prd_table[table_length - i - 1], buf, datalen - 1); req_desc->prd_table_length = table_length; - ufshcd_cache_flush_and_invalidate(prd_table, sizeof(*prd_table) * table_length); - ufshcd_cache_flush_and_invalidate(req_desc, sizeof(*req_desc)); + ufshcd_cache_flush(prd_table, sizeof(*prd_table) * table_length); + ufshcd_cache_flush(req_desc, sizeof(*req_desc)); } static int ufs_scsi_exec(struct udevice *scsi_dev, struct scsi_cmd *pccb) From patchwork Tue Sep 10 09:20:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 826946 Delivered-To: patch@linaro.org Received: by 2002:adf:ab1c:0:b0:367:895a:4699 with SMTP id q28csp205827wrc; Tue, 10 Sep 2024 02:21:07 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUkQs9Zlr3QWGJo8JNCivHjQrP/45H567q6wLv0I9+ANQUMuvmj7x6wYg74qzLcrORNjz3DMw==@linaro.org X-Google-Smtp-Source: AGHT+IEwQ4FYTw34eMLGxqOmRMktTPEU1+bPDn6a1X5MLn9RJetstknDgUFBx69ZJ8qt7ksAGZtO X-Received: by 2002:a05:600c:358a:b0:42c:ba1f:5482 with SMTP id 5b1f17b1804b1-42cba1f598fmr34697895e9.35.1725960067074; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Now we have proper flush and invalidate helpers, we can use them directly to operate on the scsi_cmd data. Likewise, we do not need to flush then invalidate, just flush _or_ invalidate depending on the data direction. Signed-off-by: Neil Armstrong Reviewed-by: Neha Malcom Francis --- drivers/ufs/ufs.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index 5845fd694d3..d99dcdef7d0 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -1468,7 +1468,6 @@ static void prepare_prdt_table(struct ufs_hba *hba, struct scsi_cmd *pccb) { struct utp_transfer_req_desc *req_desc = hba->utrdl; struct ufshcd_sg_entry *prd_table = hba->ucd_prdt_ptr; - uintptr_t aaddr = (uintptr_t)(pccb->pdata) & ~(ARCH_DMA_MINALIGN - 1); ulong datalen = pccb->datalen; int table_length; u8 *buf; @@ -1480,15 +1479,6 @@ static void prepare_prdt_table(struct ufs_hba *hba, struct scsi_cmd *pccb) return; } - if (pccb->dma_dir == DMA_TO_DEVICE) { /* Write to device */ - flush_dcache_range(aaddr, - ALIGN((uintptr_t)pccb->pdata + datalen, ARCH_DMA_MINALIGN)); - } - - /* In any case, invalidate cache to avoid stale data in it. */ - invalidate_dcache_range(aaddr, - ALIGN((uintptr_t)pccb->pdata + datalen, ARCH_DMA_MINALIGN)); - table_length = DIV_ROUND_UP(pccb->datalen, MAX_PRDT_ENTRY); buf = pccb->pdata; i = table_length; @@ -1517,8 +1507,12 @@ static int ufs_scsi_exec(struct udevice *scsi_dev, struct scsi_cmd *pccb) ufshcd_prepare_utp_scsi_cmd_upiu(hba, pccb, upiu_flags); prepare_prdt_table(hba, pccb); + ufshcd_cache_flush(pccb->pdata, pccb->datalen); + ufshcd_send_command(hba, TASK_TAG); + ufshcd_cache_invalidate(pccb->pdata, pccb->datalen); + ocs = ufshcd_get_tr_ocs(hba); switch (ocs) { case OCS_SUCCESS: From patchwork Tue Sep 10 09:20:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 826947 Delivered-To: patch@linaro.org Received: by 2002:adf:ab1c:0:b0:367:895a:4699 with SMTP id q28csp205884wrc; Tue, 10 Sep 2024 02:21:17 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUBbwAvt/imx4ftKXAYIutcWcEWRpGJ5FTJUSdwTqCfzQJdhg7lY2dtCC39kEUStRhgMvXJvg==@linaro.org X-Google-Smtp-Source: AGHT+IEbas6BQcp1qDnfGrsG2dZer1Ywzd7GULbaUymsRPPsbY93SvkTGdES2oQ57Oe/BeNCNuEB X-Received: by 2002:a05:600c:548d:b0:42c:bad0:6c16 with SMTP id 5b1f17b1804b1-42cbad06efbmr33025205e9.2.1725960076871; Tue, 10 Sep 2024 02:21:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725960076; cv=none; d=google.com; s=arc-20240605; b=BbLkmf/gQZ4xQq32xSXLPunOtZMN+FXtJfuBv9Qg6ueSx43h97iGXfQCPiWFDsOBv+ 3plIrSz6IJacyBxTw9WdQ8pp4ONo9c7qGvkYnOZFUgdpPbV8KC3sTKNd3DpwlPccUPPB 125Mf6J3Fgw4CJtQr/3toWJj0TpCtcLA4DRMY2iITlM3THzT2WpeaAllw4+V8aJaYADY bgg9MSwJfM1Syx+Xc55VnPf8VT954otyr4n/Jve/2esSpcWt8OINaDx6tucwtClwrIaQ hCTBT2vvs1vSukm+4P+ZbpqMu1THNJ5OFrb1f+3r1lyEDDa2vcIDJsejYcTGg8dfZKh6 ko9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=q2LW5MkEO5pymB6e7w7IUQGE027uBvWv7Inx1yFDrmg=; fh=kIh60KTRoYgMeN0GPP2VRM9W8fD7JmlvFa8NR8V+zQc=; b=Vz6NBhMQnL0E0r0Jkfi5TYLY0op3fAZKgOFO8UsvE8OdH/qHeiK9qI+sQqWRwttVwS IAH3Ogw6G0OJ1av22U5TSxAZpBqbqGAbz5vsRrflufhJepF/ASJfmvZ7AWupd16tK9L+ uGZkDWQy4MJczEDocK0bpplDo+YmarKdPBEBdfkQNGltrILNCJM/QhRn6EErjg180s2F O1M+nksqWTdVBn6HtU4U6aYrQxyGHqs+R4Nn/6NbnSJRJvHn3rQ9VNoHyOQmgHWjINF2 ktiCCf/ezW9LRAHtcSFtV/XwxZ1yy10kpAHVkJYpdH3wZlUsMGq80TkQ1MnHAe1MD8TB LHEA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Kn2qII41; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Marek Vasut Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS for host controllers which do not support 64-bit addressing. Ported from Linux kernel commit 6554400d6f66 ("scsi: ufs: core: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS") with ufs_scsi_buffer_aligned() based on U-Boot generic bounce buffer. Signed-off-by: Marek Vasut --- drivers/ufs/ufs.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h index 43042c294bb..c92f47d82b5 100644 --- a/drivers/ufs/ufs.h +++ b/drivers/ufs/ufs.h @@ -732,6 +732,12 @@ struct ufs_hba { */ #define UFSHCD_QUIRK_HIBERN_FASTAUTO BIT(2) +/* + * This quirk needs to be enabled if the host controller has + * 64-bit addressing supported capability but it doesn't work. + */ +#define UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS 0x2 + /* Virtual memory reference */ struct utp_transfer_cmd_desc *ucdl; struct utp_transfer_req_desc *utrdl; From patchwork Tue Sep 10 09:20:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 826949 Delivered-To: patch@linaro.org Received: by 2002:adf:ab1c:0:b0:367:895a:4699 with SMTP id q28csp206023wrc; Tue, 10 Sep 2024 02:21:44 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXBqGSJNmON36KlyJ1WzfGCKYEjBV57gFvGgjl85RJcpTd34+MzYaaGwW6HGN8BAQ8AxzKR9w==@linaro.org X-Google-Smtp-Source: AGHT+IFyAgwcj0fezN3xwz7Js0/0nfKnzLHzaGUqQFGfG3b1QtgRRyBglHtFDjJsHfpOe6qPe9Sc X-Received: by 2002:adf:f64f:0:b0:374:c977:363 with SMTP id ffacd0b85a97d-3789268f0a6mr5855834f8f.24.1725960103864; Tue, 10 Sep 2024 02:21:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725960103; cv=none; d=google.com; s=arc-20240605; b=GulywS4euV8+kmT5DfWEQ0CMCU1tT+n4VcFiV/Qpd6uPXlzv7GJwnUzjumLcMdYlyS jFZhZYbm/3un00xyWa/lruQp1h4wqdWrlEUsRYO9BgQyevk3WKWML+DYpwP2dRZtHToZ sJ43biEyhBOS06XYpdjdHFsDU90lHG+AjgNyliUEphuE/hdmDAFhxEYZZ6EYX7EHfuXy Sm4WMpHbIwRTzU7wRtqBATtY09AgIeGp1yuxLMf1E8MXN8z9mOxZbRnpqyYwNm41tbud kMS/weTynFwesOiquiDwfh5OYWsKtfwkeKIMsNeGM85HwB8YmAJePaAx1WGFRODhkj07 38SQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=Gb0PkV2QOViT6B2gcnzaIs4IGKO1Z8HfdQrV/Um4OaQ=; fh=kIh60KTRoYgMeN0GPP2VRM9W8fD7JmlvFa8NR8V+zQc=; b=RKIhHVBtQwAAmEz1cK58NHrmIlOqmjS2l44QqpEk4yxp2vq4i/uFpvOLH950l4b37r cGXMRDl/R8vTCOSbhr64OpByDXo3822gC7d5SSuCqcnblC8n/+gHdWehuqFUzu/9LVS5 gGbWNDygIHBWhGxmgqVwKZgiWTVt8i2Vwy+8+ZWLiiQmnnFbkyUR8/3bZYKUDPwGYSzC JjGRWuh9ZH1Lq+tzyxM6icAVoRHhzic9ZOoqd229dsb4eTlAPc3rkmJbxqobLyqK1eMF OuRu3HDvZOFkTc7/NUfq3q/UuP5ANMf4uyr2Ko9j0aIi3PNorthvycx9gx1381p2adEw mm+g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vr8XgASi; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Marek Vasut Add UFSHCD_QUIRK_HIBERN_FASTAUTO quirk for host controllers which supports auto-hibernate the capability but only FASTAUTO mode. Ported from Linux kernel commit 2f11bbc2c7f3 ("scsi: ufs: core: Add UFSHCD_QUIRK_HIBERN_FASTAUTO") Signed-off-by: Marek Vasut --- drivers/ufs/ufs.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h index c92f47d82b5..b55c4a9e996 100644 --- a/drivers/ufs/ufs.h +++ b/drivers/ufs/ufs.h @@ -738,6 +738,12 @@ struct ufs_hba { */ #define UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS 0x2 +/* + * This quirk needs to be enabled if the host controller has + * auto-hibernate capability but it's FASTAUTO only. + */ +#define UFSHCD_QUIRK_HIBERN_FASTAUTO 0x4 + /* Virtual memory reference */ struct utp_transfer_cmd_desc *ucdl; struct utp_transfer_req_desc *utrdl; From patchwork Tue Sep 10 09:20:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 826948 Delivered-To: patch@linaro.org Received: by 2002:adf:ab1c:0:b0:367:895a:4699 with SMTP id q28csp205948wrc; Tue, 10 Sep 2024 02:21:27 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUXdCHJaJHLTXlXnjG//srrv7Vhg/Q8adh7Op4Fmp2rwiBagH7RyXdjAlnOH/sqkndwe/DA7A==@linaro.org X-Google-Smtp-Source: AGHT+IFNp2i7NkeWiy+dph2ZLUC1zXTImm4cwsBW/iQ7Cju6fpV4Oplkmd6I38YklQQIvoUmRk/t X-Received: by 2002:a05:600c:4f42:b0:425:80d5:b8b2 with SMTP id 5b1f17b1804b1-42cae710be2mr69683775e9.16.1725960087094; Tue, 10 Sep 2024 02:21:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725960087; cv=none; d=google.com; s=arc-20240605; b=UGJaXQ+xnFk1Aw2pHjOwUdJCUgtt/u4U6JHmH8S0ZTmIPHS2bCqs8njneWvBg/m0Js gnxBkHjRMa5ILsfTOeb86ZSUXZj64o70eOVBKBUALOvc+aAUX0Jxt4zJr/f0ckZojSId SY80JbJg6xrS+nMiPkqHllxMByt2A7J75cZfFycq8hU7H3SgZNPuuXcWxRo5APVaEMbB mz25Wieog56nlK9d5dJswqSTx+389dwU8UQALJuQ2mZIpiRMBU8e/BLgycAvOOJbkOki IzQfu0mxEz2SYzmVcia095x/sPCyXrd7bLRRGy4mRW4naRVsIrC52tCZrKEti+qFSXF1 rhdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=3m7Q+AqHnJtFLnPxeYXXhUgB8nIPlDQz0O1xPV0ygqg=; fh=uVKLv1QSS99cNt9xKJtMKFbrHuaW/J+XdopzN72C91A=; b=HdcRIWKcyNf9QYzFgnJyb6hgCeKi3if8Oh/OZ7czCNqZWoWkgzKT3oOrmTopS4veqv dx8iMRddJAXGP9CY4zae5xdkMwfL2PuvvuoRTZ5yZpuZCvZGDfo4/Zd0mVeuenXLg11M /zFFUOBakiQ4ljjcYbVlfz0tCVIwD2YQ6BeJTD4F9JqiNJFgQyXiAogU6Zgvrqhr3UG5 5xIvUqsrm4J8kNkdESo5csnQQsIonFIfAaYRSiIRmyVqWIEJrShioGxXKQgy+grBPzL3 Bm4vMfGH25I1VC2kEIIk4ZVnzBxhhhVa+ibM8v7HMe0El/aZx7H+HYKCrVeAq1zmnfaj nIiQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lhMvgX2M; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Tue, 10 Sep 2024 02:20:33 -0700 (PDT) From: neil.armstrong@linaro.org Date: Tue, 10 Sep 2024 11:20:24 +0200 Subject: [PATCH 07/13] ufs/ufs.h: Add definition of 'ufshcd_rmwl()' MIME-Version: 1.0 Message-Id: <20240910-topic-ufs-enhancements-v1-7-3ee0bffacc64@linaro.org> References: <20240910-topic-ufs-enhancements-v1-0-3ee0bffacc64@linaro.org> In-Reply-To: <20240910-topic-ufs-enhancements-v1-0-3ee0bffacc64@linaro.org> To: Tom Rini , Bhupesh Sharma , Neha Malcom Francis Cc: u-boot@lists.denx.de, u-boot-qcom@groups.io, Neil Armstrong , Bhupesh Sharma X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1213; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=n6sWzFGKN/U+YwB57DGrAsU0A4QspTvAYyw+DnuGD8k=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBm4A9Yg80Meq/DkdL3QnMmX4btuNj2Xeb0Ic+Nm+93 cDyzfEmJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZuAPWAAKCRB33NvayMhJ0fvwEA DQ7dD+27vRZoV+7Z2U/Llw9NPJf085YQu006d6L4/WcO8Xq5oqfcBSx+cnm+n+8Yxl+p0Xz4AoGn3C 2F/IdVQbEZFjNiGWouMyKANj2HtvRopV8avK3UPeCTSBIsiJbrHOS9LlzzMpyuCFGhwLaiTYllEwJ7 qp8YN9s9HU2QmH7wXHBMKnFJMY9brXHzlRNMT5bZrgcy3dMvvWI+xliGipQ1z9Xsd7Xlo/kSC/UiuK f+q++ZJM4/X4IdREjWKx7SSUCSFihvoNmqxmncin95965p8wYKDggOnhLJdHKiM2EhXJA8ZNJaYLwp HHVOWwar55YGNTro34qrZEiv6Ng27MWe7Xa/3Znt0fELFTE0AsB5zf9WVc8Wg5IQr+f3AYoJQrhSlU sm20IMjvsdJirUHkMiQOnyPqEIfQroeNGqIbqIa1NbN2Z4YpZVGNnRx9uF9535ZN2X2OCVkXeH4Nag 3jNgQVBtoNgppxjSF9mU5yq36HHX/t9HqmEaqcHHV8+NPuzR6KkFuxVWsb2WAGMfFKyGB7BKpzjzpR QuA6GdqYO5uu7qReN2yF1DyK6ToIWTE5/CjwKDury9KGBlgGg1i+LTvilg5/KPcox/3zNrBNBHTHr8 UV2TnI01A50bv4nmNgKCqCliz+XLHWZ0Nfit7PW8YZkwyfLOLeDU3k2tE6OA== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Bhupesh Sharma Add definition of 'ufshcd_rmwl()' helper function which would be later used by Qualcomm UFS driver to read-modify-write registers. Signed-off-by: Bhupesh Sharma --- drivers/ufs/ufs.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h index b55c4a9e996..555f8a6857d 100644 --- a/drivers/ufs/ufs.h +++ b/drivers/ufs/ufs.h @@ -3,6 +3,7 @@ #define __UFS_H #include +#include #include "unipro.h" struct udevice; @@ -933,6 +934,23 @@ enum { #define ufshcd_readl(hba, reg) \ readl((hba)->mmio_base + (reg)) +/** + * ufshcd_rmwl - perform read/modify/write for a controller register + * @hba: per adapter instance + * @mask: mask to apply on read value + * @val: actual value to write + * @reg: register address + */ +static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg) +{ + u32 tmp; + + tmp = ufshcd_readl(hba, reg); + tmp &= ~mask; + tmp |= (val & mask); + ufshcd_writel(hba, tmp, reg); +} + /* UTRLRSR - UTP Transfer Request Run-Stop Register 60h */ #define UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT 0x1 From patchwork Tue Sep 10 09:20:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 826950 Delivered-To: patch@linaro.org Received: by 2002:adf:ab1c:0:b0:367:895a:4699 with SMTP id q28csp206085wrc; Tue, 10 Sep 2024 02:21:58 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXb9vacPGgFjRvuQw0YkzvFt76+gBUmYuSOUOfP3+fKg0e038jYqWUxO/AsnLpNS9+MUEkqFQ==@linaro.org X-Google-Smtp-Source: AGHT+IGaoLx8xIk06epgKvvwNcOhrde9x4l6LH7QXWhFOQhhjTo+R4jNyEgrRJ/jvBFI1Y9PKOtm X-Received: by 2002:a05:6000:184e:b0:378:7e74:cc25 with SMTP id ffacd0b85a97d-3788967e4e6mr13062012f8f.39.1725960118376; Tue, 10 Sep 2024 02:21:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725960118; cv=none; d=google.com; s=arc-20240605; b=blWNXcZDQ55X0gIET38ZoIBP6lAsLXo2SZzSKblcM39kxFVESA6QF4tDuPtcMU1/dL uVUH4qCv92kYmMY0ms4N5BoFinEdKyh+KEhx3C4UOH0LHGvdaPkWt3Z6H7Y23tc9VddS hfMDd9CJGNYpBXS49qVSK5SxKu28DS0s0/qX934NGDUDvx9a+w2fBluAhOQZypufuVYS 4OMExViKvMDJCcbiESj/ZJWG8NM9Npvazg11iW5Zyu3zccZ/JlsUirALSSIxUjc+wx19 IF2v7IBL8Wb0suaUSZr5UEWO8DAO3wFtHVPZSNipj6moZfkehcqFYBdtLaxy6dKlEHeX PKkQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=pXv5ZgubOL3yjfLM9ECp2Jx1KLJbtiMwclsA2KmrMo4=; fh=uVKLv1QSS99cNt9xKJtMKFbrHuaW/J+XdopzN72C91A=; b=AYax8z1MNnZWUbVbfUjxRhFzSNINXWWYS51eg38z8+E2bKVzrQD8Tw6SYaKVG6eI6C MpUKpwsU85neBimeUjLbAHQFL4wRr2pzMDIMcBRrz+HnYcc52vn34CilGH4KAwzbDAbG gSKFuhF0UYPAGzSJQqSWkuskoMNXn3l2AZ267ZkuK/dtYM3O8ftPUfYp9Sg2PmxDTHGI mdOTEb2GX2INERt5ezFs64Tlyj+fqeNRKeopVTtADlg6ZRjmQdB+9phgFvxCH9XNYNGO 6ckHjDLCd97stcnk8O4V04Qq2S2y3levNzvgPjBEiXFwbO8TAE9NdZxxircUZq9uU/mn CiNw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sx88d2oG; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Bhupesh Sharma Clear UECPA once in u-boot UFS driver due to LINERESET has happened during LINK_STARTUP. This makes the u-boot ufs driver behavior related to UECPA similar to Linux UFS driver. Signed-off-by: Bhupesh Sharma --- drivers/ufs/ufs.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index d99dcdef7d0..565a6af1404 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -504,6 +504,8 @@ link_startup: if (ret) goto out; + /* Clear UECPA once due to LINERESET has happened during LINK_STARTUP */ + ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER); ret = ufshcd_make_hba_operational(hba); out: if (ret) From patchwork Tue Sep 10 09:20:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 826951 Delivered-To: patch@linaro.org Received: by 2002:adf:ab1c:0:b0:367:895a:4699 with SMTP id q28csp206144wrc; Tue, 10 Sep 2024 02:22:10 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWQf7azjCPSkdG+pzadHm2vrJe/eJ+cY3Dxp4QNlvL9VP9CG0wUxnI2JnJ7xBV6z3v6+H7v7w==@linaro.org X-Google-Smtp-Source: AGHT+IFwPOCEPpb+4OMr1Ue/SZZXFiPDhoL6fL78L2COKXv9v9ihWsc/HUlPBZnqKkxtVDnYCHIp X-Received: by 2002:a05:600c:3ca7:b0:426:647b:1bf7 with SMTP id 5b1f17b1804b1-42c9f9e159emr105479295e9.32.1725960130563; Tue, 10 Sep 2024 02:22:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725960130; cv=none; d=google.com; s=arc-20240605; b=lHFAyxbbEUVd7N9SdUIjd4QaWIhcIFPB6P/XxCPnRFRQFOXtG3dbnekedbZJar420D aiFmIanCmgFAKqQ8fq7gFCunvvMSVTT9rVfy52lV8VuWQFuf+Y5bPBs/NkDlirIO3yZJ syZNz/n8XhiyfBGwpaGpZUHrw957xD5EqD7+IF6iqwiaueUU9i5bG2sO6Dg/vtWMGyRS j8DgmAk6L4yyeCWsPuepjDeqqO6Yfz83RG8s7Z82pI/QoMuGZcz9Oj0401hbPQdPo9XC 0tzCHHvxmGA0UkpBoJrsGx7hUELlXc97iGbho9Tc4Ug5yI9ljV415dCDIBXL9ZCismm2 BM5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=HV8ewGL5ts1akQ5UvRod54uQuskpBFgWIEw8bl8J2hQ=; fh=uVKLv1QSS99cNt9xKJtMKFbrHuaW/J+XdopzN72C91A=; b=Yfdc9iDa7YVDERfk5ZQ5J4/iWYfWF6u7QaA91Jpb22KxfIu/WU+eKxV1NtOR+lCVNj LcOCkEZ4IW4hHJCX5i9uAnBoJjUmt/aE5IExbKTank2HSvrU3gbuSTyLR/Zw8bumtXg2 /UE8HB/OBYjFhrRZnHT4sfziUWl0oB7baWXy5rAlXVVZyNVEUF0xW85+fQ5xK+yemiOB KleWhoLEIbvErQ9bumUR1awgfDfNaNg+zBVEltMm+6TJrTwb8HSYHUXZNXlErxM3oFXU PI/31Mgoy3X3hFWPnvI0FwXJoTwq9xkqIUbovAoVgExo6Ot8uAC/e8jH7G8DeN4w9He3 9IZw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NzimKahz; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Bhupesh Sharma Sync u-boot UFS driver to add all possible UFS Quirks as supported by Linux UFS driver as well. Signed-off-by: Bhupesh Sharma --- drivers/ufs/ufs.h | 151 +++++++++++++++++++++++++++++++++++++++++++----------- 1 file changed, 120 insertions(+), 31 deletions(-) diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h index 555f8a6857d..e8a14411560 100644 --- a/drivers/ufs/ufs.h +++ b/drivers/ufs/ufs.h @@ -712,38 +712,127 @@ struct ufs_hba { u32 version; u32 intr_mask; u32 quirks; -/* - * If UFS host controller is having issue in processing LCC (Line - * Control Command) coming from device then enable this quirk. - * When this quirk is enabled, host controller driver should disable - * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE - * attribute of device to 0). - */ -#define UFSHCD_QUIRK_BROKEN_LCC BIT(0) -/* - * This quirk needs to be enabled if the host controller has - * 64-bit addressing supported capability but it doesn't work. - */ -#define UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS BIT(1) - -/* - * This quirk needs to be enabled if the host controller has - * auto-hibernate capability but it's FASTAUTO only. - */ -#define UFSHCD_QUIRK_HIBERN_FASTAUTO BIT(2) - -/* - * This quirk needs to be enabled if the host controller has - * 64-bit addressing supported capability but it doesn't work. - */ -#define UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS 0x2 - -/* - * This quirk needs to be enabled if the host controller has - * auto-hibernate capability but it's FASTAUTO only. - */ -#define UFSHCD_QUIRK_HIBERN_FASTAUTO 0x4 + /* Interrupt aggregation support is broken */ +#define UFSHCD_QUIRK_BROKEN_INTR_AGGR (1 << 0) + + /* + * delay before each dme command is required as the unipro + * layer has shown instabilities + */ +#define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS (1 << 1) + + /* + * If UFS host controller is having issue in processing LCC (Line + * Control Command) coming from device then enable this quirk. + * When this quirk is enabled, host controller driver should disable + * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE + * attribute of device to 0). + */ +#define UFSHCD_QUIRK_BROKEN_LCC (1 << 2) + + /* + * The attribute PA_RXHSUNTERMCAP specifies whether or not the + * inbound Link supports unterminated line in HS mode. Setting this + * attribute to 1 fixes moving to HS gear. + */ +#define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP (1 << 3) + + /* + * This quirk needs to be enabled if the host controller only allows + * accessing the peer dme attributes in AUTO mode (FAST AUTO or + * SLOW AUTO). + */ +#define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE (1 << 4) + + /* + * This quirk needs to be enabled if the host controller doesn't + * advertise the correct version in UFS_VER register. If this quirk + * is enabled, standard UFS host driver will call the vendor specific + * ops (get_ufs_hci_version) to get the correct version. + */ +#define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION (1 << 5) + + /* + * Clear handling for transfer/task request list is just opposite. + */ +#define UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR (1 << 6) + + /* + * This quirk needs to be enabled if host controller doesn't allow + * that the interrupt aggregation timer and counter are reset by s/w. + */ +#define UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR (1 << 7) + + /* + * This quirks needs to be enabled if host controller cannot be + * enabled via HCE register. + */ +#define UFSHCI_QUIRK_BROKEN_HCE (1 << 8) + + /* + * This quirk needs to be enabled if the host controller regards + * resolution of the values of PRDTO and PRDTL in UTRD as byte. + */ +#define UFSHCD_QUIRK_PRDT_BYTE_GRAN (1 << 9) + + /* + * This quirk needs to be enabled if the host controller reports + * OCS FATAL ERROR with device error through sense data + */ +#define UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR (1 << 10) + + /* + * This quirk needs to be enabled if the host controller has + * auto-hibernate capability but it doesn't work. + */ +#define UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8 (1 << 11) + + /* + * This quirk needs to disable manual flush for write booster + */ +#define UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL (1 << 12) + + /* + * This quirk needs to disable unipro timeout values + * before power mode change + */ +#define UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING (1 << 13) + + /* + * Align DMA SG entries on a 4 KiB boundary. + */ +#define UFSHCD_QUIRK_4KB_DMA_ALIGNMENT (1 << 14) + + /* + * This quirk needs to be enabled if the host controller does not + * support UIC command + */ +#define UFSHCD_QUIRK_BROKEN_UIC_CMD (1 << 15) + + /* + * This quirk needs to be enabled if the host controller cannot + * support physical host configuration. + */ +#define UFSHCD_QUIRK_SKIP_PH_CONFIGURATION (1 << 16) + + /* + * This quirk needs to be enabled if the host controller has + * 64-bit addressing supported capability but it doesn't work. + */ +#define UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS (1 << 17) + + /* + * This quirk needs to be enabled if the host controller has + * auto-hibernate capability but it's FASTAUTO only. + */ +#define UFSHCD_QUIRK_HIBERN_FASTAUTO (1 << 18) + + /* + * This quirk needs to be enabled if the host controller needs + * to reinit the device after switching to maximum gear. + */ +#define UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH (1 << 19) /* Virtual memory reference */ struct utp_transfer_cmd_desc *ucdl; From patchwork Tue Sep 10 09:20:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 826952 Delivered-To: patch@linaro.org Received: by 2002:adf:ab1c:0:b0:367:895a:4699 with SMTP id q28csp206194wrc; Tue, 10 Sep 2024 02:22:21 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWE0zQ1eS1oG7Lt46fGkiTafUUI/qHATmdKDcl/XIHpFULeVd74NVsdTzplAH0/G64Hrg511Q==@linaro.org X-Google-Smtp-Source: AGHT+IFtha5I00BjbbmvIFmFAYkqLwC63K3hQx7ceFvK//I0xBMrZfi+XkLv/IkmMXJipluz6hzG X-Received: by 2002:a5d:5088:0:b0:374:b9a7:5ed6 with SMTP id ffacd0b85a97d-378895cb7b8mr8296369f8f.22.1725960141614; Tue, 10 Sep 2024 02:22:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725960141; cv=none; d=google.com; s=arc-20240605; b=G6Wc7Wiwf9zuQbWRzuHejW9/kycYIxQK/UYE91r5gYEYgu78XqUYObgThSu23uHta7 x8B7h6ya8j6j/YBfz+o4JwYHchXlArgw9lTEFn+o8W3uodiqVy4Ts/D5COUJj2vnznd/ SZZef8VOjtTAnl+WaRF8fHsphdkSKRt/ZnES9l7IdH7idA/GbUVKpJRgZpFnnpmDkAtV VCKlQ4DgIuEGTed/VUbICXq+oYFSrG44gJsPb+JR1DExGPW0EQETH5wFQTjonhupr9xe EMOFjv0fCMUQfl9F+BK+yQdOScYHl1CvhNtBaUfMKT/wKb7eHqOd7L8bmskwzIJ1AGJe jDPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=FiZ7d/zss0qv1wKmPr1Qcf9QsjkyREN4pR1f7/QXCVA=; fh=uVKLv1QSS99cNt9xKJtMKFbrHuaW/J+XdopzN72C91A=; b=gEJl6oUL2LY6HsmoZk1q5k42l+toxLVJxwZKvWCVX6A+2+5/7tR3p+v77x7a3875gA PrSXwIJPNNeTPfqv/+1RIPoIlRW4GCMMQYkxlaWsYCbRYoiiqOjLlg/rTtGSmAnA4ynu KEs40LHSNd+GShlKz4Lc9W4AoFCLu3wVz55eQ1wvMIr9gvKu//q8Qh78AVzgf7/ggiEF y7OV0ij0IMs8W3ps/4B4Jfy9iTSIgI2eZeJ3uDs8zq2QQwJ3Yt2pjnjimunGfM0924XI AFuT7U+RSZZDXao1cBJVO3y6w/iZ7i1Sc8x99UGoRcyPPx1AryH6HXlo0naO5l1HAbdV PnBg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Bi43sfFX; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Tue, 10 Sep 2024 02:20:36 -0700 (PDT) From: neil.armstrong@linaro.org Date: Tue, 10 Sep 2024 11:20:27 +0200 Subject: [PATCH 10/13] ufs: Add missing memory barriers MIME-Version: 1.0 Message-Id: <20240910-topic-ufs-enhancements-v1-10-3ee0bffacc64@linaro.org> References: <20240910-topic-ufs-enhancements-v1-0-3ee0bffacc64@linaro.org> In-Reply-To: <20240910-topic-ufs-enhancements-v1-0-3ee0bffacc64@linaro.org> To: Tom Rini , Bhupesh Sharma , Neha Malcom Francis Cc: u-boot@lists.denx.de, u-boot-qcom@groups.io, Neil Armstrong , Bhupesh Sharma X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1550; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=5oG/hJDRzgrfw1H7DuKQEcfPeZJkmu0N1nxQo6XZS64=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBm4A9ZVkHT19ZhlfhIdSkNnKZzoCEsYUXcZSYKd92F 7bJ4EfSJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZuAPWQAKCRB33NvayMhJ0SIhEA C80FMzpCUoL7uXVNU45bWmcf0QdEPKhUxv7NOy9+DXJzpZ0DUP1YnL4beBxKlYwSR7I5RJkvlVjX4m HJhQdWxjMno62b2CUzNl46hGlqprRmBGQEu6U1MVfeWgkDfJJgkTgjBj4821oavZgLEBLucRcRQn3d +S3EfrCcMuSvKjxu2+j+YL9DD36Ie//1CaovgO0D0qPr4Nhh1DyfmGRemPl4jmaXDkVUUNeTYsGiTV gZM9MBSh72byTc7V0FI9ov8JHzF3xzzWrgJVacazrlSCdlsyyP6yOBZHu+lmQB7BNnnFljolDLNxqR 5UfEPlKB+bDhG5eos294bw5Ej/Zq8b3KtV6QFzT1jSPTLZDkHxmY9jm1crrLMXWChIZehhgI0WdccZ yI9vM8Zxctb0vKh2CKtC6Hw1nJNw0+S8skBL0zg2k86qqsKSU7yVFxYGVr12rK+0hxyj4vapN2wa7j xGRT7NgOCzNsUKWNK2QFN7yEyqNbrRk5yOUvAPer6QHPZKeqNinystndrcovseBaPHMJ83KE6IFK6h CoaFjBUwbDBpP+I4ndvSFBftTlNujch46roOIbRSFvjE51iNOpE9ue9Uhl1bq8og43O37Bn+jlM8Zl IgKcyAfMoVTMifmjnc6dQ/tCAcqFS0TpUgZk7bvQL7fi6+fAMnANYR1jfHgA== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Bhupesh Sharma Add missing wmb() and mb() barriers in the u-boot UFS core framework driver to allow registers updates to happen before follow-up read operations. This makes the barrier placement similar to the Linux UFS driver. Signed-off-by: Bhupesh Sharma --- drivers/ufs/ufs.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index 565a6af1404..5d4e5424358 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -432,6 +432,12 @@ static int ufshcd_make_hba_operational(struct ufs_hba *hba) ufshcd_writel(hba, upper_32_bits((dma_addr_t)hba->utmrdl), REG_UTP_TASK_REQ_LIST_BASE_H); + /* + * Make sure base address and interrupt setup are updated before + * enabling the run/stop registers below. + */ + wmb(); + /* * UCRDY, UTMRLDY and UTRLRDY bits must be 1 */ @@ -861,6 +867,9 @@ static int ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag) ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL); + /* Make sure doorbell reg is updated before reading interrupt status */ + wmb(); + start = get_timer(0); do { intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS); @@ -1994,6 +2003,8 @@ int ufshcd_probe(struct udevice *ufs_dev, struct ufs_hba_ops *hba_ops) REG_INTERRUPT_STATUS); ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE); + mb(); + err = ufshcd_hba_enable(hba); if (err) { dev_err(hba->dev, "Host controller enable failed\n"); From patchwork Tue Sep 10 09:20:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 826953 Delivered-To: patch@linaro.org Received: by 2002:adf:ab1c:0:b0:367:895a:4699 with SMTP id q28csp206248wrc; Tue, 10 Sep 2024 02:22:32 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUrO2NehulGkUN3UvDgUc4Oxex8rWFw0qXKQzgQjuy4PQRCyojdn/UIL5hSXbFk+kTa/oPfxw==@linaro.org X-Google-Smtp-Source: AGHT+IExj4FSxgjki2xHCubxRz7FcTHxeVwh2yxH7gmJltHSgkjz4UGWrkTWDxZRysFamshGUeYl X-Received: by 2002:a05:600c:1da1:b0:42c:b8e5:34d5 with SMTP id 5b1f17b1804b1-42cbde02677mr13717855e9.15.1725960152615; Tue, 10 Sep 2024 02:22:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725960152; cv=none; d=google.com; s=arc-20240605; b=aeW/tvqHCkGJBAKo5SwEMXLiBvBiQ7O/HqECo9CGSjW2Rtet5ukxkJdcqy4xwhgJzm OF8Bs3zQspN54Au/MI+QYuqnbCByCvX70aCxGuoTC2txIF2sP9KlUTAAjZtvznhX8iAH Xd9TMQ5fV9PAL2YL3HhIfSWePFju1iHig+6fkVUtl5iw9DwjTt0BJMa8PJG/Ey05pJdX xJ2wEk25u2YxVTiFYflSUksoPpnEuPk5q/nSRQiQOMTbpM8Iwv7fQR0giNnW8QGzFblt cE2QW5G5LMty+ylKNyszQnKC2Gy50WUxR8lsQq3lZvxu8W6V8lmUb4NSbrLJA73OUCg0 cveg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=RXsLDtSn+yuIut/V8TcI/hXin8AlEwPOWBtFyFIn58w=; fh=uVKLv1QSS99cNt9xKJtMKFbrHuaW/J+XdopzN72C91A=; b=US+9FkE3MqgTDYhdvSqYwqIUsJbab2ZxH2qZV7vqmssmExj5rYFbBrcbpcIpb7pLrJ 2N0Ph/hJIcpg4nrb85QkHwgqDRZ6tgJu2jACXMLTrb7lwSivzRuH3COjQ7os9j1Tkz+s Q3jRrBryCVURVxH43rqAYtdOpWn93fI0knecvTifp1IEWsfI/OoZryS/CaQC4xElfYCY BNs2ru0/j38GjbZJ3gfVfbcbUJK//R/1JSC7tIbqTx8coh5GCHPKx+X5lf5A2EQNSvBP CwSy9utaaVBIKUxGhuCQB8O4t6xHnIMUb/rDmMQd4MEJh7CttNUbUzAKIA/Vqdo2KNrf 6y1Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HWCLlxzY; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Bhupesh Sharma Minor typo fix and rewording of printf message inside 'ufs_start' which announces the availability of the UFS device. Signed-off-by: Bhupesh Sharma --- drivers/ufs/ufs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index 5d4e5424358..d2df5c26f76 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -1925,7 +1925,7 @@ int ufs_start(struct ufs_hba *hba) return ret; } - printf("Device at %s up at:", hba->dev->name); + debug("UFS Device %s is up!\n", hba->dev->name); ufshcd_print_pwr_info(hba); } From patchwork Tue Sep 10 09:20:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 826954 Delivered-To: patch@linaro.org Received: by 2002:adf:ab1c:0:b0:367:895a:4699 with SMTP id q28csp206303wrc; Tue, 10 Sep 2024 02:22:43 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCW6FrZJxqPLmBwdJEV8RyJMiY1gtKIrxs818T4I4GNcz+VUkNnRhZCjX930Sa9Slj88J/QJ6Q==@linaro.org X-Google-Smtp-Source: AGHT+IHV+GWZ3bOS6wW/OW1zIkzfX+vwDQXzDoJDJgPYMMmTW5DwSb+2/qINv4Rhyz1uMkKZNdIR X-Received: by 2002:adf:ee91:0:b0:374:c21a:9dd4 with SMTP id ffacd0b85a97d-378a8a29286mr1266695f8f.20.1725960163256; Tue, 10 Sep 2024 02:22:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725960163; cv=none; d=google.com; s=arc-20240605; b=RUNvWUiN5xhLzD7xhzENXkWhPkEhqYrygtAI3Hec5PxBPAF7iQP5/cudkauteDRvyI jnID0+ROacIk4KxPO1yzj8PcWfDr5JPusKOYVluywTzrVXz2Lekoon6jNgFZkhpDnZxN BFQ144GqU/YqFD7GQc0gDIyN6MV3OP214uvkY7u4XEEnJDoQF9ywrSKyALKSDWggKtZ7 JcYSpsYRtNcQWaqFUbM6hi+l+Z46Gkdz0fL5bLkZqbqBCrmjBq97dR4q9Pmg1BgtyjFK TXCkKjfQj/avnV/DLmwnbjZ2ctawDhYD0xUFKZuM+8SdTqAYOPSutcC89cfyH3qq0z0m xh1Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=5R77FTIvtPNu08lHr7vGlHnrY8zzK4MdH2DqP4QqLdQ=; fh=MpQxDFwiapfMzPUCjtB/tGQ74Yoee5eRTjQ1h4khh8w=; b=e3YwKJaE5cySEibBUwdwdr6CBzomqaq3xRvSi3Y24czyfRhwONNp7IpMu6Aj6ir40S G8LFGpKLCeW8/bDUVAkRfJ5diI+WK7Omh005qOnoM8fv2bhwST7fjqdD+95LyB+Zf1P5 ilr8aW/GnColnAeXzAoyi6Isu/VxGjAsCXCNevzx+mub9f/BraikIXbmOwQKK/+liNZc T5A9Gk7czMLZQXe8GsDT4M4DM0fN2/HLMxFUgKdo9oj/S1vLs3KxKlv3yeyJgnloIdgI xmfnM/0TlUXcYTSm7IFOUkOGWLn4OlGx7MpsA5FXIg21a5zyQGKI1HgCCNMIMJ7MTS+n m+Ug==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Q4ITwJzv; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Tue, 10 Sep 2024 02:20:37 -0700 (PDT) From: Neil Armstrong Date: Tue, 10 Sep 2024 11:20:29 +0200 Subject: [PATCH 12/13] ufs: core: remove link_startup_again logic MIME-Version: 1.0 Message-Id: <20240910-topic-ufs-enhancements-v1-12-3ee0bffacc64@linaro.org> References: <20240910-topic-ufs-enhancements-v1-0-3ee0bffacc64@linaro.org> In-Reply-To: <20240910-topic-ufs-enhancements-v1-0-3ee0bffacc64@linaro.org> To: Tom Rini , Bhupesh Sharma , Neha Malcom Francis Cc: u-boot@lists.denx.de, u-boot-qcom@groups.io, Neil Armstrong X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1234; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=NrIM0ZBahJTnOEZXBhlRGdNy6U8dDMrbIU2LDji0hxk=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBm4A9aUhOolvgxKvpxtsAo2w+OO3eef2gtQ1ljlzB6 r6BIojGJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZuAPWgAKCRB33NvayMhJ0XH2D/ 0fV7p0ujSUyT3mzPtmxDpVu6QuvyvQGjaQ7ImIn71kpU5DLhSbYw4yovTa+0Aa6V1e97yXJ7f6TehB VWbPGSDbqYcAydyo+Wsjjt0u4GcwQHYgWJsslZkLNM7xtb2pEznhBOlx0/OrbCKfAPlYwVtSSf1lb+ sbik85E5WhXb7KMXczlmtf/d8L+22F8kkwhj+HP5xj5XvuK3zdyUH4WDbBZgvLw1TAx9XKOGkFmStQ InWZteD2pv5TPPHz1DdKyk4Nl2h0bBCucResnkmEI7IAcwhCmGgT2zFZRcw8UAsvfTB0f3yej3lAjn T/JbATTSd+MOXK/9ebm65kQQL0mWN3nQJ4v6fyxs6sz3fW4A3DleoG8OMk4+afQRb3GxNoKzzoXAaM W3Z+UQxAcllTpjTO+ro7hmD14tIdNtQPKQUjTnpawwp6fMxHgzyJUQXq1iizbn4krCY6oJtTZah+eI zrQGlmLMjc2D/v/juZdl4YbLbKUjFXxS4ZVzg/dp6dW5LIqtcU3cnT3wzD+D+u2YUBaG1UWnEupjJ4 7JQpf5oCWnkMREPgpVQTzETUmdh19+pw5M7yghSJ/FTd+1P/1OHmDNpL3qY4zhO+4ZzzgaCpQus91V K/woFGvfKbOcQ2y6rGbNGWzCEYS7tYZo9Gnr5cX9hwBit1oIvktFxVXr0U0Q== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The link_startup_again logic was added in Linux to handle device that were set in LinkDown state, which should not be the case since U-boot doesn't set LinkDown state are init, and Linux sets the device active in ufshcd_init() for the first link startup. While it worked to far, it breaks link startup for Qualcomm Controllers v5, let's just remove the logic. Signed-off-by: Neil Armstrong --- drivers/ufs/ufs.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index d2df5c26f76..e34e4586224 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -462,9 +462,7 @@ static int ufshcd_link_startup(struct ufs_hba *hba) { int ret; int retries = DME_LINKSTARTUP_RETRIES; - bool link_startup_again = true; -link_startup: do { ufshcd_ops_link_startup_notify(hba, PRE_CHANGE); @@ -490,12 +488,6 @@ link_startup: /* failed to get the link up... retire */ goto out; - if (link_startup_again) { - link_startup_again = false; - retries = DME_LINKSTARTUP_RETRIES; - goto link_startup; - } - /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */ ufshcd_init_pwr_info(hba); From patchwork Tue Sep 10 09:20:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 826956 Delivered-To: patch@linaro.org Received: by 2002:adf:ab1c:0:b0:367:895a:4699 with SMTP id q28csp206400wrc; Tue, 10 Sep 2024 02:23:04 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCU76s6d24uOkOiN/JmDVjkqLpoVTXrrTMO/TShoQFFLIoEhBNHc9KpYoduH9RzGsNjIN/MiNQ==@linaro.org X-Google-Smtp-Source: AGHT+IGqElL2wpLGI6Af+E1lUHwWThoHQA8o6QW79UUp+r2IZgwlWRdTKHlA+1evCc8tgr7s/A8g X-Received: by 2002:a05:600c:3ba3:b0:426:6f27:379a with SMTP id 5b1f17b1804b1-42cae70efccmr70989745e9.13.1725960184486; Tue, 10 Sep 2024 02:23:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725960184; cv=none; d=google.com; s=arc-20240605; b=RGzxFJbq1S57qbBrbyzpk2Aaluv0GYLUg9fV+7iQRqeLzwrPldfki1GK4SGOADc8E5 KMe0+Vx57gtfZlT106OFCH330DmQ6FewNckAd3Dr7h+JroAZHEeRBtQGKgwLaTCkA9Wu ZrCcyBHSiE3Rya1qEMOnnAWpr6MHmzvII55l6pg/bn5rCkom6cYX32jfYfuvy91s15k9 fqguu53XtH/ysWZGn3g1L2Bvhi4SQA570e/aq9B7K7awuIwk417FF9XJCa9UB9roAIG1 +e4+2cf8cYFGxMC8qOvKo9LczydMvjXuWS1yn+U2q4JDnTS+hFNhJ8WAhlMGVtcrkeDb U3CA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=eXgKvKziNCDVpM542c0JIfC8nrp074BX8CGUocIxGCw=; fh=MpQxDFwiapfMzPUCjtB/tGQ74Yoee5eRTjQ1h4khh8w=; b=PQACQaVmcZ0nfow49olCNMg0RxtkD/s641pq5t97c3CwosaZs9HvWqXLX/qDzlx0bp UvjRqofc4/oGbMRCQbUFGOET1V6Wr7SMzXI2cYtdOrM9OJYl4X3Gp8O/1d5QvYN8ZuGU zIO8tHRlrgkR1thOEoxjBXoUPtc1M1DzgCjdYYODUb+SUrAMs59TrPN5QpNWLXltxEYQ FmCXk/b6fEtCt6IS1e+PG6ryibDqsjsAVlllULQpVMd/nO/hmOQwa64zsi1vAGsoyM0v rjNqFMy0tFJT2kmlgP8CQMHp92/Rx4WFhQt4lJGhqHcHUgnzsf9zCV0A0DIiA/jHr8up cf0Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kzE+mWda; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Adding myself to continue Bhupesh's work to enhance and fix UFS support in U-boot, especially for Qualcomm SoCs, and help review patches and maintain the UFS subsystem. Signed-off-by: Neil Armstrong Reviewed-by: Neha Malcom Francis --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 7ab39d91a55..14809c057c9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1707,6 +1707,7 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-ubi.git F: drivers/mtd/ubi/ UFS +M: Neil Armstrong M: Bhupesh Sharma M: Neha Malcom Francis S: Maintained