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Tue, 10 Sep 2024 01:58:13 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42cc01d4617sm12905325e9.0.2024.09.10.01.58.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Sep 2024 01:58:13 -0700 (PDT) From: Neil Armstrong Date: Tue, 10 Sep 2024 10:58:06 +0200 Subject: [PATCH 1/2] gpio: msm: add support for special pins MIME-Version: 1.0 Message-Id: <20240910-topic-sm8x50-msm-gpio-special-pins-sm8250-v1-1-50623a7e4931@linaro.org> References: <20240910-topic-sm8x50-msm-gpio-special-pins-sm8250-v1-0-50623a7e4931@linaro.org> In-Reply-To: <20240910-topic-sm8x50-msm-gpio-special-pins-sm8250-v1-0-50623a7e4931@linaro.org> To: Caleb Connolly , Sumit Garg , Tom Rini Cc: u-boot-qcom@groups.io, u-boot@lists.denx.de, Neil Armstrong X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=4823; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=hpzDe3p6sPzJQLFujHI5KRQb2puJ+WsxzjYzQ7F0P44=; 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Signed-off-by: Neil Armstrong --- drivers/gpio/msm_gpio.c | 97 +++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 89 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c index 2fb266f1285..cea073b3297 100644 --- a/drivers/gpio/msm_gpio.c +++ b/drivers/gpio/msm_gpio.c @@ -34,13 +34,31 @@ struct msm_gpio_bank { #define GPIO_IN_OUT_REG(dev, x) \ (GPIO_CONFIG_REG(dev, x) + 0x4) +static void msm_gpio_direction_input_special(struct msm_gpio_bank *priv, + unsigned int gpio) +{ + unsigned int offset = gpio - priv->pin_data->special_pins_start; + const struct msm_special_pin_data *data; + + if (!priv->pin_data->special_pins_data) + return; + + data = &priv->pin_data->special_pins_data[offset]; + + if (!data->ctl_reg || data->oe_bit >= 31) + return; + + /* switch direction */ + clrsetbits_le32(priv->base + data->ctl_reg, + BIT(data->oe_bit), 0); +} + static void msm_gpio_direction_input(struct udevice *dev, unsigned int gpio) { struct msm_gpio_bank *priv = dev_get_priv(dev); - /* Always NOP for special pins, assume they're in the correct state */ if (qcom_is_special_pin(priv->pin_data, gpio)) - return; + msm_gpio_direction_input_special(priv, gpio); /* Disable OE bit */ clrsetbits_le32(priv->base + GPIO_CONFIG_REG(dev, gpio), @@ -49,13 +67,33 @@ static void msm_gpio_direction_input(struct udevice *dev, unsigned int gpio) return; } +static int msm_gpio_set_value_special(struct msm_gpio_bank *priv, + unsigned int gpio, int value) +{ + unsigned int offset = gpio - priv->pin_data->special_pins_start; + const struct msm_special_pin_data *data; + + if (!priv->pin_data->special_pins_data) + return 0; + + data = &priv->pin_data->special_pins_data[offset]; + + if (!data->io_reg || data->out_bit >= 31) + return 0; + + value = !!value; + /* set value */ + writel(value << data->out_bit, priv->base + data->io_reg); + + return 0; +} + static int msm_gpio_set_value(struct udevice *dev, unsigned int gpio, int value) { struct msm_gpio_bank *priv = dev_get_priv(dev); - /* Always NOP for special pins, assume they're in the correct state */ if (qcom_is_special_pin(priv->pin_data, gpio)) - return 0; + return msm_gpio_set_value_special(priv, gpio, value); value = !!value; /* set value */ @@ -64,14 +102,42 @@ static int msm_gpio_set_value(struct udevice *dev, unsigned int gpio, int value) return 0; } +static int msm_gpio_direction_output_special(struct msm_gpio_bank *priv, + unsigned int gpio, + int value) +{ + unsigned int offset = gpio - priv->pin_data->special_pins_start; + const struct msm_special_pin_data *data; + + if (!priv->pin_data->special_pins_data) + return 0; + + data = &priv->pin_data->special_pins_data[offset]; + + if (!data->io_reg || data->out_bit >= 31) + return 0; + + value = !!value; + /* set value */ + writel(value << data->out_bit, priv->base + data->io_reg); + + if (!data->ctl_reg || data->oe_bit >= 31) + return 0; + + /* switch direction */ + clrsetbits_le32(priv->base + data->ctl_reg, + BIT(data->oe_bit), BIT(data->oe_bit)); + + return 0; +} + static int msm_gpio_direction_output(struct udevice *dev, unsigned int gpio, int value) { struct msm_gpio_bank *priv = dev_get_priv(dev); - /* Always NOP for special pins, assume they're in the correct state */ if (qcom_is_special_pin(priv->pin_data, gpio)) - return 0; + return msm_gpio_direction_output_special(priv, gpio, value); value = !!value; /* set value */ @@ -100,13 +166,28 @@ static int msm_gpio_set_flags(struct udevice *dev, unsigned int gpio, ulong flag return 0; } +static int msm_gpio_get_value_special(struct msm_gpio_bank *priv, unsigned int gpio) +{ + unsigned int offset = gpio - priv->pin_data->special_pins_start; + const struct msm_special_pin_data *data; + + if (!priv->pin_data->special_pins_data) + return 0; + + data = &priv->pin_data->special_pins_data[offset]; + + if (!data->io_reg || data->in_bit >= 31) + return 0; + + return !!(readl(priv->base + data->io_reg) >> data->in_bit); +} + static int msm_gpio_get_value(struct udevice *dev, unsigned int gpio) { struct msm_gpio_bank *priv = dev_get_priv(dev); - /* Always NOP for special pins, assume they're in the correct state */ if (qcom_is_special_pin(priv->pin_data, gpio)) - return 0; + return msm_gpio_get_value_special(priv, gpio); return !!(readl(priv->base + GPIO_IN_OUT_REG(dev, gpio)) >> GPIO_IN); } From patchwork Tue Sep 10 08:58:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 826938 Delivered-To: patch@linaro.org Received: by 2002:adf:ab1c:0:b0:367:895a:4699 with SMTP id q28csp197561wrc; Tue, 10 Sep 2024 01:58:43 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVy1H82j5La3QjWPedhJXraw/CCJoyikqpSpEIu8YUE0Xoxzq/H9oG8vz7n/jHhK/gagIsh2w==@linaro.org X-Google-Smtp-Source: AGHT+IGXt7nV4EpDFa4MlJpmzghT32WzI5KQJoe5vuKBoPodUFyLb8PMAStBjxvsa0iHu08aUhY4 X-Received: by 2002:a5d:6211:0:b0:374:ca43:cda5 with SMTP id ffacd0b85a97d-378947fc668mr5851416f8f.0.1725958723144; Tue, 10 Sep 2024 01:58:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725958723; cv=none; d=google.com; s=arc-20240605; b=k7JDMaGcoixBLppTk5s8rW7P68xtMur7GCTOBKj3ukV0mwX1L/WZa9NHmGqvaOv5e8 GpkZKKMAu0GeW+gJhrzuG9B6jZH0nw87Egk6rUHMm30ulvLpKbqHvvxsZVyT1wuZnACL WOhlyPIZbOPjNvL3MWdzzzBYW6tJRMfCRO+62jN8j0Qo/ElAkeKClXd/ph8bHoJmnULD lN3fDrDUL0PDnOBkJeJ+5mPWR/sBpT1CbVT6ez3cHKoKXU78VuIpRxwIMXbmqJdv6Ytn IP2qL/Ste4oiKIiwrl3JUNIyTsiblh+2+QZnfgRs5xjDfFX9926t0fCWBbyQkB9x2SXL Uxxg== ARC-Message-Signature: i=1; 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Tue, 10 Sep 2024 01:58:13 -0700 (PDT) From: Neil Armstrong Date: Tue, 10 Sep 2024 10:58:07 +0200 Subject: [PATCH 2/2] pinctr: qcom: sm8250: add special pins pins configuration data MIME-Version: 1.0 Message-Id: <20240910-topic-sm8x50-msm-gpio-special-pins-sm8250-v1-2-50623a7e4931@linaro.org> References: <20240910-topic-sm8x50-msm-gpio-special-pins-sm8250-v1-0-50623a7e4931@linaro.org> In-Reply-To: <20240910-topic-sm8x50-msm-gpio-special-pins-sm8250-v1-0-50623a7e4931@linaro.org> To: Caleb Connolly , Sumit Garg , Tom Rini Cc: u-boot-qcom@groups.io, u-boot@lists.denx.de, Neil Armstrong X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2622; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=cWamk3BaNR7zDwiQskXuBiLuOQYcDKjaVh4Dia/789E=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBm4AojoGO9FiD7hBUx0LQiqg217DyPR3dm97W9oHXg 9onjwcGJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZuAKIwAKCRB33NvayMhJ0ZTmD/ 9B7bPjsBS7TV6CnnkSX/X8bnmOyYK/zXDH4ImQfn7tRYPtYlI/S3g0+UHFOsGIfJTUlW+Qt2leVWDL ErSebkxy/IuUQPsZm7KY6dBHgypSa1KIeT8E8FBm78pa75BhCpN0sKFLqN3bpteW+MY71Rxe6+Al9F Ujzjh9GrS4LAWChQ++4z1Mzd3pNAKqaXwTHwGnsvEAevcNV73Qewsd+K612wUdnVLB6hRwOUPDlsol CkDYlKPKLtTLZg13nZcvnyCtIHect+cwu2aZqcHgjtncNZ0OVLP6lFfutrB9hllNcb4KbxE/G6pXk3 ZbcMxfZh9q8ey4EDnq2JN5nAX0kArkMpVD9CQa4eTbxQiGhlIzu2E7b0xTVJozpbqUephSiUPtBlU/ VQTyVqfgVR+7aqNq9AcG2diwmHN6R6yC26S/P4jVbzyKkr8EAQUD9f0D3ucSYIYGmMtFu445Nfn7ti 7yDm2LBinv7z904nO6OvmwZ8Ko3/uuD9vSzhYHE3C6xzIZ8njhZNSue1wRsCuLEPuuXGPl7yc5Mh8t pNwiy2C0I227/M+9KdncRBhd/ZTaRHL8XojfgN0rZZFRc7m2xcrTc0X9moaGL3JD1nb98j9idbIBEn 3/TNxJR3vT4bTOiulGGJmbhFu8bXpFkzl+F+C2Sz8fjK06Cu+QCGwCiZfFhA== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add the special pins configuration data to allow setup the bias of the UFS and SDCard pins on the SM8250 SoC. Signed-off-by: Neil Armstrong --- drivers/pinctrl/qcom/pinctrl-sm8250.c | 41 ++++++++++++++++++++++++++++++++--- 1 file changed, 38 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250.c b/drivers/pinctrl/qcom/pinctrl-sm8250.c index dac24f11bc2..69c907e3868 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm8250.c +++ b/drivers/pinctrl/qcom/pinctrl-sm8250.c @@ -18,8 +18,37 @@ static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); static const struct pinctrl_function msm_pinctrl_functions[] = { { "qup12", 1 }, - { "gpio", 0 }, - { "sdc2_clk", 0 } }; + { "gpio", 0 }, }; +#define SDC_PINGROUP(pg_name, ctl, pull, drv) \ + { \ + .name = pg_name, \ + .ctl_reg = ctl, \ + .io_reg = 0, \ + .pull_bit = pull, \ + .drv_bit = drv, \ + .oe_bit = -1, \ + .in_bit = -1, \ + .out_bit = -1, \ + } + +#define UFS_RESET(pg_name, offset) \ + { \ + .name = pg_name, \ + .ctl_reg = offset, \ + .io_reg = offset + 0x4, \ + .pull_bit = 3, \ + .drv_bit = 0, \ + .oe_bit = -1, \ + .in_bit = -1, \ + .out_bit = 0, \ + } + +static const struct msm_special_pin_data sm8250_special_pins_data[] = { + [0] = UFS_RESET("ufs_reset", SOUTH + 0xb8000), + [1] = SDC_PINGROUP("sdc2_clk", NORTH + 0xb7000, 14, 6), + [2] = SDC_PINGROUP("sdc2_cmd", NORTH + 0xb7000, 11, 3), + [3] = SDC_PINGROUP("sdc2_data", NORTH + 0xb7000, 9, 0), +}; static const unsigned int sm8250_pin_offsets[] = { [0] = SOUTH, [1] = SOUTH, [2] = SOUTH, [3] = SOUTH, [4] = NORTH, [5] = NORTH, @@ -62,7 +91,12 @@ static const char *sm8250_get_function_name(struct udevice *dev, unsigned int se static const char *sm8250_get_pin_name(struct udevice *dev, unsigned int selector) { - snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + if (selector >= 180 && selector <= 183) + snprintf(pin_name, MAX_PIN_NAME_LEN, + sm8250_special_pins_data[selector - 180].name); + else + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + return pin_name; } @@ -76,6 +110,7 @@ static struct msm_pinctrl_data sm8250_data = { .pin_offsets = sm8250_pin_offsets, .pin_count = ARRAY_SIZE(sm8250_pin_offsets), .special_pins_start = 180, + .special_pins_data = sm8250_special_pins_data, }, .functions_count = ARRAY_SIZE(msm_pinctrl_functions), .get_function_name = sm8250_get_function_name,