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Mon, 09 Sep 2024 10:56:42 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 489Auew9016738 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 9 Sep 2024 10:56:40 GMT Received: from hu-mohs-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 9 Sep 2024 03:56:32 -0700 From: Mohammad Rafi Shaik To: Srinivas Kandagatla , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Bard Liao , Jaroslav Kysela , "Takashi Iwai" CC: Pierre-Louis Bossart , Sanyog Kale , , , , , , , , , Mohammad Rafi Shaik Subject: [PATCH v1 1/4] ASoC: dt-bindings: wcd938x-sdw: Add static channel mapping support Date: Mon, 9 Sep 2024 16:25:44 +0530 Message-ID: <20240909105547.2691015-2-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240909105547.2691015-1-quic_mohs@quicinc.com> References: <20240909105547.2691015-1-quic_mohs@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: kMy9jb9-sGehhyPyowVM5ieFaMuT25-J X-Proofpoint-ORIG-GUID: kMy9jb9-sGehhyPyowVM5ieFaMuT25-J X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 mlxlogscore=999 bulkscore=0 clxscore=1015 impostorscore=0 phishscore=0 spamscore=0 malwarescore=0 suspectscore=0 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2408220000 definitions=main-2409090087 Message-ID-Hash: WYQ3MJ6ZMUT5DWLPAKIPKDVIEO6NIX5J X-Message-ID-Hash: WYQ3MJ6ZMUT5DWLPAKIPKDVIEO6NIX5J X-MailFrom: quic_mohs@quicinc.com X-Mailman-Rule-Misses: dmarc-mitigation; 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Signed-off-by: Mohammad Rafi Shaik --- .../bindings/sound/qcom,wcd937x-sdw.yaml | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd937x-sdw.yaml b/Documentation/devicetree/bindings/sound/qcom,wcd937x-sdw.yaml index d3cf8f59cb23..1db3c001ce98 100644 --- a/Documentation/devicetree/bindings/sound/qcom,wcd937x-sdw.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,wcd937x-sdw.yaml @@ -58,6 +58,30 @@ properties: items: enum: [1, 2, 3, 4, 5] + qcom,tx-channel-mapping: + description: | + Specifies static channel mapping between slave and master tx port + channels. + In the order of slave port channels which is adc1, adc2, adc3, adc4, + dmic0, dmic1, mbhc, dmic2, dmic3, dmci4, dmic5, dmic6, dmic7. + $ref: /schemas/types.yaml#/definitions/uint8-array + minItems: 8 + maxItems: 13 + items: + enum: [1, 2, 4, 8] + + qcom,rx-channel-mapping: + description: | + Specifies static channels mapping between slave and master rx port + channels. + In the order of slave port channels, which is + hph_l, hph_r, clsh, comp_l, comp_r, lo, dsd_r, dsd_l. + $ref: /schemas/types.yaml#/definitions/uint8-array + minItems: 8 + maxItems: 8 + items: + enum: [1, 2, 4, 8] + required: - compatible - reg @@ -74,6 +98,8 @@ examples: compatible = "sdw20217010a00"; reg = <0 4>; qcom,rx-port-mapping = <1 2 3 4 5>; + qcom,rx-channel-mapping = /bits/ 8 <0x01 0x02 0x01 0x01 0x02 + 0x01 0x01 0x02>; }; }; @@ -85,6 +111,8 @@ examples: compatible = "sdw20217010a00"; reg = <0 3>; qcom,tx-port-mapping = <2 2 3 4>; + qcom,tx-channel-mapping = /bits/ 8 <0x01 0x02 0x01 0x01 0x02 0x04 + 0x04 0x08 0x01 0x02 0x04 0x8>; }; }; From patchwork Mon Sep 9 10:55:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammad Rafi Shaik X-Patchwork-Id: 826656 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6F5CFECE57A for ; Mon, 9 Sep 2024 10:58:12 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 116B4852; 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no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.9 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Add static channel mapping support in soundwire master. The qcom_swrm_set_channel_map() will update the master channel mask based on master port number. Signed-off-by: Mohammad Rafi Shaik --- drivers/soundwire/qcom.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c index aed57002fd0e..65ed1ff7888f 100644 --- a/drivers/soundwire/qcom.c +++ b/drivers/soundwire/qcom.c @@ -156,6 +156,7 @@ struct qcom_swrm_port_config { u8 word_length; u8 blk_group_count; u8 lane_control; + u8 ch_mask; }; /* @@ -1048,8 +1049,14 @@ static int qcom_swrm_port_enable(struct sdw_bus *bus, { u32 reg = SWRM_DP_PORT_CTRL_BANK(enable_ch->port_num, bank); struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus); + struct qcom_swrm_port_config *pcfg; u32 val; + pcfg = &ctrl->pconfig[enable_ch->port_num]; + + if (pcfg->ch_mask != SWR_INVALID_PARAM && pcfg->ch_mask != 0) + enable_ch->ch_mask = pcfg->ch_mask; + ctrl->reg_read(ctrl, reg, &val); if (enable_ch->enable) @@ -1060,6 +1067,16 @@ static int qcom_swrm_port_enable(struct sdw_bus *bus, return ctrl->reg_write(ctrl, reg, val); } +static int qcom_swrm_set_channel_map(struct sdw_bus *bus, int *ch_mask, unsigned int port_num) +{ + struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus); + + if (ch_mask && port_num) + ctrl->pconfig[port_num].ch_mask = ch_mask[port_num]; + + return 0; +} + static const struct sdw_master_port_ops qcom_swrm_port_ops = { .dpn_set_port_params = qcom_swrm_port_params, .dpn_set_port_transport_params = qcom_swrm_transport_params, @@ -1070,6 +1087,7 @@ static const struct sdw_master_ops qcom_swrm_ops = { .read_prop = qcom_swrm_read_prop, .xfer_msg = qcom_swrm_xfer_msg, .pre_bank_switch = qcom_swrm_pre_bank_switch, + .set_master_channel_map = qcom_swrm_set_channel_map, }; static int qcom_swrm_compute_params(struct sdw_bus *bus)