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([178.197.222.82]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a8a6236d194sm277544866b.113.2024.09.06.07.01.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Sep 2024 07:01:15 -0700 (PDT) From: Krzysztof Kozlowski To: Michael Turquette , Stephen Boyd Cc: Krzysztof Kozlowski , Chanwoo Choi , linux-clk@vger.kernel.org, Sylwester Nawrocki , Alim Akhtar , Peter Griffin , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [GIT PULL] clk: samsung: drivers for v6.12 Date: Fri, 6 Sep 2024 16:01:10 +0200 Message-ID: <20240906140111.70922-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The following changes since commit 8400291e289ee6b2bf9779ff1c83a291501f017b: Linux 6.11-rc1 (2024-07-28 14:19:55 -0700) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-clk-6.12 for you to fetch changes up to 485e13fe2fb649e60eb49d8bec4404da215c1f5b: clk: samsung: add top clock support for ExynosAuto v920 SoC (2024-08-23 09:21:35 +0200) ---------------------------------------------------------------- Samsung SoC clock drivers changes for 6.12 1. Exynos850: Add clock for Thermal Management Unit. 2. Exynos7885: Fix duplicated ID in the header, add missing TOP PLLs and add clocks for USB block in the FSYS clock controller. 3. ExynosAutov9: Add DPUM clock controller 4. ExynosAutov920: Add new (first) clock controllers: TOP and PERIC0 (and a bit more complete bindings). ---------------------------------------------------------------- David Virag (7): dt-bindings: clock: exynos7885: Fix duplicated binding dt-bindings: clock: exynos7885: Add CMU_TOP PLL MUX indices dt-bindings: clock: exynos7885: Add indices for USB clocks clk: samsung: exynos7885: Update CLKS_NR_FSYS after bindings fix clk: samsung: exynos7885: Add missing MUX clocks from PLLs in CMU_TOP clk: samsung: clk-pll: Add support for pll_1418x clk: samsung: exynos7885: Add USB related clocks to CMU_FSYS Krzysztof Kozlowski (3): Merge branch 'for-v6.12/clk-dt-bindings' into next/clk Merge branch 'for-v6.12/clk-dt-bindings' into next/clk Merge branch 'for-v6.12/clk-dt-bindings' into next/clk Kwanghoon Son (2): dt-bindings: clock: exynosautov9: add dpum clock clk: samsung: exynosautov9: add dpum clock support Sam Protsenko (2): dt-bindings: clock: exynos850: Add TMU clock clk: samsung: exynos850: Add TMU clock Sunyeal Hong (3): dt-bindings: clock: add ExynosAuto v920 SoC CMU bindings clk: samsung: clk-pll: Add support for pll_531x clk: samsung: add top clock support for ExynosAuto v920 SoC .../bindings/clock/samsung,exynosautov9-clock.yaml | 19 + .../clock/samsung,exynosautov920-clock.yaml | 162 +++ drivers/clk/samsung/Makefile | 1 + drivers/clk/samsung/clk-exynos7885.c | 93 +- drivers/clk/samsung/clk-exynos850.c | 7 +- drivers/clk/samsung/clk-exynosautov9.c | 83 ++ drivers/clk/samsung/clk-exynosautov920.c | 1173 ++++++++++++++++++++ drivers/clk/samsung/clk-pll.c | 62 +- drivers/clk/samsung/clk-pll.h | 2 + include/dt-bindings/clock/exynos7885.h | 32 +- include/dt-bindings/clock/exynos850.h | 1 + include/dt-bindings/clock/samsung,exynosautov9.h | 11 + include/dt-bindings/clock/samsung,exynosautov920.h | 191 ++++ 13 files changed, 1802 insertions(+), 35 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml create mode 100644 drivers/clk/samsung/clk-exynosautov920.c create mode 100644 include/dt-bindings/clock/samsung,exynosautov920.h