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([2804:7f0:b401:42a1:3e7c:3fff:fe7a:e83b]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-206ae913cf1sm43844425ad.28.2024.09.06.07.33.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Sep 2024 07:33:48 -0700 (PDT) From: Gustavo Romero To: qemu-devel@nongnu.org, philmd@linaro.org, alex.bennee@linaro.org, richard.henderson@linaro.org Cc: peter.maydell@linaro.org, gustavo.romero@linaro.org Subject: [PATCH v4 1/5] gdbstub: Use specific MMU index when probing MTE addresses Date: Fri, 6 Sep 2024 14:33:12 +0000 Message-Id: <20240906143316.657436-2-gustavo.romero@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240906143316.657436-1-gustavo.romero@linaro.org> References: <20240906143316.657436-1-gustavo.romero@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=gustavo.romero@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Use cpu_mmu_index() to determine the specific translation regime (MMU index) before probing addresses using allocation_tag_mem_probe(). Currently, the MMU index is hardcoded to 0 and only works for user mode. By obtaining the specific MMU index according to the translation regime, future use of the stubs relying on allocation_tag_mem_probe in other regimes will be possible, like in EL1. This commit also changes the ptr_size value passed to allocation_tag_mem_probe() from 8 to 1. The ptr_size parameter actually represents the number of bytes in the memory access (which can be as small as 1 byte), rather than the number of bits used in the address space pointed to by ptr. Signed-off-by: Gustavo Romero Reviewed-by: Richard Henderson --- target/arm/gdbstub64.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index 5221381cc8..85a19c14c7 100644 --- a/target/arm/gdbstub64.c +++ b/target/arm/gdbstub64.c @@ -435,6 +435,7 @@ static void handle_q_memtag(GArray *params, void *user_ctx) { ARMCPU *cpu = ARM_CPU(user_ctx); CPUARMState *env = &cpu->env; + uint32_t mmu_index; uint64_t addr = gdb_get_cmd_param(params, 0)->val_ull; uint64_t len = gdb_get_cmd_param(params, 1)->val_ul; @@ -458,8 +459,10 @@ static void handle_q_memtag(GArray *params, void *user_ctx) gdb_put_packet("E03"); } + /* Find out the current translation regime for probe. */ + mmu_index = cpu_mmu_index(env_cpu(env), false); /* Note that tags are packed here (2 tags packed in one byte). */ - tags = allocation_tag_mem_probe(env, 0, addr, MMU_DATA_LOAD, 8 /* 64-bit */, + tags = allocation_tag_mem_probe(env, mmu_index, addr, MMU_DATA_LOAD, 1, MMU_DATA_LOAD, true, 0); if (!tags) { /* Address is not in a tagged region. */ @@ -478,13 +481,16 @@ static void handle_q_isaddresstagged(GArray *params, void *user_ctx) { ARMCPU *cpu = ARM_CPU(user_ctx); CPUARMState *env = &cpu->env; + uint32_t mmu_index; uint64_t addr = gdb_get_cmd_param(params, 0)->val_ull; uint8_t *tags; const char *reply; - tags = allocation_tag_mem_probe(env, 0, addr, MMU_DATA_LOAD, 8 /* 64-bit */, + /* Find out the current translation regime for probe. */ + mmu_index = cpu_mmu_index(env_cpu(env), false); + tags = allocation_tag_mem_probe(env, mmu_index, addr, MMU_DATA_LOAD, 1, MMU_DATA_LOAD, true, 0); reply = tags ? "01" : "00"; @@ -495,6 +501,7 @@ static void handle_Q_memtag(GArray *params, void *user_ctx) { ARMCPU *cpu = ARM_CPU(user_ctx); CPUARMState *env = &cpu->env; + uint32_t mmu_index; uint64_t start_addr = gdb_get_cmd_param(params, 0)->val_ull; uint64_t len = gdb_get_cmd_param(params, 1)->val_ul; @@ -527,8 +534,10 @@ static void handle_Q_memtag(GArray *params, void *user_ctx) * Get all tags in the page starting from the tag of the start address. * Note that there are two tags packed into a single byte here. */ - tags = allocation_tag_mem_probe(env, 0, start_addr, MMU_DATA_STORE, - 8 /* 64-bit */, MMU_DATA_STORE, true, 0); + /* Find out the current translation regime for probe. */ + mmu_index = cpu_mmu_index(env_cpu(env), false); + tags = allocation_tag_mem_probe(env, mmu_index, start_addr, MMU_DATA_STORE, + 1, MMU_DATA_STORE, true, 0); if (!tags) { /* Address is not in a tagged region. */ gdb_put_packet("E04"); From patchwork Fri Sep 6 14:33:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Romero X-Patchwork-Id: 825992 Delivered-To: patch@linaro.org Received: by 2002:adf:a345:0:b0:367:895a:4699 with SMTP id d5csp836823wrb; Fri, 6 Sep 2024 07:34:56 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUHToFB1dH0JTZ0j5hQIoLh3QdF4n6k/L2+z56ZdTl0kU/puCrccwMX29WlhmXoGM2KaH1GlA==@linaro.org X-Google-Smtp-Source: AGHT+IGzofhB2/o0EB9D2ItTvvZ8PIA9RbZMCcEAWLnfS/oUqDeHIH7EXanx4C67YHqfVnZ27SHn X-Received: by 2002:ac8:5852:0:b0:457:cab4:6e4a with SMTP id d75a77b69052e-4580c757587mr38001031cf.37.1725633296285; Fri, 06 Sep 2024 07:34:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725633296; cv=none; d=google.com; s=arc-20240605; b=GpkTIiCwL7SxRaa0NTn9lHZ4wGA0wqKH7ng3FUsvY67jTwHqGtihBH9kb6zJmL5vai LXeNl5EaSZffieJYInvTy0im2iWi/BJ/oGribpnO9gZXcb+sLutE0eSDUv+8fD3oWknz kCfv3Q7yUsiXrm6B6FB8yToZghA2i8Jm22RNxo7HMOQaQu7ypKrciNooGaGoHAWv7VqG pY0+6G+4UhOwEtTqe6qJbKmd6T65UPuRQ+i4Oo+hiHlYf8YEvYr3tGVejs7eG5u4ubMu tVvUV5JZbfwGntHXwsvTA3KX4ht92fvIjtdecL8ck7TSf4XDm8WXGSRetphsPwl3bv9X v6ww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=xaIvNRilfR6Nz+fW3b1xuwYZ22NkX4J/LvEgnShJQ0w=; fh=fQSRkfw+DkTHa5KQssXieneufL+rl3wPoA2jkVIsZpk=; b=UgXEWoH0N+TgtaxdxNCQtWW+DPkHcvBdrBIcCM6TSBq9i6WvVMqLp45W8VUUgHGrri lx/HRcZZZd/ytUiFHX0iD6oiK6kZV4wXbobeNjsYm1H+QfF/igkVyBlA1Y4wu4Of786z PqqLM6YjtCM9Rr18S+ucDDodjt93CY3ZPgRXwKy0wHkM3KQnvpHHSVgoVNIQAFICggDt ro57deuRNfmgrvnFbwNhHRE+TyAFe1d3IKEBmZopvToRkysvmsUkYa8ifxvKpdTdK9fu 7VU6DjWUMhbJPoLvjWVe10U73g6puTEMO6lJnaxq9T8boMBhFzoreURxafgtimc6dsZ2 7Ipg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XHbCVZN9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2804:7f0:b401:42a1:3e7c:3fff:fe7a:e83b]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-206ae913cf1sm43844425ad.28.2024.09.06.07.33.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Sep 2024 07:33:50 -0700 (PDT) From: Gustavo Romero To: qemu-devel@nongnu.org, philmd@linaro.org, alex.bennee@linaro.org, richard.henderson@linaro.org Cc: peter.maydell@linaro.org, gustavo.romero@linaro.org Subject: [PATCH v4 2/5] gdbstub: Add support for MTE in system mode Date: Fri, 6 Sep 2024 14:33:13 +0000 Message-Id: <20240906143316.657436-3-gustavo.romero@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240906143316.657436-1-gustavo.romero@linaro.org> References: <20240906143316.657436-1-gustavo.romero@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=gustavo.romero@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This commit makes handle_q_memtag, handle_q_isaddresstagged, and handle_Q_memtag stubs build for system mode, allowing all GDB 'memory-tag' subcommands to work with QEMU gdbstub on aarch64 system mode. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/620 Signed-off-by: Gustavo Romero Reviewed-by: Richard Henderson --- target/arm/gdbstub64.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index 85a19c14c7..9462d3f560 100644 --- a/target/arm/gdbstub64.c +++ b/target/arm/gdbstub64.c @@ -430,6 +430,7 @@ int aarch64_gdb_set_tag_ctl_reg(CPUState *cs, uint8_t *buf, int reg) return 0; #endif } +#endif /* CONFIG_USER_ONLY */ static void handle_q_memtag(GArray *params, void *user_ctx) { @@ -600,12 +601,10 @@ static const GdbCmdParseEntry cmd_handler_table[NUM_CMDS] = { .need_cpu_context = true }, }; -#endif /* CONFIG_USER_ONLY */ void aarch64_cpu_register_gdb_commands(ARMCPU *cpu, GString *qsupported, GPtrArray *qtable, GPtrArray *stable) { -#ifdef CONFIG_USER_ONLY /* MTE */ if (cpu_isar_feature(aa64_mte, cpu)) { g_string_append(qsupported, ";memory-tagging+"); @@ -614,5 +613,4 @@ void aarch64_cpu_register_gdb_commands(ARMCPU *cpu, GString *qsupported, g_ptr_array_add(qtable, (gpointer) &cmd_handler_table[qIsAddressTagged]); g_ptr_array_add(stable, (gpointer) &cmd_handler_table[QMemTags]); } -#endif } From patchwork Fri Sep 6 14:33:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gustavo Romero X-Patchwork-Id: 825991 Delivered-To: patch@linaro.org Received: by 2002:adf:a345:0:b0:367:895a:4699 with SMTP id d5csp836755wrb; Fri, 6 Sep 2024 07:34:47 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVKeySrlh5uHL61vZ9W7K2juFHiYaXqy4eO5igNIYYtnfjN2mVbpfiEXXSedhlESG4uq7QSwQ==@linaro.org X-Google-Smtp-Source: AGHT+IEYbJe1ZHZMHtn4lYB7Z50xEjTAr3XB3DjbyAUXASY7f6HnC38M9P1nvQ1n+k0Pj+HGEHTj X-Received: by 2002:a0c:ef8d:0:b0:6c3:6f83:b8a with SMTP id 6a1803df08f44-6c52851da4bmr30754886d6.42.1725633287366; Fri, 06 Sep 2024 07:34:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725633287; cv=none; d=google.com; s=arc-20240605; b=SP4eUfULuXRsOtiZHSjFJFClzMpfeyGRxbXfJrWIXnChR43EmVqnacLFeQ9z7N6EdV owc5DVVlm/8AXbe37Fhoop7KYD5rDLQ5NxocQj+kX+SJ1hJQxHCJGoRqXAK8VvwFUB3C NugNvKQBZJ4bEbxIxrhheZrOBJzneowA4AS4KT+me3PN8G3Kt2wm58RYqgnetcJBRkIy xw7H8HO6i5AwvxXS5yOoMk7xW64/UcPrrxyiQz0jAwepvETx/+ks44W2aG9Bvx+yclKt Cm07CuJzumzy26KNMdb8wdqbOu+MBdrxNXvOEe0rW+rBJj4ln84sddRvH4Q0JIcOCXNe OBTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=RG/0hzlp1e1U/X+viI7qOSSU9A8TRQ8gs/a7p+ROYlY=; fh=fQSRkfw+DkTHa5KQssXieneufL+rl3wPoA2jkVIsZpk=; b=HR5I40Z14YmBXWVT+7r4ZEKjWrFz2NRX6HQUoEEJYVf7aUotC+MGLzQm+A2aaWZw32 Qyr1xbNxNsgXyT2n0j8DN1weMcNLOfW+okJ/TyEBddJgpo/x2VLH+cOKUeA4GSO/+QuF j1KnhEFoKT/Xr2ZLZqXRdsP7AkT29ejJIKiwm3c+zasf6DpuVI+3zHPUGa3g+KCu2T6e Om6aPD+K7TJB2CMZw2qt1SdyRqDJhaV7QZyClS/E31FCw50SPXNjh0bwiTsmAiZFvn4u yCIuz19sQzy+05caSlzhbDlxKhkhzTaCL4HCSD0F9pMr8vWNcvPTrwZ9ikh/k8CLGiY/ qjqg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zKbSTBFY; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2804:7f0:b401:42a1:3e7c:3fff:fe7a:e83b]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-206ae913cf1sm43844425ad.28.2024.09.06.07.33.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Sep 2024 07:33:53 -0700 (PDT) From: Gustavo Romero To: qemu-devel@nongnu.org, philmd@linaro.org, alex.bennee@linaro.org, richard.henderson@linaro.org Cc: peter.maydell@linaro.org, gustavo.romero@linaro.org Subject: [PATCH v4 3/5] tests/guest-debug: Support passing arguments to the GDB test script Date: Fri, 6 Sep 2024 14:33:14 +0000 Message-Id: <20240906143316.657436-4-gustavo.romero@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240906143316.657436-1-gustavo.romero@linaro.org> References: <20240906143316.657436-1-gustavo.romero@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=gustavo.romero@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This commit adds support for passing arguments to the GDB test scripts so it's possible to parse the args in an "argparse way" in the test scripts launched by the runner. The arguments should be preceded by -- when passed to the runner. For example, passing "--help" arg to the GDB_TEST_SCRIPT: run-test.py [...] --test -- --help The test script should not use the argparse module directly but import arg_parser from test_gdbstub module. arg_parser then can be used just like the argparse.ArgumentParser class: from test_gdbstub import arg_parser p = arg_parser(prog="test-mytest.py", description="My test.") p.add_argument("--vowel", help="Select vowel", required=True, choices=['a','e','i','o','u']) [...] The arg_parser allows a smooth and informative exit if, for instance, the caller of the runner script passes an invalid argument or misses a required argument by the test script. Signed-off-by: Gustavo Romero Reviewed-by: Alex Bennée --- tests/guest-debug/run-test.py | 6 ++++++ tests/guest-debug/test_gdbstub.py | 5 +++++ 2 files changed, 11 insertions(+) diff --git a/tests/guest-debug/run-test.py b/tests/guest-debug/run-test.py index 368ff8a890..5a091db8be 100755 --- a/tests/guest-debug/run-test.py +++ b/tests/guest-debug/run-test.py @@ -27,6 +27,10 @@ def get_args(): parser.add_argument("--binary", help="Binary to debug", required=True) parser.add_argument("--test", help="GDB test script") + parser.add_argument('test_args', nargs='*', + help="Additional args for GDB test script. " + "The args should be preceded by -- to avoid confusion " + "with flags for runner script") parser.add_argument("--gdb", help="The gdb binary to use", default=None) parser.add_argument("--gdb-args", help="Additional gdb arguments") @@ -91,6 +95,8 @@ def log(output, msg): gdb_cmd += " -ex 'target remote %s'" % (socket_name) # finally the test script itself if args.test: + if args.test_args: + gdb_cmd += f" -ex \"py sys.argv={args.test_args}\"" gdb_cmd += " -x %s" % (args.test) diff --git a/tests/guest-debug/test_gdbstub.py b/tests/guest-debug/test_gdbstub.py index 46fbf98f0c..a715c0e3f5 100644 --- a/tests/guest-debug/test_gdbstub.py +++ b/tests/guest-debug/test_gdbstub.py @@ -2,6 +2,7 @@ """ from __future__ import print_function +import argparse import gdb import os import sys @@ -9,6 +10,10 @@ fail_count = 0 +class arg_parser(argparse.ArgumentParser): + def exit(self, status=None, message=""): + print("Wrong GDB script test argument! " + message) + gdb.execute("exit 1") def report(cond, msg): """Report success/fail of a test""" From patchwork Fri Sep 6 14:33:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Romero X-Patchwork-Id: 825988 Delivered-To: patch@linaro.org Received: by 2002:adf:a345:0:b0:367:895a:4699 with SMTP id d5csp836597wrb; Fri, 6 Sep 2024 07:34:26 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWBFOMjbG6zZTdNqx3msNAJTt3k7ubWNWeVrcKNWD7hVP1U9+KGtYhRXtTyYXjRaD15Iqer4A==@linaro.org X-Google-Smtp-Source: AGHT+IH0WXRJt/Xv9YOgX8mbHXDINy6K84gH2mcVBD1iwdeb3gnafzhKu9WyBQnZ1rK8PVZHUvBG X-Received: by 2002:a05:6214:2c03:b0:6c3:4ba5:edd8 with SMTP id 6a1803df08f44-6c528509d28mr30670596d6.39.1725633266577; Fri, 06 Sep 2024 07:34:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725633266; cv=none; d=google.com; s=arc-20240605; b=Qi3OwYKs+x/gRv6M+q9q22Op7sRRNH8CqloBB8tJ9CMCKjy5YG6g+/H9L/FaYvVm5f H2zYg391qrOGciCOdHhcHIxDo+awqwFDRgu9oYDnKjoTAvCCwTd2WLdIqbU39qubNods b6Yy4rm9717VJfGwz9mM+j5qF2rdINtOfVmTNvVI45TbPA8VckEuWESiPkKlPJNExY3t a9lsD1xI14kTRhJsXpC9CCbkzvpWUBsKLQE49+vJVjHuNbKqrhkQfLuclMdA7JUEm3EW saifRyfjBR7pm6g9AHsrLmZRDBcDvNFKOYIVE6HFo+qKn8oRfQ9gS+9RKwr5aThxMbc9 BU/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9zMNWTemNt+XMGFhIvLfgSfk7j8P7fZjmzkPpuiAszc=; fh=fQSRkfw+DkTHa5KQssXieneufL+rl3wPoA2jkVIsZpk=; b=hYwjfSf14QfasjVEoTCUfG5Rcb6ZaTf1iwHdQTDMGlvEpPNDJ0wAiQKODIEeRLpgsb 7P6DVXR1FL7/xLznJyY3UuAoUTVLEcilWPOTC6003dZ58cEieAX7vyYdx4rU5+vWc4GA JpYIDHwMRqykR6z6V8K9G8s+pmg3sSHEUd2scxACWj+HyMSLZNsK6HFpwE+ezHu+SSTT kzE8asRHwThOUR3DD9DGsTrrCeJONT0kAO2zgGaZQIZWlqXY/SCQP9vMScslcQBxEWyG JuETTler08iPqImJKYBY6x8sx4cCY4P+OLvkA5gy6HGQ5PoHa8uC9q4hudZtpt/DWehI 4gZQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Kt/gluZC"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2804:7f0:b401:42a1:3e7c:3fff:fe7a:e83b]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-206ae913cf1sm43844425ad.28.2024.09.06.07.33.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Sep 2024 07:33:55 -0700 (PDT) From: Gustavo Romero To: qemu-devel@nongnu.org, philmd@linaro.org, alex.bennee@linaro.org, richard.henderson@linaro.org Cc: peter.maydell@linaro.org, gustavo.romero@linaro.org Subject: [PATCH v4 4/5] tests/tcg/aarch64: Improve linker script organization Date: Fri, 6 Sep 2024 14:33:15 +0000 Message-Id: <20240906143316.657436-5-gustavo.romero@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240906143316.657436-1-gustavo.romero@linaro.org> References: <20240906143316.657436-1-gustavo.romero@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=gustavo.romero@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Improve kernel.ld linker script organization by using MEMORY command. Signed-off-by: Richard Henderson Signed-off-by: Gustavo Romero --- tests/tcg/aarch64/system/kernel.ld | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/tests/tcg/aarch64/system/kernel.ld b/tests/tcg/aarch64/system/kernel.ld index 7b3a76dcbf..5f39258d32 100644 --- a/tests/tcg/aarch64/system/kernel.ld +++ b/tests/tcg/aarch64/system/kernel.ld @@ -1,23 +1,23 @@ ENTRY(__start) -SECTIONS -{ - /* virt machine, RAM starts at 1gb */ - . = (1 << 30); +MEMORY { + /* On virt machine RAM starts at 1 GiB. */ + + /* Align text and rodata to the 1st 2 MiB chunk. */ + TXT (rx) : ORIGIN = 1 << 30, LENGTH = 2M + /* Align r/w data to the 2nd 2 MiB chunk. */ + DAT (rw) : ORIGIN = (1 << 30) + 2M, LENGTH = 2M +} + +SECTIONS { .text : { *(.text) - } - .rodata : { *(.rodata) - } - /* align r/w section to next 2mb */ - . = ALIGN(1 << 21); + } >TXT .data : { *(.data) - } - .bss : { *(.bss) - } + } >DAT /DISCARD/ : { *(.ARM.attributes) } From patchwork Fri Sep 6 14:33:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Romero X-Patchwork-Id: 825993 Delivered-To: patch@linaro.org Received: by 2002:adf:a345:0:b0:367:895a:4699 with SMTP id d5csp836821wrb; Fri, 6 Sep 2024 07:34:56 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUwbbN+waIyQ5fjl/g4HT9mjuJ1AzTInlq/7Eym/s2h+Zehxx40yHYSGCxz3QPRMtIwEGZLFA==@linaro.org X-Google-Smtp-Source: AGHT+IEW9/ZHeJYJCkMlXZjC/QVAGS51a68A6YcKyWSYVhiCbiYjm2OgQ9xLoXDF6AZ9MyHG4zH8 X-Received: by 2002:a05:620a:1a28:b0:79f:1e1:faa7 with SMTP id af79cd13be357-7a99732f4c5mr325368685a.17.1725633296152; Fri, 06 Sep 2024 07:34:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1725633296; cv=none; d=google.com; s=arc-20240605; b=az82vlvGIcVrKydNT3Wr7Yw3tXwanwCY4+BKrIqGNSP1h2upv72eWvd+ZCT1+5uWqy GrJXX6tqSDhLwkUc2oChoYOhTrRZp8aIbC1VcBlF/lFuZ3vNo0JBaxTg33fmOsRYX0Ge NLNLosv8UfktH8gK3KhM58nZu0QvgVCT6muH+VYRFiOmhYn9VjRrkpYNC5C0d7eGC/Y2 6Xb9eqeBMYeAbiV5fTu+Un3UaUqPI/7fz1fohF5v82aiNP14HswRECp0bmHIjdG/hvf4 gbu3fBDA3/5ICrZTNMxXKbvMcOsGVhm+we/1dkhXlqPUionsXXQz/9aVPGmocEHvnpmu FjrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=bp3M/r1sFHqmwaG0MGz5hOCYtYiXONTJiKcxB+UzUFs=; fh=fQSRkfw+DkTHa5KQssXieneufL+rl3wPoA2jkVIsZpk=; b=M0vTuS8rIkYOVt98es5BoR+FM2oId7XgnL/Q7H4q8m7k+Yjv40PIWEzNSjqYgGM7io u/0QAW9JonLrlGwAn6q9U4jRafwSN52QwtxC1iP/qCgASpbXPNg3pwkRNwpf+Akum0UJ PUGz3HQ33O793Azg0B9o54Rvx1i5qWyqvYYcADzbAiCMa+8L239Zi4LEM/RRZREWEXNm KMDAbcOXJvWwluXv1ACXVjNEBRP/Wrd4cNMeOrcEvGK+oG3HET/vNo36jxUyJo/rhRRu sO4Uul5Z1QNwUGekmmXNJKsUAnuKbmWPOYh+7YsKkzxxb2uQIXAQK/o2KQjjuzsjE+Cn +Tjg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FpxoDstj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([2804:7f0:b401:42a1:3e7c:3fff:fe7a:e83b]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-206ae913cf1sm43844425ad.28.2024.09.06.07.33.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Sep 2024 07:33:57 -0700 (PDT) From: Gustavo Romero To: qemu-devel@nongnu.org, philmd@linaro.org, alex.bennee@linaro.org, richard.henderson@linaro.org Cc: peter.maydell@linaro.org, gustavo.romero@linaro.org Subject: [PATCH v4 5/5] tests/tcg/aarch64: Extend MTE gdbstub tests to system mode Date: Fri, 6 Sep 2024 14:33:16 +0000 Message-Id: <20240906143316.657436-6-gustavo.romero@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240906143316.657436-1-gustavo.romero@linaro.org> References: <20240906143316.657436-1-gustavo.romero@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=gustavo.romero@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Extend MTE gdbstub tests to also run in system mode (share tests between user mode and system mode). The tests will only run if a version of GDB that supports MTE on baremetal is available in the test environment and if available compiler supports the 'memtag' flag (-march=armv8.5-a+memtag). For the tests running in system mode, a page that supports MTE ops. is necessary. Therefore, an MTE-enabled page is made available (mapped) in the third 2 MB chunk of the second 1 GB space in the flat mapping set in boot.S. A new binary, mte.S, is also introduced for the tests. It links against boot.S and is executed by QEMU in system mode. Signed-off-by: Gustavo Romero --- configure | 5 + tests/tcg/aarch64/Makefile.softmmu-target | 49 +++++++++- tests/tcg/aarch64/Makefile.target | 3 +- tests/tcg/aarch64/gdbstub/test-mte.py | 71 +++++++++----- tests/tcg/aarch64/system/boot.S | 11 +++ tests/tcg/aarch64/system/kernel.ld | 9 ++ tests/tcg/aarch64/system/mte.S | 109 ++++++++++++++++++++++ 7 files changed, 229 insertions(+), 28 deletions(-) create mode 100644 tests/tcg/aarch64/system/mte.S diff --git a/configure b/configure index d08b71f14b..40186d865e 100755 --- a/configure +++ b/configure @@ -1679,6 +1679,11 @@ for target in $target_list; do echo "GDB_HAS_MTE=y" >> $config_target_mak fi + if test "${gdb_arches#*aarch64}" != "$gdb_arches" && version_ge $gdb_version 16.0; then + # GDB has to support MTE in baremetal to allow debugging MTE in QEMU system mode + echo "GDB_SUPPORTS_MTE_IN_BAREMETAL=y" >> $config_target_mak + fi + echo "run-tcg-tests-$target: $qemu\$(EXESUF)" >> Makefile.prereqs tcg_tests_targets="$tcg_tests_targets $target" fi diff --git a/tests/tcg/aarch64/Makefile.softmmu-target b/tests/tcg/aarch64/Makefile.softmmu-target index 139e04d15f..59ee662cda 100644 --- a/tests/tcg/aarch64/Makefile.softmmu-target +++ b/tests/tcg/aarch64/Makefile.softmmu-target @@ -2,14 +2,22 @@ # Aarch64 system tests # -AARCH64_SYSTEM_SRC=$(SRC_PATH)/tests/tcg/aarch64/system +AARCH64_SRC=$(SRC_PATH)/tests/tcg/aarch64 +AARCH64_SYSTEM_SRC=$(AARCH64_SRC)/system + VPATH+=$(AARCH64_SYSTEM_SRC) # These objects provide the basic boot code and helper functions for all tests CRT_OBJS=boot.o -AARCH64_TEST_SRCS=$(wildcard $(AARCH64_SYSTEM_SRC)/*.c) -AARCH64_TESTS = $(patsubst $(AARCH64_SYSTEM_SRC)/%.c, %, $(AARCH64_TEST_SRCS)) +AARCH64_TEST_C_SRCS_=$(wildcard $(AARCH64_SYSTEM_SRC)/*.c) +AARCH64_TEST_S_SRCS=$(AARCH64_SYSTEM_SRC)/mte.S + +AARCH64_C_TESTS = $(patsubst $(AARCH64_SYSTEM_SRC)/%.c, %, $(AARCH64_TEST_C_SRCS)) +AARCH64_S_TESTS = $(patsubst $(AARCH64_SYSTEM_SRC)/%.S, %, $(AARCH64_TEST_S_SRCS)) + +AARCH64_TESTS = $(AARCH64_C_TESTS) +AARCH64_TESTS += $(AARCH64_S_TESTS) CRT_PATH=$(AARCH64_SYSTEM_SRC) LINK_SCRIPT=$(AARCH64_SYSTEM_SRC)/kernel.ld @@ -21,7 +29,8 @@ LDFLAGS+=-static -nostdlib $(CRT_OBJS) $(MINILIB_OBJS) -lgcc config-cc.mak: Makefile $(quiet-@)( \ - $(call cc-option,-march=armv8.3-a, CROSS_CC_HAS_ARMV8_3)) 3> config-cc.mak + $(call cc-option,-march=armv8.3-a, CROSS_CC_HAS_ARMV8_3); \ + $(call cc-option,-march=armv8.5-a+memtag, CROSS_CC_HAS_ARMV8_MTE)) 3> config-cc.mak -include config-cc.mak # building head blobs @@ -88,3 +97,35 @@ pauth-3: run-pauth-3: $(call skip-test, "RUN of pauth-3", "not built") endif + +ifneq ($(CROSS_CC_HAS_ARMV8_MTE),) +QEMU_MTE_ENABLED_MACHINE=-M virt,mte=on -cpu max -display none +QEMU_OPTS_WITH_MTE_ON = $(QEMU_MTE_ENABLED_MACHINE) $(QEMU_BASE_ARGS) -kernel +mte: CFLAGS+=-march=armv8.5-a+memtag +mte: mte.S $(LINK_SCRIPT) $(CRT_OBJS) $(MINILIB_OBJS) + $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) + +run-mte: QEMU_OPTS=$(QEMU_OPTS_WITH_MTE_ON) +run-mte: mte + +ifeq ($(GDB_SUPPORTS_MTE_IN_BAREMETAL),y) +run-gdbstub-mte: QEMU_OPTS=$(QEMU_OPTS_WITH_MTE_ON) +run-gdbstub-mte: mte + $(call run-test, $@, $(GDB_SCRIPT) \ + --output run-gdbstub-mte.out \ + --gdb $(GDB) \ + --qemu $(QEMU) --qargs "-chardev null$(COMMA)id=output $(QEMU_OPTS)" \ + --bin $< --test $(AARCH64_SRC)/gdbstub/test-mte.py -- --mode=system, \ + gdbstub MTE support) + +EXTRA_RUNS += run-gdbstub-mte +else # !GDB_SUPPORTS_MTE_IN_BAREMETAL +run-gdbstub-mte: + $(call skip-test "RUN of gdbstub-mte", "GDB does not support MTE in baremetal!") +endif +else # !CROSS_CC_HAS_ARMV8_MTE +mte: + $(call skip-test, "BUILD of $@", "missing compiler support") +run-mte: + $(call skip-test, "RUN of mte", "not build") +endif diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 8cc62eb456..9efe2f81ad 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -138,7 +138,8 @@ run-gdbstub-mte: mte-8 $(call run-test, $@, $(GDB_SCRIPT) \ --gdb $(GDB) \ --qemu $(QEMU) --qargs "$(QEMU_OPTS)" \ - --bin $< --test $(AARCH64_SRC)/gdbstub/test-mte.py, \ + --bin $< --test $(AARCH64_SRC)/gdbstub/test-mte.py \ + -- --mode=user, \ gdbstub MTE support) EXTRA_RUNS += run-gdbstub-mte diff --git a/tests/tcg/aarch64/gdbstub/test-mte.py b/tests/tcg/aarch64/gdbstub/test-mte.py index 66f9c25f8a..a4cae6caa0 100644 --- a/tests/tcg/aarch64/gdbstub/test-mte.py +++ b/tests/tcg/aarch64/gdbstub/test-mte.py @@ -1,21 +1,26 @@ from __future__ import print_function # # Test GDB memory-tag commands that exercise the stubs for the qIsAddressTagged, -# qMemTag, and QMemTag packets. Logical tag-only commands rely on local -# operations, hence don't exercise any stub. +# qMemTag, and QMemTag packets, which are used for manipulating allocation tags. +# Logical tags-related commands rely on local operations, hence don't exercise +# any stub and so are not used in this test. # -# The test consists in breaking just after a atag() call (which sets the -# allocation tag -- see mte-8.c for details) and setting/getting tags in -# different memory locations and ranges starting at the address of the array -# 'a'. +# The test consists in breaking just after a tag is set in a specific memory +# chunk, and then using the GDB 'memory-tagging' subcommands to set/get tags in +# different memory locations and ranges in the MTE-enabled memory chunk. # # This is launched via tests/guest-debug/run-test.py # -import gdb +try: + import gdb +except ModuleNotFoundError: + from sys import exit + exit("This script must be launched via tests/guest-debug/run-test.py!") import re -from test_gdbstub import main, report +from sys import argv +from test_gdbstub import arg_parser, main, report PATTERN_0 = "Memory tags for address 0x[0-9a-f]+ match \\(0x[0-9a-f]+\\)." @@ -23,12 +28,32 @@ def run_test(): - gdb.execute("break 95", False, True) + p = arg_parser(prog="test-mte.py", description="TCG MTE tests.") + p.add_argument("--mode", help="Run test for QEMU system or user mode.", + required=True, choices=['system','user']) + + args = p.parse_args(args=argv) + + if args.mode == "system": + # Break address: where to break before performing the tests + # See mte.S for details about this label. + ba = "main_end" + # Tagged address: the start of the MTE-enabled memory chunk to be tested + # 'tagged_addr' (x1) is a pointer to the MTE-enabled page. See mte.S. + ta = "$x1" + else: # mode="user" + # Line 95 in mte-8.c + ba = "95" + # 'a' array. See mte-8.c + ta = "a" + + gdb.execute(f"break {ba}", False, True) gdb.execute("continue", False, True) + try: - # Test if we can check correctly that the allocation tag for - # array 'a' matches the logical tag after atag() is called. - co = gdb.execute("memory-tag check a", False, True) + # Test if we can check correctly that the allocation tag for the address + # in {ta} matches the logical tag in {ta}. + co = gdb.execute(f"memory-tag check {ta}", False, True) tags_match = re.findall(PATTERN_0, co, re.MULTILINE) if tags_match: report(True, f"{tags_match[0]}") @@ -39,20 +64,20 @@ def run_test(): # tags rely on local operation and so don't exercise any stub. # Set the allocation tag for the first granule (16 bytes) of - # address starting at 'a' address to a known value, i.e. 0x04. - gdb.execute("memory-tag set-allocation-tag a 1 04", False, True) + # address starting at {ta} address to a known value, i.e. 0x04. + gdb.execute(f"memory-tag set-allocation-tag {ta} 1 04", False, True) # Then set the allocation tag for the second granule to a known # value, i.e. 0x06. This tests that contiguous tag granules are - # set correct and don't run over each other. - gdb.execute("memory-tag set-allocation-tag a+16 1 06", False, True) + # set correctly and don't run over each other. + gdb.execute(f"memory-tag set-allocation-tag {ta}+16 1 06", False, True) # Read the known values back and check if they remain the same. - co = gdb.execute("memory-tag print-allocation-tag a", False, True) + co = gdb.execute(f"memory-tag print-allocation-tag {ta}", False, True) first_tag = re.match(PATTERN_1, co)[1] - co = gdb.execute("memory-tag print-allocation-tag a+16", False, True) + co = gdb.execute(f"memory-tag print-allocation-tag {ta}+16", False, True) second_tag = re.match(PATTERN_1, co)[1] if first_tag == "0x4" and second_tag == "0x6": @@ -61,15 +86,15 @@ def run_test(): report(False, "Can't set/print allocation tags!") # Now test fill pattern by setting a whole page with a pattern. - gdb.execute("memory-tag set-allocation-tag a 4096 0a0b", False, True) + gdb.execute(f"memory-tag set-allocation-tag {ta} 4096 0a0b", False, True) # And read back the tags of the last two granules in page so # we also test if the pattern is set correctly up to the end of # the page. - co = gdb.execute("memory-tag print-allocation-tag a+4096-32", False, True) + co = gdb.execute(f"memory-tag print-allocation-tag {ta}+4096-32", False, True) tag = re.match(PATTERN_1, co)[1] - co = gdb.execute("memory-tag print-allocation-tag a+4096-16", False, True) + co = gdb.execute(f"memory-tag print-allocation-tag {ta}+4096-16", False, True) last_tag = re.match(PATTERN_1, co)[1] if tag == "0xa" and last_tag == "0xb": @@ -78,8 +103,8 @@ def run_test(): report(False, "Fill pattern failed!") except gdb.error: - # This usually happens because a GDB version that does not - # support memory tagging was used to run the test. + # This usually happens because a GDB version that does not support + # memory tagging was used to run the test. report(False, "'memory-tag' command failed!") diff --git a/tests/tcg/aarch64/system/boot.S b/tests/tcg/aarch64/system/boot.S index 501685d0ec..4eb1b35b88 100644 --- a/tests/tcg/aarch64/system/boot.S +++ b/tests/tcg/aarch64/system/boot.S @@ -135,6 +135,17 @@ __start: orr x1, x1, x3 str x1, [x2] /* 2nd 2mb (.data & .bss)*/ + /* Third block: at 'mte_page', set in kernel.ld */ + adrp x1, mte_page + add x1, x1, :lo12:mte_page + bic x1, x1, #(1 << 21) - 1 + and x4, x1, x5 + add x2, x0, x4, lsr #(21 - 3) + /* attr(AF, NX, block, AttrIndx=Attr1) */ + ldr x3, =(3 << 53) | 0x401 | (1 << 2) + orr x1, x1, x3 + str x1, [x2] + /* Setup/enable the MMU. */ /* diff --git a/tests/tcg/aarch64/system/kernel.ld b/tests/tcg/aarch64/system/kernel.ld index 5f39258d32..aef043e31d 100644 --- a/tests/tcg/aarch64/system/kernel.ld +++ b/tests/tcg/aarch64/system/kernel.ld @@ -7,6 +7,8 @@ MEMORY { TXT (rx) : ORIGIN = 1 << 30, LENGTH = 2M /* Align r/w data to the 2nd 2 MiB chunk. */ DAT (rw) : ORIGIN = (1 << 30) + 2M, LENGTH = 2M + /* Align the MTE-enabled page to the 3rd 2 MiB chunk. */ + TAG (rw) : ORIGIN = (1 << 30) + 4M, LENGTH = 2M } SECTIONS { @@ -18,6 +20,13 @@ SECTIONS { *(.data) *(.bss) } >DAT + .tag : { + /* + * Symbol 'mte_page' is used in boot.S to setup the PTE and in the mte.S + * test as the address that the MTE instructions operate on. + */ + mte_page = .; + } >TAG /DISCARD/ : { *(.ARM.attributes) } diff --git a/tests/tcg/aarch64/system/mte.S b/tests/tcg/aarch64/system/mte.S new file mode 100644 index 0000000000..b611240a95 --- /dev/null +++ b/tests/tcg/aarch64/system/mte.S @@ -0,0 +1,109 @@ +/* + * Code to help test the MTE gdbstubs in system mode. + * + * Copyright (c) 2024 Linaro Limited + * + * Author: Gustavo Romero + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#define addr x0 /* Ptr to the start of the MTE-enabled page. */ +#define tagged_addr x1 /* 'addr' ptr with a random-generated tag added. */ +#define tmp0 x2 /* Scratch register. */ +#define tmp1 x3 /* Scratch register. */ +#define tmp2 x4 /* Scratch register. */ +#define tmp3 x5 /* Sctatch register. */ + + .file "mte.S" + + .text + .align 4 + + .globl main + .type main, @function + +main: + /* + * Set MAIR_EL1 (Memory Attribute Index Register). In boot.S, the + * attribute index for .mte_page is set to point to MAILR_EL field Attr1 + * (AttrIndx=Attr1), so set Attr1 as Tagged Normal (MTE) to enable MTE + * on this page. + * + * Attr1 = 0xF0 => Tagged Normal (MTE) + */ + mrs tmp0, mair_el1 + orr tmp0, tmp0, (0xF0 << 8) + msr mair_el1, tmp0 + + /* + * Set TCR_EL1 (Translation Control Registers) to ignore the top byte + * in the translated addresses so it can be used to keep the tags. + * + * TBI0[37] = 0b1 => Top Byte ignored and used for tagged addresses + */ + mrs tmp1, tcr_el1 + orr tmp1, tmp1, (1 << 37) + msr tcr_el1, tmp1 + + /* + * Set SCTLR_EL1 (System Control Register) to enable the use of MTE + * insns., like stg & friends, and to enable synchronous exception in + * case of a tag mismatch, i.e., when the logical tag in 'tagged_addr' + * is different from the allocation tag related to 'addr' address. + * + * ATA[43] = 0b1 => Enable access to allocation tags at EL1 + * TCF[41:40] = 0b01 => Tag Check Faults cause a synchronous exception + * + */ + mrs tmp2, sctlr_el1 + mov tmp3, (1 << 43) | (1 << 40) + orr tmp2, tmp2, tmp3 + msr sctlr_el1, tmp2 + + isb + + /* + * MTE-enabled page resides at the 3rd 2MB chunk in the second 1GB + * block, i.e., at 0x40400000 address. See .mte_page section in boot.S + * and kernel.ld (where the address is effectively computed). + * + * Load .mte_page address into 'addr' register. + */ + adrp addr, mte_page + add addr, addr, :lo12:mte_page + + /* + * Set GCR for random tag generation. 0xA5 is just a random value to set + * GCR != 0 so the tag generated by 'irg' insn. is not zero, which is + * more interesting for the tests than when tag is zero. + */ + mov tmp0, 0xA5 + msr gcr_el1, tmp0 + + /* + * Generate a logical tag, add it to 'addr' address and put it into + * 'tagged_addr'. + */ + irg tagged_addr, addr + + /* + * Store the generated tag to memory region pointed to by 'addr', i.e. + * set the allocation tag for granule at 'addr'. The tag is extracted + * by stg from tagged_addr pointer. + */ + stg tagged_addr, [addr] + + /* + * Store a random value (0xdeadbeef) to tagged_addr address. This must + * not cause any Tag Check Fault since logical tag in tagged_addr and + * allocation tag associated with the memory pointed by tagged_addr are + * set the same, otherwise something is off and the test fails -- an + * exception is generated. + */ + ldr tmp1, =0xdeadbeef + str tmp1, [tagged_addr] + + /* This label is used by GDB Python script test-mte.py. */ +main_end: + ret