From patchwork Fri Aug 30 11:07:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 824658 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 824321AF4F6; Fri, 30 Aug 2024 11:08:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016130; cv=none; b=rYm2KefX0x7pZqHDdi4WJ2uzsKKvlCsDMi02L7IXavyZE8Kk7g5AUOG/48LqDK/HT2J5chziBKBw6UDqs7fycIr+UpNvMwMt5VFAMHeBm2nowUHAeLw0DedZYOKyrBhZcyMhLYbmws0PHINeWEHmiPB5ZLi2ZG2bKNUNDIOJzOo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016130; c=relaxed/simple; bh=OskdadYSBniy59J/B8pssmzHKi1W6jxxpM+Kpb6xMAU=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=hJRg5PyD7ZTRq25JHt1ua5ktQfkgZgIGsQO6+OFxlDqGbIMzpekNGMbIhXCY0QIMVLMka1D2xYIv9HddpgyuC++I0ZkYKD5/uiSLOGMoMlqilYJ+giUKOTYVt8omI4X8WW7twPZJ9osaxYwdK7Yg72hoquid33dXsdtxLx9XvJc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=VjHZeoP5; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="VjHZeoP5" X-UUID: 2f177d8866c011ef8593d301e5c8a9c0-20240830 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=+ZuaROA05xOwCgrg04nVtZlCJoL6KxuioAV548mb4iY=; b=VjHZeoP54mVXeljjcrfhM2RnMv0vzaMMlzf/mkhUMz3EPu/KTaWVwm46pMHRMJGGpSh5vfbxSr169UH9rrisroC+xVnIy966/AHR0375vhW2kSnjdaRpe1pb2APqBvefRffcYEBWnjyUuUiVwGFxEFWRaNsEZsyd4hwAmm1uno0=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.41, REQID:74057d2e-326c-408d-85c2-177caa42b983, IP:0, U RL:25,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:25 X-CID-META: VersionHash:6dc6a47, CLOUDID:7b840d15-737d-40b3-9394-11d4ad6e91a1, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 2f177d8866c011ef8593d301e5c8a9c0-20240830 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1642187719; Fri, 30 Aug 2024 19:08:28 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 30 Aug 2024 19:08:27 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 30 Aug 2024 19:08:27 +0800 From: Macpaul Lin To: AngeloGioacchino Del Regno , Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , Liam Girdwood , Mark Brown , Sebastian Reichel , Pavel Machek , Sean Wang , Lee Jones , Alexandre Mergnat , Flora Fu CC: Bear Wang , Pablo Sun , Macpaul Lin , Macpaul Lin , "Sen Chu" , Chris-qj chen , MediaTek Chromebook Upstream , , , , , , , , Chen-Yu Tsai Subject: [PATCH v2 1/7] regulator: dt-bindings: mt6323: Convert to DT schema Date: Fri, 30 Aug 2024 19:07:26 +0800 Message-ID: <20240830110732.30080-1-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--4.091500-8.000000 X-TMASE-MatchedRID: RW3m2Qp1xFwvRbVu13x7nlPjo7D4SFg4sEf8CpnIYtl94pGHg55PylNU LV2RZwualTJXKqh1ne1M8qdoCvOVvms/tFw6ZTQWcX5PeMxy2v7tHf8AgB256HX+rbovv1tMEXF HklABLo7C9TF0oEZxDBEDiHAifYwNjZZBLO7fNfcVglQa/gMvfPFx/IAdCCsIw1fpjG5NXlPidW eecA3MU90WfWtP9mSp87a7Bu2IJjQwz9CL2iwNjev8QGaI25e3ecvjbu/xDjrdyIjG+fPOFQBRX ardzXy/3VN4WLcWL3CAMuqetGVetr9k4V4N5ceA3QfwsVk0UbsIoUKaF27lxcQe/TIqw3r0dk1n RhTthZYKarVqF8KXqPraJkfnyRmOra8oL3QbfoHTgs+SgeKJSC3P1ZDD2vxYNPuvbxytpP5yohc 6UMvtn2mnnl9kOWyvfhxj8HsmpdphnVHs1efQx0GaYJdwrIUUnqg/VrSZEiM= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--4.091500-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 6A3AF234029412BE79B3B58FF620F809531CA447479DF10AA1BA799CFEF1F9572000:8 X-MTK: N Convert this from the old style text based binding to the new DT schema style. The examples have been trimmed down and move to parent schema mfd/mediatek,mt6397.yaml. Add new maintainers and submitter from MediaTek. Signed-off-by: Sen Chu Signed-off-by: Macpaul Lin --- .../regulator/mediatek,mt6323-regulator.yaml | 84 +++++++ .../bindings/regulator/mt6323-regulator.txt | 237 ------------------ 2 files changed, 84 insertions(+), 237 deletions(-) create mode 100644 Documentation/devicetree/bindings/regulator/mediatek,mt6323-regulator.yaml delete mode 100644 Documentation/devicetree/bindings/regulator/mt6323-regulator.txt Changes for v1 and v2: - This is the first version of converting mt6323-regulator. This is because converting mt6323-regulator together with mfd/mediatek,mt6397.yaml, so we've create a patch set instead of single patch for each skydives. - This patch has been made base on linux-next/master git repo. diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6323-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6323-regulator.yaml new file mode 100644 index 0000000..f7c2a03 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6323-regulator.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mediatek,mt6323-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6323 Regulator + +maintainers: + - John Crispin + - Sen Chu + - Macpaul Lin + +description: + Regulator node of the PMIC. This node should under the PMIC's device node. + All voltage regulators provided by the PMIC are described as sub-nodes of + this node. + +properties: + compatible: + items: + - const: mediatek,mt6323-regulator + +patternProperties: + "^(buck_)?v(pa|proc|sys)$": + description: Buck regulators + type: object + $ref: regulator.yaml# + properties: + regulator-allowed-modes: false + unevaluatedProperties: false + + "^(ldo_)?v(camio|cn18)$": + description: LDO with fixed 1.8V output and 0~100/10mV tuning + type: object + $ref: regulator.yaml# + properties: + regulator-allowed-modes: false + unevaluatedProperties: false + + "^(ldo_)?v((io|rf)18)$": + description: LDOs with fixed 1.825V output and 0~100/10mV tuning + type: object + $ref: regulator.yaml# + properties: + regulator-allowed-modes: false + unevaluatedProperties: false + + "^(ldo_)?v(a|rtc|tcxo|(cn|io)28)$": + description: LDOs with fixed 2.8V output and 0~100/10mV tuning + type: object + $ref: regulator.yaml# + properties: + regulator-allowed-modes: false + unevaluatedProperties: false + + "^(ldo_)?vusb$": + description: LDOs with fixed 3.3V output and 0~100/10mV tuning + type: object + $ref: regulator.yaml# + properties: + regulator-allowed-modes: false + unevaluatedProperties: false + + "^(ldo_)?v(cn33_(bt|wifi))$": + description: LDOs with variable 3.3V output and 0~100/10mV tuning + type: object + $ref: regulator.yaml# + properties: + regulator-allowed-modes: false + unevaluatedProperties: false + + "^(ldo_)?v(cama|camaf|camd|emc3v3|gp[123]|ibr|m|mc|mch|sim[12])$": + description: LDOs with variable output and 0~100/10mV tuning + type: object + $ref: regulator.yaml# + properties: + regulator-allowed-modes: false + unevaluatedProperties: false + +required: + - compatible + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/regulator/mt6323-regulator.txt b/Documentation/devicetree/bindings/regulator/mt6323-regulator.txt deleted file mode 100644 index a48749d..0000000 --- a/Documentation/devicetree/bindings/regulator/mt6323-regulator.txt +++ /dev/null @@ -1,237 +0,0 @@ -Mediatek MT6323 Regulator - -All voltage regulators are defined as subnodes of the regulators node. A list -of regulators provided by this controller are defined as subnodes of the -PMIC's node. Each regulator is named according to its regulator type, -buck_ and ldo_. The definition for each of these nodes is defined -using the standard binding for regulators at -Documentation/devicetree/bindings/regulator/regulator.txt. - -The valid names for regulators are:: -BUCK: - buck_vproc, buck_vsys, buck_vpa -LDO: - ldo_vtcxo, ldo_vcn28, ldo_vcn33_bt, ldo_vcn33_wifi, ldo_va, ldo_vcama, - ldo_vio28, ldo_vusb, ldo_vmc, ldo_vmch, ldo_vemc3v3, ldo_vgp1, ldo_vgp2, - ldo_vgp3, ldo_vcn18, ldo_vsim1, ldo_vsim2, ldo_vrtc, ldo_vcamaf, ldo_vibr, - ldo_vrf18, ldo_vm, ldo_vio18, ldo_vcamd, ldo_vcamio - -Example: - - pmic: mt6323 { - mt6323regulator: regulators { - mt6323_vproc_reg: buck_vproc{ - regulator-name = "vproc"; - regulator-min-microvolt = < 700000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <12500>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vsys_reg: buck_vsys{ - regulator-name = "vsys"; - regulator-min-microvolt = <1400000>; - regulator-max-microvolt = <2987500>; - regulator-ramp-delay = <25000>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vpa_reg: buck_vpa{ - regulator-name = "vpa"; - regulator-min-microvolt = < 500000>; - regulator-max-microvolt = <3650000>; - }; - - mt6323_vtcxo_reg: ldo_vtcxo{ - regulator-name = "vtcxo"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <90>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcn28_reg: ldo_vcn28{ - regulator-name = "vcn28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_vcn33_bt_reg: ldo_vcn33_bt{ - regulator-name = "vcn33_bt"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3600000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{ - regulator-name = "vcn33_wifi"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3600000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_va_reg: ldo_va{ - regulator-name = "va"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcama_reg: ldo_vcama{ - regulator-name = "vcama"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vio28_reg: ldo_vio28{ - regulator-name = "vio28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vusb_reg: ldo_vusb{ - regulator-name = "vusb"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - regulator-boot-on; - }; - - mt6323_vmc_reg: ldo_vmc{ - regulator-name = "vmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vmch_reg: ldo_vmch{ - regulator-name = "vmch"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vemc3v3_reg: ldo_vemc3v3{ - regulator-name = "vemc3v3"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vgp1_reg: ldo_vgp1{ - regulator-name = "vgp1"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vgp2_reg: ldo_vgp2{ - regulator-name = "vgp2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vgp3_reg: ldo_vgp3{ - regulator-name = "vgp3"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vcn18_reg: ldo_vcn18{ - regulator-name = "vcn18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vsim1_reg: ldo_vsim1{ - regulator-name = "vsim1"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vsim2_reg: ldo_vsim2{ - regulator-name = "vsim2"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vrtc_reg: ldo_vrtc{ - regulator-name = "vrtc"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcamaf_reg: ldo_vcamaf{ - regulator-name = "vcamaf"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vibr_reg: ldo_vibr{ - regulator-name = "vibr"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - }; - - mt6323_vrf18_reg: ldo_vrf18{ - regulator-name = "vrf18"; - regulator-min-microvolt = <1825000>; - regulator-max-microvolt = <1825000>; - regulator-enable-ramp-delay = <187>; - }; - - mt6323_vm_reg: ldo_vm{ - regulator-name = "vm"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vio18_reg: ldo_vio18{ - regulator-name = "vio18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcamd_reg: ldo_vcamd{ - regulator-name = "vcamd"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vcamio_reg: ldo_vcamio{ - regulator-name = "vcamio"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - }; - }; From patchwork Fri Aug 30 11:07:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 824660 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C40017DFF3; Fri, 30 Aug 2024 11:08:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016122; cv=none; b=udh+deEp1N7/C5CnY4vKm2VA86oLvTSMjnBnRh4LsGiLPdHrEdbTwRXqXNSb1chQYqJP+/UyR/gyAdgASEAx3HBm75hSFFdyHU1C+2hoUnKtAzmVTPvnRpurYmbxwx0nbc87rHrs7T0vqw0T+NIWaVSNquu5qd3vpk/m+K734pk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016122; c=relaxed/simple; bh=EDw5wvsCsYKVzIFuRwx62uz/wt6ZTeqDM2Kegefw2kc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=hbqsbJ5BbVmjaldCmb9hV1e5OH4VXxFyWOHR6KJyrb/SqFGTSPO+ff3rvMqhcPnCRbaoamBXtWZyhChiw/Oh7NpjwqBKreC2lnw8HvGWwaqdG/Cp8gVCa0jrJ0dT6VaHcQrwAFJgKudq0EIzwq1H5XZIUxa/LjGn0ef/hTgM040= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=CSk5/++E; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="CSk5/++E" X-UUID: 2ecc6ece66c011ef8b96093e013ec31c-20240830 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=KAwkqjTpFxpk5xS+tDznK7/xN7La1ng329AG8HtDRLk=; b=CSk5/++E47CeTgzj5B+GGIjb0p5N1MpWeWMEfyPirfvAVkIYSev1d27dUCqYMLAG3EfKE50Rg6UwlOrMMAcEedAGBWLkJkRBJZuicNGdK2kkXnOptFlI8NlYcGYytLfOQqULOD9Xd8V5RRXquVHE6hupc6+gLdHSTNEf+doBrkU=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.41, REQID:47226023-ef65-444a-9030-c9dafc24e4e7, IP:0, U RL:25,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:25 X-CID-META: VersionHash:6dc6a47, CLOUDID:f48d30bf-d7af-4351-93aa-42531abf0c7b, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 2ecc6ece66c011ef8b96093e013ec31c-20240830 Received: from mtkmbs14n1.mediatek.inc [(172.21.101.75)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1758742308; Fri, 30 Aug 2024 19:08:27 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 30 Aug 2024 19:08:28 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 30 Aug 2024 19:08:28 +0800 From: Macpaul Lin To: AngeloGioacchino Del Regno , Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , Liam Girdwood , Mark Brown , Sebastian Reichel , Pavel Machek , Sean Wang , Lee Jones , Alexandre Mergnat , Flora Fu CC: Bear Wang , Pablo Sun , Macpaul Lin , Macpaul Lin , Sen Chu , Chris-qj chen , MediaTek Chromebook Upstream , , , , , , , , Chen-Yu Tsai Subject: [PATCH v2 2/7] dt-bindings: mfd: mediatek: mt6397: Convert to DT schema format Date: Fri, 30 Aug 2024 19:07:27 +0800 Message-ID: <20240830110732.30080-2-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240830110732.30080-1-macpaul.lin@mediatek.com> References: <20240830110732.30080-1-macpaul.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Convert the mfd: mediatek: mt6397 binding to DT schema format. MT6323/MT6358/MT6397 are PMIC devices with multiple function of subdevices. They have some variant of the combinations of subdevices but share a common PMIC design. New updates in this conversion: - RTC: - Convert rtc-mt6397.txt and add it into parent's mt6397 PMIC DT schema. - regulators: - Align generic names "regulators" instead of origin names. - mt6323-regulator: Replace "txt" reference with mt6323-regulaotr.yaml - mt6358-regulator: Replace "txt" reference with mt6358-regulator.yaml - mt6397-regulator: Replace "txt" reference with mt6397-reuglator.yaml - audio-codec: - Align generic name "audio-codec" for codec and sound subdevices. - Add "mediatek,dmic-mode" and "Avdd-supply". - clocks: - Align generic name "clocks" for clockbuffer subdevices. - leds: - Convert leds-mt6323.txt and add it into parent's mt6397 PMIC DT schema. - keys: - Add more specific descriptions for power and home keys. - Add compatible: mediatek,mt6358-keys - power-controller: - Add property #power-domain-cells for fixing dt-binding check error. - Add "Baseband power up" as the explaination of abbrevitation "BBPU". - pinctrl: - Align generic name "pinctrl" instead of "pin-controller". Signed-off-by: Sen Chu Signed-off-by: Macpaul Lin --- .../bindings/mfd/mediatek,mt6397.yaml | 1026 +++++++++++++++++ .../devicetree/bindings/mfd/mt6397.txt | 110 -- 2 files changed, 1026 insertions(+), 110 deletions(-) create mode 100644 Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml delete mode 100644 Documentation/devicetree/bindings/mfd/mt6397.txt Changes for v1: - This patch depends on conversion of mediatek,mt6397-regulator.yaml [1] https://lore.kernel.org/lkml/20240807091738.18387-1-macpaul.lin@mediatek.com/T/ Changes for v2: - This patch has been made base on linux-next/master git repo. - Keep the parent and child relationship with mediatek,pwrap in description. [2] https://lore.kernel.org/all/20240826-slurp-earphone-0d5173923ae8@spud/ - Keep the $ref for regulators since dt_binding_check didn't report any issue based on linux-next/master repo. - Fix description of mt6397/mt6323 devices, use "power management chip" instead of "multifunction device" - Drop unnecessary comments or description according to the review. - Convert sub-modules to DT Schema: - RTC, LEDs, power-controllers, regulators - Drop duplicate sub node name and description for sub-modules - RTC, Keys - examples: - drop parent pwrap node - Add examples from mediatek,mt6323-regulator.yaml - Add examples from mediatek,mt6358-regulator.yaml - Add examples from mediatek,mt6397-regulator.yaml - Complete the examples as could as possible. diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml new file mode 100644 index 0000000..f5bea33 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml @@ -0,0 +1,1026 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/mediatek,mt6397.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6397/MT6323 Multifunction Device (PMIC) + +maintainers: + - Sen Chu + - Macpaul Lin + +description: | + MT6397/MT6323 is a power management system chip. + Please see the sub-modules below for supported features. + + MT6397/MT6323 is a multifunction device with the following sub modules: + - Regulators + - RTC + - Audio codec + - GPIO + - Clock + - LED + - Keys + - Power controller + + It is interfaced to host controller using SPI interface by a proprietary hardware + called PMIC wrapper or pwrap. MT6397/MT6323 PMIC is a child device of pwrap. + See the following for pwrap node definitions: + Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml + +properties: + compatible: + oneOf: + - enum: + - mediatek,mt6323 + - mediatek,mt6331 # "mediatek,mt6331" for PMIC MT6331 and MT6332. + - mediatek,mt6357 + - mediatek,mt6358 + - mediatek,mt6359 + - mediatek,mt6397 + - items: + - enum: + - mediatek,mt6366 + - const: mediatek,mt6358 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + rtc: + type: object + $ref: /schemas/rtc/rtc.yaml# + unevaluatedProperties: false + description: + MT6397 Real Time Clock. + properties: + compatible: + oneOf: + - enum: + - mediatek,mt6323-rtc + - mediatek,mt6331-rtc + - mediatek,mt6358-rtc + - mediatek,mt6397-rtc + - items: + - enum: + - mediatek,mt6366-rtc + - const: mediatek,mt6358-rtc + start-year: true + required: + - compatible + + regulators: + type: object + oneOf: + - $ref: /schemas/regulator/mediatek,mt6323-regulator.yaml + - $ref: /schemas/regulator/mediatek,mt6358-regulator.yaml + - $ref: /schemas/regulator/mediatek,mt6397-regulator.yaml + unevaluatedProperties: false + description: + List of child nodes that specify the regulators. + properties: + compatible: + oneOf: + - enum: + - mediatek,mt6323-regulator + - mediatek,mt6358-regulator + - mediatek,mt6397-regulator + - items: + - enum: + - mediatek,mt6366-regulator + - const: mediatek,mt6358-regulator + + audio-codec: + type: object + additionalProperties: false + description: + Audio codec support with MT6397 and MT6358. + properties: + compatible: + oneOf: + - enum: + - mediatek,mt6397-codec + - mediatek,mt6358-sound + - items: + - enum: + - mediatek,mt6366-sound + - const: mediatek,mt6358-sound + + mediatek,dmic-mode: + description: | + Indicates how many data pins are used to transmit two channels of PDM + signal. + 0 - two wires; + 1 - one wire; + Default value is 0. + enum: [0, 1] + default: 0 + + Avdd-supply: + description: Power source of AVDD. + + required: + - compatible + + clocks: + type: object + additionalProperties: false + description: + This is a clock buffer node for mt6397. However, there are no sub nodes + or any public document exposed in public. + properties: + compatible: + const: mediatek,mt6397-clk + '#clock-cells': + const: 1 + required: + - compatible + + leds: + type: object + additionalProperties: false + description: + MT6323 LED controller is subfunction provided by MT6323 PMIC, so the LED + controllers are defined as the subnode of the function node provided by MT6323 + PMIC controller that is being defined as one kind of Muti-Function Device (MFD) + using shared bus called PMIC wrapper for each subfunction to access remote + MT6323 PMIC hardware. + + Each led is represented as a child node of the mediatek,mt6323-led that + describes the initial behavior for each LED physically and currently only four + LED child nodes can be supported. + + properties: + compatible: + oneOf: + - enum: + - mediatek,mt6323-led + - mediatek,mt6331-led + - mediatek,mt6332-led + "#address-cells": + const: 1 + "#size-cells": + const: 0 + reg: + description: + LED channel number (0..3) + minimum: 0 + maximum: 3 + + keys: + type: object + $ref: /schemas/input/mediatek,pmic-keys.yaml + unevaluatedProperties: false + description: + Power and Home keys. + properties: + compatible: + oneOf: + - enum: + - mediatek,mt6323-keys + - mediatek,mt6331-keys + - mediatek,mt6358-keys + - mediatek,mt6397-keys + + power-controller: + type: object + additionalProperties: false + description: + The power controller which could be found on PMIC is responsible for + externally powering off or on the remote MediaTek SoC through the + circuit BBPU (baseband power up). + properties: + compatible: + const: mediatek,mt6323-pwrc + '#power-domain-cells': + const: 0 + + pinctrl: + type: object + $ref: /schemas/pinctrl/mediatek,mt65xx-pinctrl.yaml + unevaluatedProperties: false + description: + Pin controller + properties: + compatible: + const: mediatek,mt6397-pinctrl + +required: + - compatible + - regulators + +additionalProperties: false + +examples: + - | + #include + + mt6323_pmic: pmic { + compatible = "mediatek,mt6323"; + interrupt-parent = <&pio>; + interrupts = <150 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + + mt6323_leds: leds { + compatible = "mediatek,mt6323-led"; + #address-cells = <1>; + status = "disabled"; + }; + + mt6323_regulator: regulators { + compatible = "mediatek,mt6323-regulator"; + mt6323_vproc_reg: buck_vproc { + regulator-name = "vproc"; + regulator-min-microvolt = < 700000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-always-on; + regulator-boot-on; + }; + + mt6323_vsys_reg: buck_vsys { + regulator-name = "vsys"; + regulator-min-microvolt = <1400000>; + regulator-max-microvolt = <2987500>; + regulator-ramp-delay = <25000>; + regulator-always-on; + regulator-boot-on; + }; + + mt6323_vpa_reg: buck_vpa { + regulator-name = "vpa"; + regulator-min-microvolt = < 500000>; + regulator-max-microvolt = <3650000>; + }; + + mt6323_vtcxo_reg: ldo_vtcxo { + regulator-name = "vtcxo"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <90>; + regulator-always-on; + regulator-boot-on; + }; + + mt6323_vcn28_reg: ldo_vcn28 { + regulator-name = "vcn28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <185>; + }; + + mt6323_vcn33_bt_reg: ldo_vcn33_bt { + regulator-name = "vcn33_bt"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <185>; + }; + + mt6323_vcn33_wifi_reg: ldo_vcn33_wifi { + regulator-name = "vcn33_wifi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <185>; + }; + + mt6323_va_reg: ldo_va { + regulator-name = "va"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <216>; + regulator-always-on; + regulator-boot-on; + }; + + mt6323_vcama_reg: ldo_vcama { + regulator-name = "vcama"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <216>; + }; + + mt6323_vio28_reg: ldo_vio28 { + regulator-name = "vio28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <216>; + regulator-always-on; + regulator-boot-on; + }; + + mt6323_vusb_reg: ldo_vusb { + regulator-name = "vusb"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <216>; + regulator-boot-on; + }; + + mt6323_vmc_reg: ldo_vmc { + regulator-name = "vmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <36>; + regulator-boot-on; + }; + + mt6323_vmch_reg: ldo_vmch { + regulator-name = "vmch"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <36>; + regulator-boot-on; + }; + + mt6323_vemc3v3_reg: ldo_vemc3v3 { + regulator-name = "vemc3v3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <36>; + regulator-boot-on; + }; + + mt6323_vgp1_reg: ldo_vgp1 { + regulator-name = "vgp1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <216>; + }; + + mt6323_vgp2_reg: ldo_vgp2 { + regulator-name = "vgp2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <216>; + }; + + mt6323_vgp3_reg: ldo_vgp3 { + regulator-name = "vgp3"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <216>; + }; + + mt6323_vcn18_reg: ldo_vcn18 { + regulator-name = "vcn18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <216>; + }; + + mt6323_vsim1_reg: ldo_vsim1 { + regulator-name = "vsim1"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <216>; + }; + + mt6323_vsim2_reg: ldo_vsim2 { + regulator-name = "vsim2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <216>; + }; + + mt6323_vrtc_reg: ldo_vrtc { + regulator-name = "vrtc"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + + mt6323_vcamaf_reg: ldo_vcamaf { + regulator-name = "vcamaf"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <216>; + }; + + mt6323_vibr_reg: ldo_vibr { + regulator-name = "vibr"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <36>; + }; + + mt6323_vrf18_reg: ldo_vrf18 { + regulator-name = "vrf18"; + regulator-min-microvolt = <1825000>; + regulator-max-microvolt = <1825000>; + regulator-enable-ramp-delay = <187>; + }; + + mt6323_vm_reg: ldo_vm { + regulator-name = "vm"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <216>; + regulator-always-on; + regulator-boot-on; + }; + + mt6323_vio18_reg: ldo_vio18 { + regulator-name = "vio18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <216>; + regulator-always-on; + regulator-boot-on; + }; + + mt6323_vcamd_reg: ldo_vcamd { + regulator-name = "vcamd"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <216>; + }; + + mt6323_vcamio_reg: ldo_vcamio { + regulator-name = "vcamio"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <216>; + }; + }; + + mt6323_keys: keys { + compatible = "mediatek,mt6323-keys"; + mediatek,long-press-mode = <1>; + power-off-time-sec = <0>; + + power { + linux,keycodes = <116>; + wakeup-source; + }; + + home { + linux,keycodes = <114>; + }; + }; + + power-controller { + compatible = "mediatek,mt6323-pwrc"; + #power-domain-cells = <0>; + }; + + rtc { + compatible = "mediatek,mt6323-rtc"; + }; + }; + + - | + #include + #include + + mt6358_pmic: pmic { + compatible = "mediatek,mt6358"; + interrupt-controller; + #interrupt-cells = <2>; + + mt6358_codec: audio-codec { + compatible = "mediatek,mt6358-sound"; + Avdd-supply = <&mt6358_vaud28_reg>; + mediatek,dmic-mode = <0>; + }; + + mt6358_regulator: regulators { + compatible = "mediatek,mt6358-regulator"; + + mt6358_vdram1_reg: buck_vdram1 { + regulator-name = "vdram1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2087500>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <0>; + regulator-always-on; + regulator-allowed-modes = <0 1>; + }; + + mt6358_vcore_reg: buck_vcore { + regulator-name = "vcore"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <200>; + regulator-always-on; + regulator-allowed-modes = <0 1>; + }; + + mt6358_vpa_reg: buck_vpa { + regulator-name = "vpa"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3650000>; + regulator-ramp-delay = <50000>; + regulator-enable-ramp-delay = <250>; + regulator-allowed-modes = <0 1>; + }; + + mt6358_vproc11_reg: buck_vproc11 { + regulator-name = "vproc11"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <200>; + regulator-always-on; + regulator-allowed-modes = <0 1>; + }; + + mt6358_vproc12_reg: buck_vproc12 { + regulator-name = "vproc12"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <200>; + regulator-always-on; + regulator-allowed-modes = <0 1>; + }; + + mt6358_vgpu_reg: buck_vgpu { + regulator-name = "vgpu"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <200>; + regulator-allowed-modes = <0 1>; + }; + + mt6358_vs2_reg: buck_vs2 { + regulator-name = "vs2"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2087500>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <0>; + regulator-always-on; + }; + + mt6358_vmodem_reg: buck_vmodem { + regulator-name = "vmodem"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <900>; + regulator-always-on; + regulator-allowed-modes = <0 1>; + }; + + mt6358_vs1_reg: buck_vs1 { + regulator-name = "vs1"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <2587500>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <0>; + regulator-always-on; + }; + + mt6358_vdram2_reg: ldo_vdram2 { + regulator-name = "vdram2"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <3300>; + }; + + mt6358_vsim1_reg: ldo_vsim1 { + regulator-name = "vsim1"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <540>; + }; + + mt6358_vibr_reg: ldo_vibr { + regulator-name = "vibr"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <60>; + }; + + mt6358_vrf12_reg: ldo_vrf12 { + regulator-name = "vrf12"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <120>; + }; + + mt6358_vio18_reg: ldo_vio18 { + regulator-name = "vio18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <2700>; + regulator-always-on; + }; + + mt6358_vusb_reg: ldo_vusb { + regulator-name = "vusb"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <270>; + regulator-always-on; + }; + + mt6358_vcamio_reg: ldo_vcamio { + regulator-name = "vcamio"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <325>; + }; + + mt6358_vcamd_reg: ldo_vcamd { + regulator-name = "vcamd"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <325>; + }; + + mt6358_vcn18_reg: ldo_vcn18 { + regulator-name = "vcn18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <270>; + }; + + mt6358_vfe28_reg: ldo_vfe28 { + regulator-name = "vfe28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <270>; + }; + + mt6358_vsram_proc11_reg: ldo_vsram_proc11 { + regulator-name = "vsram_proc11"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <240>; + regulator-always-on; + }; + + mt6358_vcn28_reg: ldo_vcn28 { + regulator-name = "vcn28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <270>; + }; + + mt6358_vsram_others_reg: ldo_vsram_others { + regulator-name = "vsram_others"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <240>; + regulator-always-on; + }; + + mt6358_vsram_gpu_reg: ldo_vsram_gpu { + regulator-name = "vsram_gpu"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <240>; + }; + + mt6358_vxo22_reg: ldo_vxo22 { + regulator-name = "vxo22"; + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + regulator-enable-ramp-delay = <120>; + regulator-always-on; + }; + + mt6358_vefuse_reg: ldo_vefuse { + regulator-name = "vefuse"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <270>; + }; + + mt6358_vaux18_reg: ldo_vaux18 { + regulator-name = "vaux18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <270>; + }; + + mt6358_vmch_reg: ldo_vmch { + regulator-name = "vmch"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <60>; + }; + + mt6358_vbif28_reg: ldo_vbif28 { + regulator-name = "vbif28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <270>; + }; + + mt6358_vsram_proc12_reg: ldo_vsram_proc12 { + regulator-name = "vsram_proc12"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1293750>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <240>; + regulator-always-on; + }; + + mt6358_vcama1_reg: ldo_vcama1 { + regulator-name = "vcama1"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <325>; + }; + + mt6358_vemc_reg: ldo_vemc { + regulator-name = "vemc"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <60>; + }; + + mt6358_vio28_reg: ldo_vio28 { + regulator-name = "vio28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <270>; + }; + + mt6358_va12_reg: ldo_va12 { + regulator-name = "va12"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <270>; + regulator-always-on; + }; + + mt6358_vrf18_reg: ldo_vrf18 { + regulator-name = "vrf18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <120>; + }; + + mt6358_vcn33_reg: ldo_vcn33 { + regulator-name = "vcn33"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3500000>; + regulator-enable-ramp-delay = <270>; + }; + + mt6358_vcama2_reg: ldo_vcama2 { + regulator-name = "vcama2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <325>; + }; + + mt6358_vmc_reg: ldo_vmc { + regulator-name = "vmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <60>; + }; + + mt6358_vldo28_reg: ldo_vldo28 { + regulator-name = "vldo28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <270>; + }; + + mt6358_vaud28_reg: ldo_vaud28 { + regulator-name = "vaud28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <270>; + }; + + mt6358_vsim2_reg: ldo_vsim2 { + regulator-name = "vsim2"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <540>; + }; + }; + + mt6358_rtc: rtc { + compatible = "mediatek,mt6358-rtc"; + }; + + mt6358_keys: keys { + compatible = "mediatek,mt6358-keys"; + power { + linux,keycodes = ; + wakeup-source; + }; + home { + linux,keycodes = ; + }; + }; + }; + + - | + #include + + mt6397_pmic: pmic { + compatible = "mediatek,mt6397"; + interrupt-parent = <&pio>; + interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + + mt6397_codec: audio-codec { + compatible = "mediatek,mt6397-codec"; + }; + + mt6397_clock: clocks { + compatible = "mediatek,mt6397-clk"; + #clock-cells = <1>; + }; + + mt6397_pinctrl: pinctrl { + compatible = "mediatek,mt6397-pinctrl"; + gpio-controller; + #gpio-cells = <2>; + }; + + mt6397_regulators: regulators { + compatible = "mediatek,mt6397-regulator"; + + mt6397_vpca15_reg: buck_vpca15 { + regulator-name = "vpca15"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <200>; + }; + + mt6397_vpca7_reg: buck_vpca7 { + regulator-name = "vpca7"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <115>; + }; + + mt6397_vsramca15_reg: buck_vsramca15 { + regulator-name = "vsramca15"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <115>; + }; + + mt6397_vsramca7_reg: buck_vsramca7 { + regulator-name = "vsramca7"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <115>; + }; + + mt6397_vcore_reg: buck_vcore { + regulator-name = "vcore"; + regulator-min-microvolt = < 850000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <115>; + }; + + mt6397_vgpu_reg: buck_vgpu { + regulator-name = "vgpu"; + regulator-min-microvolt = < 700000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <115>; + }; + + mt6397_vdrm_reg: buck_vdrm { + regulator-name = "vdrm"; + regulator-min-microvolt = < 800000>; + regulator-max-microvolt = <1400000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <500>; + }; + + mt6397_vio18_reg: buck_vio18 { + regulator-name = "vio18"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <2120000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <500>; + }; + + mt6397_vtcxo_reg: ldo_vtcxo { + regulator-name = "vtcxo"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <90>; + }; + + mt6397_va28_reg: ldo_va28 { + regulator-name = "va28"; + /* fixed output 2.8 V */ + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vcama_reg: ldo_vcama { + regulator-name = "vcama"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vio28_reg: ldo_vio28 { + regulator-name = "vio28"; + /* fixed output 2.8 V */ + regulator-enable-ramp-delay = <240>; + }; + + mt6397_usb_reg: ldo_vusb { + regulator-name = "vusb"; + /* fixed output 3.3 V */ + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vmc_reg: ldo_vmc { + regulator-name = "vmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vmch_reg: ldo_vmch { + regulator-name = "vmch"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vemc_3v3_reg: ldo_vemc3v3 { + regulator-name = "vemc_3v3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vgp1_reg: ldo_vgp1 { + regulator-name = "vcamd"; + regulator-min-microvolt = <1220000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <240>; + }; + + mt6397_vgp2_reg: ldo_vgp2 { + regulator-name = "vcamio"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vgp3_reg: ldo_vgp3 { + regulator-name = "vcamaf"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vgp4_reg: ldo_vgp4 { + regulator-name = "vgp4"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vgp5_reg: ldo_vgp5 { + regulator-name = "vgp5"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vgp6_reg: ldo_vgp6 { + regulator-name = "vgp6"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + + mt6397_vibr_reg: ldo_vibr { + regulator-name = "vibr"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <218>; + }; + }; + + mt6397_rtc: rtc { + compatible = "mediatek,mt6397-rtc"; + }; + }; + diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt deleted file mode 100644 index 10540aa..0000000 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ /dev/null @@ -1,110 +0,0 @@ -MediaTek MT6397/MT6323 Multifunction Device Driver - -MT6397/MT6323 is a multifunction device with the following sub modules: -- Regulator -- RTC -- Audio codec -- GPIO -- Clock -- LED -- Keys -- Power controller - -It is interfaced to host controller using SPI interface by a proprietary hardware -called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap. -See the following for pwarp node definitions: -../soc/mediatek/mediatek,pwrap.yaml - -This document describes the binding for MFD device and its sub module. - -Required properties: -compatible: - "mediatek,mt6323" for PMIC MT6323 - "mediatek,mt6331" for PMIC MT6331 and MT6332 - "mediatek,mt6357" for PMIC MT6357 - "mediatek,mt6358" for PMIC MT6358 - "mediatek,mt6359" for PMIC MT6359 - "mediatek,mt6366", "mediatek,mt6358" for PMIC MT6366 - "mediatek,mt6397" for PMIC MT6397 - -Optional subnodes: - -- rtc - Required properties: Should be one of follows - - compatible: "mediatek,mt6323-rtc" - - compatible: "mediatek,mt6331-rtc" - - compatible: "mediatek,mt6358-rtc" - - compatible: "mediatek,mt6397-rtc" - For details, see ../rtc/rtc-mt6397.txt -- regulators - Required properties: - - compatible: "mediatek,mt6323-regulator" - see ../regulator/mt6323-regulator.txt - - compatible: "mediatek,mt6358-regulator" - - compatible: "mediatek,mt6366-regulator", "mediatek-mt6358-regulator" - see ../regulator/mt6358-regulator.txt - - compatible: "mediatek,mt6397-regulator" - see ../regulator/mt6397-regulator.txt -- codec - Required properties: - - compatible: "mediatek,mt6397-codec" or "mediatek,mt6358-sound" -- clk - Required properties: - - compatible: "mediatek,mt6397-clk" -- led - Required properties: - - compatible: "mediatek,mt6323-led" - see ../leds/leds-mt6323.txt - -- keys - Required properties: Should be one of the following - - compatible: "mediatek,mt6323-keys" - - compatible: "mediatek,mt6331-keys" - - compatible: "mediatek,mt6397-keys" - see ../input/mtk-pmic-keys.txt - -- power-controller - Required properties: - - compatible: "mediatek,mt6323-pwrc" - For details, see ../power/reset/mt6323-poweroff.txt - -- pin-controller - Required properties: - - compatible: "mediatek,mt6397-pinctrl" - For details, see ../pinctrl/pinctrl-mt65xx.txt - -Example: - pwrap: pwrap@1000f000 { - compatible = "mediatek,mt8135-pwrap"; - - ... - - pmic { - compatible = "mediatek,mt6397"; - - codec: mt6397codec { - compatible = "mediatek,mt6397-codec"; - }; - - regulators { - compatible = "mediatek,mt6397-regulator"; - - mt6397_vpca15_reg: buck_vpca15 { - regulator-compatible = "buck_vpca15"; - regulator-name = "vpca15"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1400000>; - regulator-ramp-delay = <12500>; - regulator-always-on; - }; - - mt6397_vgp4_reg: ldo_vgp4 { - regulator-compatible = "ldo_vgp4"; - regulator-name = "vgp4"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <218>; - }; - }; - }; - }; From patchwork Fri Aug 30 11:07:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 824315 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 72B991A76A8; Fri, 30 Aug 2024 11:08:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016124; cv=none; b=Pg+Edhc+Osjh0lQPOuYAekfNNQk6Ah6DrAEUVF6raZlWFaMgGi8cDadhlL9GH1GwcAlmRA0KZWLDVCJFoTEQuXtOKCquOjCJxwuUNpNvM/oXuWjpGNUg/5dx58IuIm8/MpzB6vH0eP6C/zuVlrEBSaVnl2+IgCxNyUeMuyK9HSw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016124; c=relaxed/simple; bh=BdrWRkMfz8aAGdpO7GoavDMJsRYpW1HQUL7r86UF0oo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=q2rBVt5NDc8B+KAzPbFpZo30s1LqfbhQLBbYiH9AaEoC75UzYGssgGa+NjKn2E/mnBwXSB6EbIjwBhvpFRTmGhInr0NSCX2bcO+27Oxs0p0RrGZ/QlXjcyTigRmo0N/4/XWeV5CpCd67hZXaiLjlKxHEk/FY4EXU2+0ncmdrK4k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=iGqqLOqX; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="iGqqLOqX" X-UUID: 2e30336a66c011ef8593d301e5c8a9c0-20240830 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=JWd69Ny/qdwYRea4GxALoosea+AET1Gx/x1z1oiee9U=; b=iGqqLOqXD1DwfmdlLH2aEq3PFRlg9TbVi62G4yv2xtPCOaXq8a9fWOVQ2mhYKQ4bkhIxg4MMJu8ytKXIBGGZDc56LZph6ktfuKIskBicfEsx2yI6oigbbNhEfHtdRa82VsMG2cvL0Fd/+A9TIMgOXegLbL6DmxKau2UYFISQjLY=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.41, REQID:0bb84d7f-79ca-415f-b516-2b61f4aa8a28, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:6dc6a47, CLOUDID:18356fcf-7921-4900-88a1-3aef019a55ce, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 2e30336a66c011ef8593d301e5c8a9c0-20240830 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1498479787; Fri, 30 Aug 2024 19:08:26 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 30 Aug 2024 19:08:28 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 30 Aug 2024 19:08:28 +0800 From: Macpaul Lin To: AngeloGioacchino Del Regno , Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , Liam Girdwood , Mark Brown , Sebastian Reichel , Pavel Machek , Sean Wang , Lee Jones , Alexandre Mergnat , Flora Fu CC: Bear Wang , Pablo Sun , Macpaul Lin , Macpaul Lin , Sen Chu , Chris-qj chen , MediaTek Chromebook Upstream , , , , , , , , Chen-Yu Tsai Subject: [PATCH v2 3/7] dt-bindings: rtc: mt6397: merge to MFD mediatek, mt6397 DT schema Date: Fri, 30 Aug 2024 19:07:28 +0800 Message-ID: <20240830110732.30080-3-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240830110732.30080-1-macpaul.lin@mediatek.com> References: <20240830110732.30080-1-macpaul.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Convert rtc-mt6397.txt be compatible with the DT schema. Since this is a simple RTC device node, merge it into parent mediatek,mt6397.yaml. Subsequently, remove rtc-mt6397.txt with a separate patch. Signed-off-by: Macpaul Lin --- .../devicetree/bindings/rtc/rtc-mt6397.txt | 31 ------------------- 1 file changed, 31 deletions(-) delete mode 100644 Documentation/devicetree/bindings/rtc/rtc-mt6397.txt Changes for v1 and v2: - This is the first version of converting rtc-mt6397.txt. This is because converting rtc-mt6397 together with mfd/mediatek,mt6397.yaml, so we've create a patch set instead of submitting single patch for each subdevice. - This patch has been made base on linux-next/master git repo. diff --git a/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt b/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt deleted file mode 100644 index 7212076..0000000 --- a/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt +++ /dev/null @@ -1,31 +0,0 @@ -Device-Tree bindings for MediaTek PMIC based RTC - -MediaTek PMIC based RTC is an independent function of MediaTek PMIC that works -as a type of multi-function device (MFD). The RTC can be configured and set up -with PMIC wrapper bus which is a common resource shared with the other -functions found on the same PMIC. - -For MediaTek PMIC MFD bindings, see: -../mfd/mt6397.txt - -For MediaTek PMIC wrapper bus bindings, see: -../soc/mediatek/pwrap.txt - -Required properties: -- compatible: Should be one of follows - "mediatek,mt6323-rtc": for MT6323 PMIC - "mediatek,mt6358-rtc": for MT6358 PMIC - "mediatek,mt6366-rtc", "mediatek,mt6358-rtc": for MT6366 PMIC - "mediatek,mt6397-rtc": for MT6397 PMIC - -Example: - - pmic { - compatible = "mediatek,mt6323"; - - ... - - rtc { - compatible = "mediatek,mt6323-rtc"; - }; - }; From patchwork Fri Aug 30 11:07:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 824316 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 81F5917BB05; Fri, 30 Aug 2024 11:08:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016120; cv=none; b=KW6npBgziMyO4zD5KL1z+7NfkXyZ/tLvai00Ah6AL2/LiCeaZeb5dEXv3FriJaEcLZF+9YEf1sVEQojuJTvObk/d/MrxouDpuAkmm08t+zSwW8dfxqD1u8fkTLjekayBMLR8qUlPVm1Onj01mQ51/iKQon7wxgjNiPg0wfke7Mk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016120; c=relaxed/simple; bh=qOC4TBOBuW6HCGLzt3qzrbqGIA9efWutGacPlUcdpZo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=lMJSzEkHlSErKwC8xeWHHqimV1wVxGki/mz5rTAU3b024xCfchlDoBmQosbqO1GPlalkOu382aaTpKtaqqz7WOMfQKDnEmCJnipmQYr63YGQVMbxk/iLpPnvG5wx4KlKY5kN8YehezUDq2tP0nvJKAQOvyGapCLwq5tTVBHm1S0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=dic4pOi+; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="dic4pOi+" X-UUID: 2fc9594a66c011ef8b96093e013ec31c-20240830 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=JWhruOowdkt/xBKckPdvEO46w+VbVE01+k4IFay5Duo=; b=dic4pOi+/CGinFmEVVrfKGicVEXmHYtQaraZtaWqLNVGAGIsVdWaRp9OdPHxnQky1GiVqfyfSE1FwI0g2sXQt1OiGbjV7+QHfPQ3zAGLky0dooUEpz//YoBeYWPyNKOfsSh2rU2g1YTxeqDUNg6uTs5dHBoG8K2fn5UF0+RD8FE=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.41, REQID:ca1ca494-e93e-415a-94c7-33e2146bc35c, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:6dc6a47, CLOUDID:21356fcf-7921-4900-88a1-3aef019a55ce, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 2fc9594a66c011ef8b96093e013ec31c-20240830 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1657210181; Fri, 30 Aug 2024 19:08:29 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS14N2.mediatek.inc (172.21.101.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 30 Aug 2024 19:08:28 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 30 Aug 2024 19:08:28 +0800 From: Macpaul Lin To: AngeloGioacchino Del Regno , Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , Liam Girdwood , Mark Brown , Sebastian Reichel , Pavel Machek , Sean Wang , Lee Jones , Alexandre Mergnat , Flora Fu CC: Bear Wang , Pablo Sun , Macpaul Lin , Macpaul Lin , "Sen Chu" , Chris-qj chen , MediaTek Chromebook Upstream , , , , , , , , Chen-Yu Tsai Subject: [PATCH v2 4/7] regulator: dt-bindings: mt6397: move examples to parent PMIC mt6397 Date: Fri, 30 Aug 2024 19:07:29 +0800 Message-ID: <20240830110732.30080-4-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240830110732.30080-1-macpaul.lin@mediatek.com> References: <20240830110732.30080-1-macpaul.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--1.489100-8.000000 X-TMASE-MatchedRID: TppObWSVeSiPrjM/ltMU+Y+emiGnyeDRVF5mUd6sIMbfUZT83lbkEBtA A+CBZv6P43HhQBEsO8hLaej5cOCHCX1GcR5AeEs7jtK7dC6UBnnBDQIKmpUdLA6QlBHhBZuwRNV ChCiT7kXi8zVgXoAltsIJ+4gwXrEtWBd6ltyXuvuzqv2VdKUl4FE3sN7Nviwbly5S0NU4MuKBVz 1+3BoxSbEsIkxFFKdNGE8UYfOPeBLxLPoefjwkXf5US5F30eUjAq3Qx0stoeaElVGWRzS6/kYFe h7KssddUGjjbmeia+IPZN5fBGmCHKL6Q11UB8yDftwZ3X11IV0= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--1.489100-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 243F2C20DAC08D69B20AF17960D5A3ADDE63DC1516FD9DED60C26D6642384E772000:8 X-MTK: N Since the DT schema of multiple function PMIC mt6397 has been converted, move the examples in "mediatek,mt6397-regulator.yaml" to the parent schema "mediatek,mt6397.yaml". Signed-off-by: Macpaul Lin --- .../regulator/mediatek,mt6397-regulator.yaml | 173 ------------------ 1 file changed, 173 deletions(-) Changes for v1 and v2: - This is because reviewer suggest complete examples in parent device (MFD) as could as possible. Hence we've just move the examples to parent mfd/mediatek,mt6397.yaml. So we've create a patch set instead of submitting single patch for each subdevice. - This patch has been made base on linux-next/master git repo. diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6397-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6397-regulator.yaml index 50db678..337ac58 100644 --- a/Documentation/devicetree/bindings/regulator/mediatek,mt6397-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6397-regulator.yaml @@ -63,176 +63,3 @@ required: additionalProperties: false -examples: - - | - #include - - mt6397_regulators: regulators { - compatible = "mediatek,mt6397-regulator"; - - mt6397_vpca15_reg: buck_vpca15 { - regulator-name = "vpca15"; - regulator-min-microvolt = < 850000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <12500>; - regulator-enable-ramp-delay = <200>; - }; - - mt6397_vpca7_reg: buck_vpca7 { - regulator-name = "vpca7"; - regulator-min-microvolt = < 850000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <12500>; - regulator-enable-ramp-delay = <115>; - }; - - mt6397_vsramca15_reg: buck_vsramca15 { - regulator-name = "vsramca15"; - regulator-min-microvolt = < 850000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <12500>; - regulator-enable-ramp-delay = <115>; - }; - - mt6397_vsramca7_reg: buck_vsramca7 { - regulator-name = "vsramca7"; - regulator-min-microvolt = < 850000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <12500>; - regulator-enable-ramp-delay = <115>; - }; - - mt6397_vcore_reg: buck_vcore { - regulator-name = "vcore"; - regulator-min-microvolt = < 850000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <12500>; - regulator-enable-ramp-delay = <115>; - }; - - mt6397_vgpu_reg: buck_vgpu { - regulator-name = "vgpu"; - regulator-min-microvolt = < 700000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <12500>; - regulator-enable-ramp-delay = <115>; - }; - - mt6397_vdrm_reg: buck_vdrm { - regulator-name = "vdrm"; - regulator-min-microvolt = < 800000>; - regulator-max-microvolt = <1400000>; - regulator-ramp-delay = <12500>; - regulator-enable-ramp-delay = <500>; - }; - - mt6397_vio18_reg: buck_vio18 { - regulator-name = "vio18"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <2120000>; - regulator-ramp-delay = <12500>; - regulator-enable-ramp-delay = <500>; - }; - - mt6397_vtcxo_reg: ldo_vtcxo { - regulator-name = "vtcxo"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <90>; - }; - - mt6397_va28_reg: ldo_va28 { - regulator-name = "va28"; - /* fixed output 2.8 V */ - regulator-enable-ramp-delay = <218>; - }; - - mt6397_vcama_reg: ldo_vcama { - regulator-name = "vcama"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <218>; - }; - - mt6397_vio28_reg: ldo_vio28 { - regulator-name = "vio28"; - /* fixed output 2.8 V */ - regulator-enable-ramp-delay = <240>; - }; - - mt6397_usb_reg: ldo_vusb { - regulator-name = "vusb"; - /* fixed output 3.3 V */ - regulator-enable-ramp-delay = <218>; - }; - - mt6397_vmc_reg: ldo_vmc { - regulator-name = "vmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <218>; - }; - - mt6397_vmch_reg: ldo_vmch { - regulator-name = "vmch"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <218>; - }; - - mt6397_vemc_3v3_reg: ldo_vemc3v3 { - regulator-name = "vemc_3v3"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <218>; - }; - - mt6397_vgp1_reg: ldo_vgp1 { - regulator-name = "vcamd"; - regulator-min-microvolt = <1220000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <240>; - }; - - mt6397_vgp2_reg: ldo_vgp2 { - regulator-name = "vcamio"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <218>; - }; - - mt6397_vgp3_reg: ldo_vgp3 { - regulator-name = "vcamaf"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <218>; - }; - - mt6397_vgp4_reg: ldo_vgp4 { - regulator-name = "vgp4"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <218>; - }; - - mt6397_vgp5_reg: ldo_vgp5 { - regulator-name = "vgp5"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <218>; - }; - - mt6397_vgp6_reg: ldo_vgp6 { - regulator-name = "vgp6"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <218>; - }; - - mt6397_vibr_reg: ldo_vibr { - regulator-name = "vibr"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <218>; - }; - }; From patchwork Fri Aug 30 11:07:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 824661 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C1F6518E370; Fri, 30 Aug 2024 11:08:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016119; cv=none; b=Y8R8bZukQEJgZtRjuhGTdidScXvR6EsNTmXs+mzMVmJczUIwhoLGGqf/IcUpVmUBcdpaJVLJ/SiMyTsuwcGrmTGBmMkVX2aZ0A9z7Ukcm1K+CS9EPEImTbHd58jHm+LCdV+Q0YBEyDA08wj/OmotF6AvLhp5X0QcX8y+3slok3Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016119; c=relaxed/simple; bh=FDXpEFMdCgHKKnsiYxb9lfTvUOuOlXHynWcUecvE1VQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=M9iJF5n8Bm0kwzwZ44jCdbTmEXoIwdnLvIqCE4fzKWVz8nlU0m3e+4L+RXYWxpTgB4KLc5sA6EMK1MRaVKBOSUwnXJPdJG8vJO7sM3AkjMNLAa2Yt9pVsYBwO63jGkfDmKbrLnwE1ypPHNS69yANv3+jtTqIe+zgCxzQb4cvFOw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=VQ6zC21B; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="VQ6zC21B" X-UUID: 2fc27fee66c011ef8b96093e013ec31c-20240830 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=UyRBBoZvs5yZx9ee1wQlM3Yzcbs7XG0PM0g15NAHr6k=; b=VQ6zC21BjAHL2ADw07ofbgtSxGKewqdmdJsymRcFTecF+MG6/xDL6GwSUbNyqwaP+wzsttgr6XEm6PedgGD0QpIAS1pw9a1CZUviLYRT9RqID4IZlehrTlKhWzPqX/tHWfgiEUgqYRDplGOjJlRrmpSVd22wLE3TeB8t3gj9Fkg=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.41, REQID:91cee89e-c5ed-4cc4-8e07-df5d81c97582, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:6dc6a47, CLOUDID:f08d30bf-d7af-4351-93aa-42531abf0c7b, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 2fc27fee66c011ef8b96093e013ec31c-20240830 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1173315110; Fri, 30 Aug 2024 19:08:29 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS14N2.mediatek.inc (172.21.101.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 30 Aug 2024 19:08:28 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 30 Aug 2024 19:08:28 +0800 From: Macpaul Lin To: AngeloGioacchino Del Regno , Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , Liam Girdwood , Mark Brown , Sebastian Reichel , Pavel Machek , Sean Wang , Lee Jones , Alexandre Mergnat , Flora Fu CC: Bear Wang , Pablo Sun , Macpaul Lin , Macpaul Lin , "Sen Chu" , Chris-qj chen , MediaTek Chromebook Upstream , , , , , , , , Chen-Yu Tsai Subject: [PATCH v2 5/7] dt-bindings: leds: mt6323: merge to MFD mediatek,mt6397 DT schema Date: Fri, 30 Aug 2024 19:07:30 +0800 Message-ID: <20240830110732.30080-5-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240830110732.30080-1-macpaul.lin@mediatek.com> References: <20240830110732.30080-1-macpaul.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--9.873000-8.000000 X-TMASE-MatchedRID: pZGT1+TJBEa1DfGM6db7X7Gj3LN0+Ey9I9yVcHNDU7bo1+KnG60kJ0d0 Rzx07LDVAE+AZVTHj3U5b8Cn2AtzZF0U3RPW+iLPhK8o4aoss8rljSRvSGpq3Fmmz7LVVfOpQ0U kLoLY8eZQnoa+pHlSjSRYcCcgpfWXvop7Aj3Fk4EMH4SsGvRsAx83WxJo1IH1bJknz+3f3aXET4 xkmX4BvK2hFZjS5hc6FXEpsEnvAUxDeuA2fujoFQe06kQGFaIWfS0Ip2eEHnz3IzXlXlpamPoLR 4+zsDTtc20lvB2foahAByKL5N6oM/dme64tMkQaUW4CUJyXHz2zYHV6i90eh1Zca9RSYo/b X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--9.873000-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: BAD89263B4BD01370AC4A7538461DFC4BBBB5232013248BBBC92DB454517322F2000:8 X-MTK: N Convert leds-mt6323.txt to be compatible with DT schema. Since this is a simple LED device node, merge it into parent mediatek,mt6397.yaml. Subsequently, remove leds-mt6323.txt with a separate patch. Signed-off-by: Macpaul Lin --- .../devicetree/bindings/leds/leds-mt6323.txt | 63 ------------------- 1 file changed, 63 deletions(-) delete mode 100644 Documentation/devicetree/bindings/leds/leds-mt6323.txt Changes for v1 and v2: - This is the first version of converting leds-mt6323. This is because converting leds-mt6323 together with mfd/mediatek,mt6397.yaml, so we've create a patch set instead of submitting single patch for each subdevice. - This patch has been made base on linux-next/master git repo. diff --git a/Documentation/devicetree/bindings/leds/leds-mt6323.txt b/Documentation/devicetree/bindings/leds/leds-mt6323.txt deleted file mode 100644 index 052dccb8..0000000 --- a/Documentation/devicetree/bindings/leds/leds-mt6323.txt +++ /dev/null @@ -1,63 +0,0 @@ -Device Tree Bindings for LED support on MT6323 PMIC - -MT6323 LED controller is subfunction provided by MT6323 PMIC, so the LED -controllers are defined as the subnode of the function node provided by MT6323 -PMIC controller that is being defined as one kind of Muti-Function Device (MFD) -using shared bus called PMIC wrapper for each subfunction to access remote -MT6323 PMIC hardware. - -For MT6323 MFD bindings see: -Documentation/devicetree/bindings/mfd/mt6397.txt -For MediaTek PMIC wrapper bindings see: -Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml - -Required properties: -- compatible : Must be one of - - "mediatek,mt6323-led" - - "mediatek,mt6331-led" - - "mediatek,mt6332-led" -- address-cells : Must be 1 -- size-cells : Must be 0 - -Each led is represented as a child node of the mediatek,mt6323-led that -describes the initial behavior for each LED physically and currently only four -LED child nodes can be supported. - -Required properties for the LED child node: -- reg : LED channel number (0..3) - -Optional properties for the LED child node: -- label : See Documentation/devicetree/bindings/leds/common.txt -- linux,default-trigger : See Documentation/devicetree/bindings/leds/common.txt -- default-state: See Documentation/devicetree/bindings/leds/common.txt - -Example: - - mt6323: pmic { - compatible = "mediatek,mt6323"; - - ... - - mt6323led: leds { - compatible = "mediatek,mt6323-led"; - #address-cells = <1>; - #size-cells = <0>; - - led@0 { - reg = <0>; - label = "LED0"; - linux,default-trigger = "timer"; - default-state = "on"; - }; - led@1 { - reg = <1>; - label = "LED1"; - default-state = "off"; - }; - led@2 { - reg = <2>; - label = "LED2"; - default-state = "on"; - }; - }; - }; From patchwork Fri Aug 30 11:07:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 824314 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 715BF1AF4C1; Fri, 30 Aug 2024 11:08:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016127; cv=none; b=a3Vv4EYyk9ye18tvTRcn87CpX5mG1ATYfibw2ysRGWiU0LtQoE30PA9dQKDnZf36MxbC3HK2LZT9c6P0y3rM0BUUAQqenTQ09XzuPvdR324CKwcjMGk7NWh/oogKyMcNf+w2AMcTT7u7YK1DR7ZiF4RNotmt+PWgXQrWsd7nv78= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016127; c=relaxed/simple; bh=4nCxtqh8g3LuBE0t8EPYFfJPEHa/x9gsgjnHxTipumI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=rBUZupzE3LBaIA6JZ4SZCzSkZ1a/9a7rszPPwT+8oFz05bY+4611IjFulAErzGwOeYsTtUhv397fArgAo9PbTNt3KqUiKuTR14LqT5z3I5cPL5rBBzHo36rUl8iAGjHgEpCeib+3P/dzUu2dG0qabwtcJ36/ovIWIPmiE/+Qvuo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=umBqFU7H; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="umBqFU7H" X-UUID: 2e8ad27066c011ef8593d301e5c8a9c0-20240830 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=dPqT732b21fU/+A4vA1tTR/mY6i6sKym9BGS8yjQ1+k=; b=umBqFU7H060WCELddKCTzug2qj+D5lCsf40i9hlVTcLu8Zm0IjskvMtYBNbU8wbkvk7FHmGSJnHSK5e+vN6cG366FDNRPyqByvSagJ4XyikYc/7ugvVza3PbxA3kF4f18dTD+soMeyIo/bQyxbhtJEuRReZRnX7pqhBB59MBvCw=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.41, REQID:d9e4aa29-0296-470e-9521-9c2a68e01cc9, IP:0, U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:6dc6a47, CLOUDID:7a840d15-737d-40b3-9394-11d4ad6e91a1, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 2e8ad27066c011ef8593d301e5c8a9c0-20240830 Received: from mtkmbs09n1.mediatek.inc [(172.21.101.35)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 664101369; Fri, 30 Aug 2024 19:08:27 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS09N2.mediatek.inc (172.21.101.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 30 Aug 2024 04:08:28 -0700 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 30 Aug 2024 19:08:28 +0800 From: Macpaul Lin To: AngeloGioacchino Del Regno , Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , Liam Girdwood , Mark Brown , Sebastian Reichel , Pavel Machek , Sean Wang , Lee Jones , Alexandre Mergnat , Flora Fu CC: Bear Wang , Pablo Sun , Macpaul Lin , Macpaul Lin , Sen Chu , Chris-qj chen , MediaTek Chromebook Upstream , , , , , , , , Chen-Yu Tsai Subject: [PATCH v2 6/7] dt-bindings: power: reset: mt6323: merge to MFD mediatek,mt6397 DT schema Date: Fri, 30 Aug 2024 19:07:31 +0800 Message-ID: <20240830110732.30080-6-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240830110732.30080-1-macpaul.lin@mediatek.com> References: <20240830110732.30080-1-macpaul.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Convert mt6323-poweroff.txt to be compatible with DT schema. Since this is a power-controller device node, merge it into parent mediatek,mt6397.yaml. Subsequently, remove mt6323-poweroff.txt with a separate patch. Signed-off-by: Macpaul Lin --- .../bindings/power/reset/mt6323-poweroff.txt | 20 ------------------- 1 file changed, 20 deletions(-) delete mode 100644 Documentation/devicetree/bindings/power/reset/mt6323-poweroff.txt Changes for v1 and v2: - This is the first version of converting mt6323-poweroff.txt. This is because converting mt6323-poweroff.txt together with mfd/mediatek,mt6397.yaml, so we've create a patch set instead of submitting single patch for each subdevice. - This patch has been made base on linux-next/master git repo. diff --git a/Documentation/devicetree/bindings/power/reset/mt6323-poweroff.txt b/Documentation/devicetree/bindings/power/reset/mt6323-poweroff.txt deleted file mode 100644 index 933f0c4..0000000 --- a/Documentation/devicetree/bindings/power/reset/mt6323-poweroff.txt +++ /dev/null @@ -1,20 +0,0 @@ -Device Tree Bindings for Power Controller on MediaTek PMIC - -The power controller which could be found on PMIC is responsible for externally -powering off or on the remote MediaTek SoC through the circuit BBPU. - -Required properties: -- compatible: Should be one of follows - "mediatek,mt6323-pwrc": for MT6323 PMIC - -Example: - - pmic { - compatible = "mediatek,mt6323"; - - ... - - power-controller { - compatible = "mediatek,mt6323-pwrc"; - }; - } From patchwork Fri Aug 30 11:07:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 824659 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5259A1AD5D6; Fri, 30 Aug 2024 11:08:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016126; cv=none; b=FcgKVYJK6qFZalaS3crCrZxLpEW10X79g8bv+fkm0eExPSQbPVOuRZhlLVXn54+Gx3HaHwl2hYEYTSY4sY+QpY00HpvdLmOISwWkvFR1GNiWBpHASYhR8EL62/AII0wmOOaWHUZ4XahgeMpi2GLZbaxGgqRHCgCxH/5mdY07TPg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725016126; c=relaxed/simple; bh=/Fb5pZToC3tAN1tu7MCACdn0yLrFT2nb9lJ4ahlghS0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=OhdUjkz1PTZDxJFgs/EemmxgT3g11zmWBlS7b1t3wua7w0W9f/u5RwFMYOLcAtpqWnsqnw7PS7HXCqhXj0p1KQdVpRVJ3yqRG5mYxDg8SMt5IY9+hpYUA0GcK97nSxshtt+i8GYmv+S0sVWV7rjdLQmjS37fpz+u8L5Lo7NTfHQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=A3p4XWMw; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="A3p4XWMw" X-UUID: 2ff440d866c011ef8593d301e5c8a9c0-20240830 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=DipCJgAWyMm6MFO6I1vTU2aLQjwa5Kl2TSY0FW5qvoQ=; b=A3p4XWMw4d04ZQtqSGgDGifhf7iZ7Wlitat9b3ylOuR3mGSCy0/Mxe97kT52qAzBl3ZAFdc5jL1lM7KgvIPcNDP/DkPqMVhXZYTqX+zM11RtflObYS3NT/dKghW5mdpWRxY4VsaEj+8BTbJNJs3Pikt3K0tJUJOJxUFZhrxeU6Q=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.41, REQID:1af36010-1799-43d8-a43b-af36f01b5a9a, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:6dc6a47, CLOUDID:35356fcf-7921-4900-88a1-3aef019a55ce, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 2ff440d866c011ef8593d301e5c8a9c0-20240830 Received: from mtkmbs09n1.mediatek.inc [(172.21.101.35)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 510421618; Fri, 30 Aug 2024 19:08:29 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS09N2.mediatek.inc (172.21.101.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 30 Aug 2024 04:08:29 -0700 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 30 Aug 2024 19:08:29 +0800 From: Macpaul Lin To: AngeloGioacchino Del Regno , Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , Liam Girdwood , Mark Brown , Sebastian Reichel , Pavel Machek , Sean Wang , Lee Jones , Alexandre Mergnat , Flora Fu CC: Bear Wang , Pablo Sun , Macpaul Lin , Macpaul Lin , Sen Chu , Chris-qj chen , MediaTek Chromebook Upstream , , , , , , , , Chen-Yu Tsai Subject: [PATCH v2 7/7] dt-bindings: sound: mt6358: merge to MFD mediatek,mt6397 DT schema Date: Fri, 30 Aug 2024 19:07:32 +0800 Message-ID: <20240830110732.30080-7-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240830110732.30080-1-macpaul.lin@mediatek.com> References: <20240830110732.30080-1-macpaul.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Convert "sound/mt6358.txt" to be compatible with the DT schema. Since this is a simple audio codec device node, merge it into the parent file mediatek,mt6397.yaml. Subsequently, remove mt6358.txt with a separate patch. Signed-off-by: Macpaul Lin --- .../devicetree/bindings/sound/mt6358.txt | 26 ------------------- 1 file changed, 26 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/mt6358.txt Changes for v1 and v2: - This is the first version of converting "sound/mt6358.txt". This is because converting sound/mt6358.txt together with mfd/mediatek,mt6397.yaml, so we've create a patch set instead of submitting single patch for each subdevice. - This patch has been made base on linux-next/master git repo. diff --git a/Documentation/devicetree/bindings/sound/mt6358.txt b/Documentation/devicetree/bindings/sound/mt6358.txt deleted file mode 100644 index fbe9e55..0000000 --- a/Documentation/devicetree/bindings/sound/mt6358.txt +++ /dev/null @@ -1,26 +0,0 @@ -Mediatek MT6358 Audio Codec - -The communication between MT6358 and SoC is through Mediatek PMIC wrapper. -For more detail, please visit Mediatek PMIC wrapper documentation. - -Must be a child node of PMIC wrapper. - -Required properties: - -- compatible - "string" - One of: - "mediatek,mt6358-sound" - "mediatek,mt6366-sound" -- Avdd-supply : power source of AVDD - -Optional properties: -- mediatek,dmic-mode : Indicates how many data pins are used to transmit two - channels of PDM signal. 0 means two wires, 1 means one wire. Default - value is 0. - -Example: - -mt6358_snd { - compatible = "mediatek,mt6358-sound"; - Avdd-supply = <&mt6358_vaud28_reg>; - mediatek,dmic-mode = <0>; -};