From patchwork Mon Aug 19 22:10:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 820433 Received: from mail-qv1-f42.google.com (mail-qv1-f42.google.com [209.85.219.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 725E61DC48B; Mon, 19 Aug 2024 22:10:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724105462; cv=none; b=pe2lFATF2maMbsUgM/g3rKXhRTT62W1V/fZlc/5M8AvymEOARuUyRbKz9fSVJvmjmjqw9GNodWPrT+fpBgaiDvBzHcQFcwfykONuiU7Dnc9fKETSRVwWybMohPDV8DWW90ldAGMP1dDYekDenaPl8YEVvYHn6fKMwuO0t3+1rbg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724105462; c=relaxed/simple; bh=gAn0H0EN/A5/qAmmgql4FiI37FpaJzQk5Y3LrUCLEjE=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Y6j2wrPdolCsDp9t3ncazPeA4B9rIGPlA+jbKfvcgN7ry5QDb8AJrWeFYr4X22Mmq5ShRiQaQxF1RXv7L9ZowlJ1IP8o4wvEuUsTFhZ70Rw6qpnCl0rYi2V7Bu/gZpmFMKLZHdz+16x+Ns5hQUN2/arAN+0Dvh0kV18W0h0Ggso= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=F46Dbcah; arc=none smtp.client-ip=209.85.219.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="F46Dbcah" Received: by mail-qv1-f42.google.com with SMTP id 6a1803df08f44-6bf7a2035d9so37024136d6.1; Mon, 19 Aug 2024 15:10:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1724105458; x=1724710258; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=J1AzGBccvDMbMwX4PIKd4VChrBM6yOFTEVtOfCF+28E=; b=F46Dbcah02uNRo83+wpqQaCSHvcVPLYNtSra+S2KXzcaJQnWgjTXOAUdorPrvgip/U uQz/XQ9bNj8KMUyZLtArKZvvyyz5cZ+rSEtlcnWxxho0gTink1CCuD0S+Jm5XQxmxTCu po1Ex0dWvgHjwsvTVr+TVflEi1+bwpgASY21j7mMRoJaFucj+g/094rpI2jjRB2+bUoS e+AZ25iOT4640FLFWNiiRUxazDOoIwoTTOR+okY1btGWZNpbla04OFhns4OroDwNe7zX flXWmqxF1/kShGYhSUwZTkBaGgJShPukrpV7zbAs9Q0dcrLXNq0DYjXQhRDx3O6WWTor SDnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1724105458; x=1724710258; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J1AzGBccvDMbMwX4PIKd4VChrBM6yOFTEVtOfCF+28E=; b=F0kbJZAbLT6vtzXT0KMQeglE/IqBLImrthrapE8bX0t9dNVRtU97VV6u2axMTT3He+ wanWZ3uQd6EPADCJFrlTph07mtJxRYbuz6yPltZwr03OpOK1THwf3O0fJ9XAekdPnKRq cbK2+SmG3kw5pNe32BE7y7OCMvpCgoINfBc7RsYyqc6tfkPv2IqXkx9UqzztRtcMEg+N OyJ8C21/0845Ar9JZgaCyOLIaflICGSF8X+y/KHR2hvGL/KvJZpP3H9esUgYoG9MJv9G 17sxUVB0lisYogiLeVpVpCFGZvE4JSqf47jjABoSTHROxDUqWx8+cUKCLLBLwen1IUgA AWMw== X-Forwarded-Encrypted: i=1; AJvYcCU8rleTr4wc+jmFW2Alub3pBm/+GfqzB5c7hbLbdiLPscBjiuezRa2t5chvsTlPNXgQMnYokBuMfDS+osE=@vger.kernel.org, AJvYcCV/R8Itdb/X6IO8p/GXCwslu+Gfh+Q8qOuPLd6AUZbqSgAJyGjFxDqNz6SFjTRQVCslXjiAXrWcKoCH@vger.kernel.org, AJvYcCVsPG9jC1FOH4c77zLadDHsNebu704y6qAj0A5OH+2kt1b+auJF8RWETpAtgweOorqzviAIQXtrOCal8biGag==@vger.kernel.org, AJvYcCXJnYXzPi1nUgJwuS6SHs/EMkdI+d09Pp1glsR/A50XmQ3JhlIA6rQEAebKDiet5N6D0Idf/ystK4Ph@vger.kernel.org X-Gm-Message-State: AOJu0Yxg8j5Yi2JBMGqSH4lwL+zCWsqcKyrTRAQb1SoL9Tvo+Kfy+/sc QQ+TEgcferevCdex7x3t0S35ejC/VVcAyGyTv1c8teFq+zp+mF0g X-Google-Smtp-Source: AGHT+IFQSvbvwGVOyuqOmSP599T/pJASuKU0CYGknQuBQZ854dA5P4qAoACesO2mCFzqXz1UloVXJw== X-Received: by 2002:ad4:5dec:0:b0:6bf:7efc:1117 with SMTP id 6a1803df08f44-6bfa88e56f1mr16332046d6.9.1724105458158; Mon, 19 Aug 2024 15:10:58 -0700 (PDT) Received: from localhost ([2607:fea8:52a3:d200:324c:b818:b179:79b]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6bf763cb74fsm43801386d6.112.2024.08.19.15.10.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Aug 2024 15:10:57 -0700 (PDT) From: Richard Acayan To: Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , Richard Acayan , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Subject: [PATCH v3 1/5] dt-bindings: i2c: qcom-cci: Document SDM670 compatible Date: Mon, 19 Aug 2024 18:10:53 -0400 Message-ID: <20240819221051.31489-8-mailingradian@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819221051.31489-7-mailingradian@gmail.com> References: <20240819221051.31489-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The CCI on the Snapdragon 670 is the interface for controlling camera hardware over I2C. Add the compatible so it can be added to the SDM670 device tree. Signed-off-by: Richard Acayan Reviewed-by: Vladimir Zapolskiy --- .../devicetree/bindings/i2c/qcom,i2c-cci.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml index c33ae7b63b84..af6dd9a34fd4 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml @@ -27,6 +27,7 @@ properties: - enum: - qcom,sc7280-cci - qcom,sc8280xp-cci + - qcom,sdm670-cci - qcom,sdm845-cci - qcom,sm6350-cci - qcom,sm8250-cci @@ -138,6 +139,23 @@ allOf: - const: cci - const: camss_ahb + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm670-cci + then: + properties: + clocks: + minItems: 4 + clock-names: + items: + - const: camnoc_axi + - const: soc_ahb + - const: cpas_ahb + - const: cci + - if: properties: compatible: From patchwork Mon Aug 19 22:10:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 821897 Received: from mail-qv1-f45.google.com (mail-qv1-f45.google.com [209.85.219.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 63B0626AD4; Mon, 19 Aug 2024 22:11:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724105463; cv=none; b=dKfk4eMqb7uNx+q13LNpi99std+PbAgJGmbSerJZzswEQZgAebn0Pv4LmRt4nA5V9ZtHFIwctUm96/BNEikXbUuUKnvXcv/zzo3Ukg7g0c7AX1fE6Ye1/Iu681jHc0uSn8YQfzkBg2b8LZCKSWa0+6+tRzYOkgBckLFQ0100+L0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724105463; c=relaxed/simple; bh=mTcscfsOR0G5mNrBR3aXODu2cjKru4FcqZa/VkX9BjE=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RK+FCcOrI6DWPuC9Un9pXg4hW7l1wmqDhUGf/Pa8QUlUfYEq1jXan9jJ/av+bbxlfH/cRXV3DtDjmWncPodTmQBhZfIc+FCRmbRW6XMcZpjEjPlBynrT1akhsiyBBejxD8A0jpGLM8UIcKTHFnbkWU4jqvE+dzIXuwkJtd43avA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=hyw0KdRv; arc=none smtp.client-ip=209.85.219.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hyw0KdRv" Received: by mail-qv1-f45.google.com with SMTP id 6a1803df08f44-6bf790944f1so23588406d6.2; Mon, 19 Aug 2024 15:11:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1724105460; x=1724710260; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=Ig6bP4JUqMAexG7zRH83iPwpsHnZ6Su7qPSTPpoGOyM=; b=hyw0KdRvqPPsiaVsoziYWjJpGmcx+WIWEldkcqtEwMr8PRTrFUldsJoDTfKbEOT4TF TI5KNjdnjkAWYcXMd4OY3ms/+uV/sqcOcJWfaLo59R+LivtzYPaLO4iDm7czItfwPpn4 fj6xMYp+Ze5mn/oiBDGgKUF1rfZqx/2pu2zi8/zuPe1qpCunVbQ44xuH0elaolQ8Dcbv XUNnFrNkcjYgsMuj+0wnTjygfERVn2MKYsMmaCqgV7zFRBiA0tehV2xAkw2u2+8gTjwN 9/eR/l4wnDKbLYfCPRXYY8YeKLaef7kDIjQ9MDdwQRIlFKHN6kGUAZtxtML5HfHFhqUA ZlVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1724105460; x=1724710260; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ig6bP4JUqMAexG7zRH83iPwpsHnZ6Su7qPSTPpoGOyM=; b=bLOnLDg/sZqtrMtIjgqQYRHBbaGi4EkZlcnCiH9botdKjDzvp+6cBJEbFH0USi43BN nEkud3MGA3vn9TVCUTvQzTczs7xgeN7UVyues08suZbdUiubAJ7R1IUXzBOz9HKxB5XZ /tAV318RPDjxo3JYzPSCL1G3usgZjvf+XVE91DvM2hpBVil3Nc6wVjcnWX8oPx0WzMKc krwOs7Hz/SmuqntgP8ydQ5T9cCMkDjMA57XiRXo4KgAfE4VBK//6PxPuUIYBaaGQ120j gg3/A5CNHepV3mSER51wkLNmca6d2MAp2uWyy8/iwZbARlTmCtY6iqGTRrme3I+C6ztv J/XQ== X-Forwarded-Encrypted: i=1; AJvYcCVOKwf/uh2miRd2byn94gtgDlnLAFYh9vLReTOGBy/aazornbXAr36+qVMKAafcEqpC5Xa2lF25itOZ@vger.kernel.org, AJvYcCVrI7wuyGZEUj1nj7pZ4QabC/rHximC7t8sbZgzRo0gOadSh9vVTE4/wA7prtwOubSQJbzLccXaQ7nv7BI=@vger.kernel.org, AJvYcCWeYei5sIF5cDR12TiBmn4nOneeyt+wjI7/YkM66nqdZvyvs/uOH2Kddyf8hxtEdTwpTnTasd5LU7dW@vger.kernel.org, AJvYcCXEu0m5U6UfygCwFCgvNAaaMBWNmZB4Dmgzn48EdLikGHoZwh5z2VrNlCA+1y0yL0kYCmZMg3ZdGpysMP3bcA==@vger.kernel.org X-Gm-Message-State: AOJu0Yz1mNuhtyQ03pr1fS7ps4snMC/W/BSHXBpxrPzAki+1HYN5XaUd adsCskPvxvGdzXVti2CQ78Rf8BS8Cu8nOad3AlvZ2g3UBjrlcQ0G X-Google-Smtp-Source: AGHT+IHPbrWcPdicGYym2C5UOrTJFSSMs2T2p2+sZ5PNL60H1Wz43GijtH9dAK0e7Cfi/WNxh18Ezw== X-Received: by 2002:a0c:e408:0:b0:6bf:7d33:342c with SMTP id 6a1803df08f44-6bf7d333561mr118187296d6.1.1724105460061; Mon, 19 Aug 2024 15:11:00 -0700 (PDT) Received: from localhost ([2607:fea8:52a3:d200:324c:b818:b179:79b]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6bf6fdd928fsm46241076d6.21.2024.08.19.15.10.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Aug 2024 15:10:59 -0700 (PDT) From: Richard Acayan To: Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , Richard Acayan , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Subject: [PATCH v3 2/5] dt-bindings: media: camss: Add qcom,sdm670-camss Date: Mon, 19 Aug 2024 18:10:54 -0400 Message-ID: <20240819221051.31489-9-mailingradian@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819221051.31489-7-mailingradian@gmail.com> References: <20240819221051.31489-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 As found in the Pixel 3a, the Snapdragon 670 has a camera subsystem with 3 CSIDs and 3 VFEs (including 1 VFE lite). Add this camera subsystem to the bindings. Adapted from SC8280XP camera subsystem. Signed-off-by: Richard Acayan --- .../bindings/media/qcom,sdm670-camss.yaml | 319 ++++++++++++++++++ 1 file changed, 319 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml diff --git a/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml new file mode 100644 index 000000000000..5789cf66a516 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml @@ -0,0 +1,319 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,sdm670-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SDM670 Camera Subsystem (CAMSS) + +maintainers: + - Richard Acayan + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. + +properties: + compatible: + const: qcom,sdm670-camss + + clocks: + maxItems: 22 + + clock-names: + items: + - const: camnoc_axi + - const: cpas_ahb + - const: csi0 + - const: csi1 + - const: csi2 + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: gcc_camera_ahb + - const: gcc_camera_axi + - const: soc_ahb + - const: vfe0_axi + - const: vfe0 + - const: vfe0_cphy_rx + - const: vfe1_axi + - const: vfe1 + - const: vfe1_cphy_rx + - const: vfe_lite + - const: vfe_lite_cphy_rx + + interrupts: + maxItems: 9 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + + iommus: + maxItems: 4 + + power-domains: + items: + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. + - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller. + + power-domain-names: + items: + - const: ife0 + - const: ife1 + - const: top + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY0. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY1. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY2. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + reg: + maxItems: 9 + + reg-names: + items: + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: csid0 + - const: vfe1 + - const: csid1 + - const: vfe_lite + - const: csid2 + + vdda-phy-supply: + description: + Phandle to a regulator supply to PHY core block. + + vdda-pll-supply: + description: + Phandle to 1.8V regulator supply to PHY refclk pll block. + +required: + - clock-names + - clocks + - compatible + - interrupts + - interrupt-names + - iommus + - power-domains + - power-domain-names + - reg + - reg-names + - vdda-phy-supply + - vdda-pll-supply + +additionalProperties: false + +examples: + - | + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + camss@ac65000 { + compatible = "qcom,sdm670-camss"; + + reg = <0 0x0ac65000 0 0x1000>, + <0 0x0ac66000 0 0x1000>, + <0 0x0ac67000 0 0x1000>, + <0 0x0acaf000 0 0x4000>, + <0 0x0acb3000 0 0x1000>, + <0 0x0acb6000 0 0x4000>, + <0 0x0acba000 0 0x1000>, + <0 0x0acc4000 0 0x4000>, + <0 0x0acc8000 0 0x1000>; + reg-names = "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "csid0", + "vfe1", + "csid1", + "vfe_lite", + "csid2"; + + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>; + clock-names = "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "vfe0_axi", + "vfe0", + "vfe0_cphy_rx", + "vfe1_axi", + "vfe1", + "vfe1_cphy_rx", + "vfe_lite", + "vfe_lite_cphy_rx"; + + iommus = <&apps_smmu 0x808 0x0>, + <&apps_smmu 0x810 0x8>, + <&apps_smmu 0xc08 0x0>, + <&apps_smmu 0xc10 0x8>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "top"; + + vdda-phy-supply = <&vreg_l1a_1p225>; + vdda-pll-supply = <&vreg_l8a_1p8>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + csiphy_ep0: endpoint { + clock-lanes = <7>; + data-lanes = <0 1 2 3>; + remote-endpoint = <&front_sensor_ep>; + }; + }; + }; + }; + }; From patchwork Mon Aug 19 22:10:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 820432 Received: from mail-qk1-f180.google.com (mail-qk1-f180.google.com [209.85.222.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 362231DD387; Mon, 19 Aug 2024 22:11:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.222.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724105464; cv=none; b=GxNG8hjW2CAfTRyWEj3JEqPH7OAHcUizNLD0nZ9LoeYFkUUKmEnqEJHlAEhUlHCg289JjTwYaQa3ib0I9Ztubi7hTVYtj+ilSceEMUYskfyBTAFAtKuHKKAmyYJIGy96rQNGPcEPXGb6s3DG5KcKftJRpEFemEuhVQ1GNGHxbSE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724105464; c=relaxed/simple; bh=ccVRTp9faW5ehWXaB1MrOcXTVhYSMLDHziH1AzUbaL0=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=n+ciPTJHrmGdcaBmJ5saiUeg2q/bT/Hnj6Bt9kktZCvW+z8zudSwyhPQ++8XFQrhxKMKrVMWGSyeO68bSk5jLwnnCmAZeNnz6tcr9QIK3EO/N/ACi27REsk0Xbjz50Zc464ZwNxW54qyqyxcwgQngAStDDz1xOQBZC2sXwOHx1o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=SUwOaNIx; arc=none smtp.client-ip=209.85.222.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="SUwOaNIx" Received: by mail-qk1-f180.google.com with SMTP id af79cd13be357-7a1d6f47112so342599885a.0; Mon, 19 Aug 2024 15:11:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1724105462; x=1724710262; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=HNW9DSfCSMP8a3LqbeOZlzWArdw20gE/NppzZBlisAo=; b=SUwOaNIxR7wimV2r2zlxy4kKeanpXVT2/SBD6LpT8QQ8AkQb6Pasu6INpyZx4Ov9P9 mxKhInFwmFRkvrI9lzV/Ja03ezxIrC+Dv/4n2bU5Xx0vwxPhvwEVPY4CeLuPFY2lFG7s R8q3OWD1CKU42VJ+UqODr+UaAQvM5rpAqdapb07pSpGgmQhugG9/SL3dQ3cysFT8ztr6 2PGaEBKd97tNMoRoPPyuUpNk4hydwD//Z6dDxcWAgiVhnwnsMhFI9BPiSvr/5iJX6cyv x2vGyI01YoAosI7qAzH9GoHzEYkRLv7C/62PkGWvt5vGSLyRDRUHOdSTsZ8Jxh27tprl R+OA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1724105462; x=1724710262; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HNW9DSfCSMP8a3LqbeOZlzWArdw20gE/NppzZBlisAo=; b=Hb0CTrSX2LSsFuE4y+jEKhHREeXAkGw1wrlNd4vrlkYsOzcaMuK6fZzRSa43xl2jEB knUfxjGCnW3EO0AK3F/Z0qa+MQkkHJkIwkpFYIXWxxA1mQkftpZeryweLhbYzKtLzaT0 /0TXD6d8xPDe4t77YzS1j0SU05iHFrlMTlIQB/85DCYHBFjoUCCPYPz4/orXhOCfleoR Jor8H6g/1AaPOpw1Kk0Fo9DLZJS6a2aWkNUTa4EUn4v1mGV67q8txYdInF165nxVNl8p vdlc945bdxI/rgmpXxhGLLX3C2SOFZ5+aHN5s+VaIt2tkKh0kPbNrt9av09I78LXn271 /4Rw== X-Forwarded-Encrypted: i=1; AJvYcCUR5QyWfr0jG1ChPrBh6dJxXTg4NQsMUo7+yayRr0PLEzy3Jy7FCESCpaMbmL++HpJ2dlRDsMKtMj4l@vger.kernel.org, AJvYcCWDV35ySfrTlMwQewS0pjXzWVawVPrlFTFzMYBeOz5uvpi0+a2vmEPklAJ1yo6mJiBZIQeE1GVksifsQF68IQ==@vger.kernel.org, AJvYcCWQchS69iCVDg4t790NDAOgo7xnFynYNl0YgW3QTSn2mi/HJuRKX6ox5F3zOQU4y7xJmyBQioCgKKDJ@vger.kernel.org, AJvYcCWsCSxwXF3dGaIJjx1haoai4A9oBe0Y+faphO0JqIvDjg4/ALYbjhBWXPJQbA/+qLOZu/TVpGgI0Qa2kq0=@vger.kernel.org X-Gm-Message-State: AOJu0YwsHDaWsw+uFre6uuhrLvlKcKrxJ6eVidk5i+Pn7ghpcii1ZrFv QJlydEt878mCZWUx5Kb41unm/HYFNBsZu5N6d6Nbo8REyjwz9r9/ X-Google-Smtp-Source: AGHT+IHFgl+/2k89LhwoMl2cfPNC1FECus0IK9htPWljfu1Lh/lBw129llkBBkro37OO0D+JQSzrSA== X-Received: by 2002:a05:620a:2a16:b0:79f:148:d834 with SMTP id af79cd13be357-7a5069d1820mr1636612885a.59.1724105461930; Mon, 19 Aug 2024 15:11:01 -0700 (PDT) Received: from localhost ([2607:fea8:52a3:d200:324c:b818:b179:79b]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7a4ff025280sm474454985a.24.2024.08.19.15.11.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Aug 2024 15:11:01 -0700 (PDT) From: Richard Acayan To: Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , Richard Acayan , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Subject: [PATCH v3 3/5] media: qcom: camss: add support for SDM670 camss Date: Mon, 19 Aug 2024 18:10:55 -0400 Message-ID: <20240819221051.31489-10-mailingradian@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819221051.31489-7-mailingradian@gmail.com> References: <20240819221051.31489-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera subsystem for the SDM670 the same as on SDM845 except with 3 CSIPHY ports instead of 4. Add support for the SDM670 camera subsystem. Signed-off-by: Richard Acayan Reviewed-by: Bryan O'Donoghue Acked-by: Bryan O'Donoghue Reviewed-by: Vladimir Zapolskiy --- drivers/media/platform/qcom/camss/camss.c | 191 ++++++++++++++++++++++ 1 file changed, 191 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 51b1d3550421..b2f22bfd8692 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -584,6 +584,185 @@ static const struct camss_subdev_resources vfe_res_660[] = { } }; +static const struct camss_subdev_resources csiphy_res_670[] = { + /* CSIPHY0 */ + { + .regulators = {}, + .clock = { "soc_ahb", "cpas_ahb", + "csiphy0", "csiphy0_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy0" }, + .interrupt = { "csiphy0" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + + /* CSIPHY1 */ + { + .regulators = {}, + .clock = { "soc_ahb", "cpas_ahb", + "csiphy1", "csiphy1_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy1" }, + .interrupt = { "csiphy1" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + + /* CSIPHY2 */ + { + .regulators = {}, + .clock = { "soc_ahb", "cpas_ahb", + "csiphy2", "csiphy2_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy2" }, + .interrupt = { "csiphy2" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + } +}; + +static const struct camss_subdev_resources csid_res_670[] = { + /* CSID0 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "cpas_ahb", "soc_ahb", "vfe0", + "vfe0_cphy_rx", "csi0" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid0" }, + .interrupt = { "csid0" }, + .csid = { + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + + /* CSID1 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "cpas_ahb", "soc_ahb", "vfe1", + "vfe1_cphy_rx", "csi1" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid1" }, + .interrupt = { "csid1" }, + .csid = { + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + + /* CSID2 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "cpas_ahb", "soc_ahb", "vfe_lite", + "vfe_lite_cphy_rx", "csi2" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid2" }, + .interrupt = { "csid2" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + } +}; + +static const struct camss_subdev_resources vfe_res_670[] = { + /* VFE0 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe0", "vfe0_axi" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 } }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" }, + .vfe = { + .line_num = 4, + .has_pd = true, + .pd_name = "ife0", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + + /* VFE1 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe1", "vfe1_axi" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 } }, + .reg = { "vfe1" }, + .interrupt = { "vfe1" }, + .vfe = { + .line_num = 4, + .has_pd = true, + .pd_name = "ife1", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + + /* VFE-lite */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe_lite" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 } }, + .reg = { "vfe_lite" }, + .interrupt = { "vfe_lite" }, + .vfe = { + .is_lite = true, + .line_num = 4, + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + } +}; + static const struct camss_subdev_resources csiphy_res_845[] = { /* CSIPHY0 */ { @@ -2403,6 +2582,17 @@ static const struct camss_resources sdm660_resources = { .link_entities = camss_link_entities }; +static const struct camss_resources sdm670_resources = { + .version = CAMSS_845, + .csiphy_res = csiphy_res_670, + .csid_res = csid_res_670, + .vfe_res = vfe_res_670, + .csiphy_num = ARRAY_SIZE(csiphy_res_670), + .csid_num = ARRAY_SIZE(csid_res_670), + .vfe_num = ARRAY_SIZE(vfe_res_670), + .link_entities = camss_link_entities +}; + static const struct camss_resources sdm845_resources = { .version = CAMSS_845, .csiphy_res = csiphy_res_845, @@ -2447,6 +2637,7 @@ static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,msm8916-camss", .data = &msm8916_resources }, { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources }, { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources }, + { .compatible = "qcom,sdm670-camss", .data = &sdm670_resources }, { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources }, { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources }, { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources }, From patchwork Mon Aug 19 22:10:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 821896 Received: from mail-yb1-f174.google.com (mail-yb1-f174.google.com [209.85.219.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 13EC01DF660; Mon, 19 Aug 2024 22:11:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.219.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724105466; cv=none; b=XQ200XFpgBGSKKy6SzxdHd4FriLcJenFPX+U38jjyUin7SXazykADIrXvdtoKymt1IaaWlSu7HCIbSjU9r9hU3xulRUqCweBFbwJSL+wzOqS+B42v9xIyZdgjWdfym/2ruNI+kwJ4ZriWjhUfPNdc/Hx95P9keO6zylZvRSCFVk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724105466; c=relaxed/simple; bh=f5ndnPGyNML2RBVgcCFAS6E+Cpaupo301Mp7PFj/82o=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IyPJbcGWIBcNigGQCTgKpwY7sviBBKkXz8B/WNmBAVUUZ/ppRQWPcPFUVV+X+2pwVb7+9riBFV/X5mo9PQgFWtuRiZdHIHrJc0YaSVAuaAY4H7BUgawH5pGUu/SmE2rIagAe7lk7CvwVBTxSjspP1SD0dXcHXFYzwPQyiRWGLK8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=SIG9jqlv; arc=none smtp.client-ip=209.85.219.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="SIG9jqlv" Received: by mail-yb1-f174.google.com with SMTP id 3f1490d57ef6-e0e76380433so4976828276.2; Mon, 19 Aug 2024 15:11:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1724105464; x=1724710264; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=pYvOKhrvZIkdrV3l4vU+5m+L83khCaWVUbS3qfqudds=; b=SIG9jqlvxFMt18Sdq5OjcgDmsz6SGcKFQl8oOVD49EwqthQl0CkLOzCMTGtUphnRFG lzesaPJELWhOx3v+v8FlHu0kf6GBbZbT3c9hiCbFAHGRkdOQGk2jOe37Tv4v2ZFGhZbM m+3iGbtm3Si5/VBv4VK5PIJumVwboMCUGPrMNMh0tcF5C/ombTgCnYSSNLvpNBeyNscp Ek9s/KFj6nMW43XaAwFt1+wOFqsdA+8wrEWZgRF1XMhYwwORnBIMCS73Vd0TbWU7gCyW lh8n7+Hj89gOw6WRdxn+ac/LgNlvrBEdPusi0Cu78sONllYBIchsKeJaSA8CFlDceV1i nExg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1724105464; x=1724710264; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pYvOKhrvZIkdrV3l4vU+5m+L83khCaWVUbS3qfqudds=; b=o+uGjj/105hECTbRaPll1fej3ny1nocmRi4RWLMu6yTP+lHosbi76zjcn77f8dM2Tb PUhYjjo4XFUqUdusSsyngcHjIv+OLTajrWTsgL0QpAyVQqCwyqRXF07b4u+brSr0b6xF 4ZENeta2fAuQeWZENU13SZGV3dKeKfF7PiCdk3aoi+bbiU0WAbmiCINAKs6hir8gWYTw cwiyeATSpd1a2pSaMW5Id69K+cj2WuV/W8MisNovptmBubhfm6THx/wFv5dP3M2+UqbY 7hcjrl7gImNrHPblslvt3BI7aoh+DKfg0ZV2YEuJbCXhhbXhOd5Ato2/fF8FxuC16qkm EHww== X-Forwarded-Encrypted: i=1; AJvYcCUWaklVt9yIdJLWSM5dAPK14d9tNyMIOoGl4fYzkkmrEk0+7JoFoXDMU4xM0c8ij1ICmk56iF4KgOwm@vger.kernel.org, AJvYcCVG+85TL8T+WdoHMNrmU+VkCix8JsSMCN73jxEu3D6loSOUO4KmUO62aco9YtYo0qA4LkqNXRr7Hxf0ASzM5Q==@vger.kernel.org, AJvYcCVJPNqSAYq16dj96LfMMS9Ny21HSG7t/Dc3S6drHhRI9MZW85G0ncb5XSyOb6AulAEzl6lRsXOcOMyvsTU=@vger.kernel.org, AJvYcCXCMF/1WmgZK8/VX/KvYXjLhOq8nWf6wY+q8JqAegYbSTZqD5jkHKLxMPYuMNE7XF2fqb+JP1ugO6ex@vger.kernel.org X-Gm-Message-State: AOJu0Yy87bm8xG7Z3S/0KxhZTQMGTtAJkl+CEBrMfnReAdbF0SxL9sMF ilO/TW9EklfQ4/Jf441HPZKam0CVOB17tuw1iL/1Fp1wg960OVLFUaiYp6E6 X-Google-Smtp-Source: AGHT+IGTTVKO2yJaZhCFAqhqi8ID8pIIk1KfzrMHUwGyCDK2ECdMOw04qPnlUnhCpnKOCnAWHEEIog== X-Received: by 2002:a05:6902:1021:b0:e0e:763a:260c with SMTP id 3f1490d57ef6-e1180fbe116mr10829882276.38.1724105463836; Mon, 19 Aug 2024 15:11:03 -0700 (PDT) Received: from localhost ([2607:fea8:52a3:d200:324c:b818:b179:79b]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-45369ff35c3sm44409521cf.33.2024.08.19.15.11.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Aug 2024 15:11:03 -0700 (PDT) From: Richard Acayan To: Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , Richard Acayan , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Subject: [PATCH v3 4/5] arm64: dts: qcom: sdm670: add camcc Date: Mon, 19 Aug 2024 18:10:56 -0400 Message-ID: <20240819221051.31489-11-mailingradian@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819221051.31489-7-mailingradian@gmail.com> References: <20240819221051.31489-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera clock controller on SDM670 controls the clocks that drive the camera subsystem. The clocks are the same as on SDM845. Add the camera clock controller for SDM670. Reviewed-by: Bryan O'Donoghue Signed-off-by: Richard Acayan --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index 187c6698835d..ba93cef33dbb 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1400,6 +1400,16 @@ spmi_bus: spmi@c440000 { #interrupt-cells = <4>; }; + camcc: clock-controller@ad00000 { + compatible = "qcom,sdm845-camcc"; + reg = <0 0x0ad00000 0 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + mdss: display-subsystem@ae00000 { compatible = "qcom,sdm670-mdss"; reg = <0 0x0ae00000 0 0x1000>; From patchwork Mon Aug 19 22:10:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 820431 Received: from mail-qk1-f176.google.com (mail-qk1-f176.google.com [209.85.222.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D2FBF1DF67D; Mon, 19 Aug 2024 22:11:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.222.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724105468; cv=none; b=CsiTrkfGJvTr/SaDUxx1hlaHsSZVoKHsXiTHUd8HWYxp2DwV8De+reTP92OW0foWRyrdNPYifAWSPzkW4qpZPDuCxZK1ukLF9+rYvcNTJJd2irKQ972DPboUdt7e/3cTzXldH79FjicXuTmPTfT8b30KrjS5/jo1OwcIXWYLx1w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724105468; c=relaxed/simple; bh=tnjxV2VvnXns7n2Knjg26+27dYtt61E8TIRYlSlKg+c=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OUzExk/hMblJmkBq49WaXom3/iCBG9ZxVlcAqEVYPueinViToZHj2yTCNCs5r2OLugCzaTIyx376gUUAmBh8LhXr7vC161v1gReIcL+iwUJIdY6peDKwKzoKqtbV3RzdLnu2COyxS3dnJcZjliSmaMKTFK7Ry3d0BqnlVE9cztk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=FQgIXQDK; arc=none smtp.client-ip=209.85.222.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="FQgIXQDK" Received: by mail-qk1-f176.google.com with SMTP id af79cd13be357-7a1d3e93cceso557256285a.1; Mon, 19 Aug 2024 15:11:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1724105466; x=1724710266; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=2wIngiQeJGUQfKfmpwRGyoAi8JjHIk4mGP79f/O4PBk=; b=FQgIXQDKOyHStgzIDmiODKoWqbPBGVbH4jB64ZzXYiCAJkshaLboVyAFd3uSWdrNXI h8G1iUo9z1c1Z3Bv6ts8leZOO7ABKHCkQGmU913Xx1ZiegCYLvyHJcVCtoKq1WuzZbV3 GFVy3DwlepMqiAoPuXDtPywLKOYZQSiaK8vGf6hyl5s5nn25lpKrC9R5n75Y5B0BmyvG hTNuksXp9DAr2lCMfo9kMV86czjt1Hj/PEezzbI+YibwlzASn1yqm+YxOt83wQ2jfFCH t90T5QUpmCEmys1JHYUZ+ohsjcjdHmnhnJpQHYoHEVRtIjoJcxSa8lmNSvGcccaPoVPc yuzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1724105466; x=1724710266; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2wIngiQeJGUQfKfmpwRGyoAi8JjHIk4mGP79f/O4PBk=; b=C1hi+mKDEDam3g3fW8AY4FtFNsdGFbjfbMTTlWWcA87tnGo7QFO1QgfLef54nMi/LF UdP9fnci46NiyKAW90Yyy3BeaE0zI7TgFe72PHFHHEorMbamKBLKCOJbND3sGvjWNWsj N9wBg50z2EDi/4W6NS+b1xi3MDQC84/sp1f8XoRV7T9NWw4WVpkSSmexPS8EfDOCcdqb /tSuWEnodNEigrMWvaXR7PYuD5ThjjDpIbLJ1G46/GHowtKOyMfF9jDknMfFAreCDoBO s6TA4Tpig+swcCr0b/4/a24Nd5b6qT2IsTpbAQHFa+CUaSI0i58fBboxNX7S5Y6yXjAb z0rQ== X-Forwarded-Encrypted: i=1; AJvYcCU53/IUZWOU5Zv2MPvvG/xyX0HOM15sBJ8aO/PUbxwwR0H5TA+CtHPSvxTCxV7gkngrmWYaMPRIyoFYFi0=@vger.kernel.org, AJvYcCUk2WXfrxloNDGgxsGOvmpxA0Yv8WPRqITc0PPf6xDD/746DrSd9HSUtEv7YsJ1O6szSCizJhzO54P2EjiArQ==@vger.kernel.org, AJvYcCUxmiIPIQyTt0gk/FsHo7UW1vGFQ06QygOc/N5jK6wI4XgVrodqzrVLluQTrck3MzzdkPt+OF+1oKEj@vger.kernel.org, AJvYcCWhfKAWCBMZOc3NHjeM67t6whDCvhRJ/DiDW4Ruoa/qx3ZivP0XMaPNx78WMB/Fy15X+go3cxCeh9DY@vger.kernel.org X-Gm-Message-State: AOJu0YzRbDxigTP02t0eBnPE6PgXAp+y0PdJiggNL2w+IyvEWHXt9yM7 qOMQwVHjvYX2OW5iJxbGriv4NcrkGVFz3qTzXNGA40ZAFR7AXRhe X-Google-Smtp-Source: AGHT+IHJoi/5xlmMHu/+zijSosHYThrSInCBRnOQe4GF1m7Fle6wbhuxQ15qxVN8jsnFUWWw3SxFKA== X-Received: by 2002:a05:620a:c4b:b0:795:60ba:76e9 with SMTP id af79cd13be357-7a667aa0bb4mr198408385a.4.1724105465626; Mon, 19 Aug 2024 15:11:05 -0700 (PDT) Received: from localhost ([2607:fea8:52a3:d200:324c:b818:b179:79b]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-4536a04e6a6sm44355711cf.59.2024.08.19.15.11.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Aug 2024 15:11:05 -0700 (PDT) From: Richard Acayan To: Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , Richard Acayan , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Subject: [PATCH v3 5/5] arm64: dts: qcom: sdm670: add camss and cci Date: Mon, 19 Aug 2024 18:10:57 -0400 Message-ID: <20240819221051.31489-12-mailingradian@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240819221051.31489-7-mailingradian@gmail.com> References: <20240819221051.31489-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the camera subsystem and CCI used to interface with cameras on the Snapdragon 670. Signed-off-by: Richard Acayan Reviewed-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 188 +++++++++++++++++++++++++++ 1 file changed, 188 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index ba93cef33dbb..37bc4fa04286 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -6,6 +6,7 @@ * Copyright (c) 2022, Richard Acayan. All rights reserved. */ +#include #include #include #include @@ -1168,6 +1169,34 @@ tlmm: pinctrl@3400000 { gpio-ranges = <&tlmm 0 0 151>; wakeup-parent = <&pdc>; + cci0_default: cci0-default-state { + pins = "gpio17", "gpio18"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci0_sleep: cci0-sleep-state { + pins = "gpio17", "gpio18"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + + cci1_default: cci1-default-state { + pins = "gpio19", "gpio20"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci1_sleep: cci1-sleep-state { + pins = "gpio19", "gpio20"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + qup_i2c0_default: qup-i2c0-default-state { pins = "gpio0", "gpio1"; function = "qup0"; @@ -1400,6 +1429,165 @@ spmi_bus: spmi@c440000 { #interrupt-cells = <4>; }; + cci: cci@ac4a000 { + compatible = "qcom,sdm670-cci", "qcom,msm8996-cci"; + #address-cells = <1>; + #size-cells = <0>; + + reg = <0 0x0ac4a000 0 0x4000>; + interrupts = ; + power-domains = <&camcc TITAN_TOP_GDSC>; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CCI_CLK>; + clock-names = "camnoc_axi", + "soc_ahb", + "cpas_ahb", + "cci"; + + assigned-clocks = <&camcc CAM_CC_CCI_CLK>; + assigned-clock-rates = <37500000>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cci0_default &cci1_default>; + pinctrl-1 = <&cci0_sleep &cci1_sleep>; + + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + camss: camera-controller@ac65000 { + compatible = "qcom,sdm670-camss"; + reg = <0 0x0ac65000 0 0x1000>, + <0 0x0ac66000 0 0x1000>, + <0 0x0ac67000 0 0x1000>, + <0 0x0acaf000 0 0x4000>, + <0 0x0acb3000 0 0x1000>, + <0 0x0acb6000 0 0x4000>, + <0 0x0acba000 0 0x1000>, + <0 0x0acc4000 0 0x4000>, + <0 0x0acc8000 0 0x1000>; + reg-names = "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "csid0", + "vfe1", + "csid1", + "vfe_lite", + "csid2"; + + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>; + clock-names = "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "vfe0_axi", + "vfe0", + "vfe0_cphy_rx", + "vfe1_axi", + "vfe1", + "vfe1_cphy_rx", + "vfe_lite", + "vfe_lite_cphy_rx"; + + iommus = <&apps_smmu 0x808 0x0>, + <&apps_smmu 0x810 0x8>, + <&apps_smmu 0xc08 0x0>, + <&apps_smmu 0xc10 0x8>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "top"; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + camss_port0: port@0 { + reg = <0>; + }; + + camss_port1: port@1 { + reg = <1>; + }; + + camss_port2: port@2 { + reg = <2>; + }; + }; + }; + camcc: clock-controller@ad00000 { compatible = "qcom,sdm845-camcc"; reg = <0 0x0ad00000 0 0x10000>;