From patchwork Wed Aug 14 07:29:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 819313 Received: from esa1.hgst.iphmx.com (esa1.hgst.iphmx.com [68.232.141.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E48EAEA4 for ; Wed, 14 Aug 2024 07:31:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.141.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723620689; cv=none; b=QZEcIzxdKg6+fQ4xN667rlTpJu4hxAuPuBF4/GZ5W+ZIGYPOXUDb9m5zdH9eDX+bCR1dSUP3KZ+quAuO/grB412Hgd4nx7WrwxueYZLMOY2LLBmxx8oIKiDi+4h2ips0IRrB9VM3jpa6+aKGcTjmk4xc65YkBcQw6VdKEOfxgP4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723620689; c=relaxed/simple; bh=OSRuQRkaXfIZCB34lkDpVYh7O6NYm8LaeRZiVsWtOdQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=P1SlKQ/wBjptHW0EvBff07fxEuzv2mFELRflWUD26VvJNmSFbvVTs5H6n6R9UDZo8umkgS+OYHDRvhpMa/BBw/gqaiBNIx7Banx3vevZ4WbtKOGIwljl6NtYU9czxCJqHZOBQwsEPffn2veiHFmfvrf0qUnrJV5J2Kt3qSTK8EM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=dtuZrxLj; arc=none smtp.client-ip=68.232.141.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="dtuZrxLj" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1723620687; x=1755156687; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OSRuQRkaXfIZCB34lkDpVYh7O6NYm8LaeRZiVsWtOdQ=; b=dtuZrxLjvwRhIOKrN5T0qy3/3KV+mbqPIJHr/6wl4EJgf2CaQ3Eh4EEZ f6qQ71HR6ciWSCJo/WP28XNRq/aV9JxTg/0yt5lZW63vI30J1dviKmwAG pqhizkRIGzgrBRUtYnT2/5LR9s01HkAq+I+aZmul5WWqnwx+eyj6vF8OO CgLu1owXz6XnWjB7jLGcXAk4DBEvVtE2XRLVbWNsMvc6hqzItY3uUxQLf 5tHb/wsXAP/fQiJiKNZDQuAtRcXecHa/yUMCN+l1OOJU1kfJGmN86Re20 YzIvS7EBZr/i8xp8p0l9ARGBwfK43Smc3hfnc8bTfByCPo94IZc/eko9g Q==; X-CSE-ConnectionGUID: p60w2gNxSweswvCZ/RqrgA== X-CSE-MsgGUID: ydbuvjLhRVy8U/xz7R65SQ== X-IronPort-AV: E=Sophos;i="6.09,288,1716220800"; d="scan'208";a="24957137" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 14 Aug 2024 15:31:19 +0800 IronPort-SDR: 66bc4f44_KHB0XhsAs0Iq61HtWhRYXFRSKHPwzxxtnZrAKOsKHaCIgg/ 5g8+fqoPFNT0ONNpgvMN6KC0Dm7GeONejMm7+gA== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 13 Aug 2024 23:31:33 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Aug 2024 00:31:18 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Ricky WU , Avri Altman Subject: [PATCH v3 01/10] mmc: sd: SDUC Support Recognition Date: Wed, 14 Aug 2024 10:29:25 +0300 Message-Id: <20240814072934.2559911-2-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240814072934.2559911-1-avri.altman@wdc.com> References: <20240814072934.2559911-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 ACMD41 was extended to support the host-card handshake during initialization. The card expects that the HCS & HO2T bits to be set in the command argument, and sets the applicable bits in the R3 returned response. On the contrary, if a SDUC card is inserted to a non-supporting host, it will never respond to this ACMD41 until eventually, the host will timed out and give up. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/sd_ops.c | 19 +++++++++++++++---- include/linux/mmc/host.h | 6 ++++++ include/linux/mmc/sd.h | 1 + 3 files changed, 22 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/core/sd_ops.c b/drivers/mmc/core/sd_ops.c index 8b9b34286ef3..7f6963dac873 100644 --- a/drivers/mmc/core/sd_ops.c +++ b/drivers/mmc/core/sd_ops.c @@ -168,12 +168,16 @@ int mmc_send_app_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr) .cmd = &cmd }; int err; + u32 sduc_arg = SD_OCR_CCS | SD_OCR_2T; cmd.opcode = SD_APP_OP_COND; + cmd.arg = ocr; + if (mmc_host_is_spi(host)) - cmd.arg = ocr & (1 << 30); /* SPI only defines one bit */ + cmd.arg &= (1 << 30); /* SPI only defines one bit */ else - cmd.arg = ocr; + cmd.arg |= sduc_arg; + cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R3 | MMC_CMD_BCR; err = __mmc_poll_for_busy(host, SD_APP_OP_COND_PERIOD_US, @@ -182,8 +186,15 @@ int mmc_send_app_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr) if (err) return err; - if (rocr && !mmc_host_is_spi(host)) - *rocr = cmd.resp[0]; + if (!mmc_host_is_spi(host)) { + if (rocr) + *rocr = cmd.resp[0]; + + if ((cmd.resp[0] & sduc_arg) == sduc_arg) + host->caps2 |= MMC_CAP2_SD_SDUC; + else + host->caps2 &= ~MMC_CAP2_SD_SDUC; + } return 0; } diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 88c6a76042ee..a9c36a3e1a10 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -427,6 +427,7 @@ struct mmc_host { #define MMC_CAP2_CRYPTO 0 #endif #define MMC_CAP2_ALT_GPT_TEGRA (1 << 28) /* Host with eMMC that has GPT entry at a non-standard location */ +#define MMC_CAP2_SD_SDUC (1 << 29) /* SD over 2TB */ int fixed_drv_type; /* fixed driver type for non-removable media */ @@ -638,6 +639,11 @@ static inline int mmc_card_uhs(struct mmc_card *card) card->host->ios.timing <= MMC_TIMING_UHS_DDR50; } +static inline int mmc_card_is_sduc(struct mmc_host *host) +{ + return host->caps2 & MMC_CAP2_SD_SDUC; +} + void mmc_retune_timer_stop(struct mmc_host *host); static inline void mmc_retune_needed(struct mmc_host *host) diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h index 6727576a8755..865cc0ca8543 100644 --- a/include/linux/mmc/sd.h +++ b/include/linux/mmc/sd.h @@ -36,6 +36,7 @@ /* OCR bit definitions */ #define SD_OCR_S18R (1 << 24) /* 1.8V switching request */ #define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */ +#define SD_OCR_2T (1 << 27) /* HO2T/CO2T - SDUC support */ #define SD_OCR_XPC (1 << 28) /* SDXC power control */ #define SD_OCR_CCS (1 << 30) /* Card Capacity Status */ From patchwork Wed Aug 14 07:29:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 819940 Received: from esa1.hgst.iphmx.com (esa1.hgst.iphmx.com [68.232.141.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F25CD3BBF4 for ; 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d="scan'208";a="24957153" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 14 Aug 2024 15:31:23 +0800 IronPort-SDR: 66bc4f49_AUlvRtFS9b4WAKim7iILJ+wLZgTIOlA21Q/J8+QAcQaV+zm DID/uX9EqqNaZ3/GyUe9kH2+pqv54gxEpqCZ/PQ== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 13 Aug 2024 23:31:37 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Aug 2024 00:31:22 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Ricky WU , Avri Altman Subject: [PATCH v3 02/10] mmc: sd: Add SD CSD version 3.0 Date: Wed, 14 Aug 2024 10:29:26 +0300 Message-Id: <20240814072934.2559911-3-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240814072934.2559911-1-avri.altman@wdc.com> References: <20240814072934.2559911-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Ultra Capacity SD cards (SDUC) was already introduced in SD7.0. Those cards support capacity larger than 2TB and up to including 128TB. Properly parse the csd register as the c_size field got expanded to 28 bits. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/bus.c | 4 +++- drivers/mmc/core/card.h | 3 +++ drivers/mmc/core/sd.c | 16 +++++++++++----- include/linux/mmc/card.h | 2 +- 4 files changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c index 0ddaee0eae54..30763b342bd3 100644 --- a/drivers/mmc/core/bus.c +++ b/drivers/mmc/core/bus.c @@ -321,7 +321,9 @@ int mmc_add_card(struct mmc_card *card) case MMC_TYPE_SD: type = "SD"; if (mmc_card_blockaddr(card)) { - if (mmc_card_ext_capacity(card)) + if (mmc_card_ult_capacity(card)) + type = "SDUC"; + else if (mmc_card_ext_capacity(card)) type = "SDXC"; else type = "SDHC"; diff --git a/drivers/mmc/core/card.h b/drivers/mmc/core/card.h index b7754a1b8d97..64dcb463a4f4 100644 --- a/drivers/mmc/core/card.h +++ b/drivers/mmc/core/card.h @@ -23,6 +23,7 @@ #define MMC_CARD_SDXC (1<<3) /* card is SDXC */ #define MMC_CARD_REMOVED (1<<4) /* card has been removed */ #define MMC_STATE_SUSPENDED (1<<5) /* card is suspended */ +#define MMC_CARD_SDUC (1<<6) /* card is SDUC */ #define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) #define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) @@ -30,11 +31,13 @@ #define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC) #define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED)) #define mmc_card_suspended(c) ((c)->state & MMC_STATE_SUSPENDED) +#define mmc_card_ult_capacity(c) ((c)->state & MMC_CARD_SDUC) #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT) #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR) #define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC) +#define mmc_card_set_ult_capacity(c) ((c)->state |= MMC_CARD_SDUC) #define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED) #define mmc_card_set_suspended(c) ((c)->state |= MMC_STATE_SUSPENDED) #define mmc_card_clr_suspended(c) ((c)->state &= ~MMC_STATE_SUSPENDED) diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 1c8148cdda50..28193a9b31c9 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -157,6 +157,7 @@ static int mmc_decode_csd(struct mmc_card *card) mmc_card_set_readonly(card); break; case 1: + case 2: /* * This is a block-addressed SDHC or SDXC card. Most * interesting fields are unused and have fixed @@ -172,14 +173,19 @@ static int mmc_decode_csd(struct mmc_card *card) e = UNSTUFF_BITS(resp, 96, 3); csd->max_dtr = tran_exp[e] * tran_mant[m]; csd->cmdclass = UNSTUFF_BITS(resp, 84, 12); - csd->c_size = UNSTUFF_BITS(resp, 48, 22); - /* SDXC cards have a minimum C_SIZE of 0x00FFFF */ - if (csd->c_size >= 0xFFFF) + if (csd_struct == 1) + m = UNSTUFF_BITS(resp, 48, 22); + else + m = UNSTUFF_BITS(resp, 48, 28); + csd->c_size = m; + + if (csd->c_size >= 0x400000 && mmc_card_is_sduc(card->host)) + mmc_card_set_ult_capacity(card); + else if (csd->c_size >= 0xFFFF) mmc_card_set_ext_capacity(card); - m = UNSTUFF_BITS(resp, 48, 22); - csd->capacity = (1 + m) << 10; + csd->capacity = (1 + (typeof(sector_t))m) << 10; csd->read_blkbits = 9; csd->read_partial = 0; diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index f34407cc2788..f39bce322365 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -35,7 +35,7 @@ struct mmc_csd { unsigned int wp_grp_size; unsigned int read_blkbits; unsigned int write_blkbits; - unsigned int capacity; + sector_t capacity; unsigned int read_partial:1, read_misalign:1, write_partial:1, From patchwork Wed Aug 14 07:29:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 819312 Received: from esa1.hgst.iphmx.com (esa1.hgst.iphmx.com [68.232.141.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03721139D00 for ; Wed, 14 Aug 2024 07:31:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.141.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723620693; cv=none; b=HR0XoBGLwQtQlKLe3Vt6lYtAjrVtzYMVEIfig9FyHpoenVCZpa865//njknkjA57G3JFXMVRhsrw7hA56aeW2JGlVOSQGZw7kCJ47zVzFZxMoRKvXYlNOj4B7jpP/Py5rqRbcr5ZN497a8OuAfy6KaF6AcAaIQcQVp7acP5GlX4= ARC-Message-Signature: i=1; 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13 Aug 2024 23:31:43 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Aug 2024 00:31:29 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Ricky WU , Avri Altman Subject: [PATCH v3 03/10] mmc: sd: Add Extension memory addressing Date: Wed, 14 Aug 2024 10:29:27 +0300 Message-Id: <20240814072934.2559911-4-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240814072934.2559911-1-avri.altman@wdc.com> References: <20240814072934.2559911-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SDUC memory addressing spans beyond 2TB and up to 128TB. Therefore, 38 bits are required to access the entire memory space of all sectors. Those extra 6 bits are to be carried by CMD22 prior of sending read/write/erase commands: CMD17, CMD18, CMD24, CMD25, CMD32, and CMD33. CMD22 will carry the higher order 6 bits, and must precedes any of the above commands even if it targets sector < 2TB. No error related to address or length is indicated in CMD22 but rather in the read/write command itself. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/sd_ops.c | 15 +++++++++++++++ drivers/mmc/core/sd_ops.h | 1 + include/linux/mmc/sd.h | 3 +++ 3 files changed, 19 insertions(+) diff --git a/drivers/mmc/core/sd_ops.c b/drivers/mmc/core/sd_ops.c index 7f6963dac873..8b69129d7b61 100644 --- a/drivers/mmc/core/sd_ops.c +++ b/drivers/mmc/core/sd_ops.c @@ -199,6 +199,21 @@ int mmc_send_app_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr) return 0; } +int mmc_send_ext_addr(struct mmc_host *host, sector_t addr) +{ + struct mmc_command cmd = { + .opcode = SD_ADDR_EXT, + .arg = (u32)((addr >> 32) & 0x3F), + .flags = MMC_RSP_R1 | MMC_CMD_AC, + }; + + if (!mmc_card_is_sduc(host)) + return 0; + + return mmc_wait_for_cmd(host, &cmd, 0); +} +EXPORT_SYMBOL_GPL(mmc_send_ext_addr); + static int __mmc_send_if_cond(struct mmc_host *host, u32 ocr, u8 pcie_bits, u32 *resp) { diff --git a/drivers/mmc/core/sd_ops.h b/drivers/mmc/core/sd_ops.h index 7667fc223b74..462efd43acfa 100644 --- a/drivers/mmc/core/sd_ops.h +++ b/drivers/mmc/core/sd_ops.h @@ -21,6 +21,7 @@ int mmc_send_relative_addr(struct mmc_host *host, unsigned int *rca); int mmc_app_send_scr(struct mmc_card *card); int mmc_app_sd_status(struct mmc_card *card, void *ssr); int mmc_app_cmd(struct mmc_host *host, struct mmc_card *card); +int mmc_send_ext_addr(struct mmc_host *host, sector_t addr); #endif diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h index 865cc0ca8543..af5fc70e09a2 100644 --- a/include/linux/mmc/sd.h +++ b/include/linux/mmc/sd.h @@ -15,6 +15,9 @@ #define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */ #define SD_SWITCH_VOLTAGE 11 /* ac R1 */ +/* Class 2 */ +#define SD_ADDR_EXT 22 /* ac [5:0] R1 */ + /* class 10 */ #define SD_SWITCH 6 /* adtc [31:0] See below R1 */ From patchwork Wed Aug 14 07:29:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 819939 Received: from esa1.hgst.iphmx.com (esa1.hgst.iphmx.com [68.232.141.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90C97139D00 for ; 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d="scan'208";a="24957200" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 14 Aug 2024 15:31:34 +0800 IronPort-SDR: 66bc4f53_wavPqp7hCMNXzBX4tO34xX9opswdNeWUUknqCzAUHElG/p+ jL32lkV5kZr5ZSL4FTT//zJxadY4IN4xEdRp9/Q== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 13 Aug 2024 23:31:48 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Aug 2024 00:31:33 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Ricky WU , Avri Altman Subject: [PATCH v3 04/10] mmc: core: Add open-ended Ext memory addressing Date: Wed, 14 Aug 2024 10:29:28 +0300 Message-Id: <20240814072934.2559911-5-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240814072934.2559911-1-avri.altman@wdc.com> References: <20240814072934.2559911-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 For open-ended read/write - just send CMD22 before issuing the command. While at it, make sure that the rw command arg is properly casting the lower 32 bits, as it can be larger now. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 2c9963248fcb..1129f4e1a268 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -180,6 +180,7 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, static void mmc_blk_hsq_req_done(struct mmc_request *mrq); static int mmc_spi_err_check(struct mmc_card *card); static int mmc_blk_busy_cb(void *cb_data, bool *busy); +static int mmc_blk_wait_for_idle(struct mmc_queue *mq, struct mmc_host *host); static struct mmc_blk_data *mmc_blk_get(struct gendisk *disk) { @@ -1664,7 +1665,7 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, brq->mrq.cmd = &brq->cmd; - brq->cmd.arg = blk_rq_pos(req); + brq->cmd.arg = blk_rq_pos(req) & 0xFFFFFFFF; if (!mmc_card_blockaddr(card)) brq->cmd.arg <<= 9; brq->cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC; @@ -1712,6 +1713,9 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, (do_data_tag ? (1 << 29) : 0); brq->sbc.flags = MMC_RSP_R1 | MMC_CMD_AC; brq->mrq.sbc = &brq->sbc; + } else if (mmc_card_is_sduc(card->host)) { + mmc_blk_wait_for_idle(mq, card->host); + mmc_send_ext_addr(card->host, blk_rq_pos(req)); } } From patchwork Wed Aug 14 07:29:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 819311 Received: from esa1.hgst.iphmx.com (esa1.hgst.iphmx.com [68.232.141.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2AF826AC6 for ; Wed, 14 Aug 2024 07:31:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.141.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723620699; cv=none; b=qt2EvIJfGuzsmIKVgS2S21gWPH+fK6T2N2XbM8n+2xi76C3jUjsJQpgZTQ2PqWhnNkEqfyBScb/jcgjTLrWe2kqVQsmXBl6ObAI8BO6JPKFKvpNjyarLUQj5vkUL7gfq6/ebjrDnmWC0soK40+Jp3EByAgVcElMOsDC5H7pt1/E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723620699; c=relaxed/simple; bh=1xXxO/Gm/rhGc4TzBWZqtNWlhoFeOjAhfoSRlZd+6a8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=pB937H7WhcuxAAFpIdnU51FxrBTV8Mu/LiEK/MrSkiUZVA+nBvZxBwO1GgS3lee+CGYdoSC5VTyQT7pm/71hoI6DcSG8u+nwT94kYaOe7QpYUwteMDgINQoXYmU1nUyCNpOrCHLaA7wQL8BHQnS5e3gLpBi7szLkqMtHj9NScHc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=R6HgHSmE; arc=none smtp.client-ip=68.232.141.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="R6HgHSmE" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1723620697; x=1755156697; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1xXxO/Gm/rhGc4TzBWZqtNWlhoFeOjAhfoSRlZd+6a8=; b=R6HgHSmE7I5IehKEH7mtQIS68xkJR5Ivj+7nu1Y95i7U3VEZWQWnC86C d7Eler+/7YSlTI98bqGPCLP3qUGMmwURamCpOWD/mEq8tMAbgygEnkjKt +J1tDLiSLNbEQvSCBzQE4aCkirSL89m/qTMZX05TWkKSon3mtZqDhR8Qp YsLYXhouOo68YUiD9X0rrAgSHxqPBC7n/SFJ41YCNW8FwtITPah4hy8OH ZNY349EWvjwtjO3Ql+dbNNDUTO5Dqij64aMJYFi2V0pyFTr3vWzCSc7we wPv+b0r61fRfWYVtYHqoZoPbyIPajMLRR815cetcc9htOJW3zl+2LPst2 Q==; X-CSE-ConnectionGUID: xpWzhxqVQfWSBN5G3SALfg== X-CSE-MsgGUID: atlqKR68TUqsZsal04bTjA== X-IronPort-AV: E=Sophos;i="6.09,288,1716220800"; d="scan'208";a="24957217" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 14 Aug 2024 15:31:37 +0800 IronPort-SDR: 66bc4f56_Q7JYvg73dIpueyvEvxvkwJrat7TKQKAKFd4WZpI8ds6EEHi IdR++owhh454ZuHyHBV4vmMgVSIMD6CFI7EFt7w== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 13 Aug 2024 23:31:51 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Aug 2024 00:31:36 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Ricky WU , Avri Altman Subject: [PATCH v3 05/10] mmc: host: Always use manual-cmd23 in SDUC Date: Wed, 14 Aug 2024 10:29:29 +0300 Message-Id: <20240814072934.2559911-6-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240814072934.2559911-1-avri.altman@wdc.com> References: <20240814072934.2559911-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In Multi-Block read/write, CMD23 must precede CMD22. Therefore always use manual cmd23 so that we'll be able to control the sequence of commands. Also, add an applicable mmc_command member for both mmc_blk_request and mmc_request to accommodate the address extension command. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/queue.h | 1 + drivers/mmc/host/sdhci.c | 4 ++-- include/linux/mmc/core.h | 1 + 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/core/queue.h b/drivers/mmc/core/queue.h index 1498840a4ea0..7e191d7f0461 100644 --- a/drivers/mmc/core/queue.h +++ b/drivers/mmc/core/queue.h @@ -40,6 +40,7 @@ struct mmc_blk_ioc_data; struct mmc_blk_request { struct mmc_request mrq; struct mmc_command sbc; + struct mmc_command ext; struct mmc_command cmd; struct mmc_command stop; struct mmc_data data; diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 4b91c9e96635..f62b489c9e9c 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1399,13 +1399,13 @@ static inline bool sdhci_auto_cmd12(struct sdhci_host *host, static inline bool sdhci_auto_cmd23(struct sdhci_host *host, struct mmc_request *mrq) { - return mrq->sbc && (host->flags & SDHCI_AUTO_CMD23); + return mrq->sbc && (host->flags & SDHCI_AUTO_CMD23) && !mrq->ext; } static inline bool sdhci_manual_cmd23(struct sdhci_host *host, struct mmc_request *mrq) { - return mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23); + return mrq->sbc && (mrq->ext || !(host->flags & SDHCI_AUTO_CMD23)); } static inline void sdhci_auto_cmd_select(struct sdhci_host *host, diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h index 2c7928a50907..5560e70cb8d4 100644 --- a/include/linux/mmc/core.h +++ b/include/linux/mmc/core.h @@ -142,6 +142,7 @@ struct mmc_data { struct mmc_host; struct mmc_request { struct mmc_command *sbc; /* SET_BLOCK_COUNT for multiblock */ + struct mmc_command *ext; /* SD_ADDR_EXT for SDUC */ struct mmc_command *cmd; struct mmc_data *data; struct mmc_command *stop; From patchwork Wed Aug 14 07:29:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 819938 Received: from esa1.hgst.iphmx.com (esa1.hgst.iphmx.com [68.232.141.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E03A026AC6 for ; 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d="scan'208";a="24957224" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 14 Aug 2024 15:31:41 +0800 IronPort-SDR: 66bc4f5a_0sWEogkdbelUEFEZk9sNStT/sisjxpqq4MK4OuaLGPPgKK2 5E5U2n23y0NAiqYNATLanP1wNVm7iJyWJBB/ViA== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 13 Aug 2024 23:31:55 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Aug 2024 00:31:40 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Ricky WU , Avri Altman Subject: [PATCH v3 06/10] mmc: core: Add close-ended Ext memory addressing Date: Wed, 14 Aug 2024 10:29:30 +0300 Message-Id: <20240814072934.2559911-7-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240814072934.2559911-1-avri.altman@wdc.com> References: <20240814072934.2559911-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In a multi-block data transfer, CMD23 shall precede CMD22. Prepare CMD22 in advance as an additional extension of the mrq, to be handle by the host once CMD23 is done. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 7 +++++++ drivers/mmc/core/core.c | 18 ++++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 1129f4e1a268..0b6ca771b458 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -1713,6 +1713,13 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, (do_data_tag ? (1 << 29) : 0); brq->sbc.flags = MMC_RSP_R1 | MMC_CMD_AC; brq->mrq.sbc = &brq->sbc; + + if (mmc_card_is_sduc(card->host)) { + brq->ext.opcode = SD_ADDR_EXT; + brq->ext.arg = (u32)((blk_rq_pos(req) >> 32) & 0x3F); + brq->ext.flags = MMC_RSP_R1 | MMC_CMD_AC; + brq->mrq.ext = &brq->ext; + } } else if (mmc_card_is_sduc(card->host)) { mmc_blk_wait_for_idle(mq, card->host); mmc_send_ext_addr(card->host, blk_rq_pos(req)); diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index d6c819dd68ed..754e628b061b 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -184,6 +184,14 @@ void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq) mrq->sbc->resp[2], mrq->sbc->resp[3]); } + if (mrq->ext) { + pr_debug("%s: req done : %d: %08x %08x %08x %08x\n", + mmc_hostname(host), mrq->ext->opcode, + mrq->ext->error, + mrq->ext->resp[0], mrq->ext->resp[1], + mrq->ext->resp[2], mrq->ext->resp[3]); + } + pr_debug("%s: req done (CMD%u): %d: %08x %08x %08x %08x\n", mmc_hostname(host), cmd->opcode, err, cmd->resp[0], cmd->resp[1], @@ -270,6 +278,12 @@ static void mmc_mrq_pr_debug(struct mmc_host *host, struct mmc_request *mrq, mrq->sbc->arg, mrq->sbc->flags); } + if (mrq->ext) { + pr_debug("<%s: starting CMD%u arg %08x flags %08x>\n", + mmc_hostname(host), mrq->ext->opcode, + mrq->ext->arg, mrq->ext->flags); + } + if (mrq->cmd) { pr_debug("%s: starting %sCMD%u arg %08x flags %08x\n", mmc_hostname(host), cqe ? "CQE direct " : "", @@ -309,6 +323,10 @@ static int mmc_mrq_prep(struct mmc_host *host, struct mmc_request *mrq) mrq->sbc->error = 0; mrq->sbc->mrq = mrq; } + if (mrq->ext) { + mrq->ext->error = 0; + mrq->ext->mrq = mrq; + } if (mrq->data) { if (mrq->data->blksz > host->max_blk_size || mrq->data->blocks > host->max_blk_count || From patchwork Wed Aug 14 07:29:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 819310 Received: from esa1.hgst.iphmx.com (esa1.hgst.iphmx.com [68.232.141.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 82B2A26AC6 for ; Wed, 14 Aug 2024 07:31:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.141.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723620707; cv=none; b=rwAdiLvZL910sXSBkR+oxbBTolj0YphFy9g9wx8Q6akkxb9WkMtFmjKfKvlLRIV5hsIqStz/FqY5MkN0Vor5JBWYQ4+ZeR3oiJMYLOkq7gRdyLXTwRA1br96WpSkJT7ktZexdVpmQ3hr3KU1F3Z6uPVloaqLgOlrkD1531aeaSM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723620707; c=relaxed/simple; bh=d4lvohduuTMH/7EOfcbNDz75oylRlCQeHu/iGIKubz0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=aMBlSl6N3/eqw0qhXV51QcQWa0k+DGyl+b1UWVs0IOxvxbVeq1FJefRoYEG1XaKt4t41R/rOX9eaaAnc6khVfF7Fm0V6MJkhCxX9cHCZeeN4X7+md4tr4cBbiR66nyMzZ96Q2gHGK52/8r3HvTXBMoqyvtxdQM7oLG/yGwNqxBA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=RUxvP51I; arc=none smtp.client-ip=68.232.141.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="RUxvP51I" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1723620705; x=1755156705; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=d4lvohduuTMH/7EOfcbNDz75oylRlCQeHu/iGIKubz0=; b=RUxvP51Id1jXrAneWIXmMcvlZwH3T/s2hKK0bbFT6cY1ZEZSYUQGjxW6 kft5IQ9RjtV+/Z/pRlzy/wDK9Zo0nF0AE0j4rRt2wjRYzKZ+2CsdDTe5X e3BpbsPJrRYL9K2mzzD61sdraNfzbY+iG2/9lQOorYXsV1b5gS4jle69V CBCmUgAa5u8S7LZzs/PiDxqcHyTybRvD5kEXHUNakvv86vEQ4+tpk+wDg 7asCjoNtzMCLHMJvoDsOjD5aiLhHhxekI6qlFn8/kRhX5iBTxoHqyBUgJ Sn+vEVwV0gS/Zh9wTAbiQoqTwsZPU0NUsudULGrGjiyzmze3r10Ley44c A==; X-CSE-ConnectionGUID: 9M74X8GSSSiEoL2mp31cnQ== X-CSE-MsgGUID: 3Y8AMvAtS16I15egP38z4Q== X-IronPort-AV: E=Sophos;i="6.09,288,1716220800"; d="scan'208";a="24957229" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 14 Aug 2024 15:31:45 +0800 IronPort-SDR: 66bc4f5e_R5Ogwd2lxhqPZqERVfjK0K+xy6BceloGEwPUaGeoY9JJGwQ LIjBB+HYUVxQY5IG4z9GmhlIkff7eLBirR0+MLQ== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 13 Aug 2024 23:31:59 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Aug 2024 00:31:44 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Ricky WU , Avri Altman Subject: [PATCH v3 07/10] mmc: host: Add close-ended Ext memory addressing Date: Wed, 14 Aug 2024 10:29:31 +0300 Message-Id: <20240814072934.2559911-8-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240814072934.2559911-1-avri.altman@wdc.com> References: <20240814072934.2559911-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In a close-ended multi-block data transfer, CMD23 shall precede CMD22. Handle that logic once the sbc is done. Host drivers that handle their own sbc logic, e.g. bcm2835 etc. are out of scope of this change. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/host/sdhci.c | 34 ++++++++++++++++++++++++++++++---- 1 file changed, 30 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index f62b489c9e9c..75a91d0ed16a 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1791,9 +1791,36 @@ static void sdhci_read_rsp_136(struct sdhci_host *host, struct mmc_command *cmd) } } +static struct mmc_command *sdhci_get_sbc_ext(struct sdhci_host *host, + struct mmc_command *cmd) +{ + if (mmc_card_is_sduc(host->mmc)) { + /* Finished CMD22, now send actual command */ + if (cmd == cmd->mrq->ext) + return cmd->mrq->cmd; + } + + /* Finished CMD23 */ + if (cmd == cmd->mrq->sbc) { + if (mmc_card_is_sduc(host->mmc)) { + /* send CMD22 after CMD23 */ + if (WARN_ON(!cmd->mrq->ext)) + return NULL; + else + return cmd->mrq->ext; + } else { + /* Finished CMD23, now send actual command */ + return cmd->mrq->cmd; + } + } + + return NULL; +} + static void sdhci_finish_command(struct sdhci_host *host) { struct mmc_command *cmd = host->cmd; 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d="scan'208";a="24957235" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 14 Aug 2024 15:31:49 +0800 IronPort-SDR: 66bc4f63_N+30NSRBDUudDxNp3fzZ8VCeX8oLm+1E8W9AXZSrnz97ExY qWOKCihg2APVYheTNhaqCNDJpxmwgzXcN6PVplw== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 13 Aug 2024 23:32:03 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Aug 2024 00:31:49 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Ricky WU , Avri Altman Subject: [PATCH v3 08/10] mmc: core: Allow mmc erase to carry large addresses Date: Wed, 14 Aug 2024 10:29:32 +0300 Message-Id: <20240814072934.2559911-9-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240814072934.2559911-1-avri.altman@wdc.com> References: <20240814072934.2559911-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Preparing for SDUC, Allow the erase address to be larger beyond a 32 bit address. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 6 ++++-- drivers/mmc/core/core.c | 33 ++++++++++++++++++--------------- drivers/mmc/core/core.h | 14 ++++++++++++-- 3 files changed, 34 insertions(+), 19 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 0b6ca771b458..30cb8b0d5742 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -1154,7 +1154,8 @@ static void mmc_blk_issue_erase_rq(struct mmc_queue *mq, struct request *req, { struct mmc_blk_data *md = mq->blkdata; struct mmc_card *card = md->queue.card; - unsigned int from, nr; + unsigned int nr; + sector_t from; int err = 0; blk_status_t status = BLK_STS_OK; @@ -1209,7 +1210,8 @@ static void mmc_blk_issue_secdiscard_rq(struct mmc_queue *mq, { struct mmc_blk_data *md = mq->blkdata; struct mmc_card *card = md->queue.card; - unsigned int from, nr, arg; + unsigned int nr, arg; + sector_t from; int err = 0, type = MMC_BLK_SECDISCARD; blk_status_t status = BLK_STS_OK; diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index 754e628b061b..07aa249c227b 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -1616,8 +1616,8 @@ static unsigned int mmc_erase_timeout(struct mmc_card *card, return mmc_mmc_erase_timeout(card, arg, qty); } -static int mmc_do_erase(struct mmc_card *card, unsigned int from, - unsigned int to, unsigned int arg) +static int mmc_do_erase(struct mmc_card *card, sector_t from, + sector_t to, unsigned int arg) { struct mmc_command cmd = {}; unsigned int qty = 0, busy_timeout = 0; @@ -1648,8 +1648,8 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from, else if (mmc_card_sd(card)) qty += to - from + 1; else - qty += ((to / card->erase_size) - - (from / card->erase_size)) + 1; + qty += (mmc_sector_div(to, card->erase_size) - + mmc_sector_div(from, card->erase_size)) + 1; if (!mmc_card_blockaddr(card)) { from <<= 9; @@ -1718,18 +1718,19 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from, } static unsigned int mmc_align_erase_size(struct mmc_card *card, - unsigned int *from, - unsigned int *to, + sector_t *from, + sector_t *to, unsigned int nr) { - unsigned int from_new = *from, nr_new = nr, rem; + sector_t from_new = *from; + unsigned int nr_new = nr, rem; /* * When the 'card->erase_size' is power of 2, we can use round_up/down() * to align the erase size efficiently. */ if (is_power_of_2(card->erase_size)) { - unsigned int temp = from_new; + sector_t temp = from_new; from_new = round_up(temp, card->erase_size); rem = from_new - temp; @@ -1741,7 +1742,7 @@ static unsigned int mmc_align_erase_size(struct mmc_card *card, nr_new = round_down(nr_new, card->erase_size); } else { - rem = from_new % card->erase_size; + rem = mmc_sector_mod(from_new, card->erase_size); if (rem) { rem = card->erase_size - rem; from_new += rem; @@ -1774,10 +1775,12 @@ static unsigned int mmc_align_erase_size(struct mmc_card *card, * * Caller must claim host before calling this function. */ -int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, +int mmc_erase(struct mmc_card *card, sector_t from, unsigned int nr, unsigned int arg) { - unsigned int rem, to = from + nr; + unsigned int rem; + sector_t to = from + nr; + int err; if (!(card->csd.cmdclass & CCC_ERASE)) @@ -1798,7 +1801,7 @@ int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, return -EOPNOTSUPP; if (arg == MMC_SECURE_ERASE_ARG) { - if (from % card->erase_size || nr % card->erase_size) + if (mmc_sector_mod(from, card->erase_size) || nr % card->erase_size) return -EINVAL; } @@ -1822,7 +1825,7 @@ int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, * and call mmc_do_erase() twice if necessary. This special case is * identified by the card->eg_boundary flag. */ - rem = card->erase_size - (from % card->erase_size); + rem = card->erase_size - mmc_sector_mod(from, card->erase_size); if ((arg & MMC_TRIM_OR_DISCARD_ARGS) && card->eg_boundary && nr > rem) { err = mmc_do_erase(card, from, from + rem - 1, arg); from += rem; @@ -1881,12 +1884,12 @@ int mmc_can_secure_erase_trim(struct mmc_card *card) } EXPORT_SYMBOL(mmc_can_secure_erase_trim); -int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, +int mmc_erase_group_aligned(struct mmc_card *card, sector_t from, unsigned int nr) { if (!card->erase_size) return 0; - if (from % card->erase_size || nr % card->erase_size) + if (mmc_sector_mod(from, card->erase_size) || nr % card->erase_size) return 0; return 1; } diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h index 37091a6589ed..22defaea2265 100644 --- a/drivers/mmc/core/core.h +++ b/drivers/mmc/core/core.h @@ -116,14 +116,14 @@ bool mmc_is_req_done(struct mmc_host *host, struct mmc_request *mrq); int mmc_start_request(struct mmc_host *host, struct mmc_request *mrq); -int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, +int mmc_erase(struct mmc_card *card, sector_t from, unsigned int nr, unsigned int arg); int mmc_can_erase(struct mmc_card *card); int mmc_can_trim(struct mmc_card *card); int mmc_can_discard(struct mmc_card *card); int mmc_can_sanitize(struct mmc_card *card); int mmc_can_secure_erase_trim(struct mmc_card *card); -int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, +int mmc_erase_group_aligned(struct mmc_card *card, sector_t from, unsigned int nr); unsigned int mmc_calc_max_discard(struct mmc_card *card); @@ -199,4 +199,14 @@ static inline int mmc_flush_cache(struct mmc_host *host) return 0; } +static inline unsigned int mmc_sector_div(sector_t dividend, u32 divisor) +{ + return div_u64(dividend, divisor); +} + +static inline unsigned int mmc_sector_mod(sector_t dividend, u32 divisor) +{ + return sector_div(dividend, divisor); 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14 Aug 2024 00:31:55 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Ricky WU , Avri Altman Subject: [PATCH v3 09/10] mmc: core: Add Ext memory addressing for erase Date: Wed, 14 Aug 2024 10:29:33 +0300 Message-Id: <20240814072934.2559911-10-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240814072934.2559911-1-avri.altman@wdc.com> References: <20240814072934.2559911-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 CMD22 shall precede CMD32 and CMD33 to configure 38-bit erase start address and 38 bit erase stop address. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/core.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index 07aa249c227b..a982ead0c8af 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -1660,8 +1660,12 @@ static int mmc_do_erase(struct mmc_card *card, sector_t from, cmd.opcode = SD_ERASE_WR_BLK_START; else cmd.opcode = MMC_ERASE_GROUP_START; - cmd.arg = from; + cmd.arg = from & 0xFFFFFFFF; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; + + if (mmc_card_is_sduc(card->host)) + mmc_send_ext_addr(card->host, from); + err = mmc_wait_for_cmd(card->host, &cmd, 0); if (err) { pr_err("mmc_erase: group start error %d, " @@ -1675,8 +1679,12 @@ static int mmc_do_erase(struct mmc_card *card, sector_t from, cmd.opcode = SD_ERASE_WR_BLK_END; else cmd.opcode = MMC_ERASE_GROUP_END; - cmd.arg = to; + cmd.arg = to & 0xFFFFFFFF; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; 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13 Aug 2024 23:37:55 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Aug 2024 00:32:00 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Ricky WU , Avri Altman Subject: [PATCH v3 10/10] mmc: core: Adjust ACMD22 to SDUC Date: Wed, 14 Aug 2024 10:29:34 +0300 Message-Id: <20240814072934.2559911-11-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240814072934.2559911-1-avri.altman@wdc.com> References: <20240814072934.2559911-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 ACMD22 is used to verify the previously write operation. Normally, it returns the number of written sectors as u32. SDUC, however, returns it as u64. This is not a superfluous requirement, because SDUC writes may exceeds 2TB. For Linux mmc however, the previously write operation could not be more than the block layer limits, thus we make room for a u64 and cast the returning value to u32. Moreover, SD cards expect to be allowed the full 500msec busy period post write operations. This is true for standard capacity SD, and even more so for high volume SD cards, specifically SDUC. If CMD13 return an error bit, the recovery flow is entered regardless of the busy period. Thus, better enforce the busy period for SDUC, otherwise it might return a bogus bytes written. Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 43 ++++++++++++++++++++++++++++++++++------ 1 file changed, 37 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 30cb8b0d5742..cc5ec94a4be1 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -48,6 +48,7 @@ #include #include +#include #include "queue.h" #include "block.h" @@ -948,13 +949,20 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) int err; u32 result; __be32 *blocks; - + u8 resp_sz; struct mmc_request mrq = {}; struct mmc_command cmd = {}; struct mmc_data data = {}; - struct scatterlist sg; + /* + * SD cards, specifically high volume cards, expect to be allowed with the + * full 500msec busy period post write. Otherwise, they may not indicate + * correctly the number of bytes written. + */ + if (mmc_card_is_sduc(card->host)) + mmc_delay(500); + err = mmc_app_cmd(card->host, card); if (err) return err; @@ -963,7 +971,14 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) cmd.arg = 0; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC; - data.blksz = 4; + /* + * Normally, ACMD22 returns the number of written sectors as u32. + * SDUC, however, returns it as u64. This is not a superfluous + * requirement, because SDUC writes may exceed 2TB. + */ + resp_sz = mmc_card_is_sduc(card->host) ? 8 : 4; + + data.blksz = resp_sz; data.blocks = 1; data.flags = MMC_DATA_READ; data.sg = &sg; @@ -973,15 +988,31 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) mrq.cmd = &cmd; mrq.data = &data; - blocks = kmalloc(4, GFP_KERNEL); + blocks = kmalloc(resp_sz, GFP_KERNEL); if (!blocks) return -ENOMEM; - sg_init_one(&sg, blocks, 4); + sg_init_one(&sg, blocks, resp_sz); mmc_wait_for_req(card->host, &mrq); - result = ntohl(*blocks); + if (mmc_card_is_sduc(card->host)) { + u64 blocks_64 = get_unaligned_be64(blocks); + /* + * For Linux mmc however, the previously write operation could + * not be more than the block layer limits, thus just make room + * for a u64 and cast the response back to u32. + */ + + if (blocks_64 > UINT_MAX) { + /* avoid any test robot warnings */ + result = UINT_MAX; + } else { + result = (u32)blocks_64; + } + } else { + result = ntohl(*blocks); + } kfree(blocks); if (cmd.error || data.error)