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([203.30.4.111]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-710e5a43b49sm2984841b3a.100.2024.08.11.19.58.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Aug 2024 19:58:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, qemu-stable@nongnu.org Subject: [PATCH 1/3] target/i386: Do not apply REX to MMX operands Date: Mon, 12 Aug 2024 12:58:42 +1000 Message-ID: <20240812025844.58956-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240812025844.58956-1-richard.henderson@linaro.org> References: <20240812025844.58956-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Cc: qemu-stable@nongnu.org Fixes: b3e22b2318a ("target/i386: add core of new i386 decoder") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2495 Signed-off-by: Richard Henderson --- target/i386/tcg/decode-new.c.inc | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc index b22210f45d..03138b3876 100644 --- a/target/i386/tcg/decode-new.c.inc +++ b/target/i386/tcg/decode-new.c.inc @@ -1979,7 +1979,10 @@ static bool decode_op(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode, op->unit = X86_OP_SSE; } get_reg: - op->n = ((get_modrm(s, env) >> 3) & 7) | REX_R(s); + op->n = ((get_modrm(s, env) >> 3) & 7); + if (op->unit != X86_OP_MMX) { + op->n |= REX_R(s); + } break; case X86_TYPE_E: /* ALU modrm operand */ From patchwork Mon Aug 12 02:58:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 818566 Delivered-To: patch@linaro.org Received: by 2002:a5d:5711:0:b0:367:895a:4699 with SMTP id a17csp1180781wrv; Sun, 11 Aug 2024 19:59:18 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXWidSm94BZAZgBAFLSSdluPSJa3rEFUksqUdfoeJNSwwmH+QPitqMHbo51O+W5FT96czQEsQ==@linaro.org X-Google-Smtp-Source: AGHT+IGJyn9bUvr2ooEElQL2oz7otXo9DyZmBQLsLWXaN2KnpG+1eEZebAlJtKjE15ImWyrLeWpq X-Received: by 2002:a05:6214:568d:b0:6b5:e3ba:5251 with SMTP id 6a1803df08f44-6bd78da54f9mr80589906d6.8.1723431558516; Sun, 11 Aug 2024 19:59:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1723431558; cv=none; d=google.com; s=arc-20160816; b=JNnpgMI3FMi6l0/kfm6xQZynWdKlILp9xCNRX951jZzRsLYHqdVRwXd+B0JFtB1S+z dQqGrZLoiIVKR7KGWO+YBMhStITBmwYpxjSv6mQIIh35jYjaMFVyOpRL7cSMnnu9rj8K cbKIfBdDliL2xFwWR5rJqPPpWJtPi9uJqiBEL1UaNy+cRPgfpcrAakucCpl9uuvRGbyG 12Fh2q9lShJpSr9KV6DezFNXHEsL28MBPpRzigG7j78fe4asNnh76v3FRgMJkmmYtz7q UNQ9xzN4R2/AfrIl64HHzlZER8MaHOnQYI+KwkDBjLpSPNNhgTL5TBaOBGYDDXnlS/ds cGow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=RRhHm135dGLBKgHTs5Bk6uiyESpFu38TL3b65HCIA00=; fh=3mEp7FusppN5Drq2PN08R8D/9xXM9YdbtG5TkJxJBiE=; b=COeaU73C2TaXNik32ezF09ojswBAr+rf7+OWaS71Pwji7XguZxZkEr2RWFCBlsDpJa QXMYOsHFolRMkasZTKTgAw4B6RKwLqMgmpr6ZHxo12+CStgvRanvCztI01bUSPCYTENK w7+2NSNolx+iRFKdMPdeR6tIWrmrCe6sx5q7pHUwIOBU4GkWsPNR2ODrLAkTq4/x8V2c gYUjn+lLnYwochKC94emhQ6xIIO+GOw2GeT8dXLzJt2BkETyGzXL54bOgjg3rm5tHfUu vJ1h6UcbtIQefRbV+anjsY4W81PyqUiJKR+MxqfkWM8g3zYZs/5RGgW1r3dHzfgtXagB ssCQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TYmYP7kE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([203.30.4.111]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-710e5a43b49sm2984841b3a.100.2024.08.11.19.58.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Aug 2024 19:58:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com Subject: [PATCH 2/3] target/i386: Use unit not type in decode_modrm Date: Mon, 12 Aug 2024 12:58:43 +1000 Message-ID: <20240812025844.58956-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240812025844.58956-1-richard.henderson@linaro.org> References: <20240812025844.58956-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rather that enumerating the types that can produce MMX operands, examine the unit. No functional change. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/i386/tcg/decode-new.c.inc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc index 03138b3876..30be9237c3 100644 --- a/target/i386/tcg/decode-new.c.inc +++ b/target/i386/tcg/decode-new.c.inc @@ -1799,13 +1799,13 @@ static void decode_root(DisasContext *s, CPUX86State *env, X86OpEntry *entry, ui } -static int decode_modrm(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode, - X86DecodedOp *op, X86OpType type) +static int decode_modrm(DisasContext *s, CPUX86State *env, + X86DecodedInsn *decode, X86DecodedOp *op) { int modrm = get_modrm(s, env); if ((modrm >> 6) == 3) { op->n = (modrm & 7); - if (type != X86_TYPE_Q && type != X86_TYPE_N) { + if (op->unit != X86_OP_MMX) { op->n |= REX_B(s); } } else { @@ -2040,7 +2040,7 @@ static bool decode_op(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode, /* fall through */ case X86_TYPE_nop: /* modrm operand decoded but not fetched */ get_modrm: - decode_modrm(s, env, decode, op, type); + decode_modrm(s, env, decode, op); break; case X86_TYPE_O: /* Absolute address encoded in the instruction */ From patchwork Mon Aug 12 02:58:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 818569 Delivered-To: patch@linaro.org Received: by 2002:a5d:5711:0:b0:367:895a:4699 with SMTP id a17csp1180872wrv; Sun, 11 Aug 2024 19:59:53 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVZ1af2m5xM96nPDO2sGySxhanIAYrnHJZkksnN69/NR7o+oaXiT6AB3JVNAmUhWzyehQvO6NgnQ2bT+phd2ksE X-Google-Smtp-Source: AGHT+IHKBE8V2Q41DBK8jVnhvWg9Oe5LkUfL+VP4AlVKAQjzln5P+VLMmeBzSduTnpCvfRIuwry6 X-Received: by 2002:a05:620a:28c7:b0:7a3:51ed:38b5 with SMTP id af79cd13be357-7a4c16a5349mr786695985a.0.1723431593369; Sun, 11 Aug 2024 19:59:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1723431593; cv=none; d=google.com; s=arc-20160816; b=eNlc7BbRXlUygEaP5nzLtZZgKgXN0bzd4JTyDbn9zS296lAlQgLV2aJdDnXerfTi+C frPLVlHtYDX0P6RvVwhlp+2l5XfVQBGnlrPdgtSr/A/wa5As9nhT7guS6g1YdiZodF52 NQNJqVZxOf8YUv51ZJAFPTFnxcr4tG7pvNqBPEKUdi1Z21Cdob6vyKBFpuPVT/1nm4qk QSZ/lZFlI2RkeSSXEDRdMPLCXpBuBv1dcUYfBZCG7u9DHdLA1MH9D9hCtj6mMgkHwcMz COsZgV41lEblbLsAJ3wzompj4YZqt9EZ9wUfEnsc39HB2qeH1RpwTOQW4R47EzSnBOK9 NSqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Pjjxaw7LIZTt8dz5CemMFoHd+/gcNlB7CUIggpOtFAI=; fh=3mEp7FusppN5Drq2PN08R8D/9xXM9YdbtG5TkJxJBiE=; b=zVi1wWlQKbfou6jC8/4fZE6/4cvyJ2JME0+TQ+NrKc5mryvx504i/WfSvKsjWssnB/ d+s4H4bDFo3z0Ljc2iZBsL+ObOt4f8w6PEmJ7ZQibUapyf5D4bTNlKB/v/RU3VmLXduX tniOHRGBkE0H6o83gmYGvY2YdGjCS6veSyAONa2If/hrbsCxx0iKAHlv/3ouHtOJiw26 kO09gN77pAlE4TvlGgfAr5APZfecbR02++vAWZvLQw+Dzx8g+Q7gvnReeWYTyE+jJrji JhK5sdOie/YncLWgAAZkmIBUfNP4pePOLxzN0/hcogJnMyYigUvlaHZu3F/9tX+2lhJg AOGQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iM5OFsY5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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([203.30.4.111]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-710e5a43b49sm2984841b3a.100.2024.08.11.19.58.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Aug 2024 19:58:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com Subject: [PATCH 3/3] target/i386: Assert MMX and XMM registers in range Date: Mon, 12 Aug 2024 12:58:44 +1000 Message-ID: <20240812025844.58956-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240812025844.58956-1-richard.henderson@linaro.org> References: <20240812025844.58956-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The mmx assert would fire without the fix for #2495. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/i386/tcg/emit.c.inc | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc index 016dce8146..747ff71b33 100644 --- a/target/i386/tcg/emit.c.inc +++ b/target/i386/tcg/emit.c.inc @@ -33,8 +33,13 @@ #define TCG_TARGET_extract_tl_valid TCG_TARGET_extract_i32_valid #endif +#define MMX_OFFSET(reg) + ({ assert((reg) >= 0 && (reg) <= 7); \ + offsetof(CPUX86State, fpregs[reg].mmx); }) -#define ZMM_OFFSET(reg) offsetof(CPUX86State, xmm_regs[reg]) +#define ZMM_OFFSET(reg) \ + ({ assert((reg) >= 0 && (reg) <= 15); \ + offsetof(CPUX86State, xmm_regs[reg]); }) typedef void (*SSEFunc_i_ep)(TCGv_i32 val, TCGv_ptr env, TCGv_ptr reg); typedef void (*SSEFunc_l_ep)(TCGv_i64 val, TCGv_ptr env, TCGv_ptr reg); @@ -168,7 +173,7 @@ static int vector_elem_offset(X86DecodedOp *op, MemOp ot, int n) static void compute_mmx_offset(X86DecodedOp *op) { if (!op->has_ea) { - op->offset = offsetof(CPUX86State, fpregs[op->n].mmx) + mmx_offset(op->ot); + op->offset = MMX_OFFSET(op->n) + mmx_offset(op->ot); } else { op->offset = offsetof(CPUX86State, mmx_t0) + mmx_offset(op->ot); }