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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar , Sam Protsenko , Anand Moon Subject: [PATCH v3 1/6] drivers/thermal/exynos: use DEFINE_SIMPLE_DEV_PM_OPS Date: Wed, 7 Aug 2024 10:48:20 +0200 Message-ID: <20240807084829.1037303-2-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240807084829.1037303-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrLKsWRmVeSWpSXmKPExsWy7djP87qsppvTDP5tELZ4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEcVlk5Kak1mWWqRvl8CVsfT0NraCt2wVO1uPsTUw/mDtYuTkkBAw kTj1/BBzFyMXh5DACkaJ7dva2SCcL4wShxZdYIFwPjNKHHu0kgmmZfvhB4wQieVAifZeFpCE kEArk8TUpYwgNpuAgcSDN8vYQYpEBBYzSjT+eMcK4jALPGGW+PlqMVAVB4ewgI/EolPeIA0s AqoS35b9ZAexeQXsJC6/esEMsU1eond/H9hmTgF7iSXd3UwQNYISJ2c+AVvMDFTTvHU22BMS ApM5Jb7cPssG0ewicWXOI6hBwhKvjm9hh7BlJP7vnA/1Tr7EjM3vWUDukRCokLh70AvCtJb4 eIYZxGQW0JRYv0sfothRYubMK1DFfBI33gpCHMAnMWnbdGaIMK9ER5sQRLWqxPE9k6DWS0s8 abnNBFHiIbHimdMERsVZSD6ZheSTWQhrFzAyr2IUTy0tzk1PLTbMSy3XK07MLS7NS9dLzs/d xAhMcaf/Hf+0g3Huq496hxiZOBgPMUpwMCuJ8DaHb0oT4k1JrKxKLcqPLyrNSS0+xCjNwaIk zquaIp8qJJCeWJKanZpakFoEk2Xi4JRqYIo5bSl0UM/e7uXd1Qefc29LedEuLaYnGy531Pzz RpHbV99X7tiRdvBqprz8S3+DlP0O5336ZDZmTdrP0R68sPSm4EfpiPvTTQ7PYVDq3fDzyfa4 jo1vr6TPLzadXuAtF9N8O6j830a/3y1mr7eotJ4+xF8Zd+Jjx/qYpk06rMZLpB+z5WwtFg0/ EsF59cerkP+M3ws6d93pLrp2u707qmzyA5tyK8kMfuMz228mZU+qX2P9+1AgD+87PieJ8x+Y ec5VnOv7e2brrFjxBNdfFg9nTywumxRk++VQx4xEf2+/iklG8jdUgritNohryV5YciDjJOs/ pZZDZqcnTrdXYZL+41Tyc9+2hH+f3FeeiFZiKc5INNRiLipOBABFk5zS4AMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrHIsWRmVeSWpSXmKPExsVy+t/xe7osppvTDA7MN7d4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEaVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CXsfT0NraCt2wVO1uPsTUw/mDtYuTkkBAwkdh++AFjFyMXh5DAUkaJQzfW sUMkpCUOf5kCZQtL/LnWxQZR1MwkMXH1YbAEm4CBxIM3y8BsEYHljBKb2z1AbGaBd8wS7ef9 uhg5OIQFfCQWnfIGCbMIqEp8W/YTrJxXwE7i8qsXzBDz5SV69/cxgdicAvYSS7q7wWwhoJre LzuZIeoFJU7OfMICMV5eonnrbOYJjAKzkKRmIUktYGRaxSiSWlqcm55bbKRXnJhbXJqXrpec n7uJERiR24793LKDceWrj3qHGJk4GA8xSnAwK4nwNodvShPiTUmsrEotyo8vKs1JLT7EaAp0 90RmKdHkfGBKyCuJNzQzMDU0MbM0MLU0M1YS5/Us6EgUEkhPLEnNTk0tSC2C6WPi4JRqYGI5 Lbn6zywfRfEzF8QfMj64P0PaRC8hr3c3S8Ce2M21tU/m7j7/VPbohpyHgbt7Upc8nur6yNX2 ivX0YKVFGrMtv++7ru1t0qKwoiN18p0q+WxlwXfXZ68VC+WO89q5bt5BkxjOxMuJugx6eY8r 1h9Jmbb1afIVuffZfAfavX8ubM9wmXt60T09QVcVCzGxSZvLBW5Vfd3MZjelVCJs/tbfExkP BE0QO++WJHT2ue4WSWmxr+I9tYzGRmbt/UWB4i/PCRhalkfa+h145tsw79mrd3kT7PIOrrZT mb7WtnpR6o9g1qf8VfK6bJnT7klKH3Bc6f0jwLDj78E3/T+MTxSGTC9NS+LX351U+fH5TyWW 4oxEQy3mouJEAFukBFNRAwAA X-CMS-MailID: 20240807084908eucas1p29e812ce79d4ec06427bc699321dec3a7 X-Msg-Generator: CA X-RootMTR: 20240807084908eucas1p29e812ce79d4ec06427bc699321dec3a7 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240807084908eucas1p29e812ce79d4ec06427bc699321dec3a7 References: <20240807084829.1037303-1-m.majewski2@samsung.com> SIMPLE_DEV_PM_OPS is deprecated, as noted next to its definition. Signed-off-by: Mateusz Majewski Reviewed-by: Sam Protsenko --- drivers/thermal/samsung/exynos_tmu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 96cffb2c44ba..9b7ca93a72f1 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -1150,8 +1150,8 @@ static int exynos_tmu_resume(struct device *dev) return 0; } -static SIMPLE_DEV_PM_OPS(exynos_tmu_pm, - exynos_tmu_suspend, exynos_tmu_resume); +static DEFINE_SIMPLE_DEV_PM_OPS(exynos_tmu_pm, + exynos_tmu_suspend, exynos_tmu_resume); #define EXYNOS_TMU_PM (&exynos_tmu_pm) #else #define EXYNOS_TMU_PM NULL From patchwork Wed Aug 7 08:48:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mateusz Majewski X-Patchwork-Id: 817612 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0776B1C9DEC for ; Wed, 7 Aug 2024 08:49:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.118.77.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723020554; cv=none; b=GmjMEZTZjWHOGkZTZFmWEvnc2UwaGRjXKNZcjMzwojpFTxn4rlImhgM4LaeEK2ZyxPiLB02HdGK7zoqAEZy8YfRQPIZUDAgxFOrHH7gbq9LBATktRXW9+FGqvBrzwK/0pyUsrk3hHI3kxj1zA7i1N54qcHIpeCa+94SYnYjwiWw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723020554; c=relaxed/simple; bh=t0ekJRa/bwcza7nqSYIYmFRILhACg12lQL7jUL9Kwtw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:MIME-Version: Content-Type:References; b=SQf/EirjPDf851gbvci8bU8l6u4NF5L11/Pb2DVOtwEq3F93U+XGC4m5wMEgP1TShi3D6Wxlu/QOSiuOwr6D6Uwmglo6APcHyWxYBVhcMqxGlNZra2sEbAdOaXTrtddlU8uk7KXy8iNY5BCI0Rz8PbMRqL751135zS94pdPjn8g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=BID5LYoH; arc=none smtp.client-ip=210.118.77.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="BID5LYoH" Received: from eucas1p2.samsung.com (unknown [182.198.249.207]) by mailout1.w1.samsung.com (KnoxPortal) with ESMTP id 20240807084911euoutp01b948f34ccb5b06928a2f77e030faae3d~pZhAOLu_o1697816978euoutp01G for ; Wed, 7 Aug 2024 08:49:11 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.w1.samsung.com 20240807084911euoutp01b948f34ccb5b06928a2f77e030faae3d~pZhAOLu_o1697816978euoutp01G DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1723020551; bh=JihNWS+qQKkN2JSqVKvJDHUfHhnpQ/g8G2um7745xXE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BID5LYoHS4XAqiaabpZXw0bXrpS9OxvCsEcRk/6nZb7A3dPo83mmf6UxWavQadr/d vcxc/XenE3AKUc4NLrI/nxqElyHJL1rUwXDEy+9U2bPwd1KJD2ywq9LNFUhbU4/hKC MPWrJpyMfNynHQ0F6Ipo274jA+RPxdbSPIOMAkuo= Received: from eusmges1new.samsung.com (unknown [203.254.199.242]) by eucas1p1.samsung.com (KnoxPortal) with ESMTP id 20240807084911eucas1p1c0be09084f4cec4ae6bf24519589f2ec~pZg-3B0Sh0340503405eucas1p1a; Wed, 7 Aug 2024 08:49:11 +0000 (GMT) Received: from eucas1p2.samsung.com ( [182.198.249.207]) by eusmges1new.samsung.com (EUCPMTA) with SMTP id A9.02.09624.70533B66; Wed, 7 Aug 2024 09:49:11 +0100 (BST) Received: from eusmtrp2.samsung.com (unknown [182.198.249.139]) by eucas1p1.samsung.com (KnoxPortal) with ESMTPA id 20240807084910eucas1p169d15e8209328d18230575a031e0a163~pZg-VQDGW0115601156eucas1p1E; Wed, 7 Aug 2024 08:49:10 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20240807084910eusmtrp24210bd69ac355404823281e007c45bb5~pZg-UgD5n2321823218eusmtrp2C; Wed, 7 Aug 2024 08:49:10 +0000 (GMT) X-AuditID: cbfec7f2-c11ff70000002598-23-66b335071461 Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 67.DC.09010.60533B66; Wed, 7 Aug 2024 09:49:10 +0100 (BST) Received: from AMDC4515.eu.corp.samsungelectronics.net (unknown [106.120.51.28]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20240807084909eusmtip2952ba1ee9fc9058824f45180bc5d63af~pZg_azF9A1949919499eusmtip2R; Wed, 7 Aug 2024 08:49:09 +0000 (GMT) From: Mateusz Majewski To: linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mateusz Majewski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar , Sam Protsenko , Anand Moon Subject: [PATCH v3 2/6] drivers/thermal/exynos: use pm_sleep_ptr instead of conditional compilation Date: Wed, 7 Aug 2024 10:48:21 +0200 Message-ID: <20240807084829.1037303-3-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240807084829.1037303-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrPKsWRmVeSWpSXmKPExsWy7djP87rsppvTDJr72CwezNvGZvF9y3Um izV7zzFZzPssazH/yDlWi/PnN7BbbHp8jdXi8q45bBafe48wWsw4v4/JYt3GW+wWC5ta2C0m HpvMbDH3y1Rmi/97drBbPHkINO553z4mB0GPNfPWMHrsnHWX3WPxnpdMHptWdbJ53Lm2h81j 85J6j74tqxg9Pm+SC+CI4rJJSc3JLEst0rdL4Mq4PmcxU8FDrorHzfuYGxh7OLsYOTkkBEwk nn/rZAaxhQRWMEos+S7dxcgFZH9hlNjzeyIThPOZUeLQi7/MMB23H2xkh0gsZ5R4eXoqVFUr k8SP1WfAqtgEDCQevFkGViUisJhRovHHO1YQh1ngCbPEz1eLGUGqhAVSJRp2n2MDsVkEVCX2 HG0H6+YVsJPY33SCHWKfvETv/j4mEJtTwF5iSXc3E0SNoMTJmU9YQGxmoJrmrbOZQRZICEzm lLi8ch8TRLOLxLZtb6EGCUu8Or4FypaR+L9zPlRNvsSMze+BBnEA2RUSdw96QZjWEh9BnuEA Gq8psX6XPkSxo0TzhXZGiAo+iRtvBSEO4JOYtG06M0SYV6KjTQiiWlXi+J5J0HCTlnjSchtq pYfExnP72SYwKs5C8sosJK/MQti7gJF5FaN4amlxbnpqsWFearlecWJucWleul5yfu4mRmCa O/3v+KcdjHNffdQ7xMjEwXiIUYKDWUmEtzl8U5oQb0piZVVqUX58UWlOavEhRmkOFiVxXtUU +VQhgfTEktTs1NSC1CKYLBMHp1QDk05JnX3ChKeTgyzaF0nrMfA4PNJK+ajE4rsrYXqv9qK7 3kuu+yma3X0h8dkuI/T3wxkXUmyvV32oOz4nyGghW+6jX0/fHFaqqlpxUe/k3oeH17ydIX0k U6q+xZv7WOXnHdsvFjSoisvrHfTmaz3DXn24f/PbV8Hqm55wdW7/yVOwwrzUZ3rvZwZ1d+5d q/k8Wd9XKiXekMo+VK05e43iopTHoReqzwlfqnEIsgm2Nz8m5PjruUrrRcaw9BfJM6b8Wisj aMx8K9+n++aX72yFUS0vPuiVWUbbbpump/Wr/mz4tqPbHA9zdi3ZdsKkqCMitm2S4/F96Xmf QvbGdG/VneYdVlzRENGWJMq4Q0pDiaU4I9FQi7moOBEAetlScOIDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrPIsWRmVeSWpSXmKPExsVy+t/xe7psppvTDF5+U7R4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEaVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CXcX3OYqaCh1wVj5v3MTcw9nB2MXJySAiYSNx+sJG9i5GLQ0hgKaPEy3+b mSAS0hKHv0xhh7CFJf5c62KDKGpmkpg+vxOsiE3AQOLBm2VgRSICyxklNrd7gNjMAu+YJdrP +4HYwgLJEoefnmMDsVkEVCX2HG1nBrF5Bewk9jedgFogL9G7vw9sJqeAvcSS7m4wWwiopvfL Tqh6QYmTM5+wQMyXl2jeOpt5AqPALCSpWUhSCxiZVjGKpJYW56bnFhvpFSfmFpfmpesl5+du YgTG5LZjP7fsYFz56qPeIUYmDsZDjBIczEoivM3hm9KEeFMSK6tSi/Lji0pzUosPMZoC3T2R WUo0OR+YFPJK4g3NDEwNTcwsDUwtzYyVxHk9CzoShQTSE0tSs1NTC1KLYPqYODilGpg45Lao tRs5GwRobRLQXpvw/dw95lST3LrqMw/3PnQw/33g+T5XUZ/4Y5vFLruERmuv8zT49fKyZfui xKTeD9uefzLQ61ZzTcxLPOf6+kz5FbNb95tc3jp8uKrx4uy9P8kn/8opuF5lanzKGvvx1Y9/ 6xZfj3Pd6LJVjCPY8U25yvH5zcaLVz1W/rf4CePjuYt0t5x4v2Dj/tUT3eWz99RfZP+0if+C 6PZTkyvrCrMfCopfZM9hT5e5+++q4QYmu0kBcukJxosvBjPfP8Lm3rSw6fueJWs2mRUU+69+ vyPv9LNPKr25yruv66y6rzlfnk96+v9dtgUtev3nnqTfz/hmxbdvkrv3EnmNx5+TRBmPKLEU ZyQaajEXFScCAKs65BZSAwAA X-CMS-MailID: 20240807084910eucas1p169d15e8209328d18230575a031e0a163 X-Msg-Generator: CA X-RootMTR: 20240807084910eucas1p169d15e8209328d18230575a031e0a163 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240807084910eucas1p169d15e8209328d18230575a031e0a163 References: <20240807084829.1037303-1-m.majewski2@samsung.com> Slightly simpler and nothing is lost if _suspend and _resume functions are built unconditionally. Suggested-by: Anand Moon Reviewed-by: Sam Protsenko Signed-off-by: Mateusz Majewski --- drivers/thermal/samsung/exynos_tmu.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 9b7ca93a72f1..b68e9755c933 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -1132,7 +1132,6 @@ static void exynos_tmu_remove(struct platform_device *pdev) clk_unprepare(data->clk_sec); } -#ifdef CONFIG_PM_SLEEP static int exynos_tmu_suspend(struct device *dev) { exynos_tmu_control(to_platform_device(dev), false); @@ -1152,15 +1151,11 @@ static int exynos_tmu_resume(struct device *dev) static DEFINE_SIMPLE_DEV_PM_OPS(exynos_tmu_pm, exynos_tmu_suspend, exynos_tmu_resume); -#define EXYNOS_TMU_PM (&exynos_tmu_pm) -#else -#define EXYNOS_TMU_PM NULL -#endif static struct platform_driver exynos_tmu_driver = { .driver = { .name = "exynos-tmu", - .pm = EXYNOS_TMU_PM, + .pm = pm_sleep_ptr(&exynos_tmu_pm), .of_match_table = exynos_tmu_match, }, .probe = exynos_tmu_probe, From patchwork Wed Aug 7 08:48:22 2024 Content-Type: text/plain; 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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar , Sam Protsenko , Anand Moon Subject: [PATCH v3 3/6] drivers/thermal/exynos: improve sanitize_temp_error Date: Wed, 7 Aug 2024 10:48:22 +0200 Message-ID: <20240807084829.1037303-4-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240807084829.1037303-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrHKsWRmVeSWpSXmKPExsWy7djP87qcppvTDGZf5bJ4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEcVlk5Kak1mWWqRvl8CVcW5uM3vBdOmKi5unMjUwHhLrYuTgkBAw kVi0pKiLkYtDSGAFo8TSVWfYIJwvjBInOhczQjifGSUu7jzP2sXICdbRtv0eVNVyRonzx76y QzitTBI/f39gB6liEzCQePBmGVhCRGAxo0Tjj3esIA6zwBNmiZ+vQAZzcggLeEvca5rFAmKz CKhKNP+YwwJyFa+AncT3yzkQ6+Qlevf3MYHYnAL2Eku6u8FsXgFBiZMzn4C1MgPVNG+dzQwy X0JgOqfEskfHoG51kdi2axE7hC0s8er4FihbRuL/zvlMEHa+xIzN71kgoVEhcfegF4RpLfHx DDOIySygKbF+lz5EsaPE1s2P2SAq+CRuvBWEOIBPYtK26cwQYV6JjjYhiGpVieN7JjFD2NIS T1puQ630kLj0dgPLBEbFWUhemYXklVkIexcwMq9iFE8tLc5NTy02zEst1ytOzC0uzUvXS87P 3cQITHKn/x3/tINx7quPeocYmTgYDzFKcDArifA2h29KE+JNSaysSi3Kjy8qzUktPsQozcGi JM6rmiKfKiSQnliSmp2aWpBaBJNl4uCUamCq04xetPCcsu3Eq0YxcwzvFxy+967edo9r87vq 3dFn4kMldU0XzX284IUe/10hvg1rNI9vm/no1jeVOR+D5pYUu3MvN+iM3bfsba778Sr5N9db lGVVt7snKIi+/Lyv5Z7aW+aJmd4S+1g+X78hmpextiORfav37adK5rs/C8/dE9l+7CaX+8xS hbnNYk8uTD4ZeHHHY2tTbjsx9qtMt/Y9/hfSxtvq/Wrfv9Cm/ev3vTv/6uGx+88t00pbT37Z KtPoInD8Rm1ki3LUbS5lHRvx17/ZrOZ9T/9wz1Xh527pI7o1JnwPvzfqTxZ02d4T3dway++S c+HSdEXnMvHNrJbtXp4VbZE+/MeffGyZ/vqfEktxRqKhFnNRcSIABNK/BOEDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrHIsWRmVeSWpSXmKPExsVy+t/xe7ocppvTDFa907V4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEaVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CXcW5uM3vBdOmKi5unMjUwHhLrYuTkkBAwkWjbfo+ti5GLQ0hgKaPEscfz WCAS0hKHv0xhh7CFJf5c64IqamaSePzsIhNIgk3AQOLBm2VgRSICyxklNrd7gNjMAu+YJdrP +4HYwgLeEveaZoENZRFQlWj+MQfI5uDgFbCT+H45B2K+vETv/j6wkZwC9hJLurvBbCGgkt4v O5lBbF4BQYmTM5+wQIyXl2jeOpt5AqPALCSpWUhSCxiZVjGKpJYW56bnFhvqFSfmFpfmpesl 5+duYgRG5LZjPzfvYJz36qPeIUYmDsZDjBIczEoivM3hm9KEeFMSK6tSi/Lji0pzUosPMZoC nT2RWUo0OR+YEvJK4g3NDEwNTcwsDUwtzYyVxHk9CzoShQTSE0tSs1NTC1KLYPqYODilGphi 26012stzXjQe6//auPKCgYk1399bEhblAon7FkksObH81/n8Gra0FwlRpoatc6J/ffCd1hvV 7bvmT8Wm3PC4ZSXvQrSOJj2Tr35az6AUOPHzfbkKq6vSsjfbJr+8rHdlCVdR67KipytzOjVO Tr616NwC9VT7m1wSp5+454cbdB5QTNp+/Nvhgz5z3/nbWzNIHZjlteWV4wmjFRxLl+jmKJsc VVz+3vh4wEedrzo9Xw0v7m65Mtfxwanf8qJ98l0CHsH2EmfeODkxr50we3Yhn0PxSfFHqxZP X71L4GkXZ2lpd2fJHq4LuSo8AW/62ibszlrc1/24eJKphHLupNtHL++59XWrxcdnDasY1usp sRRnJBpqMRcVJwIAysa3+FEDAAA= X-CMS-MailID: 20240807084912eucas1p20af043b96b6d741a0c7d7ae36efe5ac5 X-Msg-Generator: CA X-RootMTR: 20240807084912eucas1p20af043b96b6d741a0c7d7ae36efe5ac5 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240807084912eucas1p20af043b96b6d741a0c7d7ae36efe5ac5 References: <20240807084829.1037303-1-m.majewski2@samsung.com> There are two minor issues regarding this function. One is that it attempts to calculate the second calibration value even if 1-point trimming is being used; in this case, the calculated value is probably not useful and is never used anyway. Changing this also requires a minor reordering in Exynos5433 initialization function, so that we know which type of trimming is used before we call sanitize_temp_error. The second issue is that the function is not very consistent when it comes to the use of Exynos7-specific parameters. This seems to not be an issue in practice, in part because some of these issues are related to the mentioned calculation of the second calibration value. However, fixing this makes the code a bit less confusing, and will be required for Exynos850 which has 9-bit temperature values and uses 2-point trimming. Reviewed-by: Sam Protsenko Signed-off-by: Mateusz Majewski --- v1 -> v2: reworked to change shift instead of only mask and to also fix the 2-point trimming issue. drivers/thermal/samsung/exynos_tmu.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index b68e9755c933..087a09628e23 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -111,6 +111,7 @@ #define EXYNOS7_TMU_REG_EMUL_CON 0x160 #define EXYNOS7_TMU_TEMP_MASK 0x1ff +#define EXYNOS7_TMU_TEMP_SHIFT 9 #define EXYNOS7_PD_DET_EN_SHIFT 23 #define EXYNOS7_TMU_INTEN_RISE0_SHIFT 0 #define EXYNOS7_EMUL_DATA_SHIFT 7 @@ -234,20 +235,23 @@ static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info) u16 tmu_temp_mask = (data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_MASK : EXYNOS_TMU_TEMP_MASK; + int tmu_85_shift = + (data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_SHIFT + : EXYNOS_TRIMINFO_85_SHIFT; data->temp_error1 = trim_info & tmu_temp_mask; - data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) & - EXYNOS_TMU_TEMP_MASK); - if (!data->temp_error1 || (data->min_efuse_value > data->temp_error1) || (data->temp_error1 > data->max_efuse_value)) - data->temp_error1 = data->efuse_value & EXYNOS_TMU_TEMP_MASK; + data->temp_error1 = data->efuse_value & tmu_temp_mask; - if (!data->temp_error2) - data->temp_error2 = - (data->efuse_value >> EXYNOS_TRIMINFO_85_SHIFT) & - EXYNOS_TMU_TEMP_MASK; + if (data->cal_type == TYPE_TWO_POINT_TRIMMING) { + data->temp_error2 = (trim_info >> tmu_85_shift) & tmu_temp_mask; + if (!data->temp_error2) + data->temp_error2 = + (data->efuse_value >> tmu_85_shift) & + tmu_temp_mask; + } } static int exynos_tmu_initialize(struct platform_device *pdev) @@ -510,7 +514,6 @@ static void exynos5433_tmu_initialize(struct platform_device *pdev) int sensor_id, cal_type; trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO); - sanitize_temp_error(data, trim_info); /* Read the temperature sensor id */ sensor_id = (trim_info & EXYNOS5433_TRIMINFO_SENSOR_ID_MASK) @@ -532,6 +535,8 @@ static void exynos5433_tmu_initialize(struct platform_device *pdev) break; } + sanitize_temp_error(data, trim_info); + dev_info(&pdev->dev, "Calibration type is %d-point calibration\n", cal_type ? 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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar , Sam Protsenko , Anand Moon Subject: [PATCH v3 4/6] dt-bindings: thermal: samsung,exynos: add exynos850-tmu string Date: Wed, 7 Aug 2024 10:48:23 +0200 Message-ID: <20240807084829.1037303-5-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240807084829.1037303-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrHKsWRmVeSWpSXmKPExsWy7djP87pcppvTDPr3mFs8mLeNzeL7lutM Fmv2nmOymPdZ1mL+kXOsFufPb2C32PT4GqvF5V1z2Cw+9x5htJhxfh+TxbqNt9gtFja1sFtM PDaZ2WLul6nMFv/37GC3ePKwj83ied8+JgdBjzXz1jB67Jx1l91j8Z6XTB6bVnWyedy5tofN Y/OSeo++LasYPT5vkgvgiOKySUnNySxLLdK3S+DKeHBNtKCZs+Ltz91MDYx97F2MnBwSAiYS v6dPZ+xi5OIQEljBKLFh/29WCOcLkDPjPTOE85lR4vajo2wwLXM2nYBKLGeUuPznM5TTyiSx 7MErJpAqNgEDiQdvlrGDJEQEFjNKNP54BzaYWeAJs8TPV4uBVnJwCAtESGz6WQPSwCKgKvFs Vj8LiM0rYCfxu/Ma1Dp5id79fWBDOQXsJZZ0dzNB1AhKnJz5BKyeGaimeetssCskBCZzSlzb Og+q2UWitbsByhaWeHV8C9TbMhKnJ/ewQNj5EjM2v2cBuUdCoELi7kEvCNNa4uMZZhCTWUBT Yv0ufYhiR4n5/+8wQ1TwSdx4KwhxAJ/EpG3TocK8Eh1tQhDVqhLH90xihrClJZ603GaCsD0k zh/sYJ7AqDgLySuzkLwyC2HvAkbmVYziqaXFuempxYZ5qeV6xYm5xaV56XrJ+bmbGIFJ7vS/ 4592MM599VHvECMTB+MhRgkOZiUR3ubwTWlCvCmJlVWpRfnxRaU5qcWHGKU5WJTEeVVT5FOF BNITS1KzU1MLUotgskwcnFINTInfYuc9fTs9c6HtBOGvHl+Z122KK32X4WV/PMkp9f6Mqva1 K3lj9a1vxandvZ87bXlWu3SxqNYfRVH1FSu3M858OO3F1A+v5FZw3nz/68j1v18OPFy4MiN3 Pk+GupXgIq+5zYvfzrh0LF43kl1+4W2z3pC1jS1KD1ZOqJPn8bv07b309tLQPh1nqbS3WZcS X3mdjPktse3onhcvP+gFWuZ7cwTpR9TOsZ6feIyp+4r1xSMHdrmtmaGQtd/26g6f3GeezTW1 Jk8dnPmE3N9IvGvzKwxSXsK55UBz8m/+n4XhBYuyLAvlJBdN43CRFumSKfjC0JJZybposoyc zvNrFV/EnkRe+mhXW/bxzyMhRyWW4oxEQy3mouJEAMoas+DhAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrHIsWRmVeSWpSXmKPExsVy+t/xe7pcppvTDM71i1g8mLeNzeL7lutM Fmv2nmOymPdZ1mL+kXOsFufPb2C32PT4GqvF5V1z2Cw+9x5htJhxfh+TxbqNt9gtFja1sFtM PDaZ2WLul6nMFv/37GC3ePKwj83ied8+JgdBjzXz1jB67Jx1l91j8Z6XTB6bVnWyedy5tofN Y/OSeo++LasYPT5vkgvgiNKzKcovLUlVyMgvLrFVija0MNIztLTQMzKx1DM0No+1MjJV0rez SUnNySxLLdK3S9DLeHBNtKCZs+Ltz91MDYx97F2MnBwSAiYSczadYO5i5OIQEljKKPHw4XY2 iIS0xOEvU6CKhCX+XOtigyhqZpJo33sYrIhNwEDiwZtlYEUiAssZJTa3e4DYzALvmCXaz/uB 2MICYRITJrUygtgsAqoSz2b1s4DYvAJ2Er87r0Etk5fo3d/HBGJzCthLLOnuBrOFgGp6v+xk hqgXlDg58wkLxHx5ieats5knMArMQpKahSS1gJFpFaNIamlxbnpusZFecWJucWleul5yfu4m RmBEbjv2c8sOxpWvPuodYmTiYDzEKMHBrCTC2xy+KU2INyWxsiq1KD++qDQntfgQoynQ3ROZ pUST84EpIa8k3tDMwNTQxMzSwNTSzFhJnNezoCNRSCA9sSQ1OzW1ILUIpo+Jg1OqgSlp/5kO 3SV99c8bHnYrJ5zxlJNKPSzJOC3znOJv2dydASGPVQO0n1ilbsq1i5vetLZM9PrC/8cmK6tI CYXPC1A55vd1sqXt+YOxB2VYawW6eHk85iS8mfT0U5ufWJnuRom/t+NXVL9L1TNJ+2A978dU axFzy5O3Mv8ubysoYf+54SPPmsvSj0vfd3loLtS0f6I7iZ2hYTHjHo3j284yV2gVCi4WlIlf /eLUg6rFXfP18ieHPTvMlDXL+veV5ubNW/fcCZ86hY3PWlE7/UEcg//T7ierav7f4jlk8MFu 38yr3F8PyBUkzni3dMdlw2AFk9BEi+6C/NvHjhWcaOFrZ1qkLFvz+ccKsapbKpz35imxFGck GmoxFxUnAgBGczVDUQMAAA== X-CMS-MailID: 20240807084914eucas1p1948d159c31b0dce8243d84fd43a7d94e X-Msg-Generator: CA X-RootMTR: 20240807084914eucas1p1948d159c31b0dce8243d84fd43a7d94e X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240807084914eucas1p1948d159c31b0dce8243d84fd43a7d94e References: <20240807084829.1037303-1-m.majewski2@samsung.com> Like most of the SoCs, it requires 1 clock and 1 register. Reviewed-by: Sam Protsenko Signed-off-by: Mateusz Majewski Reviewed-by: Krzysztof Kozlowski --- v1 -> v2: make the clock required in Exynos850. .../devicetree/bindings/thermal/samsung,exynos-thermal.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml index 29a08b0729ee..b8c0bb7f4263 100644 --- a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml @@ -27,6 +27,7 @@ properties: - samsung,exynos5420-tmu-ext-triminfo - samsung,exynos5433-tmu - samsung,exynos7-tmu + - samsung,exynos850-tmu clocks: minItems: 1 @@ -131,6 +132,7 @@ allOf: - samsung,exynos5250-tmu - samsung,exynos5260-tmu - samsung,exynos5420-tmu + - samsung,exynos850-tmu then: properties: clocks: From patchwork Wed Aug 7 08:48:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mateusz Majewski X-Patchwork-Id: 817957 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE5971D1728 for ; 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Wed, 7 Aug 2024 08:49:14 +0000 (GMT) From: Mateusz Majewski To: linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mateusz Majewski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar , Sam Protsenko , Anand Moon Subject: [PATCH v3 5/6] drivers/thermal/exynos: add initial Exynos850 support Date: Wed, 7 Aug 2024 10:48:24 +0200 Message-ID: <20240807084829.1037303-6-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240807084829.1037303-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrPKsWRmVeSWpSXmKPExsWy7djP87o8ppvTDL5Ol7d4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEcVlk5Kak1mWWqRvl8CVcXHeXZaCBYkVC+9+ZWxgfBHYxcjJISFg InFmXhdzFyMXh5DACkaJjX03GCGcL4wS0x90sINUCQl8ZpT49jIepuPvud9MEEXLGSUaH++H clqZJO7M7mEDqWITMJB48GYZO0hCRGAxUNWPd6wgDrPAE2aJn68WM4JUCQv4S5w88wnMZhFQ lTjW9ZgVxOYVsJO4+6yXCWKfvETv/j4wm1PAXmJJdzcTRI2gxMmZT1hAbGagmuats8G+kBCY zimx+/FNNohmF4nOJxdZIGxhiVfHt7BD2DISpyf3QMXzJWZsfg9kcwDZFRJ3D3pBmNYSH88w g5jMApoS63fpQxQ7Sky6f4AZooJP4sZbQYgD+CQmbZsOFeaV6GgTgqhWlTi+ZxIzhC0t8aTl NtRPHhJb121km8CoOAvJK7OQvDILYe8CRuZVjOKppcW56anFhnmp5XrFibnFpXnpesn5uZsY gWnu9L/jn3Ywzn31Ue8QIxMH4yFGCQ5mJRHe5vBNaUK8KYmVValF+fFFpTmpxYcYpTlYlMR5 VVPkU4UE0hNLUrNTUwtSi2CyTBycUg1MTTPcY1e4X/J5tvmP/b2Ssi6hdYHvYzmDNQ+KSYUv MXpzbd6BWd+nePo35ti/f9V281DLQsPSnpT/VwWZk2tlZlq+nBKg1VXYdIcx0WXn9Mxpulyl R46v45wY0y/5+JuBZve6xV7vbmdzstQ8l9ysyqY8qzWb66j+tScNTpdd30m1Xp3Lm1kUslJC Xub7qYWXi5at6yiTMvn49vyPhqyVLWK2e5QLd02Zmb6FM1+Y0yMzrs+cLfjNBBbWLtNIvqXW lhGN/LIHty9227xpYpyOsdKx5XcT5LecePRv7oaPfW8u/9NRu67M+/vuyxy15b5R/Lvvv45l vPafd1HPRXHNPb2L2L7WFwbu7u2fEKOuxFKckWioxVxUnAgAfBUsfeIDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrHIsWRmVeSWpSXmKPExsVy+t/xe7rcppvTDB48trJ4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEaVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CXcXHeXZaCBYkVC+9+ZWxgfBHYxcjJISFgIvH33G+mLkYuDiGBpYwSzbeu sEMkpCUOf5kCZQtL/LnWxQZiCwk0M0lsPq4HYrMJGEg8eLMMrEZEYDmjxOZ2DxCbWeAds0T7 eT8QW1jAV+LH77NMIDaLgKrEsa7HrCA2r4CdxN1nvUwQ8+Ulevf3gdmcAvYSS7q7mSB22Un0 ftnJDFEvKHFy5hMWiPnyEs1bZzNPYBSYhSQ1C0lqASPTKkaR1NLi3PTcYiO94sTc4tK8dL3k /NxNjMCI3Hbs55YdjCtffdQ7xMjEwXiIUYKDWUmEtzl8U5oQb0piZVVqUX58UWlOavEhRlOg uycyS4km5wNTQl5JvKGZgamhiZmlgamlmbGSOK9nQUeikEB6YklqdmpqQWoRTB8TB6dUA5PT i7uVJYmqsiZGEk6v/Fl9JvzSM8psSNyq9X77UqEXP3aW2v79uvn0/8C72p883vXcvKAh/VFX nKvjdvhG5lN3XQ90rdn2StFTfX/givqYlTm+ew0W3evZXDFNuKHdPO9Wef7S3w9255/Yq/HL /J17qQ9T9KQsv8mH7ptF9rDLca8xP3TwVgdb9F/b2zO3dAlO6i+r2Cjl9bFeqmzL/ZY5sS1M Gq9qjBZ5vGnf523wdxnfh1+mG3/tuD/97I7jV+PvVtyb/tAk7FEIQ1LKnvWS0e/2ckjli5r3 8jzn4FNfYSz3roP5UkjKTd+Dx15632c3nfQjpazZKy/R5B3bzGJXzs9HNJd9W1B0MPnPiZdK LMUZiYZazEXFiQBQ3mhfUQMAAA== X-CMS-MailID: 20240807084916eucas1p2171af1654fc2e2701726eb8bf9869cfd X-Msg-Generator: CA X-RootMTR: 20240807084916eucas1p2171af1654fc2e2701726eb8bf9869cfd X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240807084916eucas1p2171af1654fc2e2701726eb8bf9869cfd References: <20240807084829.1037303-1-m.majewski2@samsung.com> This is loosely adapted from an implementation available at https://gitlab.com/Linaro/96boards/e850-96/kernel/-/blob/android-exynos-4.14-linaro/drivers/thermal/samsung/exynos_tmu.c Some differences from that implementation: - unlike that implementation, we do not use the ACPM mechanism, instead we just access the registers, like we do for other SoCs, - the SoC is supposed to support multiple sensors inside one unit. The vendor implementation uses one kernel device per sensor, we would probably prefer to have one device for all sensors, have #thermal-sensor-cells = <1> and so on. We implemented this, but we could not get the extra sensors to work on our hardware so far. This might be due to a misconfiguration and we will probably come back to this, however our implementation only supports a single sensor for now, - the vendor implementation supports disabling CPU cores as a cooling device. We did not attempt to port this, and this would not really fit this driver anyway. Additionally, some differences from the other SoCs supported by this driver: - we do not really constrain the e-fuse information like the other SoCs do (data->{min,max}_efuse_value). In our tests, those values (as well as the raw sensor values) were much higher than in the other SoCs, to the degree that reusing the data->{min,max}_efuse_value from the other SoCs would cause instant critical temperature reset on boot, - this SoC provides more information in the e-fuse data than other SoCs, so we read some values inside exynos850_tmu_initialize instead of hardcoding them in exynos_map_dt_data. Reviewed-by: Sam Protsenko Signed-off-by: Mateusz Majewski --- v1 -> v2: rename and reorder some registers, use the correct register offset for EXYNOS850_TMU_REG_AVG_CON, make the clock required, additionally do some minor style changes. drivers/thermal/samsung/exynos_tmu.c | 191 +++++++++++++++++++++++++-- 1 file changed, 182 insertions(+), 9 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 087a09628e23..2618a81fca53 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -117,6 +117,41 @@ #define EXYNOS7_EMUL_DATA_SHIFT 7 #define EXYNOS7_EMUL_DATA_MASK 0x1ff +/* Exynos850 specific registers */ +#define EXYNOS850_TMU_REG_CURRENT_TEMP0_1 0x40 +#define EXYNOS850_TMU_REG_THD_TEMP0_RISE 0x50 +#define EXYNOS850_TMU_REG_THD_TEMP0_FALL 0x60 + +#define EXYNOS850_TMU_TRIMINFO_SHIFT 4 +#define EXYNOS850_TMU_TRIMINFO_OFFSET(n) \ + (EXYNOS_TMU_REG_TRIMINFO + (n) * EXYNOS850_TMU_TRIMINFO_SHIFT) +#define EXYNOS850_TMU_T_TRIM0_SHIFT 18 + +#define EXYNOS850_TMU_REG_CONTROL1 0x24 +#define EXYNOS850_TMU_LPI_MODE_MASK 1 +#define EXYNOS850_TMU_LPI_MODE_SHIFT 10 + +#define EXYNOS850_TMU_REG_COUNTER_VALUE0 0x30 +#define EXYNOS850_TMU_EN_TEMP_SEN_OFF_MASK 0xffff +#define EXYNOS850_TMU_EN_TEMP_SEN_OFF_SHIFT 0 + +#define EXYNOS850_TMU_REG_COUNTER_VALUE1 0x34 +#define EXYNOS850_TMU_CLK_SENSE_ON_MASK 0xffff +#define EXYNOS850_TMU_CLK_SENSE_ON_SHIFT 16 + +#define EXYNOS850_TMU_REG_AVG_CON 0x38 +#define EXYNOS850_TMU_AVG_MODE_MASK 0x7 +#define EXYNOS850_TMU_DEM_ENABLE BIT(4) + +#define EXYNOS850_TMU_REG_TRIM0 0x3c +#define EXYNOS850_TMU_TRIM0_MASK 0xf +#define EXYNOS850_TMU_VBEI_TRIM_SHIFT 8 +#define EXYNOS850_TMU_VREF_TRIM_SHIFT 12 +#define EXYNOS850_TMU_BGRI_TRIM_SHIFT 20 + +#define EXYNOS850_TMU_TEM1051X_SENSE_VALUE 0x028a +#define EXYNOS850_TMU_TEM1456X_SENSE_VALUE 0x0a28 + #define EXYNOS_FIRST_POINT_TRIM 25 #define EXYNOS_SECOND_POINT_TRIM 85 @@ -134,6 +169,7 @@ enum soc_type { SOC_ARCH_EXYNOS5420_TRIMINFO, SOC_ARCH_EXYNOS5433, SOC_ARCH_EXYNOS7, + SOC_ARCH_EXYNOS850, }; /** @@ -232,12 +268,14 @@ static int code_to_temp(struct exynos_tmu_data *data, u16 temp_code) static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info) { - u16 tmu_temp_mask = - (data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_MASK - : EXYNOS_TMU_TEMP_MASK; - int tmu_85_shift = - (data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_SHIFT - : EXYNOS_TRIMINFO_85_SHIFT; + u16 tmu_temp_mask = (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) ? + EXYNOS7_TMU_TEMP_MASK : + EXYNOS_TMU_TEMP_MASK; + int tmu_85_shift = (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) ? + EXYNOS7_TMU_TEMP_SHIFT : + EXYNOS_TRIMINFO_85_SHIFT; data->temp_error1 = trim_info & tmu_temp_mask; if (!data->temp_error1 || @@ -587,6 +625,114 @@ static void exynos7_tmu_initialize(struct platform_device *pdev) sanitize_temp_error(data, trim_info); } +static void exynos850_tmu_set_low_temp(struct exynos_tmu_data *data, u8 temp) +{ + exynos_tmu_update_temp(data, EXYNOS850_TMU_REG_THD_TEMP0_FALL + 12, 0, + temp); + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS_TMU_INTEN_FALL0_SHIFT + 0, true); +} + +static void exynos850_tmu_set_high_temp(struct exynos_tmu_data *data, u8 temp) +{ + exynos_tmu_update_temp(data, EXYNOS850_TMU_REG_THD_TEMP0_RISE + 12, 16, + temp); + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS7_TMU_INTEN_RISE0_SHIFT + 1, true); +} + +static void exynos850_tmu_disable_low(struct exynos_tmu_data *data) +{ + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS_TMU_INTEN_FALL0_SHIFT + 0, false); +} + +static void exynos850_tmu_disable_high(struct exynos_tmu_data *data) +{ + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS7_TMU_INTEN_RISE0_SHIFT + 1, false); +} + +static void exynos850_tmu_set_crit_temp(struct exynos_tmu_data *data, u8 temp) +{ + exynos_tmu_update_temp(data, EXYNOS850_TMU_REG_THD_TEMP0_RISE + 0, 16, + temp); + exynos_tmu_update_bit(data, EXYNOS_TMU_REG_CONTROL, + EXYNOS_TMU_THERM_TRIP_EN_SHIFT, true); + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS7_TMU_INTEN_RISE0_SHIFT + 7, true); +} + +static void exynos850_tmu_initialize(struct platform_device *pdev) +{ + struct exynos_tmu_data *data = platform_get_drvdata(pdev); + u32 cal_type, avg_mode, reg, bgri, vref, vbei; + + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(0)); + cal_type = (reg & EXYNOS5433_TRIMINFO_CALIB_SEL_MASK) >> + EXYNOS5433_TRIMINFO_CALIB_SEL_SHIFT; + data->reference_voltage = (reg >> EXYNOS850_TMU_T_TRIM0_SHIFT) & + EXYNOS_TMU_REF_VOLTAGE_MASK; + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(1)); + data->gain = (reg >> EXYNOS850_TMU_T_TRIM0_SHIFT) & + EXYNOS_TMU_BUF_SLOPE_SEL_MASK; + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(2)); + avg_mode = (reg >> EXYNOS850_TMU_T_TRIM0_SHIFT) & + EXYNOS850_TMU_AVG_MODE_MASK; + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(3)); + bgri = (reg >> EXYNOS850_TMU_T_TRIM0_SHIFT) & EXYNOS850_TMU_TRIM0_MASK; + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(4)); + vref = (reg >> EXYNOS850_TMU_T_TRIM0_SHIFT) & EXYNOS850_TMU_TRIM0_MASK; + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(5)); + vbei = (reg >> EXYNOS850_TMU_T_TRIM0_SHIFT) & EXYNOS850_TMU_TRIM0_MASK; + + data->cal_type = cal_type == EXYNOS5433_TRIMINFO_TWO_POINT_TRIMMING ? + TYPE_TWO_POINT_TRIMMING : + TYPE_ONE_POINT_TRIMMING; + + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(0)); + sanitize_temp_error(data, reg); + + dev_info(&pdev->dev, "Calibration type is %d-point calibration\n", + cal_type ? 2 : 1); + + reg = readl(data->base + EXYNOS850_TMU_REG_AVG_CON); + reg &= ~EXYNOS850_TMU_AVG_MODE_MASK; + reg &= ~EXYNOS850_TMU_DEM_ENABLE; + if (avg_mode) { + reg |= avg_mode; + reg |= EXYNOS850_TMU_DEM_ENABLE; + } + writel(reg, data->base + EXYNOS850_TMU_REG_AVG_CON); + + reg = readl(data->base + EXYNOS850_TMU_REG_COUNTER_VALUE0); + reg &= ~(EXYNOS850_TMU_EN_TEMP_SEN_OFF_MASK + << EXYNOS850_TMU_EN_TEMP_SEN_OFF_SHIFT); + reg |= EXYNOS850_TMU_TEM1051X_SENSE_VALUE + << EXYNOS850_TMU_EN_TEMP_SEN_OFF_SHIFT; + writel(reg, data->base + EXYNOS850_TMU_REG_COUNTER_VALUE0); + + reg = readl(data->base + EXYNOS850_TMU_REG_COUNTER_VALUE1); + reg &= ~(EXYNOS850_TMU_CLK_SENSE_ON_MASK + << EXYNOS850_TMU_CLK_SENSE_ON_SHIFT); + reg |= EXYNOS850_TMU_TEM1051X_SENSE_VALUE + << EXYNOS850_TMU_CLK_SENSE_ON_SHIFT; + writel(reg, data->base + EXYNOS850_TMU_REG_COUNTER_VALUE1); + + reg = readl(data->base + EXYNOS850_TMU_REG_TRIM0); + reg &= ~(EXYNOS850_TMU_TRIM0_MASK << EXYNOS850_TMU_BGRI_TRIM_SHIFT); + reg &= ~(EXYNOS850_TMU_TRIM0_MASK << EXYNOS850_TMU_VREF_TRIM_SHIFT); + reg &= ~(EXYNOS850_TMU_TRIM0_MASK << EXYNOS850_TMU_VBEI_TRIM_SHIFT); + reg |= bgri << EXYNOS850_TMU_BGRI_TRIM_SHIFT; + reg |= vref << EXYNOS850_TMU_VREF_TRIM_SHIFT; + reg |= vbei << EXYNOS850_TMU_VBEI_TRIM_SHIFT; + writel(reg, data->base + EXYNOS850_TMU_REG_TRIM0); + + reg = readl(data->base + EXYNOS850_TMU_REG_CONTROL1); + reg &= ~(EXYNOS850_TMU_LPI_MODE_MASK << EXYNOS850_TMU_LPI_MODE_SHIFT); + writel(reg, data->base + EXYNOS850_TMU_REG_CONTROL1); +} + static void exynos4210_tmu_control(struct platform_device *pdev, bool on) { struct exynos_tmu_data *data = platform_get_drvdata(pdev); @@ -676,7 +822,8 @@ static u32 get_emul_con_reg(struct exynos_tmu_data *data, unsigned int val, val &= ~(EXYNOS_EMUL_TIME_MASK << EXYNOS_EMUL_TIME_SHIFT); val |= (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT); - if (data->soc == SOC_ARCH_EXYNOS7) { + if (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) { val &= ~(EXYNOS7_EMUL_DATA_MASK << EXYNOS7_EMUL_DATA_SHIFT); val |= (temp_to_code(data, temp) << @@ -706,7 +853,8 @@ static void exynos4412_tmu_set_emulation(struct exynos_tmu_data *data, emul_con = EXYNOS5260_EMUL_CON; else if (data->soc == SOC_ARCH_EXYNOS5433) emul_con = EXYNOS5433_TMU_EMUL_CON; - else if (data->soc == SOC_ARCH_EXYNOS7) + else if (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) emul_con = EXYNOS7_TMU_REG_EMUL_CON; else emul_con = EXYNOS_EMUL_CON; @@ -761,6 +909,12 @@ static int exynos7_tmu_read(struct exynos_tmu_data *data) EXYNOS7_TMU_TEMP_MASK; } +static int exynos850_tmu_read(struct exynos_tmu_data *data) +{ + return readw(data->base + EXYNOS850_TMU_REG_CURRENT_TEMP0_1) & + EXYNOS7_TMU_TEMP_MASK; +} + static irqreturn_t exynos_tmu_threaded_irq(int irq, void *id) { struct exynos_tmu_data *data = id; @@ -787,7 +941,8 @@ static void exynos4210_tmu_clear_irqs(struct exynos_tmu_data *data) if (data->soc == SOC_ARCH_EXYNOS5260) { tmu_intstat = EXYNOS5260_TMU_REG_INTSTAT; tmu_intclear = EXYNOS5260_TMU_REG_INTCLEAR; - } else if (data->soc == SOC_ARCH_EXYNOS7) { + } else if (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) { tmu_intstat = EXYNOS7_TMU_REG_INTPEND; tmu_intclear = EXYNOS7_TMU_REG_INTPEND; } else if (data->soc == SOC_ARCH_EXYNOS5433) { @@ -838,6 +993,9 @@ static const struct of_device_id exynos_tmu_match[] = { }, { .compatible = "samsung,exynos7-tmu", .data = (const void *)SOC_ARCH_EXYNOS7, + }, { + .compatible = "samsung,exynos850-tmu", + .data = (const void *)SOC_ARCH_EXYNOS850, }, { }, }; @@ -950,6 +1108,21 @@ static int exynos_map_dt_data(struct platform_device *pdev) data->min_efuse_value = 15; data->max_efuse_value = 100; break; + case SOC_ARCH_EXYNOS850: + data->tmu_set_low_temp = exynos850_tmu_set_low_temp; + data->tmu_set_high_temp = exynos850_tmu_set_high_temp; + data->tmu_disable_low = exynos850_tmu_disable_low; + data->tmu_disable_high = exynos850_tmu_disable_high; + data->tmu_set_crit_temp = exynos850_tmu_set_crit_temp; + data->tmu_initialize = exynos850_tmu_initialize; + data->tmu_control = exynos4210_tmu_control; + data->tmu_read = exynos850_tmu_read; + data->tmu_set_emulation = exynos4412_tmu_set_emulation; + data->tmu_clear_irqs = exynos4210_tmu_clear_irqs; + data->efuse_value = 55; + data->min_efuse_value = 0; + data->max_efuse_value = 511; + break; default: dev_err(&pdev->dev, "Platform not supported\n"); return -EINVAL; From patchwork Wed Aug 7 08:48:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mateusz Majewski X-Patchwork-Id: 817610 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 506E01D1757 for ; Wed, 7 Aug 2024 08:49:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.118.77.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Wed, 7 Aug 2024 08:49:16 +0000 (GMT) From: Mateusz Majewski To: linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mateusz Majewski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar , Sam Protsenko , Anand Moon Subject: [PATCH v3 6/6] dt-bindings: thermal: samsung,exynos: remove driver-specific information Date: Wed, 7 Aug 2024 10:48:25 +0200 Message-ID: <20240807084829.1037303-7-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240807084829.1037303-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrHKsWRmVeSWpSXmKPExsWy7djP87p8ppvTDPZ9FrF4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEcVlk5Kak1mWWqRvl8CV8f7WXaaCPt6Kr0+9Ghifc3UxcnJICJhI rJ/xnqmLkYtDSGAFo8SLjpPsEM4XRokFdxuZIZzPjBKbX25l62LkAGuZOCUHIr6cUaJhwSOo 9lYmiT9v7zCCzGUTMJB48GYZ2CgRgcWMEo0/3rGCOMwCT5glfr5aDFYlLJAk8fR2AzuIzSKg KvG/rY8FxOYVsJPoOPyHCeJCeYne/X1gNqeAvcSS7m4miBpBiZMzn4DVMwPVNG+dDXarhMBk TonOc7ugml0kzt/9xQJhC0u8Or6FHcKWkTg9uQcqni8xY/N7FojfKiTuHvSCMK0lPp5hBjGZ BTQl1u/Shyh2lOh6uIMJooJP4sZbQYgD+CQmbZvODBHmlehoE4KoVpU4vmcSM4QtLfGk5TbU WR4SG9ZcYJzAqDgLySuzkLwyC2HvAkbmVYziqaXFuempxUZ5qeV6xYm5xaV56XrJ+bmbGIFJ 7vS/4192MC5/9VHvECMTB+MhRgkOZiUR3ubwTWlCvCmJlVWpRfnxRaU5qcWHGKU5WJTEeVVT 5FOFBNITS1KzU1MLUotgskwcnFINTGVRxgwSsdzMmaKCP3pi9nVsfXQjulT69jRRRVb7RVOE vBXKnYWNFy/Ki7+uLSn4Krs43mtSy2P155P+L13VNzW8Nur1gTVGP3l502JLu8QtOM4WRaxl jS4rVJ3jJ/tltdcnv90vKtUnrY86zrbl/uYgxuCwr2wSv2JsLR7ESBpNOLJ15v2ThQ903b9a 7m58d1RuVuj81TVK4hdM6lOFGV5a32Y4v6PBetbMPns+bfN3YkdbhS/Hhm8WMpScIbMsLPnH QoG2K51+AUk7vYUOb5u13TLmvUXBvKrn3at8ytoqv11jnsXiPmX6bh0v1rj938KOme1aeHG6 tCBn3czMj3or/b21XZe1SmS6sDYpsRRnJBpqMRcVJwIAtkV1VeEDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrLIsWRmVeSWpSXmKPExsVy+t/xe7q8ppvTDA5eV7N4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEaVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CX8f7WXaaCPt6Kr0+9Ghifc3UxcnBICJhITJyS08XIxSEksJRRYsffdUxd jJxAcWmJw1+msEPYwhJ/rnWxQRQ1M0msbH8IlmATMJB48GYZmC0isJxRYnO7B4jNLPCOWaL9 vB+ILSyQILHxXS8biM0ioCrxv62PBcTmFbCT6Dj8B2qZvETv/j4wm1PAXmJJdzeYLQRU0/tl JzNEvaDEyZlPWCDmy0s0b53NPIFRYBaS1CwkqQWMTKsYRVJLi3PTc4sN9YoTc4tL89L1kvNz NzEC43HbsZ+bdzDOe/VR7xAjEwfjIUYJDmYlEd7m8E1pQrwpiZVVqUX58UWlOanFhxhNge6e yCwlmpwPTAh5JfGGZgamhiZmlgamlmbGSuK8ngUdiUIC6YklqdmpqQWpRTB9TBycUg1MemEf nO6Z6Qme19wmGzjLfI7pm4iDNkUf3518m9g3rS5FhMvtZmBEQJ9RbIrvsYzV6+8zJFxYcPfo hsVeTaK6JjuYxc83OnNNuOF5e5LM/L5Hv/zKKvp/Na8oD94xY1eJ3hmlKf8f2b9+avMrptCS Sbjuq+fRgPkL7JoyP6Q+N8haKnJ30srJ86p5LplM3lVxMmPm5vzkJ+wNCeoy190/HV2+1e1j 57WZN6zX8x5zS//PwRKjEbzw5Lao/LYa+SSxfQsCdi97tnqZtumfXUvn8R+udTuj0/2D41Uh +8mLC72Y3LctuLr405JTzzxuTXecdnJ75acKL4GI23LX94cZ/xOf/VQkKNh69bPsqXWpTEos xRmJhlrMRcWJAIRJbWdQAwAA X-CMS-MailID: 20240807084917eucas1p28c675c9da74f0de0bb09689819202c39 X-Msg-Generator: CA X-RootMTR: 20240807084917eucas1p28c675c9da74f0de0bb09689819202c39 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240807084917eucas1p28c675c9da74f0de0bb09689819202c39 References: <20240807084829.1037303-1-m.majewski2@samsung.com> The number of supported trip points was only limited by the driver implementation at the time, which mapped each trip point defined in the devicetree source file to a hardware trip point. An implementation that does not have this limitation is possible; indeed, that is how the driver works currently. Therefore, this information should be removed from the bindings description, which are meant to be independent of the details of the driver implementation. Reviewed-by: Sam Protsenko Signed-off-by: Mateusz Majewski Reviewed-by: Krzysztof Kozlowski Reviewed-by: Rob Herring (Arm) --- v2 -> v3: reword the commit message to be easier to understand in context of dt-bindings. v1 -> v2: remove an unnecessary sentence. .../devicetree/bindings/thermal/samsung,exynos-thermal.yaml | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml index b8c0bb7f4263..b85b4c420cd3 100644 --- a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml @@ -40,11 +40,7 @@ properties: interrupts: description: | The Exynos TMU supports generating interrupts when reaching given - temperature thresholds. Number of supported thermal trip points depends - on the SoC (only first trip points defined in DT will be configured):: - - most of SoC: 4 - - samsung,exynos5433-tmu: 8 - - samsung,exynos7-tmu: 8 + temperature thresholds. maxItems: 1 reg: