From patchwork Fri Aug 2 15:14:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 816589 Received: from madrid.collaboradmins.com (madrid.collaboradmins.com [46.235.227.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 403703DAC1B; Fri, 2 Aug 2024 15:17:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=46.235.227.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722611823; cv=none; b=auFn6sSfJzdN6eYSB2t+Rh9wfUSijGVC5sztYZ2F593u339gsTFwJnU368lUoQBMdwq0IO0wFK5B5ol58IdLwVVgAmbE2yh2PCYKP/i+3kRq1NhP6qFiEAiTZ3pFPFCpOQPnuoBkCxHSPzptxSXoEsMCQj+1LsCNbnqBMO9TKRo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722611823; c=relaxed/simple; bh=afzM6zV4pT3/q5F2QE2NWtw3Nh7GCrj/opI1rta2Mgo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qvXyJN3x7o7N5u+RU/Lb9sydLysUZ2COcNkAnVrSOIVSDy0oPhRQ9IAMjkRvV1sZWsqZ6P3uHweZCWdn3Vma+sC9iPBr4gjCIgdZFJTnpTOwTQ61Pi5aCmVYmWaEgwadEgt09DvqYmIkgUhzKuKWIQFl6JW6KJmFvlG4a20rs80= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=ylTKnRoI; arc=none smtp.client-ip=46.235.227.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="ylTKnRoI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1722611819; bh=afzM6zV4pT3/q5F2QE2NWtw3Nh7GCrj/opI1rta2Mgo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ylTKnRoIIqtBEES4Wvp0f+eevYUIJVt9j4MBwm62gVYhVmX8njFbyTrEhJ7pBdMyb h/nRyrc5hu1QPe7ZLT8G1FgJQTpghK5M0DwE5lXblio5x7OGDx4mw8j8oILIPAtP+1 GYC+QV+KfAzBsT+BF+yTOkUD6SgmoXDU8aXwhLbnb/dW6IfJh/0It3uRUFS5MQB/jg Ed/JKgdKggW5TnWf9jiHka5707fSig2QrnwkFPMbe8PcBaK3q4cTOW68VyLCRDKWFo hkke418bahdakJFKPx9a5/fraSGLjCdI2yN07CNY+4boRViqNBut/DMUZ6IsHqqN56 ZhBbwWyuI2MDw== Received: from trenzalore.hitronhub.home (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by madrid.collaboradmins.com (Postfix) with ESMTPSA id 56D223782219; Fri, 2 Aug 2024 15:16:57 +0000 (UTC) From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Ulf Hansson , Detlev Casanova , Geert Uytterhoeven , "Rafael J . Wysocki" , Finley Xiao , Jagan Teki , Elaine Zhang , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 1/3] dt-bindings: pinctrl: Add rk3576 power-controller bindings Date: Fri, 2 Aug 2024 11:14:58 -0400 Message-ID: <20240802151647.294307-2-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240802151647.294307-1-detlev.casanova@collabora.com> References: <20240802151647.294307-1-detlev.casanova@collabora.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This adds the compatible string for the rk3576 power-controller. Signed-off-by: Detlev Casanova --- .../devicetree/bindings/power/rockchip,power-controller.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml index 0d5e999a58f1b..650dc0aae6f51 100644 --- a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -41,6 +41,7 @@ properties: - rockchip,rk3368-power-controller - rockchip,rk3399-power-controller - rockchip,rk3568-power-controller + - rockchip,rk3576-power-controller - rockchip,rk3588-power-controller - rockchip,rv1126-power-controller From patchwork Fri Aug 2 15:14:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 816458 Received: from madrid.collaboradmins.com (madrid.collaboradmins.com [46.235.227.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C747F3DAC19; Fri, 2 Aug 2024 15:17:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=46.235.227.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722611825; cv=none; b=Ew8hyozb/7JU3pENbc/WOIr2hjGsanGab7qgU8gLwC5TDk7Yi2poaHkHq0wk7ZkWh7aW4tbHePaLKUoBiMgnLkXRUcD3XpC3ALvYmRUdXVaecTneOw9pA7TJ5HREyXBmbYana9DCbZWmSE8yFgKOsNE6l+AApOyKy8gS5l70nDI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722611825; c=relaxed/simple; bh=SWExRS/PWMp0B84ThEjdBRFIqsEtJzpNyT9yDX/hd6g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=repi4ijBRib67CzrPWbAanvlR9Cbrc2Gc2UNpwQhF1isGMHTUMTEYI1e8snq9efdyl8bvtrbcKWtVyv+unE+HhX50Gyu0SWsnVlsfEvPGIYwjKZl5ljS0KX/El1EdtvYJp555A7uFStR+kKIhRmcd+KVnPkQIHz2oQ7CjSrmWEM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=4/XKt9/D; arc=none smtp.client-ip=46.235.227.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="4/XKt9/D" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1722611822; bh=SWExRS/PWMp0B84ThEjdBRFIqsEtJzpNyT9yDX/hd6g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=4/XKt9/DyzMnnw5NzYTep6fTUXpqIOMUMu+ZY9AZnAcx7axqbsC+ABsZVllm1LDo4 1ev13kqLDw6L2I2aj17HdPSz5OMFba7aJm4no9ayJ1tWFJD2del/XIHmsa+CiEbS1Y BUMlDad6OwgUy4dGXVJVJ+S3rRaxUPAsebyNulSIaPdXilUg5INf4ri9MIACATxbmu uue4ye5XNFIQP61CLqF1Nb89IDdXHe313IBRdvBxJwxBNGSyY2g58aYl/7Y+SmBf35 Rywo03HHw/xDC4wUhO90VqDO/c9MZBCtCrBFBFTdxJmUQnQSiFPkBTT7Pd5VZ0Z0Hj S2+HQkenUSULw== Received: from trenzalore.hitronhub.home (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by madrid.collaboradmins.com (Postfix) with ESMTPSA id DED83378221A; Fri, 2 Aug 2024 15:16:59 +0000 (UTC) From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Ulf Hansson , Detlev Casanova , Geert Uytterhoeven , "Rafael J . Wysocki" , Finley Xiao , Jagan Teki , Elaine Zhang , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 2/3] dt-bindings: Add power-domain header for RK3576 SoCs Date: Fri, 2 Aug 2024 11:14:59 -0400 Message-ID: <20240802151647.294307-3-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240802151647.294307-1-detlev.casanova@collabora.com> References: <20240802151647.294307-1-detlev.casanova@collabora.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Finley Xiao Define power domain IDs as described in the TRM. Signed-off-by: Finley Xiao [reword] Signed-off-by: Detlev Casanova --- include/dt-bindings/power/rk3576-power.h | 30 ++++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 include/dt-bindings/power/rk3576-power.h diff --git a/include/dt-bindings/power/rk3576-power.h b/include/dt-bindings/power/rk3576-power.h new file mode 100644 index 0000000000000..cb33a32c1aed9 --- /dev/null +++ b/include/dt-bindings/power/rk3576-power.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +#ifndef __DT_BINDINGS_POWER_RK3576_POWER_H__ +#define __DT_BINDINGS_POWER_RK3576_POWER_H__ + +/* VD_NPU */ +#define RK3576_PD_NPU 0 +#define RK3576_PD_NPUTOP 1 +#define RK3576_PD_NPU0 2 +#define RK3576_PD_NPU1 3 + +/* VD_GPU */ +#define RK3576_PD_GPU 4 + +/* VD_LOGIC */ +#define RK3576_PD_NVM 5 +#define RK3576_PD_SDGMAC 6 +#define RK3576_PD_USB 7 +#define RK3576_PD_PHP 8 +#define RK3576_PD_SUBPHP 9 +#define RK3576_PD_AUDIO 10 +#define RK3576_PD_VEPU0 11 +#define RK3576_PD_VEPU1 12 +#define RK3576_PD_VPU 13 +#define RK3576_PD_VDEC 14 +#define RK3576_PD_VI 15 +#define RK3576_PD_VO0 16 +#define RK3576_PD_VO1 17 +#define RK3576_PD_VOP 18 + +#endif From patchwork Fri Aug 2 15:15:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 816588 Received: from madrid.collaboradmins.com (madrid.collaboradmins.com [46.235.227.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 52C7C1537D3; Fri, 2 Aug 2024 15:17:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=46.235.227.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722611828; cv=none; b=XgIPRgbSnBRc3TliAF2uFP5HClGJ3X4xMKq6nLxoArwipojHwHRY8O+jhu27fdEL4HA2P5o6iaHdlW+fHHKems77FjDINPjkDrvnpbO+dNpUTIdLvGokqAmDTR9dZ3wvjmA2k1U9oHdLq21tsUcuiYYAlM7C8wvU6hJ/1wRf7Dk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722611828; c=relaxed/simple; bh=rPddP6jREovZPe2OO1sPfsb89w9mYK2PrVoEMNOcF50=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Wwx5k88W/4x6wE3v5sgd+s35QiJjg2tNNAnYhGpZxedtBAJyFzgh66UCcPdVyHS/+qkT7BSHKzIDeSQA2a5/n7aGinpWbJlTNUoG6lY7TOOU2zc0GQ3ph5Eo/vhvly4LRaxZ4LdODzLmJeUrFwz6xC6XAA2aZzbcsvkQ2TJH0ts= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=Ik2q30r8; arc=none smtp.client-ip=46.235.227.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="Ik2q30r8" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1722611824; bh=rPddP6jREovZPe2OO1sPfsb89w9mYK2PrVoEMNOcF50=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ik2q30r8zWsI3rhpx8v++19WOLOKk31HH6Rj6re9SsMvlVgX6yP/aTkV955l/hSZS ampalrHEeFyPRogsFbHo5qZtX9wloponMIqk7uDJ2KEMZxTDwR1HQoVUJRmB8HfP33 SCyWAgP4nr9KnUO5lsaBUBKQM0d2y3FCgUhn+ILu8q6WBuXM7Kh+ETs2AKo6e634ia XWq/yroQq1vB+DWcWUPH0t1++gBSfEbOKPYudgGF8AKhFVAFCeHwZRjAYyWPrRjviy BrrlggDy49Nu9NnrKwvAeW1cgBGRzSSmYPPXzz3jYTncn96IEwNzNZSBP4C8VakYOH lMLmJF/anBRQg== Received: from trenzalore.hitronhub.home (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by madrid.collaboradmins.com (Postfix) with ESMTPSA id 6F59B378221B; Fri, 2 Aug 2024 15:17:02 +0000 (UTC) From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Ulf Hansson , Detlev Casanova , Geert Uytterhoeven , "Rafael J . Wysocki" , Finley Xiao , Jagan Teki , Elaine Zhang , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 3/3] soc: rockchip: power-domain: Add power domain support for rk3576 Date: Fri, 2 Aug 2024 11:15:00 -0400 Message-ID: <20240802151647.294307-4-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240802151647.294307-1-detlev.casanova@collabora.com> References: <20240802151647.294307-1-detlev.casanova@collabora.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Finley Xiao This driver is modified to support RK3576 SoCs and lists the power domains. Signed-off-by: Finley Xiao Signed-off-by: Detlev Casanova --- drivers/pmdomain/rockchip/pm-domains.c | 69 ++++++++++++++++++++++++-- 1 file changed, 66 insertions(+), 3 deletions(-) diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c index 9b76b62869d0d..f0330bb51685f 100644 --- a/drivers/pmdomain/rockchip/pm-domains.c +++ b/drivers/pmdomain/rockchip/pm-domains.c @@ -33,6 +33,7 @@ #include #include #include +#include #include struct rockchip_domain_info { @@ -50,6 +51,7 @@ struct rockchip_domain_info { u32 pwr_offset; u32 mem_offset; u32 req_offset; + u32 delay_us; }; struct rockchip_pmu_info { @@ -144,9 +146,26 @@ struct rockchip_pmu { .active_wakeup = wakeup, \ } -#define DOMAIN_RK3036(_name, req, ack, idle, wakeup) \ +#define DOMAIN_M_O_R_G(_name, p_offset, pwr, status, r_status, r_offset, req, idle, ack, g_mask, delay, wakeup) \ { \ - .name = _name, \ + .name = _name, \ + .pwr_offset = p_offset, \ + .pwr_w_mask = (pwr) << 16, \ + .pwr_mask = (pwr), \ + .status_mask = (status), \ + .repair_status_mask = (r_status), \ + .req_offset = r_offset, \ + .req_w_mask = (req) << 16, \ + .req_mask = (req), \ + .idle_mask = (idle), \ + .ack_mask = (ack), \ + .delay_us = delay, \ + .active_wakeup = wakeup, \ +} + +#define DOMAIN_RK3036(_name, req, ack, idle, wakeup) \ +{ \ + .name = _name, \ .req_mask = (req), \ .req_w_mask = (req) << 16, \ .ack_mask = (ack), \ @@ -175,6 +194,9 @@ struct rockchip_pmu { #define DOMAIN_RK3568(name, pwr, req, wakeup) \ DOMAIN_M(name, pwr, pwr, req, req, req, wakeup) +#define DOMAIN_RK3576(name, p_offset, pwr, status, r_status, r_offset, req, idle, g_mask, delay, wakeup) \ + DOMAIN_M_O_R_G(name, p_offset, pwr, status, r_status, r_offset, req, idle, idle, g_mask, delay, wakeup) + /* * Dynamic Memory Controller may need to coordinate with us -- see * rockchip_pmu_block(). @@ -552,7 +574,10 @@ static int rockchip_pd_power(struct rockchip_pm_domain *pd, bool power_on) /* if powering up, leave idle mode */ rockchip_pmu_set_idle_request(pd, false); - rockchip_pmu_restore_qos(pd); + if (pd->info->delay_us) + udelay(pd->info->delay_us); + else + rockchip_pmu_restore_qos(pd); } clk_bulk_disable(pd->num_clks, pd->clks); @@ -1106,6 +1131,28 @@ static const struct rockchip_domain_info rk3568_pm_domains[] = { [RK3568_PD_PIPE] = DOMAIN_RK3568("pipe", BIT(8), BIT(11), false), }; +static const struct rockchip_domain_info rk3576_pm_domains[] = { + [RK3576_PD_NPU] = DOMAIN_RK3576("npu", 0x0, BIT(0), BIT(0), 0, 0x0, 0, 0, 0, 0, false), + [RK3576_PD_NVM] = DOMAIN_RK3576("nvm", 0x0, BIT(6), 0, BIT(6), 0x4, BIT(2), BIT(18), BIT(2), 0, false), + [RK3576_PD_SDGMAC] = DOMAIN_RK3576("sdgmac", 0x0, BIT(7), 0, BIT(7), 0x4, BIT(1), BIT(17), 0x6, 0, false), + [RK3576_PD_AUDIO] = DOMAIN_RK3576("audio", 0x0, BIT(8), 0, BIT(8), 0x4, BIT(0), BIT(16), BIT(0), 0, false), + [RK3576_PD_PHP] = DOMAIN_RK3576("php", 0x0, BIT(9), 0, BIT(9), 0x0, BIT(15), BIT(15), BIT(15), 0, false), + [RK3576_PD_SUBPHP] = DOMAIN_RK3576("subphp", 0x0, BIT(10), 0, BIT(10), 0x0, 0, 0, 0, 0, false), + [RK3576_PD_VOP] = DOMAIN_RK3576("vop", 0x0, BIT(11), 0, BIT(11), 0x0, 0x6000, 0x6000, 0x6000, 15, false), + [RK3576_PD_VO1] = DOMAIN_RK3576("vo1", 0x0, BIT(14), 0, BIT(14), 0x0, BIT(12), BIT(12), 0x7000, 0, false), + [RK3576_PD_VO0] = DOMAIN_RK3576("vo0", 0x0, BIT(15), 0, BIT(15), 0x0, BIT(11), BIT(11), 0x6800, 0, false), + [RK3576_PD_USB] = DOMAIN_RK3576("usb", 0x4, BIT(0), 0, BIT(16), 0x0, BIT(10), BIT(10), 0x6400, 0, true), + [RK3576_PD_VI] = DOMAIN_RK3576("vi", 0x4, BIT(1), 0, BIT(17), 0x0, BIT(9), BIT(9), BIT(9), 0, false), + [RK3576_PD_VEPU0] = DOMAIN_RK3576("vepu0", 0x4, BIT(2), 0, BIT(18), 0x0, BIT(7), BIT(7), 0x280, 0, false), + [RK3576_PD_VEPU1] = DOMAIN_RK3576("vepu1", 0x4, BIT(3), 0, BIT(19), 0x0, BIT(8), BIT(8), BIT(8), 0, false), + [RK3576_PD_VDEC] = DOMAIN_RK3576("vdec", 0x4, BIT(4), 0, BIT(20), 0x0, BIT(6), BIT(6), BIT(6), 0, false), + [RK3576_PD_VPU] = DOMAIN_RK3576("vpu", 0x4, BIT(5), 0, BIT(21), 0x0, BIT(5), BIT(5), BIT(5), 0, false), + [RK3576_PD_NPUTOP] = DOMAIN_RK3576("nputop", 0x4, BIT(6), 0, BIT(22), 0x0, 0x18, 0x18, 0x18, 15, false), + [RK3576_PD_NPU0] = DOMAIN_RK3576("npu0", 0x4, BIT(7), 0, BIT(23), 0x0, BIT(1), BIT(1), 0x1a, 0, false), + [RK3576_PD_NPU1] = DOMAIN_RK3576("npu1", 0x4, BIT(8), 0, BIT(24), 0x0, BIT(2), BIT(2), 0x1c, 0, false), + [RK3576_PD_GPU] = DOMAIN_RK3576("gpu", 0x4, BIT(9), 0, BIT(25), 0x0, BIT(0), BIT(0), BIT(0), 0, false), +}; + static const struct rockchip_domain_info rk3588_pm_domains[] = { [RK3588_PD_GPU] = DOMAIN_RK3588("gpu", 0x0, BIT(0), 0, 0x0, 0, BIT(1), 0x0, BIT(0), BIT(0), false), [RK3588_PD_NPU] = DOMAIN_RK3588("npu", 0x0, BIT(1), BIT(1), 0x0, 0, 0, 0x0, 0, 0, false), @@ -1284,6 +1331,18 @@ static const struct rockchip_pmu_info rk3568_pmu = { .domain_info = rk3568_pm_domains, }; +static const struct rockchip_pmu_info rk3576_pmu = { + .pwr_offset = 0x210, + .status_offset = 0x230, + .req_offset = 0x110, + .idle_offset = 0x128, + .ack_offset = 0x120, + .repair_status_offset = 0x570, + + .num_domains = ARRAY_SIZE(rk3576_pm_domains), + .domain_info = rk3576_pm_domains, +}; + static const struct rockchip_pmu_info rk3588_pmu = { .pwr_offset = 0x14c, .status_offset = 0x180, @@ -1359,6 +1418,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = { .compatible = "rockchip,rk3568-power-controller", .data = (void *)&rk3568_pmu, }, + { + .compatible = "rockchip,rk3576-power-controller", + .data = (void *)&rk3576_pmu, + }, { .compatible = "rockchip,rk3588-power-controller", .data = (void *)&rk3588_pmu,