From patchwork Wed Nov 6 11:33:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 178667 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp476897ilf; Wed, 6 Nov 2019 03:34:16 -0800 (PST) X-Google-Smtp-Source: APXvYqyj6uZ7UIbtsVIR2jPXCOZ4kBUeVDPtC0AKtPR6vGKja/IsT8p7NnvoI8LHSEboxB9qmH2H X-Received: by 2002:aa7:d6cf:: with SMTP id x15mr2099537edr.202.1573040056805; Wed, 06 Nov 2019 03:34:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573040056; cv=none; d=google.com; s=arc-20160816; b=R/iRwJr/w5Bxz4X8RQOLtNl2/vrWLagqDITdLNLuZGOs2xYFZr+x2XOQTo5OqYPBp8 9bC7usRFma5ewkqvgw3PUdOYL/YQ7D7TCvOdw/yEyfvF57RAwm6nyiz4mcXWiP9c2ERb vdCI+KbGUihm8TacUjNxBA7YsgeVwUlvD0W3mISSX4dxx2HmHhTxNoE43RTKMH9/1R3i 1PnfY3rCXxZ4+ILZ9X6+zLB3uYW3IF3ooNS8rCxASnA9hXDCWsDgCD/pBDSTS7L3vdG3 cEtfzf57ZCKNSUDPqtCYCkxhUaZOzsEKR1khl7Pdd9AeDV82JICE2mqf3+wdpARr73Fe 2UyQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=ioxK2kUUvhJn3ibL7fxkhbHvv7iuDuKl2QhEX38aenY=; b=rVkQcMVAK3eJF9xU/9IJ1CzL9sI78Akb5qpR7hTD9uq+oFpHabIz5gICW2fGaTUaaT YgsL5azjk7U5/kRRfJl4wZK180p5m1fY8Tm9ys99X/ABjN9TNsvPj8VvCjS9YRUSzoJ3 0Hvv+M46o8ciRfCtKwM7TscR+ST6GsolSQJLlATKsNcRY9IiemCquiSvsmBHN7W6k3Ro ZqOu8pbo/pcPqsPEMJUBzgHTbvF0N/i6HfHE89bdOqjm5vGElSDBJKqtEarGu4Xt2V5D dYBlifR5AVcIh+nlmOQENrgbz2cnTNYZ4deKEDg061kMbCRFnb3IPrNONc2iI6iUtn/T Kxpg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yNLrWy6G; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id q124sm1776907wme.13.2019.11.06.03.33.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 03:33:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 01/12] scripts/qemu-binfmt-conf: Update for sparc64 Date: Wed, 6 Nov 2019 12:33:07 +0100 Message-Id: <20191106113318.10226-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191106113318.10226-1-richard.henderson@linaro.org> References: <20191106113318.10226-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Also note that we were missing the qemu_target_list entry for plain sparc; fix that at the same time. Reviewed-by: Laurent Vivier Tested-by: Laurent Vivier Signed-off-by: Richard Henderson Message-Id: <20191025113921.9412-2-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- scripts/qemu-binfmt-conf.sh | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/scripts/qemu-binfmt-conf.sh b/scripts/qemu-binfmt-conf.sh index b5a16742a1..9f1580a91c 100755 --- a/scripts/qemu-binfmt-conf.sh +++ b/scripts/qemu-binfmt-conf.sh @@ -1,8 +1,8 @@ #!/bin/sh # Enable automatic program execution by the kernel. -qemu_target_list="i386 i486 alpha arm armeb sparc32plus ppc ppc64 ppc64le m68k \ -mips mipsel mipsn32 mipsn32el mips64 mips64el \ +qemu_target_list="i386 i486 alpha arm armeb sparc sparc32plus sparc64 \ +ppc ppc64 ppc64le m68k mips mipsel mipsn32 mipsn32el mips64 mips64el \ sh4 sh4eb s390x aarch64 aarch64_be hppa riscv32 riscv64 xtensa xtensaeb \ microblaze microblazeel or1k x86_64" @@ -38,6 +38,10 @@ sparc32plus_magic='\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x sparc32plus_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff' sparc32plus_family=sparc +sparc64_magic='\x7fELF\x02\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x2b' +sparc64_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff' +sparc64_family=sparc + ppc_magic='\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x14' ppc_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff' ppc_family=ppc From patchwork Wed Nov 6 11:33:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 178668 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp479428ilf; Wed, 6 Nov 2019 03:36:29 -0800 (PST) X-Google-Smtp-Source: APXvYqzlVQzCmadRhXyCjvbCgoC8xwoYCdKaZG1mZC3gDfRqVcV3Z81fXASuf0zjxdBiq5iVrtgc X-Received: by 2002:aa7:c6c9:: with SMTP id b9mr2045424eds.1.1573040189583; Wed, 06 Nov 2019 03:36:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573040189; cv=none; d=google.com; s=arc-20160816; b=lxthFkALfVDdFzIzM8ReGJHEK7KHHrLSomD1gqbziPlqFPvkN8GvNVbQaUofMBYgQp Cxz3iMT/+fHw47iYCT7lNuCFGBxgcwnuKHOyxrRzo8eDOHmZf8uXRC/nnwA/BRr/AKTm X6FJLjMA5WQXzw06bBKzCdVcoXxotVpmm2zRhFMzwn8gvQRG1GWAQJp3tHe/Pai8eMEY iYxlzdxgiixb1CxIhYe1xvIvpFuVn8TkFNyw+0iL2obAMWx84ZzTO0J80cmB58LdQcq8 0OGd4OooJ/TK3lAnrabafrcK6N44THkbrObVuteuR7lhEaJGGflXA20zysxUxupjrYQD C7hw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=c9UPRPKHJUNhzqq+bqS8IJr3Nntx8YxeU90N3YYxIP4=; b=x5UFec5K5EKusOpBB5zdphIDgfFjOYH5XNOVB9YEcm3i3P5tmEBKzdS88DMr9csbHG yAEu8tesLwAydSRsuKqbK6UJfPfDXx4b0+S5S39N4/GhBY9GhpddB8hgebMoStZ/RltL ekZFwlaWzbC6r8MbRWlDuNq/9gA368BXjcER0ma1mxW3ZRh7x5qnCk7ukr8D5liGPG+S Gx+GLUumw+5MGKUtiakyL2PhqJ4zp7tsUjCL54CZ61q9tgf8hgfNp5mrqfOFn95KQz4+ XUYVU9pgwnjk2JRWFFqycKL8rc7u5YDk6r01TJsI0YIpTdJqwQ+5Z05Z4S653wvRF4Yg 4k8w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aOjCzRcb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id q124sm1776907wme.13.2019.11.06.03.33.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 03:33:32 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 02/12] tests/tcg/multiarch/linux-test: Fix error check for shmat Date: Wed, 6 Nov 2019 12:33:08 +0100 Message-Id: <20191106113318.10226-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191106113318.10226-1-richard.henderson@linaro.org> References: <20191106113318.10226-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The error indicator for this syscall is -1, not 0. Fixes: e374bfa35bfb ("shm tests - disabled clone test") Reviewed-by: Laurent Vivier Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20191025113921.9412-3-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- tests/tcg/multiarch/linux-test.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/tests/tcg/multiarch/linux-test.c b/tests/tcg/multiarch/linux-test.c index fa4243fc04..673d7c8a1c 100644 --- a/tests/tcg/multiarch/linux-test.c +++ b/tests/tcg/multiarch/linux-test.c @@ -503,8 +503,9 @@ static void test_shm(void) shmid = chk_error(shmget(IPC_PRIVATE, SHM_SIZE, IPC_CREAT | 0777)); ptr = shmat(shmid, NULL, 0); - if (!ptr) + if (ptr == (void *)-1) { error("shmat"); + } memset(ptr, 0, SHM_SIZE); From patchwork Wed Nov 6 11:33:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 178672 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp482682ilf; Wed, 6 Nov 2019 03:39:46 -0800 (PST) X-Google-Smtp-Source: APXvYqxocd0yKhDFsvJSCfT+7hvTUOrqvtU+/AylESZduyePhTBYR9X17yjpjohXQoXaRhwftvFu X-Received: by 2002:a05:6402:1156:: with SMTP id g22mr2090830edw.233.1573040386558; Wed, 06 Nov 2019 03:39:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573040386; cv=none; d=google.com; s=arc-20160816; b=C5bQQlNNXTiA/ziIMMM/tc3z3HBgtUtBC4YXxY+8Qz1WL2JpmKjO43i9JdKTsBQ372 cM8XwE+p54KpdxPh/sbMWdgJyZ9TatwekwYgR8FnyOeJFNY2MnjJQGy/1/P1kRwGm9+Y 2LJKV8rW+R0h0pyS9OafEIUS4PukAYxpsLBejWEFVmEGyYicDE9/bExxR4Sj8rwtQdlo anxpUtfyWmxxl/mJ9H5gYTXGBTF/LO31ZwvvH7UNjjuo888nT/Vgr5IUddOtn98+3UlS EjaSBuvehwr8qQztyKPKPGvw/7DG/antRcCfuXwh20tassK9+jpQ72qQw9IQwQffpv7S qRUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=/0sggaw1v8ZuIdMOPOdNQg2kpFmBqjitREJdcWvNbpc=; b=EylomrrU4K4kvlrRnCe37Fjz+3VC9ggw6fU87qbeQ3KkzI23rR6lGAt1cESCPijNir U60LYGQMBkTUNprAUd6lk+l53wssfLeIsv/HRLtk/jbIdgM78oTWUs4Futro3456d5x7 IAO2i59t4VX3ij5H0pMdOlIb/48U/jGUMS2bsE79HkP9ukZej2KES7FWHBXx7xfef1g2 XikT9B1Te8CO28Gstx61zG7pG+rGpq7roRkGT0Jj1RoHoFNRPobC7YGegmMtfCSoNK8N b2cuD88isanGS7RAf1oy2I+123tw5QXCoVCVK4n5oj5ebfQsY9q+hGW/S5KXylE70CAM ZSZA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qU0On76W; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id q124sm1776907wme.13.2019.11.06.03.33.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 03:33:33 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 03/12] target/sparc: Define an enumeration for accessing env->regwptr Date: Wed, 6 Nov 2019 12:33:09 +0100 Message-Id: <20191106113318.10226-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191106113318.10226-1-richard.henderson@linaro.org> References: <20191106113318.10226-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson Message-Id: <20191025113921.9412-4-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- target/sparc/cpu.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) -- 2.17.1 diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 778aa8e073..ae97c7d9f7 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -13,6 +13,39 @@ /*#define EXCP_INTERRUPT 0x100*/ +/* Windowed register indexes. */ +enum { + WREG_O0, + WREG_O1, + WREG_O2, + WREG_O3, + WREG_O4, + WREG_O5, + WREG_O6, + WREG_O7, + + WREG_L0, + WREG_L1, + WREG_L2, + WREG_L3, + WREG_L4, + WREG_L5, + WREG_L6, + WREG_L7, + + WREG_I0, + WREG_I1, + WREG_I2, + WREG_I3, + WREG_I4, + WREG_I5, + WREG_I6, + WREG_I7, + + WREG_SP = WREG_O6, + WREG_FP = WREG_I6, +}; + /* trap definitions */ #ifndef TARGET_SPARC64 #define TT_TFAULT 0x01 From patchwork Wed Nov 6 11:33:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 178675 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp483250ilf; Wed, 6 Nov 2019 03:40:20 -0800 (PST) X-Google-Smtp-Source: APXvYqxRiZOmZCQ67+ePa3X+YNkRnVwNXRgUuP/+/1r0+0epgQAZqe4oG/DOy0z3s5juRqchIuJL X-Received: by 2002:a05:6402:1146:: with SMTP id g6mr2093237edw.215.1573040420361; Wed, 06 Nov 2019 03:40:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573040420; cv=none; d=google.com; s=arc-20160816; b=x2XBO108Z57uMim3IrGGmRd4qn+Mtlg5o+KD9Aij5HZ8wgVbHO8IpSKjDc48VX5Xzd qkSsDqtHOUZcShhgpPuMvWFuoWfPEQn7kv4qRra/C+nJuoMYd480Z7XTXsOclbeahcqZ OYovooJQZcPyjUyvPq66G8sb0q4Ng/+ma2hAY4/VeS0yAFH47mIawNtCGUMpjPXS2hSi juGl5uSuZxzxtAdCil/7NPgJTXAiATFQ9QIGbKKLWnfjNc+gVXehFdehmat5MzdgyNdr Ezrex1/ZdkMVPdADzmWKudxlzXP58vqj4e+yokEwOlfD8bWYzOPG1D2euJ4/Z6Pss5i3 IBbw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=s3dwTlrDDpUYfBm35ZTmNP1iU/J47qcplhioQiqvjIo=; b=OO1HKFmPAFgPsu+QVo1/gk4oD1sRLro6GCVaOzlwjsA8qVp92g2dW53TqtYiZaB16T RuZJid35QXSmiTeMO3bcPjgzLkDUeDFUcRA8zj1W/QoWh+NM2/2xxUJEJIFJZEDeoZ7X o4enV4THxUhKPeqkM2znHQ0EeexMtSCFm4PVHIzPYIlrMbz8Bn+DMiAVuez1BQJMfeBg cqUpcBsEIKlTaRajzjT5UJqgeQNLAbzZ9kRNY3MUPF37uIjrDTpxTBm14GESXicL0usH qjiD6+8+NiZ0CkyUqfR3ESh/GChcgFu4dIG2I5QeAsb3UVXBSfIJANzB7HO+JTxg2OoE Rc8Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Rhp4LYJm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id q124sm1776907wme.13.2019.11.06.03.33.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 03:33:35 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 04/12] linux-user/sparc: Use WREG constants in sparc/target_cpu.h Date: Wed, 6 Nov 2019 12:33:10 +0100 Message-Id: <20191106113318.10226-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191106113318.10226-1-richard.henderson@linaro.org> References: <20191106113318.10226-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This fixes a naming bug wherein we used "UREG_FP" to access the stack pointer. OTOH, the "UREG_FP" constant was also defined incorrectly such that it *did* reference the stack pointer. Note that the kernel legitimately uses the name "FP", because it utilizes the rolled stack window in processing the system call. Signed-off-by: Richard Henderson Reviewed-by: Laurent Vivier Message-Id: <20191025113921.9412-5-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- linux-user/sparc/target_cpu.h | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) -- 2.17.1 diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index 1ffc0ae9f2..b30fbc72c4 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -41,15 +41,9 @@ static inline void cpu_set_tls(CPUSPARCState *env, target_ulong newtls) env->gregs[7] = newtls; } -#ifndef UREG_I6 -#define UREG_I6 6 -#endif -#ifndef UREG_FP -#define UREG_FP UREG_I6 -#endif - static inline abi_ulong get_sp_from_cpustate(CPUSPARCState *state) { - return state->regwptr[UREG_FP]; + return state->regwptr[WREG_SP]; } + #endif From patchwork Wed Nov 6 11:33:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 178669 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp479570ilf; Wed, 6 Nov 2019 03:36:37 -0800 (PST) X-Google-Smtp-Source: APXvYqxHWoBeRLx1TWsyjWI58sdze3ZvAoRiTCxyzedlsuZmK/orday90cCKMJTx415HSwBHPAtn X-Received: by 2002:aa7:c44a:: with SMTP id n10mr2029331edr.282.1573040197128; Wed, 06 Nov 2019 03:36:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573040197; cv=none; d=google.com; s=arc-20160816; b=qs7K7xdbopT5zKXpSZqUKMWZHzMjv/Xawp/+yTNUtNpTU/smV1CscBE1MIib1BrGSI 2XovW3K3l7ycdsDoqVZ2CmEl0nTZE3v/1WndEkqxkn4qS46Mhldwqi/2RR3fJQ0KKFQE UFugGSwhc+T0WPev5+wipCZm3ExjVl+xzlum8mUF1lfBcoIIA1Uz2aPq1OXIRolPhqI3 myRf9CyY95s1Vzi/kj2M1zd4UlpBG75DCpM53OfyXaD6H96EVU48Nt9kD1Qi8pmWXmwF FYdevnmdvOk5yG7EhmSusDidOsU5cclUMaf0WVcxerYvO0eJp4L9NoyRL3BhG73EV61n ZxLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=LRaQpCgWP3gyA/5Ocmoh3fal+6bjZX/Jqe93fN58T0A=; b=eyP8TbXrPoPrh1lEGtmJJyUuP1+kzbF73rFU8z8c2gNMqYrQzqsIP2bmMbrXY4uyI2 dF6fzXHfh2XYCuJwLH1OeKex0tGzTZQqlDn3O1/WCsNaA8aek77K2D5ACVZE1ZBRKRD9 EXq0XGImsl7QD9IqR1ijmANTV1EmkRnMQu6FVd/LJd5PaDk9L2jmM0i5Ind6IjyS/NIa gofEhaTGUo9fF3rXjB2p6fur8EEOHEOqxyOXSiz+T0cmGOW6A9QiN/45Xr0YkjZ8saaA 2dzYVR4igGv7OMQaGxdu39LXbjqZASxn9nvo6MqhAK0b6Kt1SAUuccEX4vo7G0Oh+m7+ gfvg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=T3Gj7Wjw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id q124sm1776907wme.13.2019.11.06.03.33.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 03:33:36 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 05/12] linux-user/sparc: Begin using WREG constants in sparc/signal.c Date: Wed, 6 Nov 2019 12:33:11 +0100 Message-Id: <20191106113318.10226-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191106113318.10226-1-richard.henderson@linaro.org> References: <20191106113318.10226-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is non-obvious because the UREG constants are in fact wrong. s/UREG_I/WREG_O/g s/UREG_O/WREG_I/g s/UREG_L/WREG_L/g These substitutions have identical integer values. Signed-off-by: Richard Henderson Reviewed-by: Laurent Vivier Message-Id: <20191025113921.9412-6-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- linux-user/sparc/signal.c | 93 ++++++++++++++------------------------- 1 file changed, 32 insertions(+), 61 deletions(-) -- 2.17.1 diff --git a/linux-user/sparc/signal.c b/linux-user/sparc/signal.c index ead169fbaa..aac37da239 100644 --- a/linux-user/sparc/signal.c +++ b/linux-user/sparc/signal.c @@ -104,19 +104,8 @@ struct target_rt_signal_frame { qemu_siginfo_fpu_t fpu_state; }; -#define UREG_O0 16 -#define UREG_O6 22 -#define UREG_I0 0 -#define UREG_I1 1 -#define UREG_I2 2 -#define UREG_I3 3 -#define UREG_I4 4 -#define UREG_I5 5 -#define UREG_I6 6 -#define UREG_I7 7 -#define UREG_L0 8 -#define UREG_FP UREG_I6 -#define UREG_SP UREG_O6 +#define UREG_FP WREG_O6 +#define UREG_SP WREG_I6 static inline abi_ulong get_sigframe(struct target_sigaction *sa, CPUSPARCState *env, @@ -159,30 +148,12 @@ setup___siginfo(__siginfo_t *si, CPUSPARCState *env, abi_ulong mask) __put_user(env->gregs[i], &si->si_regs.u_regs[i]); } for (i=0; i < 8; i++) { - __put_user(env->regwptr[UREG_I0 + i], &si->si_regs.u_regs[i+8]); + __put_user(env->regwptr[WREG_O0 + i], &si->si_regs.u_regs[i + 8]); } __put_user(mask, &si->si_mask); return err; } -#if 0 -static int -setup_sigcontext(struct target_sigcontext *sc, /*struct _fpstate *fpstate,*/ - CPUSPARCState *env, unsigned long mask) -{ - int err = 0; - - __put_user(mask, &sc->sigc_mask); - __put_user(env->regwptr[UREG_SP], &sc->sigc_sp); - __put_user(env->pc, &sc->sigc_pc); - __put_user(env->npc, &sc->sigc_npc); - __put_user(env->psr, &sc->sigc_psr); - __put_user(env->gregs[1], &sc->sigc_g1); - __put_user(env->regwptr[UREG_O0], &sc->sigc_o0); - - return err; -} -#endif #define NF_ALIGNEDSZ (((sizeof(struct target_signal_frame) + 7) & (~7))) void setup_frame(int sig, struct target_sigaction *ka, @@ -221,20 +192,20 @@ void setup_frame(int sig, struct target_sigaction *ka, } for (i = 0; i < 8; i++) { - __put_user(env->regwptr[i + UREG_L0], &sf->ss.locals[i]); + __put_user(env->regwptr[i + WREG_L0], &sf->ss.locals[i]); } for (i = 0; i < 8; i++) { - __put_user(env->regwptr[i + UREG_I0], &sf->ss.ins[i]); + __put_user(env->regwptr[i + WREG_O0], &sf->ss.ins[i]); } if (err) goto sigsegv; /* 3. signal handler back-trampoline and parameters */ env->regwptr[UREG_FP] = sf_addr; - env->regwptr[UREG_I0] = sig; - env->regwptr[UREG_I1] = sf_addr + + env->regwptr[WREG_O0] = sig; + env->regwptr[WREG_O1] = sf_addr + offsetof(struct target_signal_frame, info); - env->regwptr[UREG_I2] = sf_addr + + env->regwptr[WREG_O2] = sf_addr + offsetof(struct target_signal_frame, info); /* 4. signal handler */ @@ -242,11 +213,11 @@ void setup_frame(int sig, struct target_sigaction *ka, env->npc = (env->pc + 4); /* 5. return to kernel instructions */ if (ka->ka_restorer) { - env->regwptr[UREG_I7] = ka->ka_restorer; + env->regwptr[WREG_O7] = ka->ka_restorer; } else { uint32_t val32; - env->regwptr[UREG_I7] = sf_addr + + env->regwptr[WREG_O7] = sf_addr + offsetof(struct target_signal_frame, insns) - 2 * 4; /* mov __NR_sigreturn, %g1 */ @@ -316,7 +287,7 @@ long do_sigreturn(CPUSPARCState *env) __get_user(env->gregs[i], &sf->info.si_regs.u_regs[i]); } for (i=0; i < 8; i++) { - __get_user(env->regwptr[i + UREG_I0], &sf->info.si_regs.u_regs[i+8]); + __get_user(env->regwptr[i + WREG_O0], &sf->info.si_regs.u_regs[i + 8]); } /* FIXME: implement FPU save/restore: @@ -433,7 +404,7 @@ void sparc64_set_context(CPUSPARCState *env) abi_ulong fp, i7, w_addr; unsigned int i; - ucp_addr = env->regwptr[UREG_I0]; + ucp_addr = env->regwptr[WREG_O0]; if (!lock_user_struct(VERIFY_READ, ucp, ucp_addr, 1)) { goto do_sigsegv; } @@ -443,7 +414,7 @@ void sparc64_set_context(CPUSPARCState *env) if ((pc | npc) & 3) { goto do_sigsegv; } - if (env->regwptr[UREG_I1]) { + if (env->regwptr[WREG_O1]) { target_sigset_t target_set; sigset_t set; @@ -474,19 +445,19 @@ void sparc64_set_context(CPUSPARCState *env) __get_user(env->gregs[5], (&(*grp)[SPARC_MC_G5])); __get_user(env->gregs[6], (&(*grp)[SPARC_MC_G6])); __get_user(env->gregs[7], (&(*grp)[SPARC_MC_G7])); - __get_user(env->regwptr[UREG_I0], (&(*grp)[SPARC_MC_O0])); - __get_user(env->regwptr[UREG_I1], (&(*grp)[SPARC_MC_O1])); - __get_user(env->regwptr[UREG_I2], (&(*grp)[SPARC_MC_O2])); - __get_user(env->regwptr[UREG_I3], (&(*grp)[SPARC_MC_O3])); - __get_user(env->regwptr[UREG_I4], (&(*grp)[SPARC_MC_O4])); - __get_user(env->regwptr[UREG_I5], (&(*grp)[SPARC_MC_O5])); - __get_user(env->regwptr[UREG_I6], (&(*grp)[SPARC_MC_O6])); - __get_user(env->regwptr[UREG_I7], (&(*grp)[SPARC_MC_O7])); + __get_user(env->regwptr[WREG_O0], (&(*grp)[SPARC_MC_O0])); + __get_user(env->regwptr[WREG_O1], (&(*grp)[SPARC_MC_O1])); + __get_user(env->regwptr[WREG_O2], (&(*grp)[SPARC_MC_O2])); + __get_user(env->regwptr[WREG_O3], (&(*grp)[SPARC_MC_O3])); + __get_user(env->regwptr[WREG_O4], (&(*grp)[SPARC_MC_O4])); + __get_user(env->regwptr[WREG_O5], (&(*grp)[SPARC_MC_O5])); + __get_user(env->regwptr[WREG_O6], (&(*grp)[SPARC_MC_O6])); + __get_user(env->regwptr[WREG_O7], (&(*grp)[SPARC_MC_O7])); __get_user(fp, &(ucp->tuc_mcontext.mc_fp)); __get_user(i7, &(ucp->tuc_mcontext.mc_i7)); - w_addr = TARGET_STACK_BIAS+env->regwptr[UREG_I6]; + w_addr = TARGET_STACK_BIAS + env->regwptr[WREG_O6]; if (put_user(fp, w_addr + offsetof(struct target_reg_window, ins[6]), abi_ulong) != 0) { goto do_sigsegv; @@ -534,7 +505,7 @@ void sparc64_get_context(CPUSPARCState *env) target_sigset_t target_set; sigset_t set; - ucp_addr = env->regwptr[UREG_I0]; + ucp_addr = env->regwptr[WREG_O0]; if (!lock_user_struct(VERIFY_WRITE, ucp, ucp_addr, 0)) { goto do_sigsegv; } @@ -580,16 +551,16 @@ void sparc64_get_context(CPUSPARCState *env) __put_user(env->gregs[5], &((*grp)[SPARC_MC_G5])); __put_user(env->gregs[6], &((*grp)[SPARC_MC_G6])); __put_user(env->gregs[7], &((*grp)[SPARC_MC_G7])); - __put_user(env->regwptr[UREG_I0], &((*grp)[SPARC_MC_O0])); - __put_user(env->regwptr[UREG_I1], &((*grp)[SPARC_MC_O1])); - __put_user(env->regwptr[UREG_I2], &((*grp)[SPARC_MC_O2])); - __put_user(env->regwptr[UREG_I3], &((*grp)[SPARC_MC_O3])); - __put_user(env->regwptr[UREG_I4], &((*grp)[SPARC_MC_O4])); - __put_user(env->regwptr[UREG_I5], &((*grp)[SPARC_MC_O5])); - __put_user(env->regwptr[UREG_I6], &((*grp)[SPARC_MC_O6])); - __put_user(env->regwptr[UREG_I7], &((*grp)[SPARC_MC_O7])); + __put_user(env->regwptr[WREG_O0], &((*grp)[SPARC_MC_O0])); + __put_user(env->regwptr[WREG_O1], &((*grp)[SPARC_MC_O1])); + __put_user(env->regwptr[WREG_O2], &((*grp)[SPARC_MC_O2])); + __put_user(env->regwptr[WREG_O3], &((*grp)[SPARC_MC_O3])); + __put_user(env->regwptr[WREG_O4], &((*grp)[SPARC_MC_O4])); + __put_user(env->regwptr[WREG_O5], &((*grp)[SPARC_MC_O5])); + __put_user(env->regwptr[WREG_O6], &((*grp)[SPARC_MC_O6])); + __put_user(env->regwptr[WREG_O7], &((*grp)[SPARC_MC_O7])); - w_addr = TARGET_STACK_BIAS+env->regwptr[UREG_I6]; + w_addr = TARGET_STACK_BIAS + env->regwptr[WREG_O6]; fp = i7 = 0; if (get_user(fp, w_addr + offsetof(struct target_reg_window, ins[6]), abi_ulong) != 0) { From patchwork Wed Nov 6 11:33:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 178670 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp479811ilf; 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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id q124sm1776907wme.13.2019.11.06.03.33.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 03:33:37 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 06/12] linux-user/sparc: Use WREG_SP constant in sparc/signal.c Date: Wed, 6 Nov 2019 12:33:12 +0100 Message-Id: <20191106113318.10226-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191106113318.10226-1-richard.henderson@linaro.org> References: <20191106113318.10226-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" s/UREG_FP/WREG_SP/g This is non-obvious because the UREG_FP constant is fact wrong. However, the previous search-and-replace patch made it clear that UREG_FP expands to WREG_O6, and we can see from the enumeration in target/sparc/cpu.h that WREG_O6 is in fact WREG_SP, the stack pointer. The UREG_SP define is unused; remove it. Signed-off-by: Richard Henderson Reviewed-by: Laurent Vivier Message-Id: <20191025113921.9412-7-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- linux-user/sparc/signal.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/linux-user/sparc/signal.c b/linux-user/sparc/signal.c index aac37da239..e05693f204 100644 --- a/linux-user/sparc/signal.c +++ b/linux-user/sparc/signal.c @@ -104,9 +104,6 @@ struct target_rt_signal_frame { qemu_siginfo_fpu_t fpu_state; }; -#define UREG_FP WREG_O6 -#define UREG_SP WREG_I6 - static inline abi_ulong get_sigframe(struct target_sigaction *sa, CPUSPARCState *env, unsigned long framesize) @@ -201,7 +198,7 @@ void setup_frame(int sig, struct target_sigaction *ka, goto sigsegv; /* 3. signal handler back-trampoline and parameters */ - env->regwptr[UREG_FP] = sf_addr; + env->regwptr[WREG_SP] = sf_addr; env->regwptr[WREG_O0] = sig; env->regwptr[WREG_O1] = sf_addr + offsetof(struct target_signal_frame, info); @@ -255,7 +252,7 @@ long do_sigreturn(CPUSPARCState *env) sigset_t host_set; int i; - sf_addr = env->regwptr[UREG_FP]; + sf_addr = env->regwptr[WREG_SP]; trace_user_do_sigreturn(env, sf_addr); if (!lock_user_struct(VERIFY_READ, sf, sf_addr, 1)) { goto segv_and_exit; From patchwork Wed Nov 6 11:33:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 178677 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp485707ilf; Wed, 6 Nov 2019 03:42:38 -0800 (PST) X-Google-Smtp-Source: APXvYqwc83oewvyG1aDnCSOC7qTnBuh/TA1lE5a0DWlgNwECTCBEC4JWMuJr9iOZTZxLU4UUFB7K X-Received: by 2002:a05:620a:1266:: with SMTP id b6mr1567547qkl.149.1573040558581; Wed, 06 Nov 2019 03:42:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573040558; cv=none; d=google.com; s=arc-20160816; b=0BczyjlxxuCPOBmV770PX+FYhPW/yeKpIQZ7maStxtNssKKXYEzZcMiCGENXwKXauG 2cvSU+yEK2Qbv+V1dG7F6U6iCEDXtj8XcaMwSwZY7jk82NyvP1sBjVmSBoUUgMorYQ4Z qBIovj30XlAFapmG5vr2ql6H75VVCq+RhXeiyHIipqmI+qsPXFpUo9uotvrX0wntZOBe vRwOCBRCNZdTqFil2RS2sUHSCQkkbc7YEXLiu5i+z4A9dBu7sg3YVixUf42igrljqgFk mgDm7E4V0MUoxPMVzf/F+3XXr54iddLUyyJD9sBx6GEj+Ycqw05xncv5CtXApw6YyY3L eizg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=IVSeU2YymNYXOyhPXUxygRNjnXLwpMxT3U8QoAvH9WU=; b=clkitghjvnwBUPwIOSxoHZ7FRpNo6+GFIOgwl15k8JDN0RQq5FlXiPNqw2CKwderYh BoZkIp6JTRA+O2SZ03qnMXPNTBBErwovjiPqMdTH8qV+YsM4eV5gDQdk4Gytd2UjBWjm N9yoWS99bxEWFNIwRlHrINM1lEAqP/omN2NHm3lsEM+QuiBqijsVQXhBpOXGXLqxz32o U/f1GDpAclOmRRaUqvUYeIgzDjNzAeUdQeIOkCbSCW76m6dTcXQC2hB+AsG999P/Or1b 2kCb3YM2Ogq/0zXnCw7cvTyV9Y51HMO/TZkWllTRN4B4uPAF4MDFDzjJj0S0bGLewGV6 SvTw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zuhqa6i1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id q124sm1776907wme.13.2019.11.06.03.33.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 03:33:39 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 07/12] linux-user/sparc: Fix WREG usage in setup_frame Date: Wed, 6 Nov 2019 12:33:13 +0100 Message-Id: <20191106113318.10226-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191106113318.10226-1-richard.henderson@linaro.org> References: <20191106113318.10226-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Use WREG_I0 not WREG_O0 in order to properly save the "ins". The "outs" were saved separately in setup___siginfo. Signed-off-by: Richard Henderson Message-Id: <20191025113921.9412-8-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- linux-user/sparc/signal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/linux-user/sparc/signal.c b/linux-user/sparc/signal.c index e05693f204..238d0ba00c 100644 --- a/linux-user/sparc/signal.c +++ b/linux-user/sparc/signal.c @@ -192,7 +192,7 @@ void setup_frame(int sig, struct target_sigaction *ka, __put_user(env->regwptr[i + WREG_L0], &sf->ss.locals[i]); } for (i = 0; i < 8; i++) { - __put_user(env->regwptr[i + WREG_O0], &sf->ss.ins[i]); + __put_user(env->regwptr[i + WREG_I0], &sf->ss.ins[i]); } if (err) goto sigsegv; From patchwork Wed Nov 6 11:33:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 178674 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp483119ilf; Wed, 6 Nov 2019 03:40:11 -0800 (PST) X-Google-Smtp-Source: APXvYqwDXzyFY9RDgS0CZKboCFnXSXFUPtneuUlrB09Yb3DjcDqEPxGfxqUJoO2FFYKKMCkbXXPq X-Received: by 2002:ac8:7006:: with SMTP id x6mr1894245qtm.152.1573040411787; Wed, 06 Nov 2019 03:40:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573040411; cv=none; d=google.com; s=arc-20160816; b=twhjvdH93z0zxWEW96aKMcJvHFMmRGUmeQI8HiUIPMCYzAjy8TLB3NKuOgWPqAnFdX n7jCl8DmTVZII655mfUbmfrn06T8vMXcBfWMARX6pvod23WH4bj33LgwTB2LiznmRyic 9DtcxsZAjZKCXZxht7OWN4qmfx9H6jMyHQ4EYkbIFJOisDoiY9JtzLHw3Uq901YfUgDi wSum//NPadV/YMVygCa+anB3x3qHgrmg3gBtpdW28XLJRIJ/+oQ9/y62MmHb+SG0GpgQ KFetRSvQ/9AupSmeC3F7pQYV0UkNhEydpIr24An6D5GTqnP0TRZOxVomcuPzg4sK+Xus lvDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=y3Wn+08sAN9VokvpvlBwbpJiSQsLtcSXLgAihEQXJkk=; b=UGAxJHKgc6eODeUdeZo53wAx7hEWuVp0hFMUSHkUYoZ3P9NcXTfbDhagw/lpO1qgoj zPrpLfNZEh8T7SiLEci6pssVXkP34gfbaduD5VOOmyprO79RcgCb64vcH5nicSFDegMg jB8GQgo8irt7Y/OiVgk5+fWWuGW577Nix7lN4QjaZVN7SKGGdgSv4DoUzGuknKa/wb5r F54EiFTBI76xu95sPfmln7VyE9DW1L4s/0njjJRw0zAncrnikAwhDkvDRW6pTUhC3S1G b/HaGhCqcjvlEoUOmH06r/uoBX/NlwVJRQ6A7/lbfi6UfpYNknWiXCbw5fx3K5A/F32X uvgA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vizkZqci; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id q124sm1776907wme.13.2019.11.06.03.33.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 03:33:40 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 08/12] linux-user/sparc64: Fix target_signal_frame Date: Wed, 6 Nov 2019 12:33:14 +0100 Message-Id: <20191106113318.10226-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191106113318.10226-1-richard.henderson@linaro.org> References: <20191106113318.10226-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Instructions are always 4 bytes; use uint32_t not abi_ulong. Signed-off-by: Richard Henderson Reviewed-by: Laurent Vivier Message-Id: <20191025113921.9412-9-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- linux-user/sparc/signal.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/linux-user/sparc/signal.c b/linux-user/sparc/signal.c index 238d0ba00c..d796f50f66 100644 --- a/linux-user/sparc/signal.c +++ b/linux-user/sparc/signal.c @@ -87,7 +87,7 @@ struct target_signal_frame { struct sparc_stackf ss; __siginfo_t info; abi_ulong fpu_save; - abi_ulong insns[2] __attribute__ ((aligned (8))); + uint32_t insns[2] QEMU_ALIGNED(8); abi_ulong extramask[TARGET_NSIG_WORDS - 1]; abi_ulong extra_size; /* Should be 0 */ qemu_siginfo_fpu_t fpu_state; @@ -98,7 +98,7 @@ struct target_rt_signal_frame { abi_ulong regs[20]; sigset_t mask; abi_ulong fpu_save; - unsigned int insns[2]; + uint32_t insns[2]; stack_t stack; unsigned int extra_size; /* Should be 0 */ qemu_siginfo_fpu_t fpu_state; From patchwork Wed Nov 6 11:33:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 178673 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp483055ilf; Wed, 6 Nov 2019 03:40:08 -0800 (PST) X-Google-Smtp-Source: APXvYqwWXbwuQd0WpTEQt5MjeuBVFsgII36Kxw2tNZbzQppnwW2Gqhl/UJCjnqyRtWKohmQ5FssV X-Received: by 2002:ac8:1663:: with SMTP id x32mr1934447qtk.368.1573040408593; Wed, 06 Nov 2019 03:40:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573040408; cv=none; d=google.com; s=arc-20160816; b=iuhyk2EFV3Oy8hUr881OzDtumMlcvnSjOYkxIOrjUK+nMQoyNne2t4Wx0huwvj8Ipf Navpr10UTKqtoqs7s2sR9beI3dkvg8xRgHLh7tDtiVYg+2xpweKlO2av8xaRKUAAYTHJ yIm7z30YTGGA00k7kSZAeXV5QvIrQCYo7wdvKv7j/yBkLVTWJlCTZLBxU7Aktik+1yBR vGUfEplNPiSQ6D3ZTeWqAu4ahZuzHXDtXeoLVckWa1X+k9V5v19/1Ng9lUUbKcKgaBBh 5CWSDasTYY6ohGZCRpdp/PzV/cD/Wprvj08RaSADe7nF184dtYZQEhf9TRMdNPiiQf3r KpbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=gK8d2UmiWBT3h0lSEqqhxht5U+EPSU1YoDxkWG/UNhU=; b=Fwh/0RYukjP3sHPnwFcofsGKjl0H5h3iiu+ZtDOOdXMeyFqIgI/m282qRZULU/J7G8 1BvhFC+LxO23e0OK6kOhln0BAnWc0EzyUehgUxkgl4Wf1X+OZx1RaquvzUh0kLOCnyEt +zK9Ft/LoLBjmA17A7R8dUeoDKa+m7hn7J4nDWpBtt8vOnC56nEEetKRiRYj49z2hY7P hL7IxUKKRwsHuWHoA9vsWklWv1FINaTIKT8+xOVLq39kX/d6YoP2fGashi1/2n15+XPg k2tW6of7S6CxTo9o0WtNeXflQsEf2ZKUYHjKCwqY+nGrR0UTd6x8eLZkCOOc2tlyprO7 A6rA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Q6INsJ9J; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id q124sm1776907wme.13.2019.11.06.03.33.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 03:33:41 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 09/12] linux-user: Rename cpu_clone_regs to cpu_clone_regs_child Date: Wed, 6 Nov 2019 12:33:15 +0100 Message-Id: <20191106113318.10226-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191106113318.10226-1-richard.henderson@linaro.org> References: <20191106113318.10226-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We will need a target-specific hook for adjusting registers in the parent during clone. To avoid confusion, rename the one we have to make it clear it affects the child. At the same time, pass in the flags from the clone syscall. We will need them for correct behaviour for Sparc. Reviewed-by: Laurent Vivier Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20191025113921.9412-10-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- linux-user/aarch64/target_cpu.h | 3 ++- linux-user/alpha/target_cpu.h | 3 ++- linux-user/arm/target_cpu.h | 3 ++- linux-user/cris/target_cpu.h | 3 ++- linux-user/hppa/target_cpu.h | 3 ++- linux-user/i386/target_cpu.h | 3 ++- linux-user/m68k/target_cpu.h | 3 ++- linux-user/microblaze/target_cpu.h | 3 ++- linux-user/mips/target_cpu.h | 3 ++- linux-user/nios2/target_cpu.h | 3 ++- linux-user/openrisc/target_cpu.h | 4 +++- linux-user/ppc/target_cpu.h | 3 ++- linux-user/riscv/target_cpu.h | 3 ++- linux-user/s390x/target_cpu.h | 3 ++- linux-user/sh4/target_cpu.h | 3 ++- linux-user/sparc/target_cpu.h | 3 ++- linux-user/tilegx/target_cpu.h | 3 ++- linux-user/xtensa/target_cpu.h | 4 +++- linux-user/syscall.c | 4 ++-- 19 files changed, 40 insertions(+), 20 deletions(-) -- 2.17.1 diff --git a/linux-user/aarch64/target_cpu.h b/linux-user/aarch64/target_cpu.h index a021c95fa4..cd012e0dc1 100644 --- a/linux-user/aarch64/target_cpu.h +++ b/linux-user/aarch64/target_cpu.h @@ -19,7 +19,8 @@ #ifndef AARCH64_TARGET_CPU_H #define AARCH64_TARGET_CPU_H -static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUARMState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->xregs[31] = newsp; diff --git a/linux-user/alpha/target_cpu.h b/linux-user/alpha/target_cpu.h index ac4d255ae7..37ba00cf41 100644 --- a/linux-user/alpha/target_cpu.h +++ b/linux-user/alpha/target_cpu.h @@ -19,7 +19,8 @@ #ifndef ALPHA_TARGET_CPU_H #define ALPHA_TARGET_CPU_H -static inline void cpu_clone_regs(CPUAlphaState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUAlphaState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->ir[IR_SP] = newsp; diff --git a/linux-user/arm/target_cpu.h b/linux-user/arm/target_cpu.h index 3f79356a07..6e2ba8ad4b 100644 --- a/linux-user/arm/target_cpu.h +++ b/linux-user/arm/target_cpu.h @@ -41,7 +41,8 @@ static inline unsigned long arm_max_reserved_va(CPUState *cs) } #define MAX_RESERVED_VA arm_max_reserved_va -static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUARMState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[13] = newsp; diff --git a/linux-user/cris/target_cpu.h b/linux-user/cris/target_cpu.h index 2309343979..eacc4d8d13 100644 --- a/linux-user/cris/target_cpu.h +++ b/linux-user/cris/target_cpu.h @@ -20,7 +20,8 @@ #ifndef CRIS_TARGET_CPU_H #define CRIS_TARGET_CPU_H -static inline void cpu_clone_regs(CPUCRISState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUCRISState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[14] = newsp; diff --git a/linux-user/hppa/target_cpu.h b/linux-user/hppa/target_cpu.h index 1c539bdbd6..f250770790 100644 --- a/linux-user/hppa/target_cpu.h +++ b/linux-user/hppa/target_cpu.h @@ -19,7 +19,8 @@ #ifndef HPPA_TARGET_CPU_H #define HPPA_TARGET_CPU_H -static inline void cpu_clone_regs(CPUHPPAState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUHPPAState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->gr[30] = newsp; diff --git a/linux-user/i386/target_cpu.h b/linux-user/i386/target_cpu.h index ece04d0966..1fadbf57c3 100644 --- a/linux-user/i386/target_cpu.h +++ b/linux-user/i386/target_cpu.h @@ -20,7 +20,8 @@ #ifndef I386_TARGET_CPU_H #define I386_TARGET_CPU_H -static inline void cpu_clone_regs(CPUX86State *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUX86State *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[R_ESP] = newsp; diff --git a/linux-user/m68k/target_cpu.h b/linux-user/m68k/target_cpu.h index bc7446fbaf..57b647bc07 100644 --- a/linux-user/m68k/target_cpu.h +++ b/linux-user/m68k/target_cpu.h @@ -21,7 +21,8 @@ #ifndef M68K_TARGET_CPU_H #define M68K_TARGET_CPU_H -static inline void cpu_clone_regs(CPUM68KState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUM68KState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->aregs[7] = newsp; diff --git a/linux-user/microblaze/target_cpu.h b/linux-user/microblaze/target_cpu.h index 73e139938c..e9bc0fce65 100644 --- a/linux-user/microblaze/target_cpu.h +++ b/linux-user/microblaze/target_cpu.h @@ -19,7 +19,8 @@ #ifndef MICROBLAZE_TARGET_CPU_H #define MICROBLAZE_TARGET_CPU_H -static inline void cpu_clone_regs(CPUMBState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUMBState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[R_SP] = newsp; diff --git a/linux-user/mips/target_cpu.h b/linux-user/mips/target_cpu.h index 02cf5eeff7..8601f712e0 100644 --- a/linux-user/mips/target_cpu.h +++ b/linux-user/mips/target_cpu.h @@ -19,7 +19,8 @@ #ifndef MIPS_TARGET_CPU_H #define MIPS_TARGET_CPU_H -static inline void cpu_clone_regs(CPUMIPSState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUMIPSState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->active_tc.gpr[29] = newsp; diff --git a/linux-user/nios2/target_cpu.h b/linux-user/nios2/target_cpu.h index 5596c05c9c..fe5de7a9e3 100644 --- a/linux-user/nios2/target_cpu.h +++ b/linux-user/nios2/target_cpu.h @@ -20,7 +20,8 @@ #ifndef NIOS2_TARGET_CPU_H #define NIOS2_TARGET_CPU_H -static inline void cpu_clone_regs(CPUNios2State *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUNios2State *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[R_SP] = newsp; diff --git a/linux-user/openrisc/target_cpu.h b/linux-user/openrisc/target_cpu.h index 32ff135089..309cf3eeb7 100644 --- a/linux-user/openrisc/target_cpu.h +++ b/linux-user/openrisc/target_cpu.h @@ -20,7 +20,9 @@ #ifndef OPENRISC_TARGET_CPU_H #define OPENRISC_TARGET_CPU_H -static inline void cpu_clone_regs(CPUOpenRISCState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUOpenRISCState *env, + target_ulong newsp, + unsigned flags) { if (newsp) { cpu_set_gpr(env, 1, newsp); diff --git a/linux-user/ppc/target_cpu.h b/linux-user/ppc/target_cpu.h index c4641834e7..028b28312c 100644 --- a/linux-user/ppc/target_cpu.h +++ b/linux-user/ppc/target_cpu.h @@ -19,7 +19,8 @@ #ifndef PPC_TARGET_CPU_H #define PPC_TARGET_CPU_H -static inline void cpu_clone_regs(CPUPPCState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUPPCState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->gpr[1] = newsp; diff --git a/linux-user/riscv/target_cpu.h b/linux-user/riscv/target_cpu.h index 90f9a4171e..26dcafab1c 100644 --- a/linux-user/riscv/target_cpu.h +++ b/linux-user/riscv/target_cpu.h @@ -1,7 +1,8 @@ #ifndef RISCV_TARGET_CPU_H #define RISCV_TARGET_CPU_H -static inline void cpu_clone_regs(CPURISCVState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPURISCVState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->gpr[xSP] = newsp; diff --git a/linux-user/s390x/target_cpu.h b/linux-user/s390x/target_cpu.h index aa181ceaee..0b19e42f75 100644 --- a/linux-user/s390x/target_cpu.h +++ b/linux-user/s390x/target_cpu.h @@ -19,7 +19,8 @@ #ifndef S390X_TARGET_CPU_H #define S390X_TARGET_CPU_H -static inline void cpu_clone_regs(CPUS390XState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUS390XState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[15] = newsp; diff --git a/linux-user/sh4/target_cpu.h b/linux-user/sh4/target_cpu.h index b0be9a2c1b..857af43ee3 100644 --- a/linux-user/sh4/target_cpu.h +++ b/linux-user/sh4/target_cpu.h @@ -19,7 +19,8 @@ #ifndef SH4_TARGET_CPU_H #define SH4_TARGET_CPU_H -static inline void cpu_clone_regs(CPUSH4State *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUSH4State *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->gregs[15] = newsp; diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index b30fbc72c4..029b0fc547 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -20,7 +20,8 @@ #ifndef SPARC_TARGET_CPU_H #define SPARC_TARGET_CPU_H -static inline void cpu_clone_regs(CPUSPARCState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUSPARCState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regwptr[22] = newsp; diff --git a/linux-user/tilegx/target_cpu.h b/linux-user/tilegx/target_cpu.h index d1aa5824f2..0523dc414c 100644 --- a/linux-user/tilegx/target_cpu.h +++ b/linux-user/tilegx/target_cpu.h @@ -19,7 +19,8 @@ #ifndef TILEGX_TARGET_CPU_H #define TILEGX_TARGET_CPU_H -static inline void cpu_clone_regs(CPUTLGState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUTLGState *env, target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[TILEGX_R_SP] = newsp; diff --git a/linux-user/xtensa/target_cpu.h b/linux-user/xtensa/target_cpu.h index e31efe3ea0..84f67d469e 100644 --- a/linux-user/xtensa/target_cpu.h +++ b/linux-user/xtensa/target_cpu.h @@ -4,7 +4,9 @@ #ifndef XTENSA_TARGET_CPU_H #define XTENSA_TARGET_CPU_H -static inline void cpu_clone_regs(CPUXtensaState *env, target_ulong newsp) +static inline void cpu_clone_regs_child(CPUXtensaState *env, + target_ulong newsp, + unsigned flags) { if (newsp) { env->regs[1] = newsp; diff --git a/linux-user/syscall.c b/linux-user/syscall.c index f6751eecb7..93749014e4 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -5719,7 +5719,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, /* we create a new CPU instance. */ new_env = cpu_copy(env); /* Init regs that differ from the parent. */ - cpu_clone_regs(new_env, newsp); + cpu_clone_regs_child(new_env, newsp, flags); new_cpu = env_cpu(new_env); new_cpu->opaque = ts; ts->bprm = parent_ts->bprm; @@ -5798,7 +5798,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, ret = fork(); if (ret == 0) { /* Child Process. */ - cpu_clone_regs(env, newsp); + cpu_clone_regs_child(env, newsp, flags); fork_end(1); /* There is a race condition here. The parent process could theoretically read the TID in the child process before the child From patchwork Wed Nov 6 11:33:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 178671 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp480962ilf; Wed, 6 Nov 2019 03:37:57 -0800 (PST) X-Google-Smtp-Source: APXvYqzmFBKzaIfw15MWTGaTV63knns39IUSjX0byLeX1gqsmEn4JAV65PxjfKcl5SYAinlUpGjE X-Received: by 2002:a0c:fdcc:: with SMTP id g12mr1792719qvs.104.1573040277156; Wed, 06 Nov 2019 03:37:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573040277; cv=none; d=google.com; s=arc-20160816; b=dAkBEXyB0BPg6WAmhHAZGvApFO9vw63VcGP4cGFSVvzkv64IZvhxFLf4Lrs2cuIvVM 2fz3WG62Xlu01+bHwHzO09Mx2KjGG16zH8wwU4cvdgAIzcvjoK3pr5C+zZS1LpDTSkoT n4mPY+0Uji8RVyn6f7dDH99Z8lWnIzMrjTlaPGAXbx+lduCAnKK0sXCw3x7RX1zNOv9i oFWxAH+WPM4QiMcD6WT8Keqg50kl4zr51bM4wDtCmdrEXsc4GjnGGvOLdGMY1RQb9lbT RXWPO1LyqCZrIqNarjiuPxJlaP7OKj/Vv7215d4UUpmjU3ociwyfof7Nk9bzhOWA9dyR +TYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=wugc25C0qaoSEGWNFWHf1zt/qP9CJkEKha5hGMZVoIA=; b=xl7JwGOjEfvkRUnMF79+u9o1igs1Q1daoCUWbYhtGWtZewjH3lxAWhjqu+e3JFqTdE G5IP/letVzauqvpdlMYwq+0OkgR6K3Oj68F3uVzKeSAeRdDXUAHXYIVIEh/vQsGhS4KF cZU0UTqwvBjftNVg3GS4O0byrELWGH2Xf2uZITOk8H5+FwsxyYO4fWInJU6TjSK5Vt0y c81HCJjIrfCuWpYUF9R5Jz16VFTzX2S9eusl7lmnsMJd3IAvYjUtxcAbh61MF739/B1r oea+nhzJ3hnfnNBwWoY8nwFy5BlDn1tjDxUmCVzz4jpE4V0Nvi+OdSQRtq7vFsbtFDbv ADtg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YgGJHZVv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id q124sm1776907wme.13.2019.11.06.03.33.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 03:33:42 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 10/12] linux-user: Introduce cpu_clone_regs_parent Date: Wed, 6 Nov 2019 12:33:16 +0100 Message-Id: <20191106113318.10226-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191106113318.10226-1-richard.henderson@linaro.org> References: <20191106113318.10226-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We will need a target-specific hook for adjusting registers in the parent during clone. Add an empty inline function for each target, and invoke it from the proper places. Reviewed-by: Laurent Vivier Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20191025113921.9412-11-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- linux-user/aarch64/target_cpu.h | 4 ++++ linux-user/alpha/target_cpu.h | 4 ++++ linux-user/arm/target_cpu.h | 4 ++++ linux-user/cris/target_cpu.h | 4 ++++ linux-user/hppa/target_cpu.h | 4 ++++ linux-user/i386/target_cpu.h | 4 ++++ linux-user/m68k/target_cpu.h | 4 ++++ linux-user/microblaze/target_cpu.h | 4 ++++ linux-user/mips/target_cpu.h | 4 ++++ linux-user/nios2/target_cpu.h | 4 ++++ linux-user/openrisc/target_cpu.h | 4 ++++ linux-user/ppc/target_cpu.h | 4 ++++ linux-user/riscv/target_cpu.h | 4 ++++ linux-user/s390x/target_cpu.h | 4 ++++ linux-user/sh4/target_cpu.h | 4 ++++ linux-user/sparc/target_cpu.h | 4 ++++ linux-user/tilegx/target_cpu.h | 4 ++++ linux-user/xtensa/target_cpu.h | 4 ++++ linux-user/syscall.c | 2 ++ 19 files changed, 74 insertions(+) -- 2.17.1 diff --git a/linux-user/aarch64/target_cpu.h b/linux-user/aarch64/target_cpu.h index cd012e0dc1..6cc02e7dcd 100644 --- a/linux-user/aarch64/target_cpu.h +++ b/linux-user/aarch64/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUARMState *env, target_ulong newsp, env->xregs[0] = 0; } +static inline void cpu_clone_regs_parent(CPUARMState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls) { /* Note that AArch64 Linux keeps the TLS pointer in TPIDR; this is diff --git a/linux-user/alpha/target_cpu.h b/linux-user/alpha/target_cpu.h index 37ba00cf41..dd25e18f47 100644 --- a/linux-user/alpha/target_cpu.h +++ b/linux-user/alpha/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUAlphaState *env, target_ulong newsp, env->ir[IR_A3] = 0; } +static inline void cpu_clone_regs_parent(CPUAlphaState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls) { env->unique = newtls; diff --git a/linux-user/arm/target_cpu.h b/linux-user/arm/target_cpu.h index 6e2ba8ad4b..2747211b24 100644 --- a/linux-user/arm/target_cpu.h +++ b/linux-user/arm/target_cpu.h @@ -50,6 +50,10 @@ static inline void cpu_clone_regs_child(CPUARMState *env, target_ulong newsp, env->regs[0] = 0; } +static inline void cpu_clone_regs_parent(CPUARMState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls) { if (access_secure_reg(env)) { diff --git a/linux-user/cris/target_cpu.h b/linux-user/cris/target_cpu.h index eacc4d8d13..74ead55c81 100644 --- a/linux-user/cris/target_cpu.h +++ b/linux-user/cris/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUCRISState *env, target_ulong newsp, env->regs[10] = 0; } +static inline void cpu_clone_regs_parent(CPUCRISState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUCRISState *env, target_ulong newtls) { env->pregs[PR_PID] = (env->pregs[PR_PID] & 0xff) | newtls; diff --git a/linux-user/hppa/target_cpu.h b/linux-user/hppa/target_cpu.h index f250770790..71654b3cd4 100644 --- a/linux-user/hppa/target_cpu.h +++ b/linux-user/hppa/target_cpu.h @@ -32,6 +32,10 @@ static inline void cpu_clone_regs_child(CPUHPPAState *env, target_ulong newsp, env->iaoq_b = env->gr[31] + 4; } +static inline void cpu_clone_regs_parent(CPUHPPAState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUHPPAState *env, target_ulong newtls) { env->cr[27] = newtls; diff --git a/linux-user/i386/target_cpu.h b/linux-user/i386/target_cpu.h index 1fadbf57c3..0b44530854 100644 --- a/linux-user/i386/target_cpu.h +++ b/linux-user/i386/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUX86State *env, target_ulong newsp, env->regs[R_EAX] = 0; } +static inline void cpu_clone_regs_parent(CPUX86State *env, unsigned flags) +{ +} + #if defined(TARGET_ABI32) abi_long do_set_thread_area(CPUX86State *env, abi_ulong ptr); diff --git a/linux-user/m68k/target_cpu.h b/linux-user/m68k/target_cpu.h index 57b647bc07..c3f288dfe8 100644 --- a/linux-user/m68k/target_cpu.h +++ b/linux-user/m68k/target_cpu.h @@ -30,6 +30,10 @@ static inline void cpu_clone_regs_child(CPUM68KState *env, target_ulong newsp, env->dregs[0] = 0; } +static inline void cpu_clone_regs_parent(CPUM68KState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUM68KState *env, target_ulong newtls) { CPUState *cs = env_cpu(env); diff --git a/linux-user/microblaze/target_cpu.h b/linux-user/microblaze/target_cpu.h index e9bc0fce65..ce7b22ece7 100644 --- a/linux-user/microblaze/target_cpu.h +++ b/linux-user/microblaze/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUMBState *env, target_ulong newsp, env->regs[3] = 0; } +static inline void cpu_clone_regs_parent(CPUMBState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUMBState *env, target_ulong newtls) { env->regs[21] = newtls; diff --git a/linux-user/mips/target_cpu.h b/linux-user/mips/target_cpu.h index 8601f712e0..758ae4d933 100644 --- a/linux-user/mips/target_cpu.h +++ b/linux-user/mips/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUMIPSState *env, target_ulong newsp, env->active_tc.gpr[2] = 0; } +static inline void cpu_clone_regs_parent(CPUMIPSState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUMIPSState *env, target_ulong newtls) { env->active_tc.CP0_UserLocal = newtls; diff --git a/linux-user/nios2/target_cpu.h b/linux-user/nios2/target_cpu.h index fe5de7a9e3..50f0381067 100644 --- a/linux-user/nios2/target_cpu.h +++ b/linux-user/nios2/target_cpu.h @@ -29,6 +29,10 @@ static inline void cpu_clone_regs_child(CPUNios2State *env, target_ulong newsp, env->regs[R_RET0] = 0; } +static inline void cpu_clone_regs_parent(CPUNios2State *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUNios2State *env, target_ulong newtls) { /* diff --git a/linux-user/openrisc/target_cpu.h b/linux-user/openrisc/target_cpu.h index 309cf3eeb7..74370d67c4 100644 --- a/linux-user/openrisc/target_cpu.h +++ b/linux-user/openrisc/target_cpu.h @@ -30,6 +30,10 @@ static inline void cpu_clone_regs_child(CPUOpenRISCState *env, cpu_set_gpr(env, 11, 0); } +static inline void cpu_clone_regs_parent(CPUOpenRISCState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUOpenRISCState *env, target_ulong newtls) { cpu_set_gpr(env, 10, newtls); diff --git a/linux-user/ppc/target_cpu.h b/linux-user/ppc/target_cpu.h index 028b28312c..76b67d2882 100644 --- a/linux-user/ppc/target_cpu.h +++ b/linux-user/ppc/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUPPCState *env, target_ulong newsp, env->gpr[3] = 0; } +static inline void cpu_clone_regs_parent(CPUPPCState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUPPCState *env, target_ulong newtls) { #if defined(TARGET_PPC64) diff --git a/linux-user/riscv/target_cpu.h b/linux-user/riscv/target_cpu.h index 26dcafab1c..9c642367a3 100644 --- a/linux-user/riscv/target_cpu.h +++ b/linux-user/riscv/target_cpu.h @@ -11,6 +11,10 @@ static inline void cpu_clone_regs_child(CPURISCVState *env, target_ulong newsp, env->gpr[xA0] = 0; } +static inline void cpu_clone_regs_parent(CPURISCVState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPURISCVState *env, target_ulong newtls) { env->gpr[xTP] = newtls; diff --git a/linux-user/s390x/target_cpu.h b/linux-user/s390x/target_cpu.h index 0b19e42f75..7cd71e2dba 100644 --- a/linux-user/s390x/target_cpu.h +++ b/linux-user/s390x/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUS390XState *env, target_ulong newsp, env->regs[2] = 0; } +static inline void cpu_clone_regs_parent(CPUS390XState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUS390XState *env, target_ulong newtls) { env->aregs[0] = newtls >> 32; diff --git a/linux-user/sh4/target_cpu.h b/linux-user/sh4/target_cpu.h index 857af43ee3..5114f19424 100644 --- a/linux-user/sh4/target_cpu.h +++ b/linux-user/sh4/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUSH4State *env, target_ulong newsp, env->gregs[0] = 0; } +static inline void cpu_clone_regs_parent(CPUSH4State *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUSH4State *env, target_ulong newtls) { env->gbr = newtls; diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index 029b0fc547..8ff706adce 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -37,6 +37,10 @@ static inline void cpu_clone_regs_child(CPUSPARCState *env, target_ulong newsp, #endif } +static inline void cpu_clone_regs_parent(CPUSPARCState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUSPARCState *env, target_ulong newtls) { env->gregs[7] = newtls; diff --git a/linux-user/tilegx/target_cpu.h b/linux-user/tilegx/target_cpu.h index 0523dc414c..316b7a639c 100644 --- a/linux-user/tilegx/target_cpu.h +++ b/linux-user/tilegx/target_cpu.h @@ -28,6 +28,10 @@ static inline void cpu_clone_regs_child(CPUTLGState *env, target_ulong newsp, env->regs[TILEGX_R_RE] = 0; } +static inline void cpu_clone_regs_parent(CPUTLGState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUTLGState *env, target_ulong newtls) { env->regs[TILEGX_R_TP] = newtls; diff --git a/linux-user/xtensa/target_cpu.h b/linux-user/xtensa/target_cpu.h index 84f67d469e..0c77bafd66 100644 --- a/linux-user/xtensa/target_cpu.h +++ b/linux-user/xtensa/target_cpu.h @@ -16,6 +16,10 @@ static inline void cpu_clone_regs_child(CPUXtensaState *env, env->regs[2] = 0; } +static inline void cpu_clone_regs_parent(CPUXtensaState *env, unsigned flags) +{ +} + static inline void cpu_set_tls(CPUXtensaState *env, target_ulong newtls) { env->uregs[THREADPTR] = newtls; diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 93749014e4..96cf9deb3d 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -5720,6 +5720,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, new_env = cpu_copy(env); /* Init regs that differ from the parent. */ cpu_clone_regs_child(new_env, newsp, flags); + cpu_clone_regs_parent(env, flags); new_cpu = env_cpu(new_env); new_cpu->opaque = ts; ts->bprm = parent_ts->bprm; @@ -5816,6 +5817,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, if (flags & CLONE_CHILD_CLEARTID) ts->child_tidptr = child_tidptr; } else { + cpu_clone_regs_parent(env, flags); fork_end(0); } } From patchwork Wed Nov 6 11:33:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 178676 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp485608ilf; Wed, 6 Nov 2019 03:42:32 -0800 (PST) X-Google-Smtp-Source: APXvYqyzY7LKusqd12s32XMi+9gy5eAVLiN+SD2Ad4QVYV3Zq+N+ba2YOAXgF2vx6W8KnixO5yEN X-Received: by 2002:a37:7bc7:: with SMTP id w190mr1513496qkc.132.1573040552093; Wed, 06 Nov 2019 03:42:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573040552; cv=none; d=google.com; s=arc-20160816; b=JVC1c0k10nHVNdxe/tWBG3blp8AZ4hcJal3itlhuituSccSmqmGYFceWalodUgyk7E FAYBcSe6XK4xUDUBMt+EaXDRO46B/ZVidJT7LJRvUWKnzmcl0UPOqpMyABHVVZs8wRoU bNXj430oEeXvpxGHv6YsJECTlYT815iVmlHXJitYHQWUlSaX/hp7PrAXH3yJwvOxn6Gn SjRJoCbAlOHaqt8/gCqPHUdls2wNvtGqgBojFjwKWatnHgzDX1OxZa1JLnHwuohrmPW/ SN8Ch9xZIPUj3XHZSboxb0f46PPNnkUwSmjMq8ZvVvCWh4DJYzscjKUQn2bgKNkc8940 srHA== ARC-Message-Signature: i=1; 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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id q124sm1776907wme.13.2019.11.06.03.33.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 03:33:43 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 11/12] linux-user/sparc: Fix cpu_clone_regs_* Date: Wed, 6 Nov 2019 12:33:17 +0100 Message-Id: <20191106113318.10226-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191106113318.10226-1-richard.henderson@linaro.org> References: <20191106113318.10226-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We failed to set the secondary return value in %o1 we failed to advance the PC past the syscall, we failed to adjust regwptr into the new structure, we stored the stack pointer into the wrong register. Signed-off-by: Richard Henderson Message-Id: <20191025113921.9412-12-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- linux-user/sparc/target_cpu.h | 47 ++++++++++++++++++++++++++++------- 1 file changed, 38 insertions(+), 9 deletions(-) -- 2.17.1 diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index 8ff706adce..14b2158969 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -23,22 +23,51 @@ static inline void cpu_clone_regs_child(CPUSPARCState *env, target_ulong newsp, unsigned flags) { - if (newsp) { - env->regwptr[22] = newsp; - } - /* syscall return for clone child: 0, and clear CF since - * this counts as a success return value. + /* + * After cpu_copy, env->regwptr is pointing into the old env. + * Update the new cpu to use its own register window. */ - env->regwptr[0] = 0; -#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) - env->xcc &= ~PSR_CARRY; + env->regwptr = env->regbase + (env->cwp * 16); + + if (newsp) { + /* When changing stacks, do it with clean register windows. */ +#ifdef TARGET_SPARC64 + env->cansave = env->nwindows - 2; + env->cleanwin = env->nwindows - 2; + env->canrestore = 0; #else - env->psr &= ~PSR_CARRY; + env->wim = 1 << env->cwp; #endif + /* ??? The kernel appears to copy one stack frame to the new stack. */ + /* ??? The kernel force aligns the new stack. */ + env->regwptr[WREG_SP] = newsp; + } + + if (flags & CLONE_VM) { + /* + * Syscall return for clone child: %o0 = 0 and clear CF since this + * counts as a success return value. Advance the PC past the syscall. + * For fork child, all of this happens in cpu_loop, and we must not + * do the pc advance twice. + */ + env->regwptr[WREG_O0] = 0; +#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) + env->xcc &= ~PSR_CARRY; +#else + env->psr &= ~PSR_CARRY; +#endif + env->pc = env->npc; + env->npc = env->npc + 4; + } + + /* Set the second return value for the child: %o1 = 1. */ + env->regwptr[WREG_O1] = 1; } static inline void cpu_clone_regs_parent(CPUSPARCState *env, unsigned flags) { + /* Set the second return value for the parent: %o1 = 0. */ + env->regwptr[WREG_O1] = 0; } static inline void cpu_set_tls(CPUSPARCState *env, target_ulong newtls) From patchwork Wed Nov 6 11:33:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 178678 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp487782ilf; Wed, 6 Nov 2019 03:44:53 -0800 (PST) X-Google-Smtp-Source: APXvYqwDJjH1iavBfHWAXPVRmxlEfUHcKcwtWM6IVe5OvmKNFlpX1j+Wh0XbH7STzGHmmAQiv3no X-Received: by 2002:a37:9c8d:: with SMTP id f135mr1551697qke.431.1573040693670; Wed, 06 Nov 2019 03:44:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573040693; cv=none; d=google.com; s=arc-20160816; b=M9XKFshtokpwozSPNYumYIJAVbyf91K1cLkbruYvMfBz/Il7+r0+yjNcc/ZmQgZq+R YvVZIlqfiIMfXxzqZPcgZP+deYJzZdihb16PhrJO0A9Qkx8lGyaeJLs+3ijmnzu/Hkg9 IrJUdBeWi6Cbj831Sp7O2FZHka1HTbJhCMIzmQJ+JURedvgiM7Y96JC7RwHw3yDKuLtg mfxzb9WaviNS00gTZrTBKahOI7wPP3Y+ChSHydMC3tEQ+5JK0HvY8QU8LkYMgc1OAoDd LcEWAv+nj6WU++pJcUnYqi/SNTqOmi/0MLHV+jPM76M5ctTmIGKl7o58PlROuicCsv3n 8C9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=YkY1QSHXx8tcEh42Bbj6ykJYD8SvmEqcbVRa0x3ucZs=; b=foo/uwrIUsHrDXimhNMPgN2ypL9otvmYlWJuqPv2RFwEso5LP0vRrxoGzRTEu7m9Sb cUY1pkSPoGlG8V0t8sPSlg+0KZ82ORquZuUiKKSP0ZytOUoKPpBUYjHj7dik7fyN61qS kHCXCm7KpXrxq5DCzHlaworGJqhtKI3OC71i2zDWon9LwqceU6hK9Mbp235nynTNYY7P 3uTK0cbT+lh8S8jsLiUYUQo3XmpYCyxoet5oEsKaXNkE5DPM0VGirDhwd74Vj+atdTYV VjXSvoSgI9EQt4fBoiDRkWHlSkIB38NmTLhF1MxkDYvQesJUpqfDC9dmSPTQ6bXTSmYr UNDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RRii2qO0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id q124sm1776907wme.13.2019.11.06.03.33.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 03:33:45 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 12/12] linux-user/alpha: Set r20 secondary return value Date: Wed, 6 Nov 2019 12:33:18 +0100 Message-Id: <20191106113318.10226-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191106113318.10226-1-richard.henderson@linaro.org> References: <20191106113318.10226-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This value is not, as far as I know, used by any linux software, but it is set by the kernel and is part of the ABI. Signed-off-by: Richard Henderson Reviewed-by: Laurent Vivier Message-Id: <20191025113921.9412-13-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- linux-user/alpha/target_cpu.h | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.17.1 diff --git a/linux-user/alpha/target_cpu.h b/linux-user/alpha/target_cpu.h index dd25e18f47..ad408ab5cc 100644 --- a/linux-user/alpha/target_cpu.h +++ b/linux-user/alpha/target_cpu.h @@ -27,10 +27,19 @@ static inline void cpu_clone_regs_child(CPUAlphaState *env, target_ulong newsp, } env->ir[IR_V0] = 0; env->ir[IR_A3] = 0; + env->ir[IR_A4] = 1; /* OSF/1 secondary return: child */ } static inline void cpu_clone_regs_parent(CPUAlphaState *env, unsigned flags) { + /* + * OSF/1 secondary return: parent + * Note that the kernel does not do this if SETTLS, because the + * settls argument register is still live after copy_thread. + */ + if (!(flags & CLONE_SETTLS)) { + env->ir[IR_A4] = 0; + } } static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls)