From patchwork Wed Jul 31 06:18:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 815737 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E761C1BC40; Wed, 31 Jul 2024 06:19:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406769; cv=none; b=V4nFLRNalT0lzezJZB6jl9oIGeEG3W3gimSbPJ1UqRnGC/k2cX6ufkKxMqgis+wFCNrXPNEaK7gQ6iLv/kvjiYdvH5TrBDvglZVWHgNgML/m4vTPKIrU7ajCgmzu7/8SJCyF8j54OsPXq/7lSgFG+q8i035b9z5XoSi4fxOK8NI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406769; c=relaxed/simple; bh=t36M0udt84hJG27Dr4kbey2RuokqPh+8U3ziWCs6GX4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pkCbB01vx+ldJXTq5/RxdSa0MH/u5yOwmJ9vbFE1rQgtDNMFA34bUpSxlonNO1Bt9yKyNUNkPntKWuRO2v++EE+hXGCSpntt22aUdMHBAtZzMXihWzprh58+tA3MqmT9s5C51P7IQfjCydGmrhe14a4HHE/VaofcpV2NMFHudT0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=W4ZsW6sM; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="W4ZsW6sM" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WYhl32bvqz9wV5; Wed, 31 Jul 2024 06:19:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1722406767; bh=t36M0udt84hJG27Dr4kbey2RuokqPh+8U3ziWCs6GX4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=W4ZsW6sMHHPodSXdEaI4jKVtPlWNSCOgLYXWtd98HX+aDNbbxSxahJhIEMxg0QAcG 72kZIYnbPvyotuHBplig4GwXa/08PbBuvapD/vFMq2kz76OfDBuicF6JVVk087D/45 2MSE6DEsQFUavAgOCpbpGpQT+LX9979TiLbYmTFM= X-Riseup-User-ID: 5DEFD3C17A15E45ECEE23306503223ADD9ABCCBFF8AB1C812313B3984F7BE8FD Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WYhl03q2NzJmtl; Wed, 31 Jul 2024 06:19:24 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:43 +0700 Subject: [PATCH v3 02/11] arm64: dts: qcom: sm6115-pro1x: Add PCA9534 IO Expander Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-2-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh F(x)tec Pro1X comes with PCA9534 IO Expander, it is used for enabling touch screen VDD/VDDIO and keyboard's caps lock LED. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 70f479a63f2e..47e446249af6 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -70,6 +70,23 @@ &dispcc { status = "disabled"; }; +&gpi_dma0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + /* Clock frequency was not specified downstream, let's park it to 100 KHz */ + clock-frequency = <100000>; + + pca9534: gpio@21 { + compatible = "nxp,pca9534"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + &pm6125_gpios { vol_up_n: vol-up-n-state { pins = "gpio5"; @@ -89,6 +106,10 @@ &pon_resin { status = "okay"; }; +&qupv3_id_0 { + status = "okay"; +}; + &rpm_requests { regulators-0 { compatible = "qcom,rpm-pm6125-regulators"; From patchwork Wed Jul 31 06:18:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 815736 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F1FC616D4D4; Wed, 31 Jul 2024 06:19:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406775; cv=none; b=DzLI1QMLl8IBHt/iYbB3APRHb3i123Wfp2yiYRn5rOhSrla/i0XgKEWpbPSK5G5GXkyk66A2UAhzilsvtpXV68JWey3Z30aOLpQunU102vTv+0UhO7QRMyP6F/blYPsUl+CRcRdfVMzeYSUIlwSMaS9us9u/9dONwyHmgE/7t8s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406775; c=relaxed/simple; bh=7YtyQR8yC0fz5Hjym/zGWiNBusQ2Pk+Ol8WX+VobTUY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=cdlVDx7TNy9G9tbbm62xnK/yxJk6cnlIfi2vnUrh9DG3E1yNIZhJTxPEHvX6K8YkskCKKkWvoiZ2MhmsbS0O4WkLkPr4PrXjCyB8et+Qy2J0kG77awo5ONUZeEX2EuhBEXjcodPhBO8d783dhKW2GkhMrpq4vy1g0KFjguNR/5A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=nbTrCAb4; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="nbTrCAb4" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WYhl91x3Lz9wV5; Wed, 31 Jul 2024 06:19:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1722406773; bh=7YtyQR8yC0fz5Hjym/zGWiNBusQ2Pk+Ol8WX+VobTUY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=nbTrCAb4g081NoT2IEJACh8sHBaqL6W7IfkAIWmVxbn44Eex5kX8vgG1lyObd7u9w RkHI+klaYgCc9DoNliDBiRf5vkqLS1Cm2Pllh4o9X0TOUoNBapqDaIvQH49R4e2Nal 4Wr2X2TdjXH+CI3L2/mejrLBhgBwd1fffmFxr8lg= X-Riseup-User-ID: 11683E3B3487C097651A2BC1E80AD1284A39917B1701FD8B09C82E32EDF975C5 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WYhl63kB1zJmtl; Wed, 31 Jul 2024 06:19:30 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:45 +0700 Subject: [PATCH v3 04/11] arm64: dts: qcom: sm6115-pro1x: Add Caps Lock LED Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-4-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh The Pro1X has a caps lock LED on the keyboard. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 813cd22907c8..b45ae3402741 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -8,6 +8,7 @@ #include "sm6115.dtsi" #include "pm6125.dtsi" #include +#include / { model = "F(x)tec Pro1X (QX1050)"; @@ -64,6 +65,19 @@ key-volume-up { }; }; + gpio-leds { + compatible = "gpio-leds"; + + capslock-led { + label = "green:capslock"; + function = LED_FUNCTION_CAPSLOCK; + color = ; + gpios = <&pca9534 1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "kbd-capslock"; + default-state = "off"; + }; + }; + ts_vdd_supply: ts-vdd-supply { compatible = "regulator-fixed"; regulator-name = "ts_vdd_supply"; From patchwork Wed Jul 31 06:18:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 815735 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E079416A94A; Wed, 31 Jul 2024 06:19:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406781; cv=none; b=HJ1cuYrO335+XrmJDLxzrAJfpPs7j+2N7f+5lWOxvTiE6Nyjd7UbaerzuLlRFN6LB9MR9or7CZQGPe2q4VHukYtC2iRH+2Te+mIrDaLBrb1DXAeBpB20OTmBR1mqu7YhBRVssGr/Lx5eMEGU/bSBrGZnfhaMtWlcuoCLtoo0Ei4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406781; c=relaxed/simple; bh=WNvPdgZ1+ApClON4sY9NXXmesMLCtDJAey8+OGBZ5nE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=n7rzYGiBh/3ujqNUUOoBNCzTbduy9R9NQVBNW+VhnOoNQRRcslLGC4u0j76xNlc95lAvB7f8Ff4XjJlDCIGkkHoGoxIU4t31MNVZv8d18Keo/n5T38MIyeeFqhQAzeLtIYtXAureMb4kPI+ca5WK6+z8EWfL2guJUOdH0+LwEUQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=sOmBICBv; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="sOmBICBv" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WYhlH2FgTz9thY; Wed, 31 Jul 2024 06:19:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1722406779; bh=WNvPdgZ1+ApClON4sY9NXXmesMLCtDJAey8+OGBZ5nE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=sOmBICBvHq8jKxplOD4nr+bOsHRg1F4GHWnDJUmTKDzVJLTZSgKevnBgj7/YbGHAV lFcLzDh9ClyjmKdgixZv0k60YlrNgFyUtygloFxbmyP1dJTuvVoLd+FC5havpiVYSJ TbYl5w4cD9O8FfVFYNqgZEFA7vpdKr8O1C0kBiq0= X-Riseup-User-ID: B18A1D924C664FD30C65C4F28A5A2B6F1733CFC7BBAFBBEBF9C0A5646CB74593 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WYhlD3jC5zJt03; Wed, 31 Jul 2024 06:19:36 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:47 +0700 Subject: [PATCH v3 06/11] arm64: dts: qcom: sm6115-pro1x: Enable MDSS and GPU Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-6-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh Fxtec Pro1x uses the same display (BOE BF060Y8M-AJ0) as Pro1. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 84 +++++++++++++++++++++++-- 1 file changed, 80 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 67946d099976..0301f04041e7 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -33,6 +33,26 @@ framebuffer0: framebuffer@5c000000 { }; }; + disp_elvdd_supply: disp-elvdd-supply { + compatible = "regulator-fixed"; + regulator-name = "disp_elvdd_supply"; + }; + + disp_elvss_supply: disp-elvss-supply { + compatible = "regulator-fixed"; + regulator-name = "disp_elvss_supply"; + }; + + disp_vcc_supply: disp-vcc-supply { + compatible = "regulator-fixed"; + regulator-name = "disp_vcc_supply"; + }; + + disp_vci_supply: disp-vci-supply { + compatible = "regulator-fixed"; + regulator-name = "disp_vci_supply"; + }; + gpio-keys { compatible = "gpio-keys"; @@ -93,13 +113,16 @@ ts_vddio_supply: ts-vddio-supply { }; }; -&dispcc { - /* HACK: disable until a panel driver is ready to retain simplefb */ - status = "disabled"; +&gpi_dma0 { + status = "okay"; }; -&gpi_dma0 { +&gpu { status = "okay"; + + zap-shader { + firmware-name = "qcom/sm6115/Fxtec/QX1050/a610_zap.mbn"; + }; }; &i2c1 { @@ -136,6 +159,46 @@ touchscreen@14 { }; }; +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + vdda-supply = <&pm6125_l18a>; + status = "okay"; + + panel: panel@0 { + compatible = "boe,bf060y8m-aj0"; + reg = <0>; + + reset-gpios = <&tlmm 82 GPIO_ACTIVE_LOW>; + + elvdd-supply = <&disp_elvdd_supply>; + elvss-supply = <&disp_elvss_supply>; + vcc-supply = <&disp_vcc_supply>; + vci-supply = <&disp_vci_supply>; + vddio-supply = <&pm6125_l9a>; + + pinctrl-0 = <&mdss_dsi_n &panel_en_n>; + pinctrl-names = "default"; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <&panel_in>; +}; + +&mdss_dsi0_phy { + status = "okay"; +}; + &pm6125_gpios { vol_up_n: vol-up-n-state { pins = "gpio5"; @@ -338,6 +401,12 @@ key_camera_n: key-camera-n-state { bias-pull-up; }; + panel_en_n: panel-en-n-state { + pins = "gpio65"; + function = "gpio"; + bias-disable; + }; + ts_rst_n: ts-rst-n-state { pins = "gpio71"; function = "gpio"; @@ -352,6 +421,13 @@ ts_int_n: ts-int-n-state { bias-pull-up; }; + mdss_dsi_n: mdss-dsi-n-state { + pins = "gpio82"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + hall_sensor_n: hall-sensor-n-state { pins = "gpio96"; function = "gpio"; From patchwork Wed Jul 31 06:18:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 815734 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8CB6416DC1D; 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Wed, 31 Jul 2024 06:19:42 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:49 +0700 Subject: [PATCH v3 08/11] arm64: dts: qcom: sm6115-pro1x: Add PMI632 Type-C property Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-8-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh The USB-C port is used for powering external devices and transfer data from/to them. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 51 +++++++++++++++++++++++-- 1 file changed, 48 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index d28b870320c9..be77a8318800 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -7,8 +7,10 @@ #include "sm6115.dtsi" #include "pm6125.dtsi" +#include "pmi632.dtsi" #include #include +#include / { model = "F(x)tec Pro1X (QX1050)"; @@ -209,6 +211,46 @@ vol_up_n: vol-up-n-state { }; }; +&pmi632_typec { + status = "okay"; + + connector { + compatible = "usb-c-connector"; + + power-role = "dual"; + data-role = "dual"; + self-powered; + + typec-power-opmode = "default"; + pd-disable; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + pmi632_hs_in: endpoint { + remote-endpoint = <&usb_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + pmi632_ss_in: endpoint { + remote-endpoint = <&usb_qmpphy_out>; + }; + }; + }; + }; +}; + +&pmi632_vbus { + regulator-min-microamp = <500000>; + regulator-max-microamp = <1000000>; + status = "okay"; +}; + &pon_pwrkey { status = "okay"; }; @@ -455,9 +497,8 @@ &usb { status = "okay"; }; -&usb_dwc3 { - /delete-property/ usb-role-switch; - dr_mode = "peripheral"; +&usb_dwc3_hs { + remote-endpoint = <&pmi632_hs_in>; }; &usb_hsphy { @@ -473,6 +514,10 @@ &usb_qmpphy { status = "okay"; }; +&usb_qmpphy_out { + remote-endpoint = <&pmi632_ss_in>; +}; + &xo_board { clock-frequency = <19200000>; }; From patchwork Wed Jul 31 06:18:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 815733 Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BBD516DED4; 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Wed, 31 Jul 2024 06:19:48 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:51 +0700 Subject: [PATCH v3 10/11] arm64: dts: qcom: sm6115-pro1x: Enable remoteprocs Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-10-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh Enable [A,C]DSP and MPSS remote processor on this device. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 34834a3929b1..d3782b2a7831 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -291,6 +291,21 @@ &qupv3_id_0 { status = "okay"; }; +&remoteproc_adsp { + firmware-name = "qcom/sm6115/Fxtec/QX1050/adsp.mbn"; + status = "okay"; +}; + +&remoteproc_cdsp { + firmware-name = "qcom/sm6115/Fxtec/QX1050/cdsp.mbn"; + status = "okay"; +}; + +&remoteproc_mpss { + firmware-name = "qcom/sm6115/Fxtec/QX1050/modem.mbn"; + status = "okay"; +}; + &rpm_requests { regulators-0 { compatible = "qcom,rpm-pm6125-regulators";