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Tue, 30 Jul 2024 22:24:42 +0000 Received: from NALASPPMTA04.qualcomm.com (NALASPPMTA04.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 46UMKxoZ029327; Tue, 30 Jul 2024 22:24:42 GMT Received: from hu-devc-lv-u18-c.qualcomm.com (hu-eserrao-lv.qualcomm.com [10.47.235.27]) by NALASPPMTA04.qualcomm.com (PPS) with ESMTP id 46UMOf6m003283; Tue, 30 Jul 2024 22:24:42 +0000 Received: by hu-devc-lv-u18-c.qualcomm.com (Postfix, from userid 464172) id AC75750018E; Tue, 30 Jul 2024 15:24:41 -0700 (PDT) From: Elson Roy Serrao To: andersson@kernel.org, konrad.dybcio@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, gregkh@linuxfoundation.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Elson Roy Serrao Subject: [PATCH 2/8] dt-bindings: soc: qcom: eud: Add usb role switch property Date: Tue, 30 Jul 2024 15:24:33 -0700 Message-Id: <20240730222439.3469-3-quic_eserrao@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240730222439.3469-1-quic_eserrao@quicinc.com> References: <20240730222439.3469-1-quic_eserrao@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 7j6_I92iAjPZovQmsHAq9SNpnP7zWl8p X-Proofpoint-GUID: 7j6_I92iAjPZovQmsHAq9SNpnP7zWl8p X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-30_18,2024-07-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 impostorscore=0 mlxlogscore=961 bulkscore=0 malwarescore=0 phishscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 spamscore=0 adultscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407300155 Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: EUD hub is physically present in between the USB connector and the USB controller. So the role switch notifications originating from the connector should route through EUD. Hence to interpret the usb role assigned by the connector, role switch property is needed. Signed-off-by: Elson Roy Serrao --- Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml index fca5b608ec63..0fa4608568d0 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml @@ -37,6 +37,10 @@ properties: items: - const: usb2-phy + usb-role-switch: + $ref: /schemas/types.yaml#/definitions/flag + description: Support role switch. + ports: $ref: /schemas/graph.yaml#/properties/ports description: From patchwork Tue Jul 30 22:24:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elson Roy Serrao X-Patchwork-Id: 815610 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E3901917C0; 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Signed-off-by: Elson Roy Serrao --- Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml index 0fa4608568d0..d7a913bd5edb 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml @@ -18,6 +18,7 @@ properties: items: - enum: - qcom,sc7280-eud + - qcom,sm8450-eud - const: qcom,eud reg: From patchwork Tue Jul 30 22:24:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elson Roy Serrao X-Patchwork-Id: 815611 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 95C8D191484; Tue, 30 Jul 2024 22:24:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Signed-off-by: Elson Roy Serrao --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 29 ++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 9bafb3b350ff..bcdf61223ff3 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -4693,6 +4693,35 @@ }; }; + eud: eud@88e0000 { + compatible = "qcom,sm8450-eud", "qcom,eud"; + reg = <0 0x88e0000 0 0x2000>, + <0 0x88e2000 0 0x1000>; + interrupts-extended = <&pdc 11 IRQ_TYPE_LEVEL_HIGH>; + + phys = <&usb_1_hsphy>; + phy-names = "usb2-phy"; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + eud_ep: endpoint { + }; + }; + + port@1 { + reg = <1>; + eud_con: endpoint { + }; + }; + }; + }; + nsp_noc: interconnect@320c0000 { compatible = "qcom,sm8450-nsp-noc"; reg = <0 0x320c0000 0 0x10000>; From patchwork Tue Jul 30 22:24:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elson Roy Serrao X-Patchwork-Id: 815609 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C09919149E; 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Signed-off-by: Elson Roy Serrao --- arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts index a754b8fe9167..21a63ad81aac 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts @@ -111,7 +111,7 @@ reg = <0>; pmic_glink_hs_in: endpoint { - remote-endpoint = <&usb_1_dwc3_hs>; + remote-endpoint = <&eud_con>; }; }; @@ -1102,9 +1102,22 @@ }; &usb_1_dwc3_hs { + remote-endpoint = <&eud_ep>; +}; + +&eud { + status = "okay"; + usb-role-switch; +}; + +&eud_con { remote-endpoint = <&pmic_glink_hs_in>; }; +&eud_ep { + remote-endpoint = <&usb_1_dwc3_hs>; +}; + &usb_1_hsphy { status = "okay"; From patchwork Tue Jul 30 22:24:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elson Roy Serrao X-Patchwork-Id: 815613 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D38FA190070; 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Tue, 30 Jul 2024 22:24:43 +0000 (GMT) Received: from pps.filterd (NALASPPMTA03.qualcomm.com [127.0.0.1]) by NALASPPMTA03.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTP id 46UMOg3g025870; Tue, 30 Jul 2024 22:24:42 GMT Received: from pps.reinject (localhost [127.0.0.1]) by NALASPPMTA03.qualcomm.com (PPS) with ESMTPS id 40pghqm6yt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Tue, 30 Jul 2024 22:24:42 +0000 Received: from NALASPPMTA03.qualcomm.com (NALASPPMTA03.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 46UMOgMH025850; Tue, 30 Jul 2024 22:24:42 GMT Received: from hu-devc-lv-u18-c.qualcomm.com (hu-eserrao-lv.qualcomm.com [10.47.235.27]) by NALASPPMTA03.qualcomm.com (PPS) with ESMTP id 46UMOgeQ025847; Tue, 30 Jul 2024 22:24:42 +0000 Received: by hu-devc-lv-u18-c.qualcomm.com (Postfix, from userid 464172) id B7BD9500198; Tue, 30 Jul 2024 15:24:41 -0700 (PDT) From: Elson Roy Serrao To: andersson@kernel.org, konrad.dybcio@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, gregkh@linuxfoundation.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Elson Roy Serrao Subject: [PATCH 6/8] usb: misc: eud: Add High-Speed Phy control for EUD operations Date: Tue, 30 Jul 2024 15:24:37 -0700 Message-Id: <20240730222439.3469-7-quic_eserrao@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240730222439.3469-1-quic_eserrao@quicinc.com> References: <20240730222439.3469-1-quic_eserrao@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Z45UKuvCHbIpVLggytp-x-SX_p8_Vahy X-Proofpoint-ORIG-GUID: Z45UKuvCHbIpVLggytp-x-SX_p8_Vahy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-30_18,2024-07-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 lowpriorityscore=0 mlxlogscore=999 priorityscore=1501 clxscore=1015 spamscore=0 mlxscore=0 bulkscore=0 suspectscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407300154 Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: The Embedded USB Debugger(EUD) is a HS-USB on-chip hub to support the debug and trace capabilities on Qualcomm devices. It is physically present in between the usb connector and the usb controller. Being a HS USB hub, it relies on HS Phy for its functionality. Add HS phy support in the eud driver and control the phy during eud enable/disable operations. Signed-off-by: Elson Roy Serrao --- drivers/usb/misc/qcom_eud.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/usb/misc/qcom_eud.c b/drivers/usb/misc/qcom_eud.c index 26e9b8749d8a..3de7d465912c 100644 --- a/drivers/usb/misc/qcom_eud.c +++ b/drivers/usb/misc/qcom_eud.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -33,6 +34,7 @@ struct eud_chip { struct device *dev; struct usb_role_switch *role_sw; + struct phy *usb2_phy; void __iomem *base; void __iomem *mode_mgr; unsigned int int_status; @@ -41,8 +43,35 @@ struct eud_chip { bool usb_attached; }; +static int eud_phy_enable(struct eud_chip *chip) +{ + int ret; + + ret = phy_init(chip->usb2_phy); + if (ret) + return ret; + + ret = phy_power_on(chip->usb2_phy); + if (ret) + phy_exit(chip->usb2_phy); + + return ret; +} + +static void eud_phy_disable(struct eud_chip *chip) +{ + phy_power_off(chip->usb2_phy); + phy_exit(chip->usb2_phy); +} + static int enable_eud(struct eud_chip *priv) { + int ret; + + ret = eud_phy_enable(priv); + if (ret) + return ret; + writel(EUD_ENABLE, priv->base + EUD_REG_CSR_EUD_EN); writel(EUD_INT_VBUS | EUD_INT_SAFE_MODE, priv->base + EUD_REG_INT1_EN_MASK); @@ -55,6 +84,7 @@ static void disable_eud(struct eud_chip *priv) { writel(0, priv->base + EUD_REG_CSR_EUD_EN); writel(0, priv->mode_mgr + EUD_REG_EUD_EN2); + eud_phy_disable(priv); } static ssize_t enable_show(struct device *dev, @@ -186,6 +216,11 @@ static int eud_probe(struct platform_device *pdev) chip->dev = &pdev->dev; + chip->usb2_phy = devm_phy_get(chip->dev, "usb2-phy"); + if (IS_ERR(chip->usb2_phy)) + return dev_err_probe(chip->dev, PTR_ERR(chip->usb2_phy), + "no usb2 phy configured\n"); + chip->role_sw = usb_role_switch_get(&pdev->dev); if (IS_ERR(chip->role_sw)) return dev_err_probe(chip->dev, PTR_ERR(chip->role_sw),