From patchwork Fri Jul 19 12:08:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mateusz Majewski X-Patchwork-Id: 813600 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B7CAA74079 for ; Fri, 19 Jul 2024 12:09:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.118.77.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721390995; cv=none; b=WAiEjmglNu35PxPm8vrGqjWuqTTZ2cdOIUx3KFIBMBtlxd/B8CJaXNh2ciDtrt8uhZIBD4yWD3+pGCzK4WnARfZJIBZX+DYI0Ag7+gfpCRTSMUGWlYn/S/tVVOYABBPVZo4EO5MZQ/aLuhiNZCu9XHDwEkqa+U33e/FytiLE80A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721390995; c=relaxed/simple; bh=t/JSKrNn17xxIU0XVqXg8T1CfhnUWQvG/4vnPaJ/u6E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:MIME-Version: Content-Type:References; b=Qy6tpKRMeHCzM3dAl0lqUH7PDC6Ck6Fw2X//PUjh1HwQQimmQ1ixt9OdaBXxD1eXA/6ogc1OEKCGdoG2xVwruUeAFO8mWnxD2Tz2d6cQALYR4d7vQ6f9NaEnLGiKq1mr8+yiN5JZugOv33JG54kiC5JHRYXFPXhze+1v8WxLCrk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=Cd5m33Ur; arc=none smtp.client-ip=210.118.77.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="Cd5m33Ur" Received: from eucas1p2.samsung.com (unknown [182.198.249.207]) by mailout1.w1.samsung.com (KnoxPortal) with ESMTP id 20240719120945euoutp0132eed8e0eb7f5ad06e579637b58a8618~jm-s6TZLQ1022610226euoutp01b for ; Fri, 19 Jul 2024 12:09:45 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.w1.samsung.com 20240719120945euoutp0132eed8e0eb7f5ad06e579637b58a8618~jm-s6TZLQ1022610226euoutp01b DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1721390985; bh=Svgmx1goIwZYGZC88T6ddmseZZap5QnMpm/fEQm2mU0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Cd5m33UrTllO1IykgZrSf8z/PNuN3Mdj2zxyr+x2JZ6BbDCQQbvcnTk0w2usn0Y/7 mkJLWtJ40R+ObNoRBAlaUe0dwqNnvO1n0J2CgDVjEX8H2CacoXif5fvi46NT1j5GIx nJCP92Ir3LhXdV6V5oJmZy8V96qM/HH9qwVW7SVk= Received: from eusmges2new.samsung.com (unknown [203.254.199.244]) by eucas1p1.samsung.com (KnoxPortal) with ESMTP id 20240719120945eucas1p18a7f1898ccd162a60573634690512da1~jm-sj5mT62653726537eucas1p1v; Fri, 19 Jul 2024 12:09:45 +0000 (GMT) Received: from eucas1p1.samsung.com ( [182.198.249.206]) by eusmges2new.samsung.com (EUCPMTA) with SMTP id 1C.8A.09875.9875A966; Fri, 19 Jul 2024 13:09:45 +0100 (BST) Received: from eusmtrp1.samsung.com (unknown [182.198.249.138]) by eucas1p2.samsung.com (KnoxPortal) with ESMTPA id 20240719120945eucas1p2aa5e35f78daa7ec1ea07f512180db468~jm-sGu_fh2595125951eucas1p2d; Fri, 19 Jul 2024 12:09:45 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp1.samsung.com (KnoxPortal) with ESMTP id 20240719120945eusmtrp13e13d84c71a9fa89688122967f81d207~jm-sFw1W60596405964eusmtrp1T; Fri, 19 Jul 2024 12:09:45 +0000 (GMT) X-AuditID: cbfec7f4-11bff70000002693-c0-669a578993b4 Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 62.EF.09010.8875A966; Fri, 19 Jul 2024 13:09:44 +0100 (BST) Received: from AMDC4515.eu.corp.samsungelectronics.net (unknown [106.120.51.28]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20240719120944eusmtip10862f3e2f568be4fee49910d243a5f0d~jm-rVInij1193511935eusmtip1S; Fri, 19 Jul 2024 12:09:44 +0000 (GMT) From: Mateusz Majewski To: linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mateusz Majewski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar Subject: [PATCH 1/6] drivers/thermal/exynos: use DEFINE_SIMPLE_DEV_PM_OPS Date: Fri, 19 Jul 2024 14:08:45 +0200 Message-ID: <20240719120853.1924771-2-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240719120853.1924771-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrKKsWRmVeSWpSXmKPExsWy7djPc7qd4bPSDLrmils8mLeNzeL7lutM Fmv2nmOymPdZ1mL+kXOsFufPb2C32PT4GqvF5V1z2Cw+9x5htJhxfh+TxcKmFnaLiccmM1vM /TKV2eL/nh3sFk8e9rE58HusmbeG0WPnrLvsHov3vGTy2LSqk83jzrU9bB6bl9R79G1Zxejx eZNcAEcUl01Kak5mWWqRvl0CV8a111+YCrawVfTsvsDWwHiEtYuRk0NCwETiytm77F2MXBxC AisYJS6e6GOEcL4wShx72cgM4XxmlNjS18AI07JywUSoluWMEq/OdEBVtTJJnF/+mQ2kik3A QOLBm2VgVSICixklGn+8YwVxmAUmMUscXLMQbL2wgKfEu+UX2UFsFgFViWcX9rOA2LwCdhJz 9jQzQ+yTl+jd38cEYnMK2Ev8bnrLBlEjKHFy5hOwemagmuats8HOkBBo55R48uw50LEcQI6L xJGdYRBzhCVeHd/CDmHLSJye3MMCYedLzNj8ngWivELi7kEvCNNa4uMZZhCTWUBTYv0ufYhi R4nFu6YyQVTwSdx4Kwixn09i0rbpzBBhXomONiGIalWJ43smQb0hLfGk5TYThO0hseref/YJ jIqzkHwyC8knsxD2LmBkXsUonlpanJueWmyUl1quV5yYW1yal66XnJ+7iRGY0k7/O/5lB+Py Vx/1DjEycTAeYpTgYFYS4fX7NjNNiDclsbIqtSg/vqg0J7X4EKM0B4uSOK9qinyqkEB6Yklq dmpqQWoRTJaJg1OqganlydTl3QUL4ty1XnbOOufHVLZ+rbVT6al49Q1tO913hQSXaz9PnL5N 9ixLS2nG8Rv77F2FA1ja67jVbpl9rFJ/IKgqrq18fYmOpvIpt8xglSUrHYQ1vj3sjHme9epk 7ffF7npZTJ06lRt9nnI+eLzhk7Wh4n3e3KVMV59WyS449vu5sXnW6r73Wr2LLRYr+GwvnrFo 5okoG5n1E2oWTUuKTcuJbq7bzHy2OuqIndBuW3vGn09/sn9e+2niugmb5p/mvvLT3ue54kxl h5ytX1eyfTncWm3w0jJU821NsF97peIvM9vNSU82WG742zZvZa8N3409l45s4Ra9GPjlX31g zbzET48fcNYf2M+35pISS3FGoqEWc1FxIgCUFNFg2AMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrGIsWRmVeSWpSXmKPExsVy+t/xu7od4bPSDDautLZ4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi4VNLewWE49NZraY +2Uqs8X/PTvYLZ487GNz4PdYM28No8fOWXfZPRbvecnksWlVJ5vHnWt72Dw2L6n36NuyitHj 8ya5AI4oPZui/NKSVIWM/OISW6VoQwsjPUNLCz0jE0s9Q2PzWCsjUyV9O5uU1JzMstQifbsE vYxrr78wFWxhq+jZfYGtgfEIaxcjJ4eEgInEygUT2bsYuTiEBJYySky+PpERIiEtcfjLFHYI W1jiz7UuNoiiZiaJ9S3LwbrZBAwkHrxZBlYkIrCcUWJzuwdIEbPALGaJ3lNTwSYJC3hKvFt+ EayIRUBV4tmF/SwgNq+AncScPc3MEBvkJXr39zGB2JwC9hK/m96ygdhCQDU7P85jg6gXlDg5 8wlYLzNQffPW2cwTGAVmIUnNQpJawMi0ilEktbQ4Nz232EivODG3uDQvXS85P3cTIzACtx37 uWUH48pXH/UOMTJxMB5ilOBgVhLh9fs2M02INyWxsiq1KD++qDQntfgQoynQ3ROZpUST84Ep IK8k3tDMwNTQxMzSwNTSzFhJnNezoCNRSCA9sSQ1OzW1ILUIpo+Jg1OqgamuxbGwZ5uXEEvb /zX5ly6HNp7g+9G5fymr6WmzfF2XvJWKDk3Np14w7G1QYlsdJx846XzKT9eXZ2cYp81eklW3 UK+Z8RZrG+9nh09dUalXLL+faPRmTdwq9DS0dPpX0xeT5medze497mrjclzizN++x6L8CQd9 DO2sCte8X3ycq1D7/db1P6znTXCbacv6OFKSqTlm8y7tw6Hn83Rr3hs9qU81mGuZcHLXOv3c mmvZU15f29x6qXhW51ZnG5c4+/d3o3euCqnadlJDsWLZtND1Ph985Nv7zdqvHP7+Y6bGf8bk /XvONvgWO6yWmTHxDFudRuG5QyX87gHfP240azNNKbZNmXBV8aN0smBeoxJLcUaioRZzUXEi ADXuk2lJAwAA X-CMS-MailID: 20240719120945eucas1p2aa5e35f78daa7ec1ea07f512180db468 X-Msg-Generator: CA X-RootMTR: 20240719120945eucas1p2aa5e35f78daa7ec1ea07f512180db468 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240719120945eucas1p2aa5e35f78daa7ec1ea07f512180db468 References: <20240719120853.1924771-1-m.majewski2@samsung.com> SIMPLE_DEV_PM_OPS is deprecated, as noted next to its definition. Signed-off-by: Mateusz Majewski Reviewed-by: Sam Protsenko --- drivers/thermal/samsung/exynos_tmu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 96cffb2c44ba..9b7ca93a72f1 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -1150,8 +1150,8 @@ static int exynos_tmu_resume(struct device *dev) return 0; } -static SIMPLE_DEV_PM_OPS(exynos_tmu_pm, - exynos_tmu_suspend, exynos_tmu_resume); +static DEFINE_SIMPLE_DEV_PM_OPS(exynos_tmu_pm, + exynos_tmu_suspend, exynos_tmu_resume); #define EXYNOS_TMU_PM (&exynos_tmu_pm) #else #define EXYNOS_TMU_PM NULL From patchwork Fri Jul 19 12:08:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mateusz Majewski X-Patchwork-Id: 813524 Received: from mailout2.w1.samsung.com (mailout2.w1.samsung.com [210.118.77.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5907912BF23 for ; Fri, 19 Jul 2024 12:09:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.118.77.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721390996; cv=none; b=IaPa6fXURx0POkAwVsNjFKX7/Zl1n/YuaJMSV2GKjeLrGi3cxsrEnwWIj8GNCnIfvXsoitgy4fCcvkRgHDHYMpkwbOB8sPoMWogCJf6guXAuVjduxH8jrRC1vKBK2cWk/m9KzenA9de+4E2u9YQY+oOkR3NI12OyNDb5EUpKprs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721390996; c=relaxed/simple; bh=BFN3rmh75N5S4hD0Ue1CL+TfLuFH4oAujI9DOxMtYv8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:MIME-Version: Content-Type:References; b=imFWFgvMD/wQxt/nSFPI6QVfK3qKVPZwYxgBZmts0LQi6ulREfUN8VBsFdznNcG6ONrM565bM5J48knw9O1IqFNc3H49NTP5nfdujzfepNHZp3iLI50xcBS0CiEhbRyVeIIkwAUxNPk2XBW6KyCEilUjiQPjszpe5aL6qOb3lxo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=HwT/Vo2S; arc=none smtp.client-ip=210.118.77.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="HwT/Vo2S" Received: from eucas1p1.samsung.com (unknown [182.198.249.206]) by mailout2.w1.samsung.com (KnoxPortal) with ESMTP id 20240719120946euoutp020b96ce8b02515f5019a349b6bb65fbb3~jm-twDpKZ2403824038euoutp02Q for ; Fri, 19 Jul 2024 12:09:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout2.w1.samsung.com 20240719120946euoutp020b96ce8b02515f5019a349b6bb65fbb3~jm-twDpKZ2403824038euoutp02Q DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1721390986; bh=vpkrpEnmEeMaFik8gd0x3hxK8VWARpcSqM6nm7oQyaU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HwT/Vo2Sf0IHxfOTEFdTRWS/L0yO3pFwJNK25KQzEL/YrHQL8WMvM5TXzJgvXF2Yj QuX64y7gCjFV9P21kH9GwEzLBBFIjzfnRXVZI0PgqrLA4+CLWlSmewVPu6n/sT/FHm Ciksv6WaQnCHFiMRNun8PEH0sicVepma7hwtqhz4= Received: from eusmges3new.samsung.com (unknown [203.254.199.245]) by eucas1p1.samsung.com (KnoxPortal) with ESMTP id 20240719120946eucas1p19396f95d8fa006fb7ce82e03381a58f8~jm-tT4Skv2886728867eucas1p1N; Fri, 19 Jul 2024 12:09:46 +0000 (GMT) Received: from eucas1p2.samsung.com ( [182.198.249.207]) by eusmges3new.samsung.com (EUCPMTA) with SMTP id 87.81.09620.A875A966; Fri, 19 Jul 2024 13:09:46 +0100 (BST) Received: from eusmtrp1.samsung.com (unknown [182.198.249.138]) by eucas1p1.samsung.com (KnoxPortal) with ESMTPA id 20240719120945eucas1p16058905c95c92840679831ae3383a67a~jm-s7QLFA0450904509eucas1p1h; Fri, 19 Jul 2024 12:09:45 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp1.samsung.com (KnoxPortal) with ESMTP id 20240719120945eusmtrp10f6e5e1aa5c8885eb92426bc84ed2ea5~jm-s6V9rd0596405964eusmtrp1Y; Fri, 19 Jul 2024 12:09:45 +0000 (GMT) X-AuditID: cbfec7f5-d31ff70000002594-fc-669a578a9c8c Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 83.EF.09010.9875A966; Fri, 19 Jul 2024 13:09:45 +0100 (BST) Received: from AMDC4515.eu.corp.samsungelectronics.net (unknown [106.120.51.28]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20240719120945eusmtip1cb678cde0b3c8309247f1c6180a476c6~jm-sEoZ0r1464214642eusmtip1K; Fri, 19 Jul 2024 12:09:44 +0000 (GMT) From: Mateusz Majewski To: linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mateusz Majewski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar Subject: [PATCH 2/6] drivers/thermal/exynos: use tmu_temp_mask consistently Date: Fri, 19 Jul 2024 14:08:46 +0200 Message-ID: <20240719120853.1924771-3-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240719120853.1924771-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrCKsWRmVeSWpSXmKPExsWy7djP87pd4bPSDGb/5bN4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi4VNLewWE49NZraY +2Uqs8X/PTvYLZ487GNz4PdYM28No8fOWXfZPRbvecnksWlVJ5vHnWt72Dw2L6n36NuyitHj 8ya5AI4oLpuU1JzMstQifbsEroyL8w4xFnzmquh78JWtgXEqZxcjJ4eEgInEolmbmbsYuTiE BFYwSkw/PIkJwvnCKNEyaQcrhPOZUWLShL0sMC3v5q9lArGFBJYzSjx8xwFR1Mok8f/eU1aQ BJuAgcSDN8vYQRIiAosZJRp/vAMbxSwwiVni4JqFYFXCAt4S9y//YgexWQRUJe5t7WMEsXkF 7CQW3DzCBLFOXqJ3fx+YzSlgL/G76S0bRI2gxMmZT8BOYgaqad46mxmivptT4tbxQgjbRWLy ZZi4sMSr41vYIWwZidOTe6DeyZeYsfk9kM0BZFdI3D3oBWFaS3w8wwxiMgtoSqzfpQ9R7Chx 8sYcNogKPokbbwUh9vNJTNo2nRkizCvR0SYEUa0qcXzPJKj10hJPWm5DveQhMefOXtYJjIqz kHwyC8knsxD2LmBkXsUonlpanJueWmycl1quV5yYW1yal66XnJ+7iRGY0E7/O/51B+OKVx/1 DjEycTAeYpTgYFYS4fX7NjNNiDclsbIqtSg/vqg0J7X4EKM0B4uSOK9qinyqkEB6Yklqdmpq QWoRTJaJg1OqgcnJ06vg3rosp0L31EDPm6JSC+r3dDvHNr532bw4aGO2zSIVqc+O9zf4nr63 9X0Od8HH5Kxei1vap47du2jSXiATsKtkyxeX73a5daLT5J0dXwoc+HCicZHThFkXHdnX8eXJ a7q2WInsitum8vZd1fXZYTN+v7p3q1pYOHtlY7S0YW7oIsV5YjcZCzxEdy9fK72u8hjD47br ex+zCUSUuTN9KjIIfVB+yYxD7wb/1zbdq1VKq5q9gy7sNVy3JXXWQgMj2zcTKswuf7I+yrNJ 3uYYg/CfBZwPv+tz9DMo+HBub2JYueDBi6sMmd7Pvvizy3W7z9s+TykytzHkV8VWWw3epRtC drOf2CO46+L3DCWW4oxEQy3mouJEAF8DLbXXAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrGIsWRmVeSWpSXmKPExsVy+t/xu7qd4bPSDO480rN4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi4VNLewWE49NZraY +2Uqs8X/PTvYLZ487GNz4PdYM28No8fOWXfZPRbvecnksWlVJ5vHnWt72Dw2L6n36NuyitHj 8ya5AI4oPZui/NKSVIWM/OISW6VoQwsjPUNLCz0jE0s9Q2PzWCsjUyV9O5uU1JzMstQifbsE vYyL8w4xFnzmquh78JWtgXEqZxcjJ4eEgInEu/lrmboYuTiEBJYySqx7N40JIiEtcfjLFHYI W1jiz7UuNoiiZiaJ/bdWs4Ik2AQMJB68WQZWJCKwnFFic7sHSBGzwCxmid5TUxlBEsIC3hL3 L/8CK2IRUJW4t7UPLM4rYCex4OYRqG3yEr37+8BsTgF7id9Nb9lAbCGgmp0f57FB1AtKnJz5 hAXEZgaqb946m3kCo8AsJKlZSFILGJlWMYqklhbnpucWG+kVJ+YWl+al6yXn525iBEbgtmM/ t+xgXPnqo94hRiYOxkOMEhzMSiK8ft9mpgnxpiRWVqUW5ccXleakFh9iNAW6eyKzlGhyPjAF 5JXEG5oZmBqamFkamFqaGSuJ83oWdCQKCaQnlqRmp6YWpBbB9DFxcEo1MKmozJm0cuuHgh2a xyx6E2/eidj/cMLZ2YW1ExctK/pfVJF/Z5FWulh9UH4Nk+TjIzPb5bv95k83sXScbzyDjc/9 /NE994R5twit37nuwU32vMBgS6WdihcOx7GmMNauritSU/udZXfsl9WD008n7N3GJ+nkZCef JbdKst3ybqSlwv6FLrOX39yueeJ7dkfdX5fge6wTTlgXFrpObt5xIGJVUo6WTFQ5Q8fyeptb dbsdjDr8f7Psnr91reGP5nvb/Q3rg5vzZ8nJhZqXf3z37HvNpsRvmQzqFzoabM+f1vP5d2iN cuMDRq45OZvPLGya9Hdr5OT1ZdJ752dms13i/tf9JqRwx83KIs7Hq7VWbVJiKc5INNRiLipO BADUi6eXSQMAAA== X-CMS-MailID: 20240719120945eucas1p16058905c95c92840679831ae3383a67a X-Msg-Generator: CA X-RootMTR: 20240719120945eucas1p16058905c95c92840679831ae3383a67a X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240719120945eucas1p16058905c95c92840679831ae3383a67a References: <20240719120853.1924771-1-m.majewski2@samsung.com> Some of the usages in sanitize_temp_error were missed, probably because the boards being used never actually exceeded 255 in their trimming information. This is needed for Exynos 850 support, which uses 9-bit temperature codes. Signed-off-by: Mateusz Majewski --- drivers/thermal/samsung/exynos_tmu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 9b7ca93a72f1..61606a9b9a00 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -237,17 +237,17 @@ static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info) data->temp_error1 = trim_info & tmu_temp_mask; data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) & - EXYNOS_TMU_TEMP_MASK); + tmu_temp_mask); if (!data->temp_error1 || (data->min_efuse_value > data->temp_error1) || (data->temp_error1 > data->max_efuse_value)) - data->temp_error1 = data->efuse_value & EXYNOS_TMU_TEMP_MASK; + data->temp_error1 = data->efuse_value & tmu_temp_mask; if (!data->temp_error2) data->temp_error2 = (data->efuse_value >> EXYNOS_TRIMINFO_85_SHIFT) & - EXYNOS_TMU_TEMP_MASK; + tmu_temp_mask; } static int exynos_tmu_initialize(struct platform_device *pdev) From patchwork Fri Jul 19 12:08:47 2024 Content-Type: text/plain; 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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar Subject: [PATCH 3/6] drivers/thermal/exynos: check IS_ERR(data->clk) consistently Date: Fri, 19 Jul 2024 14:08:47 +0200 Message-ID: <20240719120853.1924771-4-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240719120853.1924771-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrCKsWRmVeSWpSXmKPExsWy7djP87rd4bPSDH7MZrZ4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi4VNLewWE49NZraY +2Uqs8X/PTvYLZ487GNz4PdYM28No8fOWXfZPRbvecnksWlVJ5vHnWt72Dw2L6n36NuyitHj 8ya5AI4oLpuU1JzMstQifbsErowd37ezFrRrVLw7tpepgXGlYhcjJ4eEgInExQ9bWEBsIYEV jBKLJgt2MXIB2V8YJdZ2bGGHcD4zSlz6vY0JpuPwrJdMEInljBK9i5ZDVbUySUxp2gw2i03A QOLBm2VgCRGBxYwSjT/esYI4zAKTmCUOrlnIClIlLBAscefGZnYQm0VAVWLT1iawOK+AncSy RUtYIfbJS/Tu7wPbzSlgL/G76S0bRI2gxMmZT8C2MQPVNG+dzQyyQEKgm1Pi3ocdjBDNLhLv VnyAOlxY4tXxLewQtozE6ck9LBB2vsSMze+BbA4gu0Li7kEvCNNa4uMZZhCTWUBTYv0ufYio o8Se+WkQJp/EjbeCEPv5JCZtm84MEeaV6GgTgpisKnF8zyRmCFta4knLbahLPCS6e1ezTWBU nIXkk1lIPpmFsHYBI/MqRvHU0uLc9NRi47zUcr3ixNzi0rx0veT83E2MwIR2+t/xrzsYV7z6 qHeIkYmD8RCjBAezkgiv37eZaUK8KYmVValF+fFFpTmpxYcYpTlYlMR5VVPkU4UE0hNLUrNT UwtSi2CyTBycUg1MwVsYP8/mDl/QyT2nXVty46u/L1Ssv3696cc51y7t6K9/yptmFucENYhO 3C7iE/HnutQqpdjlk1XOWKtztpopaP/4fuHbkx2PtDa9dPP03uzD5MjMVybkbBzYoX0zys73 QpLCiqCqoHf7j/NapfDaJbws7z66XCGi8nCj6D/HgEu+PpmGd/TWh0wSzkv1urTtuM2v3y3v OeNtKnKeXWtb+kZoCf/O8/MTvH4/LEuY9aPk7eJ0U6FtBg2sd2tPnd6z2ZbxdDGf2+p8Hn/z 3Wzb5Rksl0zZPadtXb+vpb9k/JQbN9XsAmUzeB4om3LXeu7Ub+bl1Z2etMHPfp/crTobHaZ1 vKdk1xy9O+GkeZQSS3FGoqEWc1FxIgALoENd1wMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrGIsWRmVeSWpSXmKPExsVy+t/xu7pd4bPSDF4/VLJ4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi4VNLewWE49NZraY +2Uqs8X/PTvYLZ487GNz4PdYM28No8fOWXfZPRbvecnksWlVJ5vHnWt72Dw2L6n36NuyitHj 8ya5AI4oPZui/NKSVIWM/OISW6VoQwsjPUNLCz0jE0s9Q2PzWCsjUyV9O5uU1JzMstQifbsE vYwd37ezFrRrVLw7tpepgXGlYhcjJ4eEgInE4VkvmboYuTiEBJYySkw7eZkdIiEtcfjLFChb WOLPtS42iKJmJon351+ygiTYBAwkHrxZBlYkIrCcUWJzuwdIEbPALGaJ3lNTGUESwgKBEucO 7QBrYBFQldi0tQnM5hWwk1i2aAkrxAZ5id79fUwgNqeAvcTvprdsILYQUM3Oj/PYIOoFJU7O fMICYjMD1Tdvnc08gVFgFpLULCSpBYxMqxhFUkuLc9Nziw31ihNzi0vz0vWS83M3MQIjcNux n5t3MM579VHvECMTB+MhRgkOZiURXr9vM9OEeFMSK6tSi/Lji0pzUosPMZoC3T2RWUo0OR+Y AvJK4g3NDEwNTcwsDUwtzYyVxHk9CzoShQTSE0tSs1NTC1KLYPqYODilGpiMGe7Nv2P7cMuB dQpvz3TUfFjppq8qm8d4OGPp0hlP9y6eH6xgkPwyTX73Od8ktcS/1ecSv/fP/Hb8eEzWrj1/ OQwmWqxMdvZ/Onu1wqc9ZbfnPJP+4La8LMU/P3ql3TQnebcXmeu1ClZ5mz8qNF3NaXoibyP3 b3+BK7sepjnm3D1otHFX0u9tS3l6Fl3+99Bu0kJx4eXy+isE3r/fv5jLpeVIs1Lzp2P3W7fO 8Xondqa5/GZR60ShTy3+lxlkO/KXKXGuDG+vmnN0wgQDkyVsrXWLHWPO9i6tnrVQvsl8ufWJ D5OrFUpq2bPO8XPn3GpVDE6u3ajw/v38a+br56qVai55M5vTmCE9ZMmlSVoCSizFGYmGWsxF xYkAJeWFB0kDAAA= X-CMS-MailID: 20240719120946eucas1p1b565fa653d33aa2155cd3bb172c29d14 X-Msg-Generator: CA X-RootMTR: 20240719120946eucas1p1b565fa653d33aa2155cd3bb172c29d14 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240719120946eucas1p1b565fa653d33aa2155cd3bb172c29d14 References: <20240719120853.1924771-1-m.majewski2@samsung.com> This will be needed for Exynos 850 support, which does not require this clock. It would also be possible to set data->clk to NULL instead, but doing it like this is consistent with what we do with data->clk_sec. Signed-off-by: Mateusz Majewski --- drivers/thermal/samsung/exynos_tmu.c | 58 ++++++++++++++++++---------- 1 file changed, 38 insertions(+), 20 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 61606a9b9a00..f0de72a62fd7 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -257,7 +257,8 @@ static int exynos_tmu_initialize(struct platform_device *pdev) int ret = 0; mutex_lock(&data->lock); - clk_enable(data->clk); + if (!IS_ERR(data->clk)) + clk_enable(data->clk); if (!IS_ERR(data->clk_sec)) clk_enable(data->clk_sec); @@ -271,7 +272,8 @@ static int exynos_tmu_initialize(struct platform_device *pdev) if (!IS_ERR(data->clk_sec)) clk_disable(data->clk_sec); - clk_disable(data->clk); + if (!IS_ERR(data->clk)) + clk_disable(data->clk); mutex_unlock(&data->lock); return ret; @@ -295,11 +297,13 @@ static int exynos_thermal_zone_configure(struct platform_device *pdev) } mutex_lock(&data->lock); - clk_enable(data->clk); + if (!IS_ERR(data->clk)) + clk_enable(data->clk); data->tmu_set_crit_temp(data, temp / MCELSIUS); - clk_disable(data->clk); + if (!IS_ERR(data->clk)) + clk_disable(data->clk); mutex_unlock(&data->lock); return 0; @@ -328,10 +332,12 @@ static void exynos_tmu_control(struct platform_device *pdev, bool on) struct exynos_tmu_data *data = platform_get_drvdata(pdev); mutex_lock(&data->lock); - clk_enable(data->clk); + if (!IS_ERR(data->clk)) + clk_enable(data->clk); data->tmu_control(pdev, on); data->enabled = on; - clk_disable(data->clk); + if (!IS_ERR(data->clk)) + clk_disable(data->clk); mutex_unlock(&data->lock); } @@ -648,7 +654,8 @@ static int exynos_get_temp(struct thermal_zone_device *tz, int *temp) return -EAGAIN; mutex_lock(&data->lock); - clk_enable(data->clk); + if (!IS_ERR(data->clk)) + clk_enable(data->clk); value = data->tmu_read(data); if (value < 0) @@ -656,7 +663,8 @@ static int exynos_get_temp(struct thermal_zone_device *tz, int *temp) else *temp = code_to_temp(data, value) * MCELSIUS; - clk_disable(data->clk); + if (!IS_ERR(data->clk)) + clk_disable(data->clk); mutex_unlock(&data->lock); return ret; @@ -723,9 +731,11 @@ static int exynos_tmu_set_emulation(struct thermal_zone_device *tz, int temp) goto out; mutex_lock(&data->lock); - clk_enable(data->clk); + if (!IS_ERR(data->clk)) + clk_enable(data->clk); data->tmu_set_emulation(data, temp); - clk_disable(data->clk); + if (!IS_ERR(data->clk)) + clk_disable(data->clk); mutex_unlock(&data->lock); return 0; out: @@ -763,12 +773,14 @@ static irqreturn_t exynos_tmu_threaded_irq(int irq, void *id) thermal_zone_device_update(data->tzd, THERMAL_EVENT_UNSPECIFIED); mutex_lock(&data->lock); - clk_enable(data->clk); + if (!IS_ERR(data->clk)) + clk_enable(data->clk); /* TODO: take action based on particular interrupt */ data->tmu_clear_irqs(data); - clk_disable(data->clk); + if (!IS_ERR(data->clk)) + clk_disable(data->clk); mutex_unlock(&data->lock); return IRQ_HANDLED; @@ -979,7 +991,8 @@ static int exynos_set_trips(struct thermal_zone_device *tz, int low, int high) struct exynos_tmu_data *data = thermal_zone_device_priv(tz); mutex_lock(&data->lock); - clk_enable(data->clk); + if (!IS_ERR(data->clk)) + clk_enable(data->clk); if (low > INT_MIN) data->tmu_set_low_temp(data, low / MCELSIUS); @@ -990,7 +1003,8 @@ static int exynos_set_trips(struct thermal_zone_device *tz, int low, int high) else data->tmu_disable_high(data); - clk_disable(data->clk); + if (!IS_ERR(data->clk)) + clk_disable(data->clk); mutex_unlock(&data->lock); return 0; @@ -1053,10 +1067,12 @@ static int exynos_tmu_probe(struct platform_device *pdev) } } - ret = clk_prepare(data->clk); - if (ret) { - dev_err(dev, "Failed to get clock\n"); - goto err_clk_sec; + if (!IS_ERR(data->clk)) { + ret = clk_prepare(data->clk); + if (ret) { + dev_err(dev, "Failed to get clock\n"); + goto err_clk_sec; + } } switch (data->soc) { @@ -1113,7 +1129,8 @@ static int exynos_tmu_probe(struct platform_device *pdev) err_sclk: clk_disable_unprepare(data->sclk); err_clk: - clk_unprepare(data->clk); + if (!IS_ERR(data->clk)) + clk_unprepare(data->clk); err_clk_sec: if (!IS_ERR(data->clk_sec)) clk_unprepare(data->clk_sec); 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Fri, 19 Jul 2024 12:09:47 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eusmtrp1.samsung.com (KnoxPortal) with ESMTP id 20240719120947eusmtrp1485f7090bab0f83be990b7d925e3e018~jm-uVvhTC0596405964eusmtrp1f; Fri, 19 Jul 2024 12:09:47 +0000 (GMT) X-AuditID: cbfec7f2-c11ff70000002598-86-669a578be80a Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 9E.85.08810.B875A966; Fri, 19 Jul 2024 13:09:47 +0100 (BST) Received: from AMDC4515.eu.corp.samsungelectronics.net (unknown [106.120.51.28]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20240719120946eusmtip117a8b881459e2782bfcf9ea80ab6e31a~jm-tj4fA00607006070eusmtip11; Fri, 19 Jul 2024 12:09:46 +0000 (GMT) From: Mateusz Majewski To: linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mateusz Majewski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar Subject: [PATCH 4/6] dt-bindings: thermal: samsung,exynos: add exynos850-tmu string Date: Fri, 19 Jul 2024 14:08:48 +0200 Message-ID: <20240719120853.1924771-5-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240719120853.1924771-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrGKsWRmVeSWpSXmKPExsWy7djPc7rd4bPSDJr6zC0ezNvGZvF9y3Um izV7zzFZzPssazH/yDlWi/PnN7BbbHp8jdXi8q45bBafe48wWsw4v4/JYmFTC7vFxGOTmS3m fpnKbPF/zw52iycP+9gc+D3WzFvD6LFz1l12j8V7XjJ5bFrVyeZx59oeNo/NS+o9+rasYvT4 vEkugCOKyyYlNSezLLVI3y6BK6N3/2v2gj8CFRP7H7I3MO7m7mLk5JAQMJH4sfgxcxcjF4eQ wApGiaaVf5kgnC+MElc/r2OBcD4zSiyZu54JpuX4jr2sEInljBKndn2Hqmplkjjw9AFYFZuA gcSDN8vYQRIiAosZJRp/vANrYRaYxCxxcM1CVpAqYYFQifWzfzKC2CwCqhI/D8xjAbF5Bewk XvzrgdonL9G7vw/M5hSwl/jd9JYNokZQ4uTMJ2D1zEA1zVtng70hIdDNKbHgWh9Us4vE2Z0z mSFsYYlXx7ewQ9gyEqcn97BA2PkSMza/B7I5gOwKibsHvSBMa4mPZ5hBTGYBTYn1u/Qhih0l /v97yA5RwSdx460gxAF8EpO2TWeGCPNKdLQJQVSrShzfMwlqvbTEk5bbUGd5SPQuPMsygVFx FpJXZiF5ZRbC3gWMzKsYxVNLi3PTU4sN81LL9YoTc4tL89L1kvNzNzECk9rpf8c/7WCc++qj 3iFGJg7GQ4wSHMxKIrx+32amCfGmJFZWpRblxxeV5qQWH2KU5mBREudVTZFPFRJITyxJzU5N LUgtgskycXBKNTDpRMt6P+SdZD8jwWKT+vWtjHJJwnFvL1Tznu+9uHDOtVuCq2I5t3RbCcxl fdx1vTCfd+rb+ccYrp/+uuLGrB9ehjkP8wODyoIbBIXyQpZtW11SemzNDI5WFvP95SJqzWzO vssP/Vqzh9HjXn3b+t6rv09c+ns06gyH0MdPllN2ej1fHPvJcmbw68iqBTduHndN8CkPdny8 6ckyFqv86057FeOTdTr/hV7bZlMsuL1sy9s97MdfvLfZaXZjmyi72J5t05V5Z2kKml7ocJ9r e29H1JKe7nurl1rbrN0fe8sqwXbb/ab5StcWH1Z+1Z+emDD76T0jfomtTq1BJWsKo0qZv9zT 8vp2eeqmacaeLftvKLEUZyQaajEXFScCAEMuz+7ZAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrKIsWRmVeSWpSXmKPExsVy+t/xu7rd4bPSDKZfE7N4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi4VNLewWE49NZraY +2Uqs8X/PTvYLZ487GNz4PdYM28No8fOWXfZPRbvecnksWlVJ5vHnWt72Dw2L6n36NuyitHj 8ya5AI4oPZui/NKSVIWM/OISW6VoQwsjPUNLCz0jE0s9Q2PzWCsjUyV9O5uU1JzMstQifbsE vYze/a/ZC/4IVEzsf8jewLibu4uRk0NCwETi+I69rCC2kMBSRom3T1Mg4tISh79MYYewhSX+ XOti62LkAqppZpI4e6eDDSTBJmAg8eDNMrAiEYHljBKb2z1AipgFZjFL9J6aygiSEBYIllhz bSkTiM0ioCrx88A8FhCbV8BO4sW/HiaIDfISvfv7wGxOAXuJ301v2SAuspPY+XEeG0S9oMTJ mU/AepmB6pu3zmaewCgwC0lqFpLUAkamVYwiqaXFuem5xYZ6xYm5xaV56XrJ+bmbGIHxt+3Y z807GOe9+qh3iJGJg/EQowQHs5IIr9+3mWlCvCmJlVWpRfnxRaU5qcWHGE2B7p7ILCWanA9M AHkl8YZmBqaGJmaWBqaWZsZK4ryeBR2JQgLpiSWp2ampBalFMH1MHJxSDUx2Fmqs030v7+It /h97K+G2teGt40y3rneXNGZpXXZanLzv8hf+NZ9mRpZ8VKm4kHiiaPGeha/DUnhNXstuP+8o IlUz4XUeY9GnZUU3fjzdl/j7/5UXivLSdxcbdjt07bPYud2U+VjDs5Macu7LCvxdj6pO2nTv +yXvG5U7HPftdtaWkrna1Hn5Cucvt0KdYwm9e+ZtWW50bP6tUg3dr9M9Vpa4NcS0BK49q17F tW7ZugkPcuc+mvXK87H0rSL+zbuutq9b1fxgg1KTVP6x2L2l6Sonq0JnLlyaKjZfde2C2hsf Jfgzjj/fovO4SHlnp+b3pzNXPNgl3T7DYmFNRXLXsiW8IdwCITUTj+cqifF8VWIpzkg01GIu Kk4EAOUgSLtIAwAA X-CMS-MailID: 20240719120947eucas1p1344134823e100feaf49238de0e226431 X-Msg-Generator: CA X-RootMTR: 20240719120947eucas1p1344134823e100feaf49238de0e226431 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240719120947eucas1p1344134823e100feaf49238de0e226431 References: <20240719120853.1924771-1-m.majewski2@samsung.com> Note that unlike others, Exynos 850 does not require clocks, hence we have to be a little be more specific about when the related properties are required. Signed-off-by: Mateusz Majewski --- .../thermal/samsung,exynos-thermal.yaml | 26 +++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml index 29a08b0729ee..4363ee625339 100644 --- a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml @@ -27,6 +27,7 @@ properties: - samsung,exynos5420-tmu-ext-triminfo - samsung,exynos5433-tmu - samsung,exynos7-tmu + - samsung,exynos850-tmu clocks: minItems: 1 @@ -69,8 +70,6 @@ properties: required: - compatible - - clocks - - clock-names - interrupts - reg @@ -82,6 +81,9 @@ allOf: contains: const: samsung,exynos5420-tmu-ext-triminfo then: + required: + - clocks + - clock-names properties: clocks: items: @@ -105,6 +107,9 @@ allOf: - samsung,exynos5433-tmu - samsung,exynos7-tmu then: + required: + - clocks + - clock-names properties: clocks: items: @@ -132,6 +137,9 @@ allOf: - samsung,exynos5260-tmu - samsung,exynos5420-tmu then: + required: + - clocks + - clock-names properties: clocks: minItems: 1 @@ -140,6 +148,20 @@ allOf: minItems: 1 maxItems: 1 + - if: + properties: + compatible: + contains: + enum: + - samsung,exynos850-tmu + then: + properties: + clocks: false + clock-names: false + reg: + minItems: 1 + maxItems: 1 + additionalProperties: false examples: From patchwork Fri Jul 19 12:08:49 2024 Content-Type: text/plain; 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Fri, 19 Jul 2024 12:09:48 +0000 (GMT) X-AuditID: cbfec7f4-11bff70000002693-ca-669a578cce93 Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id B6.EF.09010.C875A966; Fri, 19 Jul 2024 13:09:48 +0100 (BST) Received: from AMDC4515.eu.corp.samsungelectronics.net (unknown [106.120.51.28]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20240719120947eusmtip143b83cffc393971c3187865d3eb15bfc~jm-uT2fcY0551205512eusmtip1R; Fri, 19 Jul 2024 12:09:47 +0000 (GMT) From: Mateusz Majewski To: linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mateusz Majewski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar Subject: [PATCH 5/6] drivers/thermal/exynos: add initial Exynos 850 support Date: Fri, 19 Jul 2024 14:08:49 +0200 Message-ID: <20240719120853.1924771-6-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240719120853.1924771-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrMKsWRmVeSWpSXmKPExsWy7djPc7o94bPSDHb2qFo8mLeNzeL7lutM Fmv2nmOymPdZ1mL+kXOsFufPb2C32PT4GqvF5V1z2Cw+9x5htJhxfh+TxcKmFnaLiccmM1vM /TKV2eL/nh3sFk8e9rE58HusmbeG0WPnrLvsHov3vGTy2LSqk83jzrU9bB6bl9R79G1Zxejx eZNcAEcUl01Kak5mWWqRvl0CV8b6DXuYC67lVHRfOcvSwLgououRk0NCwETi6Mdu5i5GLg4h gRWMEvf717NBOF8YJda8m88K4XxmlFh+4h5QhgOs5d7xcIj4ckaJF9c2QhW1MknMXdbAAjKX TcBA4sGbZewgCRGBxYwSjT/egVUxC0xilji4ZiErSJWwgLfEo5szwWwWAVWJZdv6GUFW8ArY SVy84g9xoLxE7/4+JhCbU8Be4nfTWzYQm1dAUOLkzCdgy5iBapq3zgZ7QkKgn1Oif8V3Fohm F4nnh+ZC2cISr45vYYewZSROT+6BiudLzNj8ngXitQqJuwe9IExriY9nmEFMZgFNifW79CGi jhI71vJDmHwSN94KQuznk5i0bTozRJhXoqNNCGKyqsTxPZOYIWxpiSctt5kgbA+J1623WSYw Ks5C8sksJJ/MQli7gJF5FaN4amlxbnpqsVFearlecWJucWleul5yfu4mRmA6O/3v+JcdjMtf fdQ7xMjEwXiIUYKDWUmE1+/bzDQh3pTEyqrUovz4otKc1OJDjNIcLErivKop8qlCAumJJanZ qakFqUUwWSYOTqkGJslriwq27DaTEpy56GGe5+vDmha/fj8xPhW3gD1T4MyFwBO6Dly2Bbsq KrmEM+QrtHcWXnr8xvPGvhnzGjvfZ+x9mdgb++aNO2udyOMeXfZL6to3avJjpwrURfkEHF3t 3Op0SfXEnfzknyceGlafOLNEsmOO076OQxufb1ee7p6rd9M0+LfUvLrVi/sz/u64Lp26de6N nUzCR4+Y56j+bZj1Yp8Dr838zbrz5uxyWHzbrGbvnLqAPq3Kk0IZc3/9yoksC+R/321gGyV7 NeRa9gSPvW8C1H228DqauD20YD1qUHeVQS/LVSCn9U+yst79vnv8qjwMLy91/JHusXXpNSrn XuZUHTupIlf7zd8eJZbijERDLeai4kQA8Gw+B9YDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrCIsWRmVeSWpSXmKPExsVy+t/xu7o94bPSDBa94LJ4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi4VNLewWE49NZraY +2Uqs8X/PTvYLZ487GNz4PdYM28No8fOWXfZPRbvecnksWlVJ5vHnWt72Dw2L6n36NuyitHj 8ya5AI4oPZui/NKSVIWM/OISW6VoQwsjPUNLCz0jE0s9Q2PzWCsjUyV9O5uU1JzMstQifbsE vYz1G/YwF1zLqei+cpalgXFRdBcjB4eEgInEvePhXYxcHEICSxkl2iZPYOti5ASKS0sc/jKF HcIWlvhzrYsNoqiZSeJI3z4mkASbgIHEgzfLwIpEBJYzSmxu9wApYhaYxSzRe2oqI0hCWMBb 4tHNmawgNouAqsSybf2MIJt5BewkLl7xh1ggL9G7vw9sJqeAvcTvprdgRwgBlez8OA/M5hUQ lDg58wkLiM0MVN+8dTbzBEaBWUhSs5CkFjAyrWIUSS0tzk3PLTbSK07MLS7NS9dLzs/dxAiM vm3Hfm7Zwbjy1Ue9Q4xMHIyHGCU4mJVEeP2+zUwT4k1JrKxKLcqPLyrNSS0+xGgKdPZEZinR 5Hxg/OeVxBuaGZgamphZGphamhkrifN6FnQkCgmkJ5akZqemFqQWwfQxcXBKNTDxPLSTPch8 Wzt/juTqxo+bja7yXZluxVHyV8CjRfEiX2lH5PZYY2P1rS7njte397Pf6J31LdJYLevKtGLm fz37Tqj31V2bxrD8d5Kb/lmfWwd59b6lrmOLZS1q2HS3WGrR4jJd/4k/zN7tPRgnkr2IoSpx d6XrexMjLaknBm8u6xg/mXdj1fKdkpn1L/j88up//F79WK3lsuj7tdUuK+VyJVw+iL7Re+Do 8mNX3N++h2dOyDvsixJL3i31/PYP5jcNkpYGNZXqm64GbPlY+yhNJLGmK+/9x6Dmjf9yOZjt Tnqcds4TPjfhwiPmWyo125+wTNWx++B+qNKJK+TiBC2xL71P3rP9+pByLXeb6mclluKMREMt 5qLiRAA/7ZXyRwMAAA== X-CMS-MailID: 20240719120948eucas1p13f3dc8f3aba56027da720d36c6057040 X-Msg-Generator: CA X-RootMTR: 20240719120948eucas1p13f3dc8f3aba56027da720d36c6057040 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240719120948eucas1p13f3dc8f3aba56027da720d36c6057040 References: <20240719120853.1924771-1-m.majewski2@samsung.com> This is loosely adapted from an implementation available at https://gitlab.com/Linaro/96boards/e850-96/kernel/-/blob/android-exynos-4.14-linaro/drivers/thermal/samsung/exynos_tmu.c Some differences from that implementation: - unlike that implementation, we do not use the ACPM mechanism, instead we just access the registers, like we do for other SoCs, - the SoC is supposed to support multiple sensors inside one unit. The vendor implementation uses one kernel device per sensor, we would probably prefer to have one device for all sensors, have #thermal-sensor-cells = <1> and so on. We implemented this, but we could not get the extra sensors to work on our hardware so far. This might be due to a misconfiguration and we will probably come back to this, however our implementation only supports a single sensor for now, - the vendor implementation supports disabling CPU cores as a cooling device. We did not attempt to port this, and this would not really fit this driver anyway. Additionally, some differences from the other SoCs supported by this driver: - this SoC does not require a clock to work correctly, so we need an exception for data->clk, - we do not really constrain the e-fuse information like the other SoCs do (data->{min,max}_efuse_value). In our tests, those values (as well as the raw sensor values) were much higher than in the other SoCs, to the degree that reusing the data->{min,max}_efuse_value from the other SoCs would cause instant critical temperature reset on boot, - this SoC provides more information in the e-fuse data than other SoCs, so we read some values inside exynos850_tmu_initialize instead of hardcoding them in exynos_map_dt_data. Signed-off-by: Mateusz Majewski --- drivers/thermal/samsung/exynos_tmu.c | 214 +++++++++++++++++++++++++-- 1 file changed, 202 insertions(+), 12 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index f0de72a62fd7..bd52663f1a5a 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -116,6 +116,43 @@ #define EXYNOS7_EMUL_DATA_SHIFT 7 #define EXYNOS7_EMUL_DATA_MASK 0x1ff +/* Exynos850 specific registers */ +#define EXYNOS850_TMU_REG_AVG_CON 0x58 +#define EXYNOS850_TMU_REG_CONTROL1 0x24 +#define EXYNOS850_TMU_REG_COUNTER_VALUE0 0x30 +#define EXYNOS850_TMU_REG_COUNTER_VALUE1 0x34 +#define EXYNOS850_TMU_REG_CURRENT_TEMP1_0 0x40 +#define EXYNOS850_TMU_REG_THD_TEMP0_RISE 0x50 +#define EXYNOS850_TMU_REG_THD_TEMP0_FALL 0x60 +#define EXYNOS850_TMU_REG_TRIM0 0x3C + +#define EXYNOS850_TMU_AVG_CON_SHIFT 18 +#define EXYNOS850_TMU_AVG_MODE_MASK 0x7 +#define EXYNOS850_TMU_BGRI_TRIM_MASK 0xF +#define EXYNOS850_TMU_BGRI_TRIM_SHIFT 20 +#define EXYNOS850_TMU_CLK_SENSE_ON_MASK 0xffff +#define EXYNOS850_TMU_CLK_SENSE_ON_SHIFT 16 +#define EXYNOS850_TMU_DEM_ENABLE 1 +#define EXYNOS850_TMU_DEM_SHIFT 4 +#define EXYNOS850_TMU_EN_TEMP_SEN_OFF_MASK 0xffff +#define EXYNOS850_TMU_EN_TEMP_SEN_OFF_SHIFT 0 +#define EXYNOS850_TMU_LPI_MODE_MASK 1 +#define EXYNOS850_TMU_LPI_MODE_SHIFT 10 +#define EXYNOS850_TMU_T_BUF_SLOPE_SEL_MASK 0xF +#define EXYNOS850_TMU_T_BUF_SLOPE_SEL_SHIFT 18 +#define EXYNOS850_TMU_T_BUF_VREF_SEL_MASK 0x1F +#define EXYNOS850_TMU_T_BUF_VREF_SEL_SHIFT 18 +#define EXYNOS850_TMU_TEM1051X_SENSE_VALUE 0x028A +#define EXYNOS850_TMU_TEM1456X_SENSE_VALUE 0x0A28 +#define EXYNOS850_TMU_TEMP_SHIFT 9 +#define EXYNOS850_TMU_TRIMINFO_SHIFT 4 +#define EXYNOS850_TMU_T_TRIM0_MASK 0xF +#define EXYNOS850_TMU_T_TRIM0_SHIFT 18 +#define EXYNOS850_TMU_VBEI_TRIM_MASK 0xF +#define EXYNOS850_TMU_VBEI_TRIM_SHIFT 8 +#define EXYNOS850_TMU_VREF_TRIM_MASK 0xF +#define EXYNOS850_TMU_VREF_TRIM_SHIFT 12 + #define EXYNOS_FIRST_POINT_TRIM 25 #define EXYNOS_SECOND_POINT_TRIM 85 @@ -133,6 +170,7 @@ enum soc_type { SOC_ARCH_EXYNOS5420_TRIMINFO, SOC_ARCH_EXYNOS5433, SOC_ARCH_EXYNOS7, + SOC_ARCH_EXYNOS850, }; /** @@ -231,13 +269,16 @@ static int code_to_temp(struct exynos_tmu_data *data, u16 temp_code) static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info) { - u16 tmu_temp_mask = - (data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_MASK - : EXYNOS_TMU_TEMP_MASK; + u16 tmu_temp_mask = (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) ? + EXYNOS7_TMU_TEMP_MASK : + EXYNOS_TMU_TEMP_MASK; + int tmu_85_shift = (data->soc == SOC_ARCH_EXYNOS850) ? + EXYNOS850_TMU_TEMP_SHIFT : + EXYNOS_TRIMINFO_85_SHIFT; data->temp_error1 = trim_info & tmu_temp_mask; - data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) & - tmu_temp_mask); + data->temp_error2 = ((trim_info >> tmu_85_shift) & tmu_temp_mask); if (!data->temp_error1 || (data->min_efuse_value > data->temp_error1) || @@ -245,9 +286,8 @@ static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info) data->temp_error1 = data->efuse_value & tmu_temp_mask; if (!data->temp_error2) - data->temp_error2 = - (data->efuse_value >> EXYNOS_TRIMINFO_85_SHIFT) & - tmu_temp_mask; + data->temp_error2 = (data->efuse_value >> tmu_85_shift) & + tmu_temp_mask; } static int exynos_tmu_initialize(struct platform_device *pdev) @@ -588,6 +628,129 @@ static void exynos7_tmu_initialize(struct platform_device *pdev) sanitize_temp_error(data, trim_info); } +static void exynos850_tmu_set_low_temp(struct exynos_tmu_data *data, u8 temp) +{ + exynos_tmu_update_temp(data, EXYNOS850_TMU_REG_THD_TEMP0_FALL + 12, 0, + temp); + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS_TMU_INTEN_FALL0_SHIFT + 0, true); +} + +static void exynos850_tmu_set_high_temp(struct exynos_tmu_data *data, u8 temp) +{ + exynos_tmu_update_temp(data, EXYNOS850_TMU_REG_THD_TEMP0_RISE + 12, 16, + temp); + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS7_TMU_INTEN_RISE0_SHIFT + 1, true); +} + +static void exynos850_tmu_disable_low(struct exynos_tmu_data *data) +{ + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS_TMU_INTEN_FALL0_SHIFT + 0, false); +} + +static void exynos850_tmu_disable_high(struct exynos_tmu_data *data) +{ + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS7_TMU_INTEN_RISE0_SHIFT + 1, false); +} + +static void exynos850_tmu_set_crit_temp(struct exynos_tmu_data *data, u8 temp) +{ + exynos_tmu_update_temp(data, EXYNOS850_TMU_REG_THD_TEMP0_RISE + 0, 16, + temp); + exynos_tmu_update_bit(data, EXYNOS_TMU_REG_CONTROL, + EXYNOS_TMU_THERM_TRIP_EN_SHIFT, true); + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS7_TMU_INTEN_RISE0_SHIFT + 7, true); +} + +static void exynos850_tmu_initialize(struct platform_device *pdev) +{ + struct exynos_tmu_data *data = platform_get_drvdata(pdev); + int cal_type; + unsigned int avg_mode, buf, bgri, vref, vbei; + + buf = readl(data->base + EXYNOS_TMU_REG_TRIMINFO); + cal_type = (buf & EXYNOS5433_TRIMINFO_CALIB_SEL_MASK) >> + EXYNOS5433_TRIMINFO_CALIB_SEL_SHIFT; + data->reference_voltage = (buf >> EXYNOS850_TMU_T_BUF_VREF_SEL_SHIFT) & + EXYNOS850_TMU_T_BUF_VREF_SEL_MASK; + buf = readl(data->base + EXYNOS_TMU_REG_TRIMINFO + + EXYNOS850_TMU_TRIMINFO_SHIFT); + data->gain = (buf >> EXYNOS850_TMU_T_BUF_SLOPE_SEL_SHIFT) & + EXYNOS850_TMU_T_BUF_SLOPE_SEL_MASK; + buf = readl(data->base + EXYNOS_TMU_REG_TRIMINFO + + 2 * EXYNOS850_TMU_TRIMINFO_SHIFT); + avg_mode = (buf >> EXYNOS850_TMU_AVG_CON_SHIFT) & + EXYNOS850_TMU_AVG_MODE_MASK; + buf = readl(data->base + EXYNOS_TMU_REG_TRIMINFO + + 3 * EXYNOS850_TMU_TRIMINFO_SHIFT); + bgri = (buf >> EXYNOS850_TMU_T_TRIM0_SHIFT) & + EXYNOS850_TMU_T_TRIM0_MASK; + buf = readl(data->base + EXYNOS_TMU_REG_TRIMINFO + + 4 * EXYNOS850_TMU_TRIMINFO_SHIFT); + vref = (buf >> EXYNOS850_TMU_T_TRIM0_SHIFT) & + EXYNOS850_TMU_T_TRIM0_MASK; + buf = readl(data->base + EXYNOS_TMU_REG_TRIMINFO + + 5 * EXYNOS850_TMU_TRIMINFO_SHIFT); + vbei = (buf >> EXYNOS850_TMU_T_TRIM0_SHIFT) & + EXYNOS850_TMU_T_TRIM0_MASK; + + buf = readl(data->base + EXYNOS_TMU_REG_TRIMINFO); + sanitize_temp_error(data, buf); + + switch (cal_type) { + case EXYNOS5433_TRIMINFO_TWO_POINT_TRIMMING: + data->cal_type = TYPE_TWO_POINT_TRIMMING; + break; + case EXYNOS5433_TRIMINFO_ONE_POINT_TRIMMING: + default: + data->cal_type = TYPE_ONE_POINT_TRIMMING; + break; + } + + dev_info(&pdev->dev, "Calibration type is %d-point calibration\n", + cal_type ? 2 : 1); + + buf = readl(data->base + EXYNOS850_TMU_REG_AVG_CON); + buf &= ~(EXYNOS850_TMU_AVG_MODE_MASK); + buf &= ~(EXYNOS850_TMU_DEM_ENABLE << EXYNOS850_TMU_DEM_SHIFT); + if (avg_mode) { + buf |= avg_mode; + buf |= (EXYNOS850_TMU_DEM_ENABLE << EXYNOS850_TMU_DEM_SHIFT); + } + writel(buf, data->base + EXYNOS850_TMU_REG_AVG_CON); + + buf = readl(data->base + EXYNOS850_TMU_REG_COUNTER_VALUE0); + buf &= ~(EXYNOS850_TMU_EN_TEMP_SEN_OFF_MASK + << EXYNOS850_TMU_EN_TEMP_SEN_OFF_SHIFT); + buf |= EXYNOS850_TMU_TEM1051X_SENSE_VALUE + << EXYNOS850_TMU_EN_TEMP_SEN_OFF_SHIFT; + writel(buf, data->base + EXYNOS850_TMU_REG_COUNTER_VALUE0); + + buf = readl(data->base + EXYNOS850_TMU_REG_COUNTER_VALUE1); + buf &= ~(EXYNOS850_TMU_CLK_SENSE_ON_MASK + << EXYNOS850_TMU_CLK_SENSE_ON_SHIFT); + buf |= EXYNOS850_TMU_TEM1051X_SENSE_VALUE + << EXYNOS850_TMU_CLK_SENSE_ON_SHIFT; + writel(buf, data->base + EXYNOS850_TMU_REG_COUNTER_VALUE1); + + buf = readl(data->base + EXYNOS850_TMU_REG_TRIM0); + buf &= ~(EXYNOS850_TMU_BGRI_TRIM_MASK << EXYNOS850_TMU_BGRI_TRIM_SHIFT); + buf &= ~(EXYNOS850_TMU_VREF_TRIM_MASK << EXYNOS850_TMU_VREF_TRIM_SHIFT); + buf &= ~(EXYNOS850_TMU_VBEI_TRIM_MASK << EXYNOS850_TMU_VBEI_TRIM_SHIFT); + buf |= (bgri << EXYNOS850_TMU_BGRI_TRIM_SHIFT); + buf |= (vref << EXYNOS850_TMU_VREF_TRIM_SHIFT); + buf |= (vbei << EXYNOS850_TMU_VBEI_TRIM_SHIFT); + writel(buf, data->base + EXYNOS850_TMU_REG_TRIM0); + + buf = readl(data->base + EXYNOS850_TMU_REG_CONTROL1); + buf &= ~(EXYNOS850_TMU_LPI_MODE_MASK << EXYNOS850_TMU_LPI_MODE_SHIFT); + writel(buf, data->base + EXYNOS850_TMU_REG_CONTROL1); +} + static void exynos4210_tmu_control(struct platform_device *pdev, bool on) { struct exynos_tmu_data *data = platform_get_drvdata(pdev); @@ -679,7 +842,8 @@ static u32 get_emul_con_reg(struct exynos_tmu_data *data, unsigned int val, val &= ~(EXYNOS_EMUL_TIME_MASK << EXYNOS_EMUL_TIME_SHIFT); val |= (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT); - if (data->soc == SOC_ARCH_EXYNOS7) { + if (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) { val &= ~(EXYNOS7_EMUL_DATA_MASK << EXYNOS7_EMUL_DATA_SHIFT); val |= (temp_to_code(data, temp) << @@ -709,7 +873,8 @@ static void exynos4412_tmu_set_emulation(struct exynos_tmu_data *data, emul_con = EXYNOS5260_EMUL_CON; else if (data->soc == SOC_ARCH_EXYNOS5433) emul_con = EXYNOS5433_TMU_EMUL_CON; - else if (data->soc == SOC_ARCH_EXYNOS7) + else if (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) emul_con = EXYNOS7_TMU_REG_EMUL_CON; else emul_con = EXYNOS_EMUL_CON; @@ -766,6 +931,12 @@ static int exynos7_tmu_read(struct exynos_tmu_data *data) EXYNOS7_TMU_TEMP_MASK; } +static int exynos850_tmu_read(struct exynos_tmu_data *data) +{ + return readw(data->base + EXYNOS850_TMU_REG_CURRENT_TEMP1_0) & + EXYNOS7_TMU_TEMP_MASK; +} + static irqreturn_t exynos_tmu_threaded_irq(int irq, void *id) { struct exynos_tmu_data *data = id; @@ -794,7 +965,8 @@ static void exynos4210_tmu_clear_irqs(struct exynos_tmu_data *data) if (data->soc == SOC_ARCH_EXYNOS5260) { tmu_intstat = EXYNOS5260_TMU_REG_INTSTAT; tmu_intclear = EXYNOS5260_TMU_REG_INTCLEAR; - } else if (data->soc == SOC_ARCH_EXYNOS7) { + } else if (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) { tmu_intstat = EXYNOS7_TMU_REG_INTPEND; tmu_intclear = EXYNOS7_TMU_REG_INTPEND; } else if (data->soc == SOC_ARCH_EXYNOS5433) { @@ -845,6 +1017,9 @@ static const struct of_device_id exynos_tmu_match[] = { }, { .compatible = "samsung,exynos7-tmu", .data = (const void *)SOC_ARCH_EXYNOS7, + }, { + .compatible = "samsung,exynos850-tmu", + .data = (const void *)SOC_ARCH_EXYNOS850, }, { }, }; @@ -957,6 +1132,21 @@ static int exynos_map_dt_data(struct platform_device *pdev) data->min_efuse_value = 15; data->max_efuse_value = 100; break; + case SOC_ARCH_EXYNOS850: + data->tmu_set_low_temp = exynos850_tmu_set_low_temp; + data->tmu_set_high_temp = exynos850_tmu_set_high_temp; + data->tmu_disable_low = exynos850_tmu_disable_low; + data->tmu_disable_high = exynos850_tmu_disable_high; + data->tmu_set_crit_temp = exynos850_tmu_set_crit_temp; + data->tmu_initialize = exynos850_tmu_initialize; + data->tmu_control = exynos4210_tmu_control; + data->tmu_read = exynos850_tmu_read; + data->tmu_set_emulation = exynos4412_tmu_set_emulation; + data->tmu_clear_irqs = exynos4210_tmu_clear_irqs; + data->efuse_value = 55; + data->min_efuse_value = 0; + data->max_efuse_value = 511; + break; default: dev_err(&pdev->dev, "Platform not supported\n"); return -EINVAL; @@ -1051,7 +1241,7 @@ static int exynos_tmu_probe(struct platform_device *pdev) return ret; data->clk = devm_clk_get(dev, "tmu_apbif"); - if (IS_ERR(data->clk)) + if (IS_ERR(data->clk) && data->soc != SOC_ARCH_EXYNOS850) return dev_err_probe(dev, PTR_ERR(data->clk), "Failed to get clock\n"); data->clk_sec = devm_clk_get(dev, "tmu_triminfo_apbif"); From patchwork Fri Jul 19 12:08:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mateusz Majewski X-Patchwork-Id: 813598 Received: from mailout2.w1.samsung.com (mailout2.w1.samsung.com [210.118.77.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E8F0E13D2A2 for ; Fri, 19 Jul 2024 12:09:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Fri, 19 Jul 2024 12:09:48 +0000 (GMT) From: Mateusz Majewski To: linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mateusz Majewski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar Subject: [PATCH 6/6] dt-bindings: thermal: samsung,exynos: remove outdated information on trip point count Date: Fri, 19 Jul 2024 14:08:50 +0200 Message-ID: <20240719120853.1924771-7-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240719120853.1924771-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrEKsWRmVeSWpSXmKPExsWy7djP87q94bPSDLonSVk8mLeNzeL7lutM Fmv2nmOymPdZ1mL+kXOsFufPb2C32PT4GqvF5V1z2Cw+9x5htJhxfh+TxcKmFnaLiccmM1vM /TKV2eL/nh3sFk8e9rE58HusmbeG0WPnrLvsHov3vGTy2LSqk83jzrU9bB6bl9R79G1Zxejx eZNcAEcUl01Kak5mWWqRvl0CV8b0dWsYC85xVszYf4+xgfEZexcjJ4eEgIlEz7YWli5GLg4h gRWMEive9DBDOF8YJa5em8cI4XxmlHh9ZQ8jTEvf9mVgtpDAckaJWUs0IIpamSQePetmBUmw CRhIPHizjB0kISKwmFGi8cc7VhCHWWASs8TBNQuBHA4OYYEciW1vzEAaWARUJc6fv8wGEuYV sJPo21ECsUxeond/HxOIzSlgL/G76S0biM0rIChxcuYTFhCbGaimeetssLMlBLo5JRq+rYC6 1EVi0oO5zBC2sMSr41ugnpaROD25hwXCzpeYsfk9C8heCYEKibsHvSBMa4mPZ5hBTGYBTYn1 u/Qhih0leu4cY4eo4JO48VYQ4gA+iUnbpjNDhHklOtqEIKpVJY7vmQS1XlriScttJogSD4kb T/MmMCrOQvLJLCSfzEJYu4CReRWjeGppcW56arFRXmq5XnFibnFpXrpecn7uJkZgMjv97/iX HYzLX33UO8TIxMF4iFGCg1lJhNfv28w0Id6UxMqq1KL8+KLSnNTiQ4zSHCxK4ryqKfKpQgLp iSWp2ampBalFMFkmDk6pBqaqR5Nz109bL3As+2rQo1tF1yOVtkzfve3S1zTlH042521mLw7Y YpMesILnHU/PzWQ1x+Mflx3clGD1pmnWz9ZMtdvMQbw3rCy/BYidXfmwkO+kZlQTq6deuOpj nys/zF7NUdr8b2P8o10+weyMfz5mZ9iaVk2otg/zEtiatfCHZlDZxIAzDGsX+HfXii3YoJF8 +dBa83nrXC5zTI9d+SWBzapw4TTHooiDpvP9GuKEPt/btj1xb8va51pVvU/fnI9nPVzEW7dm 2UrXhY8urTne25VTIBf8eVLP9OXxdsrB001/fI9JvdsdXxT+68bebTX7jmaszavaKKPgNjmz cIr4tNl7fyruO/2CTezvT/e5SizFGYmGWsxFxYkAPTzw1tUDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrCIsWRmVeSWpSXmKPExsVy+t/xu7o94bPSDK7vs7Z4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi4VNLewWE49NZraY +2Uqs8X/PTvYLZ487GNz4PdYM28No8fOWXfZPRbvecnksWlVJ5vHnWt72Dw2L6n36NuyitHj 8ya5AI4oPZui/NKSVIWM/OISW6VoQwsjPUNLCz0jE0s9Q2PzWCsjUyV9O5uU1JzMstQifbsE vYzp69YwFpzjrJix/x5jA+Mz9i5GTg4JAROJvu3LGLsYuTiEBJYySuxfuosJIiEtcfjLFKgi YYk/17rYIIqamSSerjgHlmATMJB48GYZmC0isJxRYnO7B0gRs8AsZoneU1OBxnJwCAtkSTx8 lghSwyKgKnH+/GU2kDCvgJ1E344SiPnyEr37+8D2cgrYS/xuessGYgsBlez8OA/M5hUQlDg5 8wkLiM0MVN+8dTbzBEaBWUhSs5CkFjAyrWIUSS0tzk3PLTbSK07MLS7NS9dLzs/dxAiMvm3H fm7Zwbjy1Ue9Q4xMHIyHGCU4mJVEeP2+zUwT4k1JrKxKLcqPLyrNSS0+xGgKdPZEZinR5Hxg /OeVxBuaGZgamphZGphamhkrifN6FnQkCgmkJ5akZqemFqQWwfQxcXBKNTAFnxI6Yq231Jot Uevk2wdvzYRvH3uu83hPw7vPcvdFt1r/qU8+cHSGY5vvqeJ9x9iOsOdZNb5d6nlMuivjfXJE lvuWEDfdt+mNN5hOPn4vVXwt5dxLo+Qfu45+UeT59z+phuHm5vd6rELWswsfFktYbzozL8wk 8ru5gLT+960TDig/yH/4sV1fKOxJEHvDPv2DnSl3BCetv67sv8o0RGH5wRmZ1g35G8pCWHjk Dq0Rf3fIb67QlOnJPw5M59ubof3j5pO9/MwnK4/Ues/58PuJx83D1/sftKZmJlpfsmo5eln/ It8ZoYeTDq+/l+V6PXjvne5XBx5qbpfp6RM80HFH+XP5A0ad/ZPKBe4eaJ34VImlOCPRUIu5 qDgRAGgXxF1HAwAA X-CMS-MailID: 20240719120949eucas1p1b061c716ac55b4a79ba57c407c0b2d91 X-Msg-Generator: CA X-RootMTR: 20240719120949eucas1p1b061c716ac55b4a79ba57c407c0b2d91 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240719120949eucas1p1b061c716ac55b4a79ba57c407c0b2d91 References: <20240719120853.1924771-1-m.majewski2@samsung.com> This is not true as of commit 5314b1543787 ("thermal/drivers/exynos: Use set_trips ops"). Signed-off-by: Mateusz Majewski Reviewed-by: Sam Protsenko --- .../bindings/thermal/samsung,exynos-thermal.yaml | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml index 4363ee625339..5a82764a4dbb 100644 --- a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml @@ -40,11 +40,8 @@ properties: interrupts: description: | The Exynos TMU supports generating interrupts when reaching given - temperature thresholds. Number of supported thermal trip points depends - on the SoC (only first trip points defined in DT will be configured):: - - most of SoC: 4 - - samsung,exynos5433-tmu: 8 - - samsung,exynos7-tmu: 8 + temperature thresholds. The trip points will be set dynamically in + runtime, which means there is no limit on the number of trip points. maxItems: 1 reg: