From patchwork Fri Jul 19 13:17:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 813629 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4E54213F458; Fri, 19 Jul 2024 13:17:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; cv=none; b=IfpUPphheSKmvOFZFNZLIwymlKbPzfJQ6WDuNPfx2cbBn1AoFsdY/oqTdivv27qCy5SfLJIW+tF9ysptq5PPT6R60A5lxC2nIqNxJeUroolpuwholiyWlJn5ggtby6DK5jZIkOPkCYvshgVMf/r4trGjWflBcgTwyjzchfc0t9k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; c=relaxed/simple; bh=0uzVyxrhof8AS7od0ldhgHmxH15tqtHgH1PplGp3Hn4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=X4TGP7HAs4v3dIyt0Hh60jGM6KZ5yIosuBrvE5fpRXGNBFDF6QvdX3MNUsK+JxySgbJKDMYHydd5Jto+A7XFvmcnViiMHtuPwhp9Q+G8FAtzjooNv1A8vRMGO/ozrcbp2N0FpRQRDVqzWVsF+TpnmypN9hA752QxyLz+rCj6upQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mH86T5at; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mH86T5at" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D63FCC4AF0F; Fri, 19 Jul 2024 13:17:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721395048; bh=0uzVyxrhof8AS7od0ldhgHmxH15tqtHgH1PplGp3Hn4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mH86T5atwjuUVwYxkQSC/ljKH+cKpml7YUP0dtLcYaEJfDaIm8EubyYClx7ns0rAV gurf48Lz6wSmCsKab2K8JePeFVSlegdEootBUEFSsQSuGHz6gGjSI+4NwnpfW11D7h tDb31Ol7RWk3GZVQc61LlNlCHoN/OUC4qnUXDD4KfcxYHn1HpFUWsc5sX+xEE5RYIJ bUwQUEdlW8T1Be4u1S8Rp0MDNFMKvguckDjXBx4ZfKq+ahyPi91XbBkm/++FyFU4e8 600x4EQ28vn0K6v99qtJ65ZBXaSOuOS8RtFJwTaGO1+zzsIYSZOwK8nYXdK44tO7Yx /Utu24VZeNbbg== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sUnUO-000000002BC-1qGj; Fri, 19 Jul 2024 15:17:36 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH 1/7] arm64: dts: qcom: x1e80100-crd: fix PCIe4 PHY supply Date: Fri, 19 Jul 2024 15:17:16 +0200 Message-ID: <20240719131722.8343-2-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240719131722.8343-1-johan+linaro@kernel.org> References: <20240719131722.8343-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The PCIe4 PHY is powered by vreg_l3i (not vreg_l3j). Fixes: d7e03cce0400 ("arm64: dts: qcom: x1e80100-crd: Enable more support") Cc: stable@vger.kernel.org # 6.9 Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index f97c80b4077c..6aa2ec1e7919 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -788,7 +788,7 @@ &pcie4 { }; &pcie4_phy { - vdda-phy-supply = <&vreg_l3j_0p8>; + vdda-phy-supply = <&vreg_l3i_0p8>; vdda-pll-supply = <&vreg_l3e_1p2>; status = "okay"; From patchwork Fri Jul 19 13:17:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 813450 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 407FA13D53F; Fri, 19 Jul 2024 13:17:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; cv=none; b=r2AZ88DQMjhKPVMTRQritfPum9PH8miQNJ4N5w64lgN6gqD9ocN8+g3NbKl4pDZ3w+aLVRXhiU+qFZ9H/fgmFNBgI9fJaLMb1F9EX/TlT4pRYERH9EMAMJipm9dBZAyCmrVN9FGvRyJ3QRRQlWCD4rtPx8fDZtVV0LyvDWOTMh8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; c=relaxed/simple; bh=zBpjR/Cxt0PHaLcizd15DuclWPxULFRLAbv0OxnCwEk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LoiiRd3xmUe1zjlHVJO1fAoiarUDFcm4isZXrTrrR6CHJOcqFU0oNCdSniaQltX+TRvy+dbNOjAlHatU8s9nOsJ/kYfiOHGus6hp7KrdDYdyB0Q3Yy2MGv0wAP+kZe8UVTTJGytDiqU/Xo6B9zxcMq2qFH1YQc9nu2764tHmOL8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=V1PoICdo; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="V1PoICdo" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CC9B8C4AF0A; Fri, 19 Jul 2024 13:17:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721395048; bh=zBpjR/Cxt0PHaLcizd15DuclWPxULFRLAbv0OxnCwEk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=V1PoICdouBuc7v2+kCp+r4l1bD257WsRkzNwBBKJmSSa25QWzJMnDChn4R5pssVbA wspolb3rwyLWId8jh8qUycc+6qIlRTLZIFwS9quI4PZzrOJhkISrmB3Najw7l1WB2+ TBxJ4X/w+hM2+1br43Y7/tOlw18Uk8iz4BPWyrDK2es5XcdWu1tCPTCIsketrghj3b JKb+wruAmGSg8nu5ZD0TL/KHu2ggmwRUpW7Yl/QZel9IjGcYHwuZ0IoNaH6glanxxE k7gP2xzPE95Cne+rDSwNg5XIwTen9HQrkRL0YHblnef0sCj9HMRiBzqBEbcv3sY0dX xByJl5Nh9En5w== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sUnUO-000000002BE-2AT9; Fri, 19 Jul 2024 15:17:36 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH 2/7] arm64: dts: qcom: x1e80100: fix PCIe domain numbers Date: Fri, 19 Jul 2024 15:17:17 +0200 Message-ID: <20240719131722.8343-3-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240719131722.8343-1-johan+linaro@kernel.org> References: <20240719131722.8343-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The current PCIe domain numbers are off by one and do not match the numbers that the UEFI firmware (and Windows) uses. Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes") Cc: stable@vger.kernel.org # 6.9 Signed-off-by: Johan Hovold Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index c7aec564a318..07e00f1d1768 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -2916,7 +2916,7 @@ pcie6a: pci@1bf8000 { dma-coherent; - linux,pci-domain = <7>; + linux,pci-domain = <6>; num-lanes = <2>; interrupts = , @@ -3037,7 +3037,7 @@ pcie4: pci@1c08000 { dma-coherent; - linux,pci-domain = <5>; + linux,pci-domain = <4>; num-lanes = <2>; interrupts = , From patchwork Fri Jul 19 13:17:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 813452 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D17D13C67D; Fri, 19 Jul 2024 13:17:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; cv=none; b=OELhKHqC07F5KhCNTNvlqyG2WmFSx0iB1uCo6/hpISMx7nbm8vkzSEejoaLERQqukbaWXTMmXzgo1KSCO4SJn99d+Lf38jo1d4Kvrks+vflGSbX+U5ixWZlfv+eVS8wniWYZmRf9gOF8rMGySPbUtY6PElHFKHE0iR2EA1+S2a8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; c=relaxed/simple; bh=iJk3IcgisbQjv0U1z8NE0RXXYZsQFwNEI/+8pagonIk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VGT26+n9CWuDJH9SlnouhsU56xrDMcwSqsRCSiT+rQnxambE3rC60fwJcU1BIu4JQ6XbJyYgBYMcD9pvcsCkVPUtqUXkBCalTg5bABaryGZcyGlB8v2kp476Sq4FN6IUjt12acsnV9LMauTlBVEnnWeI5kaOHpE6p8a0HEC10fk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OH+O31Ah; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OH+O31Ah" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BB0F3C32782; Fri, 19 Jul 2024 13:17:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721395048; bh=iJk3IcgisbQjv0U1z8NE0RXXYZsQFwNEI/+8pagonIk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OH+O31AhzjXYkgYPo2XOqR+o30zV09aWIajGCmY2CZ7Ar68HofKBMqnFpu+AB2jog eUUDDa13Bc0SY5zg6h5HsK6pP/8/1FSDeQZmKKAjzMxNbzXdTgD09qKmBI/Adp9S/+ kQi2HsTqJ04PZnBgSHqZ6phBJpzNFAByzMjP1PCADDv1Zde9avyme6GANhY9FIkcUV KcUH0X3MhjTpJG7dFHAfM0J2ub9/8LH8bEJDijE9obt1kBhi6IQZM+B3qlUCMBCiPr NPXDupSlJsNAOXCTtRClv6KifMMWDN2yI3fJ3XPTgFzcg5Q51tF/nadMBYbSZZh1Fj W9sKPhPafnPmQ== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sUnUO-000000002BG-2VRS; Fri, 19 Jul 2024 15:17:36 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 3/7] arm64: dts: qcom: x1e80100-crd: fix up PCIe6a pinctrl node Date: Fri, 19 Jul 2024 15:17:18 +0200 Message-ID: <20240719131722.8343-4-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240719131722.8343-1-johan+linaro@kernel.org> References: <20240719131722.8343-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The PCIe6a pinctrl node appears to have been copied from the sc8280xp CRD dts, which has the NVMe on pcie2a and uses some funny indentation. Fix up the node name to match the x1e80100 use and label and use only tabs for indentation. Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index 6aa2ec1e7919..41d05ce01cbb 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -975,7 +975,7 @@ nvme_reg_en: nvme-reg-en-state { bias-disable; }; - pcie6a_default: pcie2a-default-state { + pcie6a_default: pcie6a-default-state { clkreq-n-pins { pins = "gpio153"; function = "pcie6a_clk"; @@ -991,11 +991,11 @@ perst-n-pins { }; wake-n-pins { - pins = "gpio154"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; + pins = "gpio154"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; }; tpad_default: tpad-default-state { From patchwork Fri Jul 19 13:17:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 813451 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D13112D1EA; Fri, 19 Jul 2024 13:17:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; cv=none; b=sVbCeu9Q+d5mUluMGkq4DWlyfoD5DHwjZCh+JREpULmP9Xx3vxJ9fxDsBKN3jWm15hHUin8G7yFq3m0tIt141a3bNTU3bX19pK8UTPYw4tWJOPJRjS/voB+lenm12UqrlyooSLb3BZ/UzH4TC+YeNzA4WhwKX4vdA6rMak1TYPM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; c=relaxed/simple; bh=0XRZypzPYXE0e00veUNHsKWkWyhcO5XmFRBNK8mnvXw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IBqLLMwH4F11EB5R8BwKtJ+C4GCUM22BgriQNHYnP9m5pVjncsa0+UbYG4ZWu2ixmswZeaJdsKcLvBzOOAurCmbllBSSlN5AZ1+DoIsRdGCAUn8RykllEgpuLwMbm2gq05lHE+O5sqKqQT3QU63j3CbUAdDe0I8jTIFSMYYICqM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NaDChEZ1; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NaDChEZ1" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C7EA7C4AF0D; Fri, 19 Jul 2024 13:17:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721395048; bh=0XRZypzPYXE0e00veUNHsKWkWyhcO5XmFRBNK8mnvXw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NaDChEZ1G9N2mftf+n5SUfSYXk10ia3Ph+/kuew62ZD7N3OFbR/NQVU/mP8FZUYG2 mSTWW7ui6IdOm5kMbtP2q1cnzAAwbr4oCT1wgPI4/bXi0YQdZtWfiOwsm6Y+PNyaxh FlmzoddKJKOxPvz/XbmWfJ5c6/vM7myU3tTBnZH3VhWAvV0+/3uH5WmlHx3fmf/h25 P8+qqgawN+lHKTsSB3cHdRcWKoz0LaRv6IvFNMwc/saDsXVi6PcQ0U/qIkJjTUSRcv YEBN5hBweNaIe10qBsM5SiJSv52CJ0/AG7RfMrMBXsZqgDNpCwhFEB6OxBEOv0g7V8 haaiO3+DTZKtA== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sUnUO-000000002BI-2pQo; Fri, 19 Jul 2024 15:17:36 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 4/7] arm64: dts: qcom: x1e80100-crd: disable PCIe6a perst pull down Date: Fri, 19 Jul 2024 15:17:19 +0200 Message-ID: <20240719131722.8343-5-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240719131722.8343-1-johan+linaro@kernel.org> References: <20240719131722.8343-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Disable the PCIe6a perst pull-down resistor to save some power. Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index 41d05ce01cbb..7406f1ad9c55 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -987,7 +987,7 @@ perst-n-pins { pins = "gpio152"; function = "gpio"; drive-strength = <2>; - bias-pull-down; + bias-disable; }; wake-n-pins { From patchwork Fri Jul 19 13:17:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 813630 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D0D685283; Fri, 19 Jul 2024 13:17:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; cv=none; b=FDRfI8VmKWgYX9oatA11qSNquA1D3RQI0nu8/I3fF/vlgb9oTwYxUrQIPitTwXgaZPOQ4DzlOBnrjMnS6iCZcS5zD8gvothxO3n9u8ddgEunxHXP8L7BEdftCQ3oht3ROtQDUOBm91OvILdpBBHnRr690KtfOmMbyZI6qRERPJM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; c=relaxed/simple; bh=duXa92ouaTdUeRj9iAXjigOdHkj9jO/WZ01Q6V+4258=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Kyj6ZQbh0peRwQxRDpp5VXCZZnbXGmeQ156k6g0g8YJjqL+cYqtt95ETLd8eImCTM9BViZQQScwVsAu5JM3BqMShJ1VzEIZKroCvOyIGdduRc3e14Gj0sKz/cK8yO3EVSMzJdNTrP3b2VK14VDfjfHOj2co+rBtkdSshcK6ri8E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KaY026k+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KaY026k+" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C0EA7C4AF09; Fri, 19 Jul 2024 13:17:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721395048; bh=duXa92ouaTdUeRj9iAXjigOdHkj9jO/WZ01Q6V+4258=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KaY026k+3NPH0NRHitAK3IeCKDZVMoaJeewtgaVtVCj9fejgo+XQIfTd6o926Kkpo XkyWQClC/xCp5YYgKsv4F2NSyAfgQpu6LU8V/FkDp/NK0IGiwOjfMC4O+WCaNff7mE pfCzUTvrphCOySR5GXQscxX/9yfW5MQklLHqalhAXC0nz+8KVGaPBleXqiIuPJihTV 5XAjakYv533qpfBD2ZNtn9/f6ltrVzbp6irHjLt62gdRGkoeWbXIXw4uHt3LdUrF+W 2BUXqH/Iq/Cm9GP+/BWrMvMNe6p38BP4LunkoVj0RfVSBhViJqFCDGNwYcquMNeR1Y zlVg6hXZO1dYQ== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sUnUO-000000002BK-39rI; Fri, 19 Jul 2024 15:17:36 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH 5/7] arm64: dts: qcom: x1e80100-crd: fix missing PCIe4 gpios Date: Fri, 19 Jul 2024 15:17:20 +0200 Message-ID: <20240719131722.8343-6-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240719131722.8343-1-johan+linaro@kernel.org> References: <20240719131722.8343-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the missing PCIe4 perst, wake and clkreq GPIOs. Fixes: d7e03cce0400 ("arm64: dts: qcom: x1e80100-crd: Enable more support") Cc: stable@vger.kernel.org # 6.9 Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 29 +++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index 7406f1ad9c55..72d9feec907b 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -784,6 +784,12 @@ &mdss_dp3_phy { }; &pcie4 { + perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie4_default>; + status = "okay"; }; @@ -975,6 +981,29 @@ nvme_reg_en: nvme-reg-en-state { bias-disable; }; + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins = "gpio147"; + function = "pcie4_clk"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio146"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + wake-n-pins { + pins = "gpio148"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + pcie6a_default: pcie6a-default-state { clkreq-n-pins { pins = "gpio153"; From patchwork Fri Jul 19 13:17:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 813631 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D1B713C681; Fri, 19 Jul 2024 13:17:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; cv=none; b=T79gNkyl7LOO+2lPA7X6lI9BNlocp4iiwdij5vpUcGYPzIzBGpvF30UBWOkok7vukZ1sdPiKE2kYJ29yA+OWXOBX2mM2ElVMOC2aRI+VUO8fPdU2puEszlwW/WkRCF3OENUiijv5DP2+kq4IqmD2Of9skFXVQ8FbYOpO0zrqb8w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721395049; c=relaxed/simple; bh=TrDClakR9x7IBNsa1UNQebotcE2wpGouhqU8Jgr42yo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=c6bT0FY2aA84NpPquHT8yd63EM5ZxoriYHXsH3gMSxQmoMvVwJtvl8h9qndqdOj1fv/Sg9Nv6LYB1NEsvg+X2YuIZZgti8f1dQ6ry4g4XE6Hv9EDghktN9vGith8T1bcoBh9yYvHJezfgICrkQz/rQNVXSsUdsO04vjDvFdXBnc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WoXiZRCz; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WoXiZRCz" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C450AC4AF0B; Fri, 19 Jul 2024 13:17:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721395048; bh=TrDClakR9x7IBNsa1UNQebotcE2wpGouhqU8Jgr42yo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WoXiZRCznFJTCOIzwaYcwQ+t84UarJ3DO1r6iHpyTwjDd+aVgYYiFEtWMDkPMlsCJ L/GmxpplF1MduaUaLunYOQ2fcp4CTxUx6VjnE9VV/gYCN/71iPn9RGySgrGaXpHfV2 DzCvqqPGr9C+9q5ZTEFE45/R7ZIAkYfbwBcfMWt5GavrE5G0Roy/ame03tg2pGWGsW Y4XWtRvS6jTMbpjUhxg2PvhzpEykg9v4LsgA3rKee31QzlQoUz8y3vOq3nHXXDPIC4 LmKl8n81gcIlBIOc8PRqTZy8vBrZ+v9p3DiP7oCzrcg9ZyJr0TL92OxqZnzFidHH/v 9CbhAAoDToCuw== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sUnUO-000000002BM-3UJA; Fri, 19 Jul 2024 15:17:36 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 6/7] arm64: dts: qcom: x1e80100: add PCIe5 nodes Date: Fri, 19 Jul 2024 15:17:21 +0200 Message-ID: <20240719131722.8343-7-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240719131722.8343-1-johan+linaro@kernel.org> References: <20240719131722.8343-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Describe the fifth PCIe controller and its PHY. Note that using the GIC ITS with PCIe5 does not work currently so the ITS mapping is left unspecified for now. Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 121 ++++++++++++++++++++++++- 1 file changed, 120 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index 07e00f1d1768..e8acb1180857 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -760,7 +760,7 @@ gcc: clock-controller@100000 { <&sleep_clk>, <0>, <&pcie4_phy>, - <0>, + <&pcie5_phy>, <&pcie6a_phy>, <0>, <&usb_1_ss0_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, @@ -3014,6 +3014,125 @@ pcie6a_phy: phy@1bfc000 { status = "disabled"; }; + pcie5: pci@1c00000 { + device_type = "pci"; + compatible = "qcom,pcie-x1e80100"; + reg = <0 0x01c00000 0 0x3000>, + <0 0x7e000000 0 0xf1d>, + <0 0x7e000f40 0 0xa8>, + <0 0x7e001000 0 0x1000>, + <0 0x7e100000 0 0x100000>, + <0 0x01c03000 0 0x1000>; + reg-names = "parf", + "dbi", + "elbi", + "atu", + "config", + "mhi"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x7e200000 0x0 0x100000>, + <0x02000000 0x0 0x7e300000 0x0 0x7e300000 0x0 0x1d00000>; + bus-range = <0x00 0xff>; + + dma-coherent; + + linux,pci-domain = <5>; + num-lanes = <2>; + + interrupts = , + , + , + , + , + , + , + ; + interrupt-names = "msi0", + "msi1", + "msi2", + "msi3", + "msi4", + "msi5", + "msi6", + "msi7"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 0 0 70 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc 0 0 0 71 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc 0 0 0 72 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc 0 0 0 73 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&gcc GCC_PCIE_5_AUX_CLK>, + <&gcc GCC_PCIE_5_CFG_AHB_CLK>, + <&gcc GCC_PCIE_5_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_5_SLV_AXI_CLK>, + <&gcc GCC_PCIE_5_SLV_Q2A_AXI_CLK>, + <&gcc GCC_CFG_NOC_PCIE_ANOC_NORTH_AHB_CLK>, + <&gcc GCC_CNOC_PCIE_NORTH_SF_AXI_CLK>; + clock-names = "aux", + "cfg", + "bus_master", + "bus_slave", + "slave_q2a", + "noc_aggr", + "cnoc_sf_axi"; + + assigned-clocks = <&gcc GCC_PCIE_5_AUX_CLK>; + assigned-clock-rates = <19200000>; + + interconnects = <&pcie_south_anoc MASTER_PCIE_5 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS + &cnoc_main SLAVE_PCIE_5 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "pcie-mem", + "cpu-pcie"; + + resets = <&gcc GCC_PCIE_5_BCR>, + <&gcc GCC_PCIE_5_LINK_DOWN_BCR>; + reset-names = "pci", + "link_down"; + + power-domains = <&gcc GCC_PCIE_5_GDSC>; + + phys = <&pcie5_phy>; + phy-names = "pciephy"; + + status = "disabled"; + }; + + pcie5_phy: phy@1c06000 { + compatible = "qcom,x1e80100-qmp-gen3x2-pcie-phy"; + reg = <0 0x01c06000 0 0x2000>; + + clocks = <&gcc GCC_PCIE_5_AUX_CLK>, + <&gcc GCC_PCIE_5_CFG_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_PCIE_5_PHY_RCHNG_CLK>, + <&gcc GCC_PCIE_5_PIPE_CLK>; + clock-names = "aux", + "cfg_ahb", + "ref", + "rchng", + "pipe"; + + resets = <&gcc GCC_PCIE_5_PHY_BCR>; + reset-names = "phy"; + + assigned-clocks = <&gcc GCC_PCIE_5_PHY_RCHNG_CLK>; + assigned-clock-rates = <100000000>; + + power-domains = <&gcc GCC_PCIE_5_PHY_GDSC>; + + #clock-cells = <0>; + clock-output-names = "pcie5_pipe_clk"; + + #phy-cells = <0>; + + status = "disabled"; + }; + pcie4: pci@1c08000 { device_type = "pci"; compatible = "qcom,pcie-x1e80100"; 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Fri, 19 Jul 2024 15:17:36 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 7/7] arm64: dts: qcom: x1e80100-crd: enable SDX65 modem Date: Fri, 19 Jul 2024 15:17:22 +0200 Message-ID: <20240719131722.8343-8-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240719131722.8343-1-johan+linaro@kernel.org> References: <20240719131722.8343-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enable PCIe5 and the SDX65 modem. Note that the modem may need to be flashed with firmware before use. Signed-off-by: Johan Hovold Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 65 +++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index 72d9feec907b..e7bc283a0da9 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -301,6 +301,22 @@ vreg_nvme: regulator-nvme { pinctrl-names = "default"; pinctrl-0 = <&nvme_reg_en>; }; + + vreg_wwan: regulator-wwan { + compatible = "regulator-fixed"; + + regulator-name = "SDX_VPH_PWR"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 221 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&wwan_sw_en>; + + regulator-boot-on; + }; }; &apps_rsc { @@ -800,6 +816,25 @@ &pcie4_phy { status = "okay"; }; +&pcie5 { + perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply = <&vreg_wwan>; + + pinctrl-names = "default"; + pinctrl-0 = <&pcie5_default>; + + status = "okay"; +}; + +&pcie5_phy { + vdda-phy-supply = <&vreg_l3i_0p8>; + vdda-pll-supply = <&vreg_l3e_1p2>; + + status = "okay"; +}; + &pcie6a { perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; @@ -1004,6 +1039,29 @@ wake-n-pins { }; }; + pcie5_default: pcie5-default-state { + clkreq-n-pins { + pins = "gpio150"; + function = "pcie5_clk"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio149"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + wake-n-pins { + pins = "gpio151"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + pcie6a_default: pcie6a-default-state { clkreq-n-pins { pins = "gpio153"; @@ -1055,6 +1113,13 @@ wcd_default: wcd-reset-n-active-state { bias-disable; output-low; }; + + wwan_sw_en: wwan-sw-en-state { + pins = "gpio221"; + function = "gpio"; + drive-strength = <4>; + bias-disable; + }; }; &uart21 {