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Fri, 19 Jul 2024 04:00:15 -0700 (PDT) From: Neil Armstrong Date: Fri, 19 Jul 2024 13:00:10 +0200 Subject: [PATCH 1/4] ufs: allocate descriptors with size aligned with DMA_MINALIGN MIME-Version: 1.0 Message-Id: <20240719-u-boot-ufs-dcache-fixup-v1-1-b044fc9564e9@linaro.org> References: <20240719-u-boot-ufs-dcache-fixup-v1-0-b044fc9564e9@linaro.org> In-Reply-To: <20240719-u-boot-ufs-dcache-fixup-v1-0-b044fc9564e9@linaro.org> To: Bhupesh Sharma , Neha Malcom Francis , Tom Rini Cc: Marek Vasut , Caleb Connolly , u-boot-qcom@groups.io, u-boot@lists.denx.de, Neil Armstrong X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1349; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=9uuL7WgYDcbYQ123de/k6aM9CyjgPchU1v9LdgwJNHs=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBmmkc8jaKIBed6JukbM3+trpgoq4vS5+0dQOv+UAkE O3P5lFuJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZppHPAAKCRB33NvayMhJ0SAJD/ 4qpmUovPRHm56EUxriUvTZPVlgCTeKI05cBHlBHuiMHnvoZNZUn7ysgelA89MNWmcdoPXKVznTFUJO itBVLtOiHtGN5fljVHCdLedfkp6C6GdsW9uACzlCva4/mih4US80Sdl65V7YZf7C9/73Q85xATE3iv bE3ccXdMa74VPjrLU5OclIMPcNrQvQTd6apqFgipWVgVx0VqTcrybD9vncO/ms/OCLKRL+Z3wlUXSk 3PmmJI1mz8j3jTmPXfWGMsqC9Y0jR3BLLE/KFhJHlfi0Cr8glXLOnUJJWRTpCSe17WP29P+5zyNpUn 5oXxUGJj0604obo0IQYaneoxsK0JaoBRBWJ4OeDIZ5Qem52014TeH86wNIjbc3B9hVoZ5o98YoyD8w MdbnHILP3Ju8ZLENyj2shSkdw7WHYArZSBPOoKk8aWsUA7gs9I+IfdU3q+IclKHzxU+RGxs28aap4o jWKfjoeDV3uTxF4PYbqVVfo7dbRZiKjg0dj4+JYQkResNcGup+dymUiuq6wLS80dMQYZdXRlktiOzG RNQCiSn2m3PjvmgAmplm8g4ZwGGAmHa6fh4ITsBGpp2TanXtMUc6simyfBreW1VE4ji3Vf3q0RB33h tGjtBK6texbnug0br8+txGSMsQLAMZGCI71BEdwDFQvgdh+hlNPv6ZPCQsYw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Align the allocation size with DMA_MINALIGN to make sure we do not flush/invalidate data from following allocations. Signed-off-by: Neil Armstrong --- drivers/ufs/ufs.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index e4400f319a7..bc86903245c 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -634,7 +634,9 @@ static int ufshcd_memory_alloc(struct ufs_hba *hba) /* Allocate one Transfer Request Descriptor * Should be aligned to 1k boundary. */ - hba->utrdl = memalign(1024, sizeof(struct utp_transfer_req_desc)); + hba->utrdl = memalign(1024, + ALIGN(sizeof(struct utp_transfer_req_desc), + ARCH_DMA_MINALIGN)); if (!hba->utrdl) { dev_err(hba->dev, "Transfer Descriptor memory allocation failed\n"); return -ENOMEM; @@ -643,7 +645,9 @@ static int ufshcd_memory_alloc(struct ufs_hba *hba) /* Allocate one Command Descriptor * Should be aligned to 1k boundary. */ - hba->ucdl = memalign(1024, sizeof(struct utp_transfer_cmd_desc)); + hba->ucdl = memalign(1024, + ALIGN(sizeof(struct utp_transfer_cmd_desc), + ARCH_DMA_MINALIGN)); if (!hba->ucdl) { dev_err(hba->dev, "Command descriptor memory allocation failed\n"); return -ENOMEM; From patchwork Fri Jul 19 11:00:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 813376 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp691002wro; Fri, 19 Jul 2024 04:00:40 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVenN4sLlPfYsXvnzvYAhvWneR24tc6OtdnlH1ztVhn7c3GBnnUscuzZ4FYV57rO88EujO9zkvFhnRZ99wYFKfl X-Google-Smtp-Source: AGHT+IHmbnf/3TvvuIcDAPDAe5vGpWwINHboWNdCt7R2Tm8jo5N0xEaPpiZuw+LJco8dfUdE6MAf X-Received: by 2002:a50:8e11:0:b0:5a1:a7cb:8f86 with SMTP id 4fb4d7f45d1cf-5a1a7cb925fmr3220184a12.0.1721386840527; Fri, 19 Jul 2024 04:00:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721386840; cv=none; d=google.com; s=arc-20160816; b=H2RC5Zw9Yuhq7ZHMFyuJ8AdjBOrDg8sXbi8o/5cGuQCliuYv4DOdmHq2WY6+kjLqF2 oykB+kwz+b/fL2RbZ3NS/CymO8tLAPOhhBOPBv+TaGGiRLx4uc9la4CySrpOYJYFbs6I GsLSLZTZap/B6l8kd+FhcDcryAdDATktzwyJcTz1d82bPBe+CoU3tbjRP4893xqdMjVl Toi2fu81ocfB21jAyaEUrtWbtf2T/aWM+j3GyJvUs1AAZ34pYI+/5/PYxkV7BKY1SbcF Tk2nrf9Dxez6lmaMQojqbN6tAB5jg+Vy6DNdleFQsdnEPvH+yiTipgp4aI3fNXNTZBu+ 4QRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=rSYHlAeTf5vfAufBpN4+ASNMaeHehsmXJh8iGiG/crE=; fh=PXbMw5u5doiVPtbh7NqjWSnuLTCs0VGSgxCgcNnl8Ak=; b=fAei+0ms2ktJe3oSgUODkRdJK3cRYNZj5XGXUSsDQ6YeJB6FYjFW60+wwudQenEMSQ H9J2Gc809OB4KxWxJBES7ah93zXoxyQBM1Fnwa7R4OvLJPs/hHUTZ/DBvVy6/+5ZzjxO D0UVPSm0n1g108f9LV6jIi99xlPzJuy6Paqi9rnoeuCYz222JGwPVB60++GMj32rcfil jnBu58tK7ZUmpC14mpm9FSXtKHIK9oMDDwPreXYWBeDRoFP67eHz74dDzjhJ021MokRQ z4oS9dm8CNVPxfDEXc8wNEdyoMGjTCI8uEMTaIB0CWsA/KQ/xl6K16xcckWk/3/rL8Cj qq0A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XB1y6Ptq; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Fri, 19 Jul 2024 04:00:16 -0700 (PDT) From: Neil Armstrong Date: Fri, 19 Jul 2024 13:00:11 +0200 Subject: [PATCH 2/4] ufs: fix dcache flush and invalidate range calculation MIME-Version: 1.0 Message-Id: <20240719-u-boot-ufs-dcache-fixup-v1-2-b044fc9564e9@linaro.org> References: <20240719-u-boot-ufs-dcache-fixup-v1-0-b044fc9564e9@linaro.org> In-Reply-To: <20240719-u-boot-ufs-dcache-fixup-v1-0-b044fc9564e9@linaro.org> To: Bhupesh Sharma , Neha Malcom Francis , Tom Rini Cc: Marek Vasut , Caleb Connolly , u-boot-qcom@groups.io, u-boot@lists.denx.de, Neil Armstrong X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1874; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=T3zjfDg6dn9NdCFWLjfaWxgHWLxiPmqgJ07RdmwZ1jQ=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBmmkc8202QuuxYoJF3juURPrQYc9nlrAJYN+V3KgJX Y4UhS1WJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZppHPAAKCRB33NvayMhJ0TKBEA CMFgvIjhMQ62QGtSBua2/xHYQE4xHSofUTGX0HhV7XPkVV9iHbnjTERRqvx4dYENp3FP2lP6Vtkx2x gOpSVBWLh+e0yfWLP6bP510tc/MrWPmk+XpBP/p6mWnCKnOVtldxrjRoWbWZYWI+QjYDVFdnoUD26/ V+/16QbJbS0mNLRORpe/5zCM5oAOzo6CXYxEJBi13xJRNTStTYURs3+RrbucDn9FBdhl+2huDhVhj/ sR2g06qj0IBWYKsMDHzSBhMFO5r5XFoEu2Q/VH1KCgV5MmxYo7xkr2375yaDfE750ox+frFe8jvYq5 0vAH8Suw01YLRBrRCZ9/IC9Kh3yNXEwhZVKaBdSC+DgOvVxiocLOBpJ5YAFt2rkg27RpSs/TChVIWu 72OJMV3pAkc1x9RSVCZpxwFgPw/K/Cg/GhHHf1rOasbVMWvqPlRywgUHWMztMCD0B6aru1UydeCLP8 DZRktPeVuYQmZdE8lNYKoriurufK1X3TRBw1a6idC2SnSRhnmVs6dy3vI4yFBciMDMn4BbjwZGIoLz W0Df/EKXlJdNgIxradjDVwhQE2kVqQOwkq83NXlV8zwIE96Etf289dI6usyFn3njJ2QKhIPHx24i6I nhd0bpLvsNAPJa3FXDuBftQMMQ+RlfaQXeXGKof73sFluym69C1iPxgFCx+A== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The current calculation will omit doing a flush/invalidate on the last cacheline if the base address is not aligned with DMA_MINALIGN. This causes commands failures and write corruptions on Qualcomm platforms. Signed-off-by: Neil Armstrong --- drivers/ufs/ufs.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index bc86903245c..db487d1ff9a 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -704,11 +704,11 @@ static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba) */ static void ufshcd_cache_flush_and_invalidate(void *addr, unsigned long size) { - uintptr_t aaddr = (uintptr_t)addr & ~(ARCH_DMA_MINALIGN - 1); - unsigned long asize = ALIGN(size, ARCH_DMA_MINALIGN); + uintptr_t start_addr = (uintptr_t)addr & ~(ARCH_DMA_MINALIGN - 1); + uintptr_t end_addr = ALIGN((uintptr_t)addr + size, ARCH_DMA_MINALIGN); - flush_dcache_range(aaddr, aaddr + asize); - invalidate_dcache_range(aaddr, aaddr + asize); + flush_dcache_range(start_addr, end_addr); + invalidate_dcache_range(start_addr, end_addr); } /** @@ -1467,13 +1467,13 @@ static void prepare_prdt_table(struct ufs_hba *hba, struct scsi_cmd *pccb) } if (pccb->dma_dir == DMA_TO_DEVICE) { /* Write to device */ - flush_dcache_range(aaddr, aaddr + - ALIGN(datalen, ARCH_DMA_MINALIGN)); + flush_dcache_range(aaddr, + ALIGN((uintptr_t)pccb->pdata + datalen, ARCH_DMA_MINALIGN)); } /* In any case, invalidate cache to avoid stale data in it. */ - invalidate_dcache_range(aaddr, aaddr + - ALIGN(datalen, ARCH_DMA_MINALIGN)); + invalidate_dcache_range(aaddr, + ALIGN((uintptr_t)pccb->pdata + datalen, ARCH_DMA_MINALIGN)); table_length = DIV_ROUND_UP(pccb->datalen, MAX_PRDT_ENTRY); buf = pccb->pdata; From patchwork Fri Jul 19 11:00:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 813378 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp691202wro; Fri, 19 Jul 2024 04:01:03 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWysKHejAUGwGpSVnIX9CoG9Tgc1gdb4W5pNUuy/GiGWk5aCjRuX/7rL0tpz4dj2VckHZHYvM70c/v/82y+NBmu X-Google-Smtp-Source: AGHT+IEOzdHecf2SzYEDtKksB2Fjuqxnccx0eluwLxnk/Idw2qIOZTiiAy1LUiFCQP3zSz9motd2 X-Received: by 2002:a50:cc9d:0:b0:5a1:f9bc:7f13 with SMTP id 4fb4d7f45d1cf-5a1f9bc8136mr3113671a12.22.1721386863117; Fri, 19 Jul 2024 04:01:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721386863; cv=none; d=google.com; s=arc-20160816; b=wYRTT008dyXUHrWsbuvPIo1JhcnrLTg0gXC01U/YOZ4YV+dicQFiXa8Cy0SbD4Jdcn bxzNFamh0yDMVnznV+PPMJVeE+KT18DSPSbps7/YmZzHmNxkapI9Qy5iB39HNZuxuA7A IUA+uGtGV4KI022u8+o4f8BgvcHY8PmP21hX3lNqbgAC18RowrIJXRHW6mPdNKbMAshC 4b9ZcgQdKTnC8B+QkULzUEl/2sJTLJLaZNCh94mpuVfl9lj7undX0NlvzuU/gkCw1e0r KJr5YZJ7VyQxydL0dO6b6X1hglv3smiUcJK8iLmdCnc4s0tHpdkaHD7MDlOop1TMW5Ph bAaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=ecTGqWxYsH75D+OkZgsgN1XItusa9jXgRfqnEpVZGrA=; fh=pF3XgbY5Tu+9OsHsRfZr9jx85dI2gA0qfb4Nrwwbj2s=; b=zheyQg8PShzANvKBWZkE8wbdMng6XhWk1ITO1I80msFdSJGOVcERFfH3jvhr0XLMRu K+0ye/xADwXuw6QGDZq5GVGwFjQ4CCEk2b/XEmLsxC5cvc7fpa+IjsWJdckjF91AKJrE a4NMP5Lh9gSlLItDK3chu44JUYmNByCgmDG4ICth/GlWK2hE03uobEurLffj0DDTJCPG 1+Ev0gHknA14ynrNMNhcDqBcARWAs5zt8mdUROHGlmz3dLPUtoT32achytpSiwAXi8ip De/+9Ti/yBVOo4Wmw6QMdnflRxxXUaXprR4D6Jep1ztfwaVJeX6QoOi7oCwG0jiO7m7U ysGQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Tvbj/3Kl"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Split the function in two and add the appropriate cacheline invalidates after the UFS DMA operation finishes to make sure we read from memory. Flushing then invalidating cacheline unaligned data causes data corruption issues on Qualcomm platforms, and is largely unnecessary anyway, so let's cleanup the cache operations. Signed-off-by: Neil Armstrong --- drivers/ufs/ufs.c | 45 ++++++++++++++++++++++++++++++--------------- 1 file changed, 30 insertions(+), 15 deletions(-) diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index db487d1ff9a..76cda83ce81 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -697,17 +697,28 @@ static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba) } /** - * ufshcd_cache_flush_and_invalidate - Flush and invalidate cache + * ufshcd_cache_flush - Flush cache * - * Flush and invalidate cache in aligned address..address+size range. - * The invalidation is in place to avoid stale data in cache. + * Flush cache in aligned address..address+size range. */ -static void ufshcd_cache_flush_and_invalidate(void *addr, unsigned long size) +static void ufshcd_cache_flush(void *addr, unsigned long size) { uintptr_t start_addr = (uintptr_t)addr & ~(ARCH_DMA_MINALIGN - 1); uintptr_t end_addr = ALIGN((uintptr_t)addr + size, ARCH_DMA_MINALIGN); flush_dcache_range(start_addr, end_addr); +} + +/** + * ufshcd_cache_invalidate - Invalidate cache + * + * Invalidate cache in aligned address..address+size range. + */ +static void ufshcd_cache_invalidate(void *addr, unsigned long size) +{ + uintptr_t start_addr = (uintptr_t)addr & ~(ARCH_DMA_MINALIGN - 1); + uintptr_t end_addr = ALIGN((uintptr_t)addr + size, ARCH_DMA_MINALIGN); + invalidate_dcache_range(start_addr, end_addr); } @@ -755,7 +766,7 @@ static void ufshcd_prepare_req_desc_hdr(struct ufs_hba *hba, req_desc->prd_table_length = 0; - ufshcd_cache_flush_and_invalidate(req_desc, sizeof(*req_desc)); + ufshcd_cache_flush(req_desc, sizeof(*req_desc)); } static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba, @@ -786,13 +797,13 @@ static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba, /* Copy the Descriptor */ if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC) { memcpy(ucd_req_ptr + 1, query->descriptor, len); - ufshcd_cache_flush_and_invalidate(ucd_req_ptr, 2 * sizeof(*ucd_req_ptr)); + ufshcd_cache_flush(ucd_req_ptr, 2 * sizeof(*ucd_req_ptr)); } else { - ufshcd_cache_flush_and_invalidate(ucd_req_ptr, sizeof(*ucd_req_ptr)); + ufshcd_cache_flush(ucd_req_ptr, sizeof(*ucd_req_ptr)); } memset(hba->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp)); - ufshcd_cache_flush_and_invalidate(hba->ucd_rsp_ptr, sizeof(*hba->ucd_rsp_ptr)); + ufshcd_cache_flush(hba->ucd_rsp_ptr, sizeof(*hba->ucd_rsp_ptr)); } static inline void ufshcd_prepare_utp_nop_upiu(struct ufs_hba *hba) @@ -810,8 +821,8 @@ static inline void ufshcd_prepare_utp_nop_upiu(struct ufs_hba *hba) memset(hba->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp)); - ufshcd_cache_flush_and_invalidate(ucd_req_ptr, sizeof(*ucd_req_ptr)); - ufshcd_cache_flush_and_invalidate(hba->ucd_rsp_ptr, sizeof(*hba->ucd_rsp_ptr)); + ufshcd_cache_flush(ucd_req_ptr, sizeof(*ucd_req_ptr)); + ufshcd_cache_flush(hba->ucd_rsp_ptr, sizeof(*hba->ucd_rsp_ptr)); } /** @@ -878,6 +889,8 @@ static int ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag) */ static inline int ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr) { + ufshcd_cache_invalidate(ucd_rsp_ptr, sizeof(*ucd_rsp_ptr)); + return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24; } @@ -889,6 +902,8 @@ static inline int ufshcd_get_tr_ocs(struct ufs_hba *hba) { struct utp_transfer_req_desc *req_desc = hba->utrdl; + ufshcd_cache_invalidate(req_desc, sizeof(*req_desc)); + return le32_to_cpu(req_desc->header.dword_2) & MASK_OCS; } @@ -1438,8 +1453,8 @@ void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufs_hba *hba, memcpy(ucd_req_ptr->sc.cdb, pccb->cmd, cdb_len); memset(hba->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp)); - ufshcd_cache_flush_and_invalidate(ucd_req_ptr, sizeof(*ucd_req_ptr)); - ufshcd_cache_flush_and_invalidate(hba->ucd_rsp_ptr, sizeof(*hba->ucd_rsp_ptr)); + ufshcd_cache_flush(ucd_req_ptr, sizeof(*ucd_req_ptr)); + ufshcd_cache_flush(hba->ucd_rsp_ptr, sizeof(*hba->ucd_rsp_ptr)); } static inline void prepare_prdt_desc(struct ufshcd_sg_entry *entry, @@ -1462,7 +1477,7 @@ static void prepare_prdt_table(struct ufs_hba *hba, struct scsi_cmd *pccb) if (!datalen) { req_desc->prd_table_length = 0; - ufshcd_cache_flush_and_invalidate(req_desc, sizeof(*req_desc)); + ufshcd_cache_flush(req_desc, sizeof(*req_desc)); return; } @@ -1488,8 +1503,8 @@ static void prepare_prdt_table(struct ufs_hba *hba, struct scsi_cmd *pccb) prepare_prdt_desc(&prd_table[table_length - i - 1], buf, datalen - 1); req_desc->prd_table_length = table_length; - ufshcd_cache_flush_and_invalidate(prd_table, sizeof(*prd_table) * table_length); - ufshcd_cache_flush_and_invalidate(req_desc, sizeof(*req_desc)); + ufshcd_cache_flush(prd_table, sizeof(*prd_table) * table_length); + ufshcd_cache_flush(req_desc, sizeof(*req_desc)); } static int ufs_scsi_exec(struct udevice *scsi_dev, struct scsi_cmd *pccb) From patchwork Fri Jul 19 11:00:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 813377 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp691117wro; Fri, 19 Jul 2024 04:00:52 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVnjXL1NWCXYr1bf5/BJ0oijDsI+cxbzxY06RpkhpR/sKdyFQovy3UZA6Wmhq9zRnNw70UKnQuxftPd6WYxDH/u X-Google-Smtp-Source: AGHT+IFoccc248iYoee4uUs8afgWqStG9ry5grC68ltbA4BxP0gIWFKLgLo5LyTbMz+6paHvdg0D X-Received: by 2002:a05:6512:a92:b0:52c:a5cb:69e4 with SMTP id 2adb3069b0e04-52ee5441795mr4079373e87.54.1721386851913; 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Fri, 19 Jul 2024 04:00:17 -0700 (PDT) From: Neil Armstrong Date: Fri, 19 Jul 2024 13:00:13 +0200 Subject: [PATCH 4/4] ufs: use dcache helpers for scsi_cmd data and only invalidate if necessary MIME-Version: 1.0 Message-Id: <20240719-u-boot-ufs-dcache-fixup-v1-4-b044fc9564e9@linaro.org> References: <20240719-u-boot-ufs-dcache-fixup-v1-0-b044fc9564e9@linaro.org> In-Reply-To: <20240719-u-boot-ufs-dcache-fixup-v1-0-b044fc9564e9@linaro.org> To: Bhupesh Sharma , Neha Malcom Francis , Tom Rini Cc: Marek Vasut , Caleb Connolly , u-boot-qcom@groups.io, u-boot@lists.denx.de, Neil Armstrong X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1584; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=pCbHBk8j8/wYJtJSw8HJQGO5K/JRQl2HiE7FdN5Aphw=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBmmkc9s4pez6MLIBq2CJNKeZAZqBODph7yx5lkGs6d 8kgRNaqJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZppHPQAKCRB33NvayMhJ0S01EA ClorARNi/yk8t3Ttje12KVNIlHrvGwuUQBgsjOGFJIHNLs30jF/XB1sTNtCfAB60DeLdcxjLnpabLz tXnk5BQbX3BrRZ3e8b2ADEdjIgkcZElp54BAeb7MvNEwbFSgLgEAIVsylT8MBoi2h1dJIYZj8Ztecf TkrCuC5nYNmAaGLb/A5uE3VEJBx+zcLUDg6VGibghT/AuSkISq8mJRcSSfMXLcNKAvzB12zgpfC5Vj 8PhRe3MrhhdXGkahmlDRMlTbWGY049auWrJjpXtf5AqpQuf6vo5Hx7jRnDIzRqQX8/N1Q03C7PX1QX FC0uNEJuLNeW0N6eaUFZpzz3lZCXw3zfIDJytrAQJdZJoBXGQ44hBztrmr4j3lNHa9dgeyVjax6CIm bjy5kGFR0wmOWkEte23pL77pV3P26L8GOnduLqbvEmMnFBujgsGqVg4fRlsXlJRGtDI9TuHkc3fiRL W7buKmfW184nf/xwWc8Orlek894hKFA0nbQTyOmq33PMlOB3Ct8QQyLt+xM1k1eTlKb7uhdolMYT+g fzKbtgzPMVcGPwbKdxq7XYCPzsq/FeNxrGFJwKprTGECUWOR3xwkq1UUWPTpgIbC18z4jGGAYu/9fP 3O+zJvaoaMU2PYToaPfvCSGcyKVThG1OF9FXw9CgPhdjumwCrwONwP7e8DhQ== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Now we have proper flush and invalidate helpers, we can use them directly to operate on the scsi_cmd data. Likewise, we do not need to flush then invalidate, just flush _or_ invalidate depending on the data direction. Signed-off-by: Neil Armstrong --- drivers/ufs/ufs.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c index 76cda83ce81..646d4856e9c 100644 --- a/drivers/ufs/ufs.c +++ b/drivers/ufs/ufs.c @@ -1469,7 +1469,6 @@ static void prepare_prdt_table(struct ufs_hba *hba, struct scsi_cmd *pccb) { struct utp_transfer_req_desc *req_desc = hba->utrdl; struct ufshcd_sg_entry *prd_table = hba->ucd_prdt_ptr; - uintptr_t aaddr = (uintptr_t)(pccb->pdata) & ~(ARCH_DMA_MINALIGN - 1); ulong datalen = pccb->datalen; int table_length; u8 *buf; @@ -1481,14 +1480,10 @@ static void prepare_prdt_table(struct ufs_hba *hba, struct scsi_cmd *pccb) return; } - if (pccb->dma_dir == DMA_TO_DEVICE) { /* Write to device */ - flush_dcache_range(aaddr, - ALIGN((uintptr_t)pccb->pdata + datalen, ARCH_DMA_MINALIGN)); - } - - /* In any case, invalidate cache to avoid stale data in it. */ - invalidate_dcache_range(aaddr, - ALIGN((uintptr_t)pccb->pdata + datalen, ARCH_DMA_MINALIGN)); + if (pccb->dma_dir == DMA_TO_DEVICE) + ufshcd_cache_flush(pccb->pdata, datalen); + else + ufshcd_cache_invalidate(pccb->pdata, datalen); table_length = DIV_ROUND_UP(pccb->datalen, MAX_PRDT_ENTRY); buf = pccb->pdata;