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[209.51.188.17]) by mx.google.com with ESMTPS id 6a1803df08f44-6b79ca7fd57si5319886d6.595.2024.07.17.14.49.44 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 17 Jul 2024 14:49:45 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="P/SS0xeA"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUCUn-00070Z-Gh; Wed, 17 Jul 2024 17:47:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUCUk-0006zG-NN for qemu-devel@nongnu.org; Wed, 17 Jul 2024 17:47:31 -0400 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUCUh-0001rp-Ue for qemu-devel@nongnu.org; Wed, 17 Jul 2024 17:47:30 -0400 Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-4266fcb311cso986325e9.1 for ; Wed, 17 Jul 2024 14:47:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721252840; x=1721857640; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rg0Rdjc81kCpKex+A4T6UVMbXK9hzcQBh67E0bOsYps=; b=P/SS0xeA89+Q2inGxgOoMES6/6knG7hD3lD1NjyrqpVtcH6GhRUGSjIxnl0V7DVVge ssbMEVnV6JAj0WdnCoApsNSIYYNjuwKVgy75Sv7TnTGqmC/plWo7cEdFUW3FYKHqC6zv IQm9QpixIQRQyGlhkZd13hJDRgdF6ArCD3QvplJIX4lr8yFFyrIK4dJNln/ECbiSwNUy XehY4fwZfNSiCGogoeHkFcp2uq6zqh2zhli1sSMCj5ck8BKFBV3PGKl8luWy+XA7CtDD Z5GcRUsHBXYhtYiid7jkXg4l8NJP4WGzvbP/Li6WT1p3n21fZqa/JxRqMfTC/W9t8fYK tUiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721252840; x=1721857640; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rg0Rdjc81kCpKex+A4T6UVMbXK9hzcQBh67E0bOsYps=; b=i7vdGkupP9iALc5GPp9BVwZwlp8SsnRowjtZG7vy30rHYIaSI9K30UZnagH2GR7JiH GnDoBR5qXnrkgRlhHcw7QRl0Pe73hMPYyI69BXnYODfSrjn407jwnLhnSDPkeI3ht/KV qyObqdeXFBmKKm8EBc3rEwZHNDKE3bwS9+CZnpmkYyYqzWGLq3ZVp4ui5Sbzc6GzfDde MlpHAOVDKVuTUImJUk5kQJLgai0WT8Vaw3wrYhmRGCU8v3K9gMqSDwcvzTrJ5wZyW8/Z 1fGfbvqcDIPQOXnGpYSIG4qRV8kd6GaGQW8QJcl68BNkh4OMlhTNEQkhl8xBSjZ3pw06 MeEA== X-Forwarded-Encrypted: i=1; AJvYcCUuWfR15EWm4iWw2I9w9scZyJ+rncl+0C7ZT1U3Y3q/mhTRbwtmahjzk/HOLI/w5LS2wzJBtup1aIL81vOV0dtdTdNubGE= X-Gm-Message-State: AOJu0Yxu9slCnKtUcz3XR+z3TNfe+/WIgd9NjhJfmoLuFURPbwRHq5DE rNbcIU2T1a2Or1z7pLN+UhZ/taGO0xFoWPtNlDVB+VVAeyhHRloV8oWJKw7SQOs= X-Received: by 2002:a05:600c:524e:b0:426:6822:855 with SMTP id 5b1f17b1804b1-427c2d42cdemr23173375e9.36.1721252840513; Wed, 17 Jul 2024 14:47:20 -0700 (PDT) Received: from localhost.localdomain ([176.187.208.21]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427c78194f0sm11476165e9.47.2024.07.17.14.47.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 17 Jul 2024 14:47:19 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Bibo Mao , Jiaxun Yang , qemu-devel@nongnu.org Cc: Xianglai Li , Paolo Bonzini , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Song Gao Subject: [PATCH v3 01/17] hw/intc/loongson_ipi: Access memory in little endian Date: Wed, 17 Jul 2024 23:46:52 +0200 Message-ID: <20240717214708.78403-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240717214708.78403-1-philmd@linaro.org> References: <20240717214708.78403-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bibo Mao Loongson IPI is only available in little-endian, so use that to access the guest memory (in case we run on a big-endian host). Signed-off-by: Bibo Mao Fixes: f6783e3438 ("hw/loongarch: Add LoongArch ipi interrupt support") [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé --- hw/intc/loongson_ipi.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index e6a7142480..e7979dbdd8 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -14,6 +14,7 @@ #include "qapi/error.h" #include "qemu/log.h" #include "exec/address-spaces.h" +#include "exec/memory.h" #include "migration/vmstate.h" #ifdef TARGET_LOONGARCH64 #include "target/loongarch/cpu.h" @@ -102,7 +103,7 @@ static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr, * if the mask is 0, we need not to do anything. */ if ((val >> 27) & 0xf) { - data = address_space_ldl(iocsr_as, addr, attrs, NULL); + data = address_space_ldl_le(iocsr_as, addr, attrs, NULL); for (i = 0; i < 4; i++) { /* get mask for byte writing */ if (val & (0x1 << (27 + i))) { @@ -113,7 +114,7 @@ static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr, data &= mask; data |= (val >> 32) & ~mask; - address_space_stl(iocsr_as, addr, data, attrs, NULL); + address_space_stl_le(iocsr_as, addr, data, attrs, NULL); return MEMTX_OK; } From patchwork Wed Jul 17 21:46:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813021 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp16952wro; Wed, 17 Jul 2024 14:50:00 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWttfIhB7J6eBD9NC5UwfT5x7emaN44v5IU1gzbtqxv/Mcgu1MJIj6QWsjTczACS4s7BQqqkWPnscglDtUgFgPA X-Google-Smtp-Source: AGHT+IGsjs7p7KtfmjICWTm51GWJ1xSrM991z4xXl5GOUXhb++Me7U969mYiHw/NBQWyT8Z8j0Q5 X-Received: by 2002:a05:6102:149d:b0:48f:ea84:4837 with SMTP id ada2fe7eead31-491598b5136mr4407299137.9.1721253000174; Wed, 17 Jul 2024 14:50:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721253000; cv=none; d=google.com; s=arc-20160816; b=UXQ4DjpTGn/5BOMFE5iVRUj1Aim38nErO8T4O+dzngP7ZIgkLv7nnlzGYBGMLjw+Xy F1V4BfS/27/TqScRouaCG8S8gxLtLEJyR71xCmQG8fWUnFYsvYTpQV7HmRW9svPAJORP 9ggw0UUagjOEE/wkR2hmuQOC3u7/UUNpb+w55OSn6Rc7lBCYsQbt7t1P6RV6GqQAPNS5 SyV1OODKvKxoMPpV30xzUoEEAm6TmkoApE3bBjHU+fU2RGDtpgiHPNLJNz4T72sAxuMd 6Z69TX23Yjwm3RT/tBHpXR4FqUN5ztxneA188PL1+1dZslrHDaqHePCsKHLQUXddUS3w POdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9HOJ9dHSdrI02h20r8v9vJ4RkLFUfsaDgRPfqb5PG7w=; fh=7CZo9r9WU9KU00teYapfptgN1S3TE/Wbs8W77rrcURQ=; b=SD2lLURpbH/Qjwgs7uiZainJWZDVvnPDxba2eKVTuypuk0oQTubMq0RZcyuVTjEXbA yiuzjIOUdTxSDv1e86S7gHBF1WjQidLZHm8JdtexDGj3Bfr07WABX/xfzXlc2f21njp9 SImS1vZAwPm7SjAfGbA4TPmUU+A4D90y8VXaTxYPs6ZxjVRHoh/txwi2vSHa30DGimc1 0NTjPJGKiTrVsXfPepcKCgGw/z2h0VnIhVlMJ4tjXhTBDtrFCAbxfMcx5kVW74K2Xixi dfeoonvnSet4uL2SZN+i++OBePKXaEVzPIshqqJmUU0PAZNrafzjZ0DeND47Vxvr2Vyp VlKw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pAlSW3O0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-44f5b82ca1csi111919341cf.690.2024.07.17.14.50.00 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 17 Jul 2024 14:50:00 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pAlSW3O0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUCUn-00071B-OF; Wed, 17 Jul 2024 17:47:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUCUm-000701-2J for qemu-devel@nongnu.org; Wed, 17 Jul 2024 17:47:32 -0400 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUCUk-0001sM-BX for qemu-devel@nongnu.org; Wed, 17 Jul 2024 17:47:31 -0400 Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-36844375001so113123f8f.0 for ; Wed, 17 Jul 2024 14:47:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721252848; x=1721857648; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9HOJ9dHSdrI02h20r8v9vJ4RkLFUfsaDgRPfqb5PG7w=; b=pAlSW3O0CmnArL+gH1RWSfJbEbenDhbOZ7iePiSddYTit2xEN+pM3sM/U84PWCkSO9 VKIXi5hz3qlRO1tiSdeHrH1y0h/aNAlOe/bfDyEA/ormpUDQd5iVhqFhQBPtQBvw3Aa8 g9E0lVO0F7/Xvd26cEj+f3rnARGS30ULAzAUfhRNY4lkLvztXfgz67XICEuxG2Yic+sy VdRZV9hekgch3eCd0Gu9g1oIU1muXPwfPtjGzfmm5B4GBJlPCTis/qVY9E/o/WPhKMZJ pUnVmIg9SKh+vIDsiBkCkEVN1XhuexxBKJbf8hOh1kr3KGkS+1cj4MAg5y6UCSJN8rxZ mYjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721252848; x=1721857648; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9HOJ9dHSdrI02h20r8v9vJ4RkLFUfsaDgRPfqb5PG7w=; b=am//z2zl3490uY21v88ZbLQ3ggOAvLf3stuxaOqnUiDwH0+Q++Sk1S/YOBPY587qQp 4nXa1mXt9aFcpAJxS0VBep6bSbz239nb3Y8pwbLoG88sCynobWAaKx6OI2AEgmYUFGAR v/jPm+6bTdFFLR94uEgEJSx/b8kuN5o00H/Fqm7xsduDVbJv4ADF2s0pCgmB1Dt1kvcW ryLBg6ds3dljgkgBFwzH94fnaN08IFu2umGxRlJv1nX0bg2BTLxIpGAU7AUE27lGn9H3 us4i86iWdYoG7+Db4UuMkdW2mD3bRbh1KZjVt/aJlrL2y8eKdipxpY/g0CxjZdFI5unU 4IDA== X-Forwarded-Encrypted: i=1; AJvYcCX1YfGAl8qm7y8I3BeknWJ1gFY+eQZiEapO+psy0dPXSrpQwhhdgtE76j58ZhGt4TT9MnfY3k+2+E6COLLMr036LLfTpDI= X-Gm-Message-State: AOJu0YwMbbV+j3sf2cUZQ1aQbBmKHOKEcledpMwhpEmMRiA+USpZ795F qrCak59Zd9bh/Z5ekmw217WftC11r42XU6t6mPpIQvQEDzzQpeOQObPy0xJPy7c= X-Received: by 2002:adf:fa8d:0:b0:367:8aa3:436f with SMTP id ffacd0b85a97d-3683167aedbmr1825102f8f.38.1721252846929; Wed, 17 Jul 2024 14:47:26 -0700 (PDT) Received: from localhost.localdomain ([176.187.208.21]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427c780c9d5sm10992955e9.38.2024.07.17.14.47.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 17 Jul 2024 14:47:26 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Bibo Mao , Jiaxun Yang , qemu-devel@nongnu.org Cc: Xianglai Li , Paolo Bonzini , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Song Gao Subject: [PATCH v3 02/17] hw/intc/loongson_ipi: Rename LoongsonIPI -> LoongsonIPIState Date: Wed, 17 Jul 2024 23:46:53 +0200 Message-ID: <20240717214708.78403-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240717214708.78403-1-philmd@linaro.org> References: <20240717214708.78403-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bibo Mao We'll have to add LoongsonIPIClass in few commits, so rename LoongsonIPI as LoongsonIPIState for clarity. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/loongson_ipi.h | 6 +++--- hw/intc/loongson_ipi.c | 16 ++++++++-------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/include/hw/intc/loongson_ipi.h b/include/hw/intc/loongson_ipi.h index 3f795edbf3..efb772f384 100644 --- a/include/hw/intc/loongson_ipi.h +++ b/include/hw/intc/loongson_ipi.h @@ -31,10 +31,10 @@ #define IPI_MBX_NUM 4 #define TYPE_LOONGSON_IPI "loongson_ipi" -OBJECT_DECLARE_SIMPLE_TYPE(LoongsonIPI, LOONGSON_IPI) +OBJECT_DECLARE_SIMPLE_TYPE(LoongsonIPIState, LOONGSON_IPI) typedef struct IPICore { - LoongsonIPI *ipi; + LoongsonIPIState *ipi; MemoryRegion *ipi_mmio_mem; uint32_t status; uint32_t en; @@ -45,7 +45,7 @@ typedef struct IPICore { qemu_irq irq; } IPICore; -struct LoongsonIPI { +struct LoongsonIPIState { SysBusDevice parent_obj; MemoryRegion ipi_iocsr_mem; MemoryRegion ipi64_iocsr_mem; diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index e7979dbdd8..a34e7e634f 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -64,7 +64,7 @@ static MemTxResult loongson_ipi_iocsr_readl(void *opaque, hwaddr addr, uint64_t *data, unsigned size, MemTxAttrs attrs) { - LoongsonIPI *ipi = opaque; + LoongsonIPIState *ipi = opaque; IPICore *s; if (attrs.requester_id >= ipi->num_cpu) { @@ -160,7 +160,7 @@ static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, MemTxAttrs attrs) { IPICore *s = opaque; - LoongsonIPI *ipi = s->ipi; + LoongsonIPIState *ipi = s->ipi; int index = 0; uint32_t cpuid; uint8_t vector; @@ -214,7 +214,7 @@ static MemTxResult loongson_ipi_iocsr_writel(void *opaque, hwaddr addr, uint64_t val, unsigned size, MemTxAttrs attrs) { - LoongsonIPI *ipi = opaque; + LoongsonIPIState *ipi = opaque; IPICore *s; if (attrs.requester_id >= ipi->num_cpu) { @@ -277,7 +277,7 @@ static const MemoryRegionOps loongson_ipi64_ops = { static void loongson_ipi_realize(DeviceState *dev, Error **errp) { - LoongsonIPI *s = LOONGSON_IPI(dev); + LoongsonIPIState *s = LOONGSON_IPI(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); int i; @@ -337,14 +337,14 @@ static const VMStateDescription vmstate_loongson_ipi = { .version_id = 2, .minimum_version_id = 2, .fields = (const VMStateField[]) { - VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongsonIPI, num_cpu, + VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongsonIPIState, num_cpu, vmstate_ipi_core, IPICore), VMSTATE_END_OF_LIST() } }; static Property ipi_properties[] = { - DEFINE_PROP_UINT32("num-cpu", LoongsonIPI, num_cpu, 1), + DEFINE_PROP_UINT32("num-cpu", LoongsonIPIState, num_cpu, 1), DEFINE_PROP_END_OF_LIST(), }; @@ -359,7 +359,7 @@ static void loongson_ipi_class_init(ObjectClass *klass, void *data) static void loongson_ipi_finalize(Object *obj) { - LoongsonIPI *s = LOONGSON_IPI(obj); + LoongsonIPIState *s = LOONGSON_IPI(obj); g_free(s->cpu); } @@ -367,7 +367,7 @@ static void loongson_ipi_finalize(Object *obj) static const TypeInfo loongson_ipi_info = { .name = TYPE_LOONGSON_IPI, .parent = TYPE_SYS_BUS_DEVICE, - .instance_size = sizeof(LoongsonIPI), + .instance_size = sizeof(LoongsonIPIState), .class_init = loongson_ipi_class_init, .instance_finalize = loongson_ipi_finalize, }; From patchwork Wed Jul 17 21:46:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813008 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp16449wro; 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[209.51.188.17]) by mx.google.com with ESMTPS id af79cd13be357-7a160c92a7esi1047103985a.761.2024.07.17.14.48.09 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 17 Jul 2024 14:48:09 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=n6Lls6fu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUCVC-0007zy-Jw; Wed, 17 Jul 2024 17:47:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUCV2-0007bE-6M for qemu-devel@nongnu.org; Wed, 17 Jul 2024 17:47:51 -0400 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUCV0-00023H-4t for qemu-devel@nongnu.org; Wed, 17 Jul 2024 17:47:47 -0400 Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-368526b1333so2232f8f.1 for ; Wed, 17 Jul 2024 14:47:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721252864; x=1721857664; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DELvQvW4nff9OshEIpTndk1NZr7mJcffQsAB83fChY4=; b=n6Lls6fuB8KPIqCiUsEW9ULUeP3LCM9tIzHZ2inFNDRcBLfL2p/ok8GjQAKkhNaOU1 +sMS6WSyf1YHt81kTju5ye79wnjWNKPb07s9Qd47mSFG17GgHZ/FnZEoj9Q7yEl9krUC NMVy8GhULQeLyux3iN3smduJWm6AkctOHw+6ZR/Rhv+Caw2+10q06y46E5Hg5rsvuBM3 0BXaAbRmkP+hdJp+gxk2gEewKmHQHVV304wJ1VxvlpCr6eoS2xL7Y9FhXkewkZX2buY8 UvCrZmGApfWasQwJ6DLxM3v0/Ep12RiN9LLjg1Cs/rg+wpTOj/+T3dpdEOu+BTDZnvV4 o56A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721252864; x=1721857664; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DELvQvW4nff9OshEIpTndk1NZr7mJcffQsAB83fChY4=; b=WDibydj9EB23aDTbAlFqmxdDYipVExWcPV9tyJ2ysSaNVzQBw5qUguhGx1snljtHQB wxs5fNt8HLGmLU138dMxS18BMikT3E0zZXTnkb7o52TUpn+FzLHVavVpLcA4ftIb8TJU v/QH1SnP9rnA3f3Y+YqiPwW1A2jE0ONwkYJkAqG+rFEI/HfGDtHOiGPldkhSPI6OGF+B 7b66Y/Cn4MXzABYmo4INV/Wj+//+/6uPioKO+8d9XsBlZf77NYsWhEIuzf+qRQRYls/h U7cFEqR9A1hgif++ehc8xEP+inxkIOufZIgg14h22OUebA+sCoIabPpPqbpZKaVQ+uLP teag== X-Forwarded-Encrypted: i=1; AJvYcCUhfxMxyXEblaJEsA0wXe1wm+W8G7NNmgrKboGQTE8KNpNDWID4QST3JOSyuxiJGHKakI4tEgl6b5WnXuhBHg/8Buh88aY= X-Gm-Message-State: AOJu0YwI+GvX8RyBX+EtiYyDWkheo0VWctZa6sa/5vv96gdCmod+u+Vz 0irWZZY5I1M3eJttteenEP1YmVW4f/y9/yg7Qnmz/PmAAjh10xrrcBH8h2A5wy4= X-Received: by 2002:a05:6000:a:b0:368:377a:e8bb with SMTP id ffacd0b85a97d-3684b3fa48emr547879f8f.28.1721252864684; Wed, 17 Jul 2024 14:47:44 -0700 (PDT) Received: from localhost.localdomain ([176.187.208.21]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3684ef5b688sm87768f8f.1.2024.07.17.14.47.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 17 Jul 2024 14:47:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Bibo Mao , Jiaxun Yang , qemu-devel@nongnu.org Cc: Xianglai Li , Paolo Bonzini , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Song Gao Subject: [PATCH v3 03/17] hw/intc/loongson_ipi: Extract loongson_ipi_common_finalize() Date: Wed, 17 Jul 2024 23:46:54 +0200 Message-ID: <20240717214708.78403-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240717214708.78403-1-philmd@linaro.org> References: <20240717214708.78403-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bibo Mao In preparation to extract common IPI code in few commits, extract loongson_ipi_common_finalize(). Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé --- hw/intc/loongson_ipi.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index a34e7e634f..3b3481c43e 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -357,13 +357,18 @@ static void loongson_ipi_class_init(ObjectClass *klass, void *data) dc->vmsd = &vmstate_loongson_ipi; } -static void loongson_ipi_finalize(Object *obj) +static void loongson_ipi_common_finalize(Object *obj) { LoongsonIPIState *s = LOONGSON_IPI(obj); g_free(s->cpu); } +static void loongson_ipi_finalize(Object *obj) +{ + loongson_ipi_common_finalize(obj); +} + static const TypeInfo loongson_ipi_info = { .name = TYPE_LOONGSON_IPI, .parent = TYPE_SYS_BUS_DEVICE, From patchwork Wed Jul 17 21:46:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813022 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp17005wro; Wed, 17 Jul 2024 14:50:08 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUA0tMZEYZq9sbLR9V0a85w6rEJzfex4fV+fq8NfDkg5Cw9YUD+sLTsFQ578U3GIuHupLVsWnKVhREdZ1whxOm1 X-Google-Smtp-Source: AGHT+IFnR3LcLdLvamXddihi0lf4FYLIq5g0Vx0wCeK4wpsebzVQ5qhTgi7HsKGuFGURx5LvvRG0 X-Received: by 2002:a05:620a:29c6:b0:79f:b8f:e1d5 with SMTP id af79cd13be357-7a1874929afmr374537985a.34.1721253008064; Wed, 17 Jul 2024 14:50:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721253008; cv=none; d=google.com; s=arc-20160816; b=05LMCOYCL38jC9SlFqLYGn2JQBDD4SF7ZALPou7MQqA4PUWtFgu5NeZadF3Ezm4jbH hpR4DMMgPxEwv4OnLyrWgkLQmpUKNLf1Ra/DV6m1mpbvJgxMu51jmjnvRtSdAgD+e+SC cNVdHg2YNrhBGoMPNXonwmwp/KbjNNvUdEQcuFGcymSZ7LFgkdrrg0mHwNn6m6TeErnf gXPYcy3b5w/XXyNvAdJxZ7gxBlMSkdLr2ifpQfGUhp5+1oFCaWsrq2c+hFY5YhIoTKfp 7HARG+p5qIc/PNgZM30kd4BiuOGLU8V//tLUafZDPLAkSWAQsOOGaAeEKn1UUlb75v0V S3xA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=exmNDPsH0KpZQ3m+4rsADpeyE4/2w009QzC3/hhmhHY=; fh=JV7UaWPrKY2Ztxzt7/ckSjge0bz3dqOAw9CzPuRipLs=; b=OO5JlrNN4UAdMErK1DcQ9SqlWRDIMJVT/XN8Joh0EL7YO9CDKVymIbbSTjMTtAAXVf zlpf8Q/g3VGJ7OJu4xhXtQvmggj1oQfi5bkiDRoXMQpTbsdSZBizU+XLsM0Ym7bVAFWz 80AWswFUYrjTiWCG9szUBYJSzUGo/7ntbJ4VZznIQyZ2hnJfoGf5E1ep6OQFBzGOWWuW csiSY/DtikbIr1N0VNazo1I8LKNNLkxn9wN5L9Hd55PN/Q2mOIceYvv3L05j1cg43aIx qemxT3DDXhxgOEYrNTKsc5ucfXdLZFaD2F51kJOis1pGo3ZyUeWd8GifS9nzaOLU+X8I vkbg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hn2cTS58; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bibo Mao Tested-by: Bibo Mao --- hw/intc/loongson_ipi.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 3b3481c43e..40ac769aad 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -275,7 +275,7 @@ static const MemoryRegionOps loongson_ipi64_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -static void loongson_ipi_realize(DeviceState *dev, Error **errp) +static void loongson_ipi_common_realize(DeviceState *dev, Error **errp) { LoongsonIPIState *s = LOONGSON_IPI(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); @@ -301,20 +301,31 @@ static void loongson_ipi_realize(DeviceState *dev, Error **errp) sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem); s->cpu = g_new0(IPICore, s->num_cpu); - if (s->cpu == NULL) { - error_setg(errp, "Memory allocation for IPICore faile"); + for (i = 0; i < s->num_cpu; i++) { + s->cpu[i].ipi = s; + + qdev_init_gpio_out(dev, &s->cpu[i].irq, 1); + } +} + +static void loongson_ipi_realize(DeviceState *dev, Error **errp) +{ + LoongsonIPIState *s = LOONGSON_IPI(dev); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + Error *local_err = NULL; + + loongson_ipi_common_realize(dev, &local_err); + if (local_err) { + error_propagate(errp, local_err); return; } - for (i = 0; i < s->num_cpu; i++) { - s->cpu[i].ipi = s; + for (unsigned i = 0; i < s->num_cpu; i++) { s->cpu[i].ipi_mmio_mem = g_new0(MemoryRegion, 1); g_autofree char *name = g_strdup_printf("loongson_ipi_cpu%d_mmio", i); memory_region_init_io(s->cpu[i].ipi_mmio_mem, OBJECT(dev), &loongson_ipi_core_ops, &s->cpu[i], name, 0x48); sysbus_init_mmio(sbd, s->cpu[i].ipi_mmio_mem); - - qdev_init_gpio_out(dev, &s->cpu[i].irq, 1); } } From patchwork Wed Jul 17 21:46:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813009 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp16463wro; Wed, 17 Jul 2024 14:48:13 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVKTD7HQOy6ODOB2t18u1a2ZTXmSWnmRnGfNAqD3cqkKhqZ+T3irs3HLJspx1CRVrAhUnxFNVHS1/mYiNjLR4ER X-Google-Smtp-Source: AGHT+IGV60oHx/MOBNDOdF12jHiAjynWnVUqxxIg3u0Wwwk6te7O2WHK9zZLymXfjN/58DAkyzRS X-Received: by 2002:a05:622a:50d:b0:447:ed76:259f with SMTP id d75a77b69052e-44f865f622fmr30764151cf.35.1721252893015; Wed, 17 Jul 2024 14:48:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721252893; cv=none; d=google.com; s=arc-20160816; b=0vojX90rctMsxfgAuVNXWwljMIYAst6BxcyV6OJyNNSOdiIkYOeLFmflX8+ygkksB/ rmQQJo5aSu1gNqQ2CHM4v0AeZvSdTFLRzWzph5Nmbn05XCN4bDjlW31K+JPkbSTjnt+J T8dCdDxHaVyVMKQ5VXP31hFMgQtm4uJlrSmlnTAHtxYxm+ZfOapWu3xCVyGXIgSi2rf5 FNVhkpMfAMck69pBGozlPUtviY2wyK99Jy2jLUDRf8M2acpeVFDVc9zjwl43EnuYkSGv QP2V76ki5hepQl443+iRpuGQnnK745+vFXPC7ilI/JLnhVX4GEuFzEk+nriBfxsn9uxD xa3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=osaZzLJUZUCGk/6XclTFsQUc8CVCiZ78su9DOnBj+d0=; fh=15STxj8dar+tuRfwKSF5s1cGNmhs28Nhk6A9k4qQxtM=; b=pGHpkA19Jolbn6j9bpcwxGxv6yXXz9tUwrpQD7VTMCRvKpcdO2h98DDikvZva+nktb kYnYeZ/aMybYtp3pp2UWhCDrPm+OFUL0NeF6tDuxBHzyckQRuGbeEkHbihrCPDtYIGbz 9JUEiQd/rTUeFuTXuO23iQGLZmkoBQUVRXsoI+8TpflgoJYw3RoesCG+eOjvGh4EmRru KjKVQSOmgtWQSdV5KlV9dWrQYhPKWBXdWdJGwYJAEokToX7JQ26CAIgfaRX+LbfUZcl8 XOZsJPESuCzxVIFcEY7P5gciu9wBmwP0RK8XobgX/Hw+yVoP7TkzQDfFdDwp3AN6fzc9 ivFg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="TUg/bbAa"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/loongson_ipi.h | 13 +++++++++++-- include/hw/intc/loongson_ipi_common.h | 26 ++++++++++++++++++++++++++ hw/intc/loongson_ipi.c | 7 ++++--- hw/intc/loongson_ipi_common.c | 25 +++++++++++++++++++++++++ hw/intc/Kconfig | 4 ++++ hw/intc/meson.build | 1 + 6 files changed, 71 insertions(+), 5 deletions(-) create mode 100644 include/hw/intc/loongson_ipi_common.h create mode 100644 hw/intc/loongson_ipi_common.c diff --git a/include/hw/intc/loongson_ipi.h b/include/hw/intc/loongson_ipi.h index efb772f384..82cb64ca40 100644 --- a/include/hw/intc/loongson_ipi.h +++ b/include/hw/intc/loongson_ipi.h @@ -8,6 +8,8 @@ #ifndef HW_LOONGSON_IPI_H #define HW_LOONGSON_IPI_H +#include "qom/object.h" +#include "hw/intc/loongson_ipi_common.h" #include "hw/sysbus.h" /* Mainy used by iocsr read and write */ @@ -31,7 +33,7 @@ #define IPI_MBX_NUM 4 #define TYPE_LOONGSON_IPI "loongson_ipi" -OBJECT_DECLARE_SIMPLE_TYPE(LoongsonIPIState, LOONGSON_IPI) +OBJECT_DECLARE_TYPE(LoongsonIPIState, LoongsonIPIClass, LOONGSON_IPI) typedef struct IPICore { LoongsonIPIState *ipi; @@ -45,8 +47,15 @@ typedef struct IPICore { qemu_irq irq; } IPICore; +struct LoongsonIPIClass { + LoongsonIPICommonClass parent_class; + + DeviceRealize parent_realize; +}; + struct LoongsonIPIState { - SysBusDevice parent_obj; + LoongsonIPICommonState parent_obj; + MemoryRegion ipi_iocsr_mem; MemoryRegion ipi64_iocsr_mem; uint32_t num_cpu; diff --git a/include/hw/intc/loongson_ipi_common.h b/include/hw/intc/loongson_ipi_common.h new file mode 100644 index 0000000000..70ac69d0ba --- /dev/null +++ b/include/hw/intc/loongson_ipi_common.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Loongson ipi interrupt header files + * + * Copyright (C) 2021 Loongson Technology Corporation Limited + */ + +#ifndef HW_LOONGSON_IPI_COMMON_H +#define HW_LOONGSON_IPI_COMMON_H + +#include "qom/object.h" +#include "hw/sysbus.h" + +#define TYPE_LOONGSON_IPI_COMMON "loongson_ipi_common" +OBJECT_DECLARE_TYPE(LoongsonIPICommonState, + LoongsonIPICommonClass, LOONGSON_IPI_COMMON) + +struct LoongsonIPICommonState { + SysBusDevice parent_obj; +}; + +struct LoongsonIPICommonClass { + SysBusDeviceClass parent_class; +}; + +#endif diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 40ac769aad..e8772f1b96 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -362,8 +362,10 @@ static Property ipi_properties[] = { static void loongson_ipi_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + LoongsonIPIClass *lic = LOONGSON_IPI_CLASS(klass); - dc->realize = loongson_ipi_realize; + device_class_set_parent_realize(dc, loongson_ipi_realize, + &lic->parent_realize); device_class_set_props(dc, ipi_properties); dc->vmsd = &vmstate_loongson_ipi; } @@ -382,8 +384,7 @@ static void loongson_ipi_finalize(Object *obj) static const TypeInfo loongson_ipi_info = { .name = TYPE_LOONGSON_IPI, - .parent = TYPE_SYS_BUS_DEVICE, - .instance_size = sizeof(LoongsonIPIState), + .parent = TYPE_LOONGSON_IPI_COMMON, .class_init = loongson_ipi_class_init, .instance_finalize = loongson_ipi_finalize, }; diff --git a/hw/intc/loongson_ipi_common.c b/hw/intc/loongson_ipi_common.c new file mode 100644 index 0000000000..7e3f74d08a --- /dev/null +++ b/hw/intc/loongson_ipi_common.c @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Loongson ipi interrupt common support + * + * Copyright (C) 2021 Loongson Technology Corporation Limited + */ + +#include "qemu/osdep.h" +#include "hw/sysbus.h" +#include "hw/intc/loongson_ipi_common.h" + +static const TypeInfo loongson_ipi_common_info = { + .name = TYPE_LOONGSON_IPI_COMMON, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(LoongsonIPICommonState), + .class_size = sizeof(LoongsonIPICommonClass), + .abstract = true, +}; + +static void loongson_ipi_common_register_types(void) +{ + type_register_static(&loongson_ipi_common_info); +} + +type_init(loongson_ipi_common_register_types) diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index 58b6d3a710..a2a0fdca85 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -87,8 +87,12 @@ config GOLDFISH_PIC config M68K_IRQC bool +config LOONGSON_IPI_COMMON + bool + config LOONGSON_IPI bool + select LOONGSON_IPI_COMMON config LOONGARCH_PCH_PIC bool diff --git a/hw/intc/meson.build b/hw/intc/meson.build index afd1aa51ee..a09a527207 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -69,6 +69,7 @@ specific_ss.add(when: 'CONFIG_XIVE', if_true: files('xive.c')) specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'], if_true: files('spapr_xive_kvm.c')) specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) +specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c')) specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c')) From patchwork Wed Jul 17 21:46:57 2024 Content-Type: text/plain; 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Wed, 17 Jul 2024 14:48:04 -0700 (PDT) Received: from localhost.localdomain ([176.187.208.21]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427c778e049sm12098005e9.9.2024.07.17.14.48.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 17 Jul 2024 14:48:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Bibo Mao , Jiaxun Yang , qemu-devel@nongnu.org Cc: Xianglai Li , Paolo Bonzini , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Song Gao Subject: [PATCH v3 06/17] hw/intc/loongson_ipi: Move common definitions to loongson_ipi_common.h Date: Wed, 17 Jul 2024 23:46:57 +0200 Message-ID: <20240717214708.78403-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240717214708.78403-1-philmd@linaro.org> References: <20240717214708.78403-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bibo Mao Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/loongson_ipi.h | 18 ------------------ include/hw/intc/loongson_ipi_common.h | 19 +++++++++++++++++++ 2 files changed, 19 insertions(+), 18 deletions(-) diff --git a/include/hw/intc/loongson_ipi.h b/include/hw/intc/loongson_ipi.h index 82cb64ca40..d53bd5dcfe 100644 --- a/include/hw/intc/loongson_ipi.h +++ b/include/hw/intc/loongson_ipi.h @@ -12,24 +12,6 @@ #include "hw/intc/loongson_ipi_common.h" #include "hw/sysbus.h" -/* Mainy used by iocsr read and write */ -#define SMP_IPI_MAILBOX 0x1000ULL -#define CORE_STATUS_OFF 0x0 -#define CORE_EN_OFF 0x4 -#define CORE_SET_OFF 0x8 -#define CORE_CLEAR_OFF 0xc -#define CORE_BUF_20 0x20 -#define CORE_BUF_28 0x28 -#define CORE_BUF_30 0x30 -#define CORE_BUF_38 0x38 -#define IOCSR_IPI_SEND 0x40 -#define IOCSR_MAIL_SEND 0x48 -#define IOCSR_ANY_SEND 0x158 - -#define MAIL_SEND_ADDR (SMP_IPI_MAILBOX + IOCSR_MAIL_SEND) -#define MAIL_SEND_OFFSET 0 -#define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND) - #define IPI_MBX_NUM 4 #define TYPE_LOONGSON_IPI "loongson_ipi" diff --git a/include/hw/intc/loongson_ipi_common.h b/include/hw/intc/loongson_ipi_common.h index 70ac69d0ba..b43b77bda6 100644 --- a/include/hw/intc/loongson_ipi_common.h +++ b/include/hw/intc/loongson_ipi_common.h @@ -23,4 +23,23 @@ struct LoongsonIPICommonClass { SysBusDeviceClass parent_class; }; +/* Mainy used by iocsr read and write */ +#define SMP_IPI_MAILBOX 0x1000ULL + +#define CORE_STATUS_OFF 0x0 +#define CORE_EN_OFF 0x4 +#define CORE_SET_OFF 0x8 +#define CORE_CLEAR_OFF 0xc +#define CORE_BUF_20 0x20 +#define CORE_BUF_28 0x28 +#define CORE_BUF_30 0x30 +#define CORE_BUF_38 0x38 +#define IOCSR_IPI_SEND 0x40 +#define IOCSR_MAIL_SEND 0x48 +#define IOCSR_ANY_SEND 0x158 + +#define MAIL_SEND_ADDR (SMP_IPI_MAILBOX + IOCSR_MAIL_SEND) +#define MAIL_SEND_OFFSET 0 +#define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND) + #endif From patchwork Wed Jul 17 21:46:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813017 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp16846wro; Wed, 17 Jul 2024 14:49:40 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCURD7KFxzpsPuDwCw7IyK0/JYw9ksG/3RcEcSzmLZZom3iK5vmXJvRxyuvZTxH2sGCv9CLtUMN7uwQETyJF1LGA X-Google-Smtp-Source: AGHT+IFnQSDU6AfPYQypV6TJ0gx9qM2p3MehJ8hkQnl5VesP1J+qNQ5+CKAn+9aVQyfgRdW5pnjt X-Received: by 2002:a05:622a:1999:b0:447:e6f9:f61c with SMTP id d75a77b69052e-44f8f60c94emr21319011cf.22.1721252980427; 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[209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-44f5f6b1ef8si96916671cf.348.2024.07.17.14.49.40 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 17 Jul 2024 14:49:40 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GfsHJzuv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUCVT-0001D6-5y; Wed, 17 Jul 2024 17:48:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUCVR-00012c-Nh for qemu-devel@nongnu.org; Wed, 17 Jul 2024 17:48:13 -0400 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUCVQ-0002LJ-4m for qemu-devel@nongnu.org; Wed, 17 Jul 2024 17:48:13 -0400 Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-367ab76d5e1so63896f8f.3 for ; Wed, 17 Jul 2024 14:48:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721252891; x=1721857691; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=chy4jtNU6iWnrH6rF7I9Uod60had5r2Sf4ZzHJviZ5Q=; b=GfsHJzuvvW9pD4tB3nLht13WJqsqK5XNLFIkOatMvCFnrpHau93OETWUvzmgXk5msV iVw/n5met94txwPT1CyjWMWGB1utJRzWPsGIuobLh58gmn12EG7UoLMpKnfQB3hP/kXZ wCc8Qk1uXjruCzmNjP9mrACguWkdote//WWQckoTgpfYn3qkcK55vQnSO63HU4A0NyjK 8K4tP25ix/IrG0XaK7PLDEIyqSJGbMMCtuoZx7nacusJNWfzGIhKpRn+wtR+AR0al8PO 4eL572hhCc6z0LWfF+gReYtM3NrCxWmgcOUZON6dbI/lBzfkLYG+9mdkiNaRiRq7CS8B TsFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721252891; x=1721857691; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=chy4jtNU6iWnrH6rF7I9Uod60had5r2Sf4ZzHJviZ5Q=; b=mifYRoHZ+M0t+gFKTzQCkhmhxglPq+WsMzWpB+U0GGRK9p2uBfrsEEG5yY3CTi4SBH 1ukTh8Hkj10x5EW/oehjOzGV6Cxh+OwZIpVkmKXjDzqF12BfDN5c7oY66oR4p6C3Hyoa E4TEIcHK5YunTjBegkySIAYOxZXEBlulEihHoiKk7nGoZdthZS12UiQfzFyO9rdHMJBN KWTxcpWjbF3jDpa4HtZfMiMVawBuTLCjCk1250FojjVx04VUiEdXCxwQfuvrFVFiInlJ DKg30PDRd71tA/DKB5cFHqGCyFHghHpTy13ZdNDSfk/mbX3qhr3eOtIIblq0aQdCC1C0 S/bw== X-Forwarded-Encrypted: i=1; AJvYcCVKWwRp/IypS0B5AVOqHpKup6JPTbdAfWxoJa2RwJT1RlmmNITYAMNdKFkiXg6y7YZUFDtKjG4KV5H6OYqqo2AHPyOyMzk= X-Gm-Message-State: AOJu0YzUqgPyyKPk3Fs99xIW80YovU1A7xBejmOFCW3D3WDy693XfjmG rFt2RRKsxjCqXS8iFjiObzMbV01s2U1b8LFaGAOraxN9Yknytq2C0aLTWa1aAD4= X-Received: by 2002:a5d:5906:0:b0:367:33f0:91c6 with SMTP id ffacd0b85a97d-368317b76eemr1717886f8f.62.1721252890811; Wed, 17 Jul 2024 14:48:10 -0700 (PDT) Received: from localhost.localdomain ([176.187.208.21]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427c7797d74sm12326795e9.4.2024.07.17.14.48.09 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 17 Jul 2024 14:48:10 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Bibo Mao , Jiaxun Yang , qemu-devel@nongnu.org Cc: Xianglai Li , Paolo Bonzini , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Song Gao Subject: [PATCH v3 07/17] hw/intc/loongson_ipi: Move IPICore::mmio_mem to LoongsonIPIState Date: Wed, 17 Jul 2024 23:46:58 +0200 Message-ID: <20240717214708.78403-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240717214708.78403-1-philmd@linaro.org> References: <20240717214708.78403-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bibo Mao It is easier to manage one array of MMIO MR rather than one per vCPU. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/loongson_ipi.h | 2 +- hw/intc/loongson_ipi.c | 9 ++++++--- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/include/hw/intc/loongson_ipi.h b/include/hw/intc/loongson_ipi.h index d53bd5dcfe..00a65a82fb 100644 --- a/include/hw/intc/loongson_ipi.h +++ b/include/hw/intc/loongson_ipi.h @@ -19,7 +19,6 @@ OBJECT_DECLARE_TYPE(LoongsonIPIState, LoongsonIPIClass, LOONGSON_IPI) typedef struct IPICore { LoongsonIPIState *ipi; - MemoryRegion *ipi_mmio_mem; uint32_t status; uint32_t en; uint32_t set; @@ -38,6 +37,7 @@ struct LoongsonIPIClass { struct LoongsonIPIState { LoongsonIPICommonState parent_obj; + MemoryRegion *ipi_mmio_mem; MemoryRegion ipi_iocsr_mem; MemoryRegion ipi64_iocsr_mem; uint32_t num_cpu; diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index e8772f1b96..a9fca28430 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -320,12 +320,12 @@ static void loongson_ipi_realize(DeviceState *dev, Error **errp) return; } + s->ipi_mmio_mem = g_new0(MemoryRegion, s->num_cpu); for (unsigned i = 0; i < s->num_cpu; i++) { - s->cpu[i].ipi_mmio_mem = g_new0(MemoryRegion, 1); g_autofree char *name = g_strdup_printf("loongson_ipi_cpu%d_mmio", i); - memory_region_init_io(s->cpu[i].ipi_mmio_mem, OBJECT(dev), + memory_region_init_io(&s->ipi_mmio_mem[i], OBJECT(dev), &loongson_ipi_core_ops, &s->cpu[i], name, 0x48); - sysbus_init_mmio(sbd, s->cpu[i].ipi_mmio_mem); + sysbus_init_mmio(sbd, &s->ipi_mmio_mem[i]); } } @@ -379,6 +379,9 @@ static void loongson_ipi_common_finalize(Object *obj) static void loongson_ipi_finalize(Object *obj) { + LoongsonIPIState *s = LOONGSON_IPI(obj); + + g_free(s->ipi_mmio_mem); loongson_ipi_common_finalize(obj); } From patchwork Wed Jul 17 21:46:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813010 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp16508wro; Wed, 17 Jul 2024 14:48:25 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWF1DTnWWu8knAGxzyS0O0l4/Iww5CX6a2MyHSO6fBblkMFphrpA8b+WBnhQfa5PZJc+QYWhH/LkwE9MwW2PM9r X-Google-Smtp-Source: AGHT+IGhZ0LQzkJUEyeD6t8seuJO3Fa6PCXchNcNFstbmD3rnhfhQmMG6RV4DrbjqP1Z1XEzyARz X-Received: by 2002:a05:6102:3582:b0:48f:ee06:6f90 with SMTP id ada2fe7eead31-491599d644bmr3930025137.27.1721252905331; Wed, 17 Jul 2024 14:48:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721252905; cv=none; d=google.com; s=arc-20160816; b=uWPaBDyH6H7TSmbn5QQZXK3CUH0zXhMUxnCC/0d2Qr+b48qA346A/hTDzhzJd02lq3 ctDvQfmTlBPQ4hqHl0vf+ITNf+1nHR1YXfRkmI1OGBeMAu4yc+T4hTPNfTo+d7087Ce3 SEbvOX2Shd2+b1ADaHYOxVR31YfXciPYjP9FhjzTjTp4Dfg0ntNzW2xO6s5iDIrYgosB po70UQtLghujMf0H6KIn1VU+Zdz7VoVlODwUxQZgfx7BcqWUnk025eSSWBet5M7E0Zf8 7IhDfswU6g+XveWGyFcJvNY/YlqvgEiuXnW6OAhs/C7PXJIvHKPOt8JZQ9qaIcjzBeec 1/xQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=xCk4BVbtDC/HYFB/au6YC4ySp6hF1ldsfkUunsH7myk=; fh=TZBVgWBbTrRxMj+BVBvbaWb1Kt1DQVg+JaPOaMSx9ds=; b=Ojbv918ni5ejt6kjMV1Rq9UDFewZkEvqnhAINp30IGugaUExvuiOLtGYZJd2CaeDUr XPwUPXevtwN225wYviJpMusqsCDd5DxZbF91ObxOu84AumbQI8Hi5LOe6Wl6ftODTeey RK4NukA7olpXd96pXaPk+1kyN9vopclJ7nM3GHOiR1o7ya5rJFrEZdwE669RDH3BI6L4 n1EhOanUyoBWVP5qvSP10UeLFays/Xd/ypov7reJJmjKQPIQ18s9AVXw1QcOOh+LqCXC WJmoTAwrJ93D1XZBdtdeAfw4vkVRD8d+GSZSibgd5n6Oi+H0xDsjVIfOlV2ECjPMY75I Pdqg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=N9ja6iij; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/loongson_ipi.h | 17 -------- include/hw/intc/loongson_ipi_common.h | 18 +++++++++ hw/intc/loongson_ipi.c | 56 +++++---------------------- hw/intc/loongson_ipi_common.c | 50 ++++++++++++++++++++++++ 4 files changed, 77 insertions(+), 64 deletions(-) diff --git a/include/hw/intc/loongson_ipi.h b/include/hw/intc/loongson_ipi.h index 00a65a82fb..bb55899991 100644 --- a/include/hw/intc/loongson_ipi.h +++ b/include/hw/intc/loongson_ipi.h @@ -12,22 +12,9 @@ #include "hw/intc/loongson_ipi_common.h" #include "hw/sysbus.h" -#define IPI_MBX_NUM 4 - #define TYPE_LOONGSON_IPI "loongson_ipi" OBJECT_DECLARE_TYPE(LoongsonIPIState, LoongsonIPIClass, LOONGSON_IPI) -typedef struct IPICore { - LoongsonIPIState *ipi; - uint32_t status; - uint32_t en; - uint32_t set; - uint32_t clear; - /* 64bit buf divide into 2 32bit buf */ - uint32_t buf[IPI_MBX_NUM * 2]; - qemu_irq irq; -} IPICore; - struct LoongsonIPIClass { LoongsonIPICommonClass parent_class; @@ -38,10 +25,6 @@ struct LoongsonIPIState { LoongsonIPICommonState parent_obj; MemoryRegion *ipi_mmio_mem; - MemoryRegion ipi_iocsr_mem; - MemoryRegion ipi64_iocsr_mem; - uint32_t num_cpu; - IPICore *cpu; }; #endif diff --git a/include/hw/intc/loongson_ipi_common.h b/include/hw/intc/loongson_ipi_common.h index b43b77bda6..891b43644d 100644 --- a/include/hw/intc/loongson_ipi_common.h +++ b/include/hw/intc/loongson_ipi_common.h @@ -11,12 +11,30 @@ #include "qom/object.h" #include "hw/sysbus.h" +#define IPI_MBX_NUM 4 + #define TYPE_LOONGSON_IPI_COMMON "loongson_ipi_common" OBJECT_DECLARE_TYPE(LoongsonIPICommonState, LoongsonIPICommonClass, LOONGSON_IPI_COMMON) +typedef struct IPICore { + LoongsonIPICommonState *ipi; + uint32_t status; + uint32_t en; + uint32_t set; + uint32_t clear; + /* 64bit buf divide into 2 32bit buf */ + uint32_t buf[IPI_MBX_NUM * 2]; + qemu_irq irq; +} IPICore; + struct LoongsonIPICommonState { SysBusDevice parent_obj; + + MemoryRegion ipi_iocsr_mem; + MemoryRegion ipi64_iocsr_mem; + uint32_t num_cpu; + IPICore *cpu; }; struct LoongsonIPICommonClass { diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index a9fca28430..5346bbb267 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -64,7 +64,7 @@ static MemTxResult loongson_ipi_iocsr_readl(void *opaque, hwaddr addr, uint64_t *data, unsigned size, MemTxAttrs attrs) { - LoongsonIPIState *ipi = opaque; + LoongsonIPICommonState *ipi = opaque; IPICore *s; if (attrs.requester_id >= ipi->num_cpu) { @@ -160,7 +160,7 @@ static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, MemTxAttrs attrs) { IPICore *s = opaque; - LoongsonIPIState *ipi = s->ipi; + LoongsonIPICommonState *ipi = s->ipi; int index = 0; uint32_t cpuid; uint8_t vector; @@ -214,7 +214,7 @@ static MemTxResult loongson_ipi_iocsr_writel(void *opaque, hwaddr addr, uint64_t val, unsigned size, MemTxAttrs attrs) { - LoongsonIPIState *ipi = opaque; + LoongsonIPICommonState *ipi = opaque; IPICore *s; if (attrs.requester_id >= ipi->num_cpu) { @@ -277,7 +277,7 @@ static const MemoryRegionOps loongson_ipi64_ops = { static void loongson_ipi_common_realize(DeviceState *dev, Error **errp) { - LoongsonIPIState *s = LOONGSON_IPI(dev); + LoongsonIPICommonState *s = LOONGSON_IPI_COMMON(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); int i; @@ -310,6 +310,7 @@ static void loongson_ipi_common_realize(DeviceState *dev, Error **errp) static void loongson_ipi_realize(DeviceState *dev, Error **errp) { + LoongsonIPICommonState *sc = LOONGSON_IPI_COMMON(dev); LoongsonIPIState *s = LOONGSON_IPI(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); Error *local_err = NULL; @@ -320,45 +321,16 @@ static void loongson_ipi_realize(DeviceState *dev, Error **errp) return; } - s->ipi_mmio_mem = g_new0(MemoryRegion, s->num_cpu); - for (unsigned i = 0; i < s->num_cpu; i++) { + s->ipi_mmio_mem = g_new0(MemoryRegion, sc->num_cpu); + for (unsigned i = 0; i < sc->num_cpu; i++) { g_autofree char *name = g_strdup_printf("loongson_ipi_cpu%d_mmio", i); + memory_region_init_io(&s->ipi_mmio_mem[i], OBJECT(dev), - &loongson_ipi_core_ops, &s->cpu[i], name, 0x48); + &loongson_ipi_core_ops, &sc->cpu[i], name, 0x48); sysbus_init_mmio(sbd, &s->ipi_mmio_mem[i]); } } -static const VMStateDescription vmstate_ipi_core = { - .name = "ipi-single", - .version_id = 2, - .minimum_version_id = 2, - .fields = (const VMStateField[]) { - VMSTATE_UINT32(status, IPICore), - VMSTATE_UINT32(en, IPICore), - VMSTATE_UINT32(set, IPICore), - VMSTATE_UINT32(clear, IPICore), - VMSTATE_UINT32_ARRAY(buf, IPICore, IPI_MBX_NUM * 2), - VMSTATE_END_OF_LIST() - } -}; - -static const VMStateDescription vmstate_loongson_ipi = { - .name = TYPE_LOONGSON_IPI, - .version_id = 2, - .minimum_version_id = 2, - .fields = (const VMStateField[]) { - VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongsonIPIState, num_cpu, - vmstate_ipi_core, IPICore), - VMSTATE_END_OF_LIST() - } -}; - -static Property ipi_properties[] = { - DEFINE_PROP_UINT32("num-cpu", LoongsonIPIState, num_cpu, 1), - DEFINE_PROP_END_OF_LIST(), -}; - static void loongson_ipi_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -366,15 +338,6 @@ static void loongson_ipi_class_init(ObjectClass *klass, void *data) device_class_set_parent_realize(dc, loongson_ipi_realize, &lic->parent_realize); - device_class_set_props(dc, ipi_properties); - dc->vmsd = &vmstate_loongson_ipi; -} - -static void loongson_ipi_common_finalize(Object *obj) -{ - LoongsonIPIState *s = LOONGSON_IPI(obj); - - g_free(s->cpu); } static void loongson_ipi_finalize(Object *obj) @@ -382,7 +345,6 @@ static void loongson_ipi_finalize(Object *obj) LoongsonIPIState *s = LOONGSON_IPI(obj); g_free(s->ipi_mmio_mem); - loongson_ipi_common_finalize(obj); } static const TypeInfo loongson_ipi_info = { diff --git a/hw/intc/loongson_ipi_common.c b/hw/intc/loongson_ipi_common.c index 7e3f74d08a..13b5ecef31 100644 --- a/hw/intc/loongson_ipi_common.c +++ b/hw/intc/loongson_ipi_common.c @@ -8,12 +8,62 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" #include "hw/intc/loongson_ipi_common.h" +#include "hw/qdev-properties.h" +#include "migration/vmstate.h" + +static void loongson_ipi_common_finalize(Object *obj) +{ + LoongsonIPICommonState *s = LOONGSON_IPI_COMMON(obj); + + g_free(s->cpu); +} + +static const VMStateDescription vmstate_ipi_core = { + .name = "ipi-single", + .version_id = 2, + .minimum_version_id = 2, + .fields = (const VMStateField[]) { + VMSTATE_UINT32(status, IPICore), + VMSTATE_UINT32(en, IPICore), + VMSTATE_UINT32(set, IPICore), + VMSTATE_UINT32(clear, IPICore), + VMSTATE_UINT32_ARRAY(buf, IPICore, IPI_MBX_NUM * 2), + VMSTATE_END_OF_LIST() + } +}; + +static const VMStateDescription vmstate_loongson_ipi = { + .name = "loongson_ipi", + .version_id = 2, + .minimum_version_id = 2, + .fields = (const VMStateField[]) { + VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongsonIPICommonState, + num_cpu, vmstate_ipi_core, + IPICore), + VMSTATE_END_OF_LIST() + } +}; + +static Property ipi_properties[] = { + DEFINE_PROP_UINT32("num-cpu", LoongsonIPICommonState, num_cpu, 1), + DEFINE_PROP_END_OF_LIST(), +}; + +static void loongson_ipi_common_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + device_class_set_props(dc, ipi_properties); + dc->vmsd = &vmstate_loongson_ipi; +} static const TypeInfo loongson_ipi_common_info = { .name = TYPE_LOONGSON_IPI_COMMON, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(LoongsonIPICommonState), .class_size = sizeof(LoongsonIPICommonClass), + .class_init = loongson_ipi_common_class_init, + .instance_finalize = loongson_ipi_common_finalize, .abstract = true, }; From patchwork Wed Jul 17 21:47:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813011 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp16595wro; Wed, 17 Jul 2024 14:48:48 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWdddXff0dyxZcmx0BqPrvxHkYJ+D/dYlkNa64CLqKIIWINeHL3TYHDYI1+ZtV2rcV58y35B2pDjCLUuKNu5Lkp X-Google-Smtp-Source: AGHT+IF1PQB6LBOY9taM555vRpuyNtpmWQNJEjieXyrBesrKRN6OGnTORj78UAc0qO5oDMkQztel X-Received: by 2002:a05:6102:4a81:b0:48f:ee38:9780 with SMTP id ada2fe7eead31-4915996aca2mr4118584137.28.1721252928293; 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[209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-44f5b7f67e6si111712431cf.354.2024.07.17.14.48.48 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 17 Jul 2024 14:48:48 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=brLHCxbd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUCVh-0002Rx-NP; Wed, 17 Jul 2024 17:48:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUCVe-000292-RE for qemu-devel@nongnu.org; Wed, 17 Jul 2024 17:48:26 -0400 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUCVd-0002MA-5M for qemu-devel@nongnu.org; Wed, 17 Jul 2024 17:48:26 -0400 Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-4267300145eso1125755e9.3 for ; Wed, 17 Jul 2024 14:48:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721252903; x=1721857703; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kmy7cURki6nBytni2EwGHik2KgRQEv6ru/qUUAFzUoU=; b=brLHCxbdkxJaX68+HRvy14UMjbW4ZQVnl3lJl9V2wsXNMDIdyTO0BgfIs5UV9LEClW Rurur116KAW8FDhQIrOgStCqliR50bmX6x5VSpn4r4CWc0aAr3QHXoSGdixBUH5kcdBn EYqIDXhModh67sbDQvVzR41pQ9iKqpNTLniQkOKlby4jUXEysU//I095cNmON0dR0HGK riQlkos2hbtG9QL6VE56e1s1+WtA2gRAdLZr07KiC2UNd5jXpdfqhokWt1mIuBrrGfmm CX6ZzvpG6QrynOinFabkq6Y/yAbcmkv/p+ZSPb6PIdEfLWZlcIA/YiZb/shmM/9eE63P vKVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721252903; x=1721857703; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kmy7cURki6nBytni2EwGHik2KgRQEv6ru/qUUAFzUoU=; b=oKF02EK4lWpdpp006eTrJdodz9EYFa4nKeosPhipRKOXryQFSvATFJV+HpwoEAOX9f hrzuCjwAlfFgT/g3dIchlCH5UNnsYUG+iq7AIVw2PK+5V0ZE7PfwKKPOTarpeuRTY9r0 JWk6cZJgWVfrwSPfIVVexqlYDIpsm9+ePr4hVv5CAi3DT+fWivLNRwcKyLfTe2c1N963 iss6tz9+qD2E9GXUkG/MZqNcCPUh94S8zLGZ8kmQ8h5yPPODE4zA8N8NOCcA9EP28UeS y/1WNYLuK0vqpse46tyoiWP2wtWUwufhkBGDXrM28049F5dv7wRBZ6SWFW7fxilK1Cc0 Em5Q== X-Forwarded-Encrypted: i=1; AJvYcCVGcjQr8ch6zDlzSBe7Ux9F9q/nWwuDAPfylIAevP8/qZV2m0YDPhTw2BNLq0zXo6jPqzqLdSunrk/aEe/pXw6XbeV8PPo= X-Gm-Message-State: AOJu0Yxr3Uv1u84fYVEghjl0g/ZanSRNBcvCo+iHSLGEMpkHesH10ZFi ao8WutLl8hAT2YfULU+jxiVYCsRz6VJBTPTloCS7BVbwjOFlsIJdtFSKwrfO6d4= X-Received: by 2002:a05:600c:1547:b0:426:545b:ec00 with SMTP id 5b1f17b1804b1-427c2cc90dfmr26634995e9.19.1721252903529; Wed, 17 Jul 2024 14:48:23 -0700 (PDT) Received: from localhost.localdomain ([176.187.208.21]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427c7805253sm11478415e9.32.2024.07.17.14.48.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 17 Jul 2024 14:48:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Bibo Mao , Jiaxun Yang , qemu-devel@nongnu.org Cc: Xianglai Li , Paolo Bonzini , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Song Gao Subject: [PATCH v3 09/17] hw/intc/loongson_ipi: Pass LoongsonIPICommonState to send_ipi_data() Date: Wed, 17 Jul 2024 23:47:00 +0200 Message-ID: <20240717214708.78403-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240717214708.78403-1-philmd@linaro.org> References: <20240717214708.78403-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bibo Mao In order to get LoongsonIPICommonClass in send_ipi_data() in the next commit, propagate LoongsonIPICommonState. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé --- hw/intc/loongson_ipi.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 5346bbb267..8acd563db9 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -88,8 +88,8 @@ static AddressSpace *get_cpu_iocsr_as(CPUState *cpu) return NULL; } -static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr, - MemTxAttrs attrs) +static MemTxResult send_ipi_data(LoongsonIPICommonState *ipi, CPUState *cpu, + uint64_t val, hwaddr addr, MemTxAttrs attrs) { int i, mask = 0, data = 0; AddressSpace *iocsr_as = get_cpu_iocsr_as(cpu); @@ -119,7 +119,8 @@ static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr, return MEMTX_OK; } -static MemTxResult mail_send(uint64_t val, MemTxAttrs attrs) +static MemTxResult mail_send(LoongsonIPICommonState *ipi, + uint64_t val, MemTxAttrs attrs) { uint32_t cpuid; hwaddr addr; @@ -134,10 +135,11 @@ static MemTxResult mail_send(uint64_t val, MemTxAttrs attrs) /* override requester_id */ addr = SMP_IPI_MAILBOX + CORE_BUF_20 + (val & 0x1c); attrs.requester_id = cs->cpu_index; - return send_ipi_data(cs, val, addr, attrs); + return send_ipi_data(ipi, cs, val, addr, attrs); } -static MemTxResult any_send(uint64_t val, MemTxAttrs attrs) +static MemTxResult any_send(LoongsonIPICommonState *ipi, + uint64_t val, MemTxAttrs attrs) { uint32_t cpuid; hwaddr addr; @@ -152,7 +154,7 @@ static MemTxResult any_send(uint64_t val, MemTxAttrs attrs) /* override requester_id */ addr = val & 0xffff; attrs.requester_id = cs->cpu_index; - return send_ipi_data(cs, val, addr, attrs); + return send_ipi_data(ipi, cs, val, addr, attrs); } static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, @@ -249,15 +251,16 @@ static const MemoryRegionOps loongson_ipi_iocsr_ops = { static MemTxResult loongson_ipi_writeq(void *opaque, hwaddr addr, uint64_t val, unsigned size, MemTxAttrs attrs) { + LoongsonIPICommonState *ipi = opaque; MemTxResult ret = MEMTX_OK; addr &= 0xfff; switch (addr) { case MAIL_SEND_OFFSET: - ret = mail_send(val, attrs); + ret = mail_send(ipi, val, attrs); break; case ANY_SEND_OFFSET: - ret = any_send(val, attrs); + ret = any_send(ipi, val, attrs); break; default: break; From patchwork Wed Jul 17 21:47:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813013 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp16727wro; Wed, 17 Jul 2024 14:49:13 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVoLKiApJYsT2IgD8Umq7Q1YB2+gXTosvQ48TXObBrhaurbazCo+f5p8cWdOEIQh+cISNkoY6sFo13h2yLgtrvZ X-Google-Smtp-Source: AGHT+IE9vIiS/6zaeyB0u98suh3JLkNW+ZqfIjNSgqeQHlxMktOELFDq67Pj/WU2ztWh/lmRZuU6 X-Received: by 2002:a05:620a:4626:b0:79f:16df:a69f with SMTP id af79cd13be357-7a187446e75mr367901085a.2.1721252952879; Wed, 17 Jul 2024 14:49:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721252952; cv=none; d=google.com; s=arc-20160816; b=PtLk9ZSUeBmDdYNquzlA6NqlniixSgj6o8R8o4YZj3zOX9uLvvsr+yFwgMiWhZY6W9 c28PTUIua4zlf+qteJIVzSjuUKDRwUqhYHX8fYqxRmGmXsSEcfz4XfSd6CdAFaVX3vGR pacoqsuZkuHSA7BJ2AlmFRdqe6J+JRKFPO0N/0f0KWW+kuHnbU3l0TA49YjdENhriR5n 0IaU9ydiVdIYeC6XPwEmO5OBYpkcDohr1TIk+2QKBCahcffEdqjPytNigiRzteURmOm9 mh6lnz3l14qYpLmucwpudkKUAlz/m+Biy7n4g74WhTzSgEeW6Pix9aLLaheycrppTs4Q coLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=jwac+UE3k7fTa6T7a7tJQF5gUa47msUfS3JaoFVGPX0=; fh=LTcIB2q3xdVUb7SOVGQxYFSAyfm2LDS5m1IjX2sCkLs=; b=NF89zIGciy7K6DElgAYpbIZKlU/djl89DjASeHcTyKvNVo3pNQ5K+7O7R5T005vMns lLhr579aRG+JLiEuqpO+tWaeaEF1q30+ll8PlcgePV+wLRSjEtQk5Usl7aEEauAd8PgN JLVvQrjN/ebaBiOAbjExvrvcHv+j3rgyrhXmUlqTsg2N8IvsaX5BMLRqA0o0L1GoVo9A wEHQoyg7Y2r6R0seVkpWp9RNe5SeFrf4Eq6uAyEB2+rnw4R+OBcDhtH8ccKi1B6UhhoS 55xHEX0bcciFeeyzie1SDQEEq9kO0n1boh7wgduJjsw4h6onvpv6SwCgnQEPoHigdMtm cOpg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=C0btP9dj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id af79cd13be357-7a160b7c626si1098590385a.113.2024.07.17.14.49.12 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 17 Jul 2024 14:49:12 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=C0btP9dj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sUCVr-0002zu-6S; Wed, 17 Jul 2024 17:48:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sUCVk-0002g8-VQ for qemu-devel@nongnu.org; Wed, 17 Jul 2024 17:48:33 -0400 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sUCVj-0002Mc-CC for qemu-devel@nongnu.org; Wed, 17 Jul 2024 17:48:32 -0400 Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-427b9dcbb09so987675e9.3 for ; Wed, 17 Jul 2024 14:48:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721252909; x=1721857709; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jwac+UE3k7fTa6T7a7tJQF5gUa47msUfS3JaoFVGPX0=; b=C0btP9djRnXWgezsSmArIYlGf8+uRB0WIh0YvxYvPpWdFuvt61mhhXDypYExuIbaQt LXRlXs1iVE6O+s4BwLvXRyTlyOFP8DsTnok6bOMU1T0JNQXv1avW/gh/akMByTgOKyDP /gpQtvZEXHtrLcw0spljfyFIdv6CJy2T3JqSpMphUn327r+IvAHvS1QHnz9e1UMHQpy4 d5b7xtfmY3t/JIh9fhf0ipQV07D3+WmUzEXPi4vDkA0oK7C7r9zsToWq0A23PmEK4UYN QNeCbVqSyfvK4T5nSBN4tnrC/xaVl/Tmud3+QmZ0AT3yxvxX5R3yg+ra5I1V+9QHPb3u HvsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721252909; x=1721857709; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jwac+UE3k7fTa6T7a7tJQF5gUa47msUfS3JaoFVGPX0=; b=gtKstURGOlGPBXttAkRjjd7Heq71thw2Wpx3ZGGHfAauurK+duVI43KXqBd6EEc0ME WVh1DpSSCaA1trgFHakhnNx3FlvjNOY4eHqPBArXBdOF60/m0UMMtr5TVgCGleRhUVqj wYCdSKoDEdo6YI7VgNIgqeTtj9gKnGaZJdrfGNgjZTzzDTQZJvQAHrk1l2og053VZFhw tLUEOyU8L9jTirs6sTPD8bRrHoDxY/A+EHWwGApTenEOinvYYQC9r9gYPGKRzqokSXRa INDcpxeiDVR4r0Kg0Yfx7HhwIRElhSjwQ27xVXbf2BvUum8A71DtkAaOf3iES4jETJOL 9zVA== X-Forwarded-Encrypted: i=1; AJvYcCXa3ikMpHOn4nV7PpagwWupTkhFyvac6m3O5g+/zCZrI/fxwIVxSd1TI+ccdWGW/oybQKkr6piNgYI3hE6Cd0OxpukuWPI= X-Gm-Message-State: AOJu0YxApnYx094OmmiiSRTcxjF1Wuse14A94jH++9c+Gg+8zaVJLzZ1 yAUY4Mg7UzYIoejH+k8XeXCdL9egiflFZaq/stv+cpIGDmIOXKzi9msMkHQgTe4= X-Received: by 2002:a05:600c:310d:b0:425:7974:2266 with SMTP id 5b1f17b1804b1-427c2d1c445mr20347725e9.24.1721252909500; Wed, 17 Jul 2024 14:48:29 -0700 (PDT) Received: from localhost.localdomain ([176.187.208.21]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3680dabf539sm12612214f8f.47.2024.07.17.14.48.28 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 17 Jul 2024 14:48:29 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Bibo Mao , Jiaxun Yang , qemu-devel@nongnu.org Cc: Xianglai Li , Paolo Bonzini , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Song Gao Subject: [PATCH v3 10/17] hw/intc/loongson_ipi: Add LoongsonIPICommonClass::get_iocsr_as handler Date: Wed, 17 Jul 2024 23:47:01 +0200 Message-ID: <20240717214708.78403-11-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240717214708.78403-1-philmd@linaro.org> References: <20240717214708.78403-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bibo Mao Allow Loongson IPI implementations to have their own get_iocsr_as() handler. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/loongson_ipi_common.h | 2 ++ hw/intc/loongson_ipi.c | 16 ++++++++++++---- 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/include/hw/intc/loongson_ipi_common.h b/include/hw/intc/loongson_ipi_common.h index 891b43644d..e49c156db3 100644 --- a/include/hw/intc/loongson_ipi_common.h +++ b/include/hw/intc/loongson_ipi_common.h @@ -39,6 +39,8 @@ struct LoongsonIPICommonState { struct LoongsonIPICommonClass { SysBusDeviceClass parent_class; + + AddressSpace *(*get_iocsr_as)(CPUState *cpu); }; /* Mainy used by iocsr read and write */ diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 8acd563db9..4a7a1fa38d 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -75,24 +75,30 @@ static MemTxResult loongson_ipi_iocsr_readl(void *opaque, hwaddr addr, return loongson_ipi_core_readl(s, addr, data, size, attrs); } -static AddressSpace *get_cpu_iocsr_as(CPUState *cpu) -{ #ifdef TARGET_LOONGARCH64 +static AddressSpace *get_iocsr_as(CPUState *cpu) +{ return LOONGARCH_CPU(cpu)->env.address_space_iocsr; +} #endif + #ifdef TARGET_MIPS +static AddressSpace *get_iocsr_as(CPUState *cpu) +{ if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) { return &MIPS_CPU(cpu)->env.iocsr.as; } -#endif + return NULL; } +#endif static MemTxResult send_ipi_data(LoongsonIPICommonState *ipi, CPUState *cpu, uint64_t val, hwaddr addr, MemTxAttrs attrs) { + LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi); int i, mask = 0, data = 0; - AddressSpace *iocsr_as = get_cpu_iocsr_as(cpu); + AddressSpace *iocsr_as = licc->get_iocsr_as(cpu); if (!iocsr_as) { return MEMTX_DECODE_ERROR; @@ -338,9 +344,11 @@ static void loongson_ipi_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); LoongsonIPIClass *lic = LOONGSON_IPI_CLASS(klass); + LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_CLASS(klass); device_class_set_parent_realize(dc, loongson_ipi_realize, &lic->parent_realize); + licc->get_iocsr_as = get_iocsr_as; } static void loongson_ipi_finalize(Object *obj) From patchwork Wed Jul 17 21:47:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813024 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp17018wro; Wed, 17 Jul 2024 14:50:11 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXbIferv6uIKQrw6qrYa6UrBTY85PU4UFoDUcIuj9Qy2aiqsLA91lssEkiMTl436YAn6V8Fhl4i7Zgn6ArP0mWC X-Google-Smtp-Source: AGHT+IHCiIFz0cyDV9+q0NFcuoiYcKT6VKnI/Q78LeiXQrU5KbekaDTazU+xlEogvz4/bLxMaXFR X-Received: by 2002:a05:6808:1384:b0:3d9:fab2:d767 with SMTP id 5614622812f47-3dad1f4cdd5mr2939027b6e.20.1721253011535; Wed, 17 Jul 2024 14:50:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721253011; cv=none; d=google.com; s=arc-20160816; b=CLLJSi/CAomJnc+V67GA0ZNhm+vGNYmLaxYO0fmBlbZ8mage7BX/CSHxm7oFxlVBYP kxoEO2bN+FQtTGY9pqPHv8hOSBNM8HSKv3dP6/YgwwHqDHd3ROCDvSdpFBwpnQlNhtIk LVFqJGL/1QpX+LK6PQWXBtX+zByOT8cd5qYDOOZ7oq820Blu1cFyoywJuZzgwihyTJ3I rUEvX8s9fwOgY3YwxSBVvNmwwkKHbN6HWV4xlgG6juswONFa262raL63fSF3Iihzouif vSu/H7q+pKuPgRhXt3HPLc2c9M+fzTUfKO8dgXk6+15aw+dJPaoETAE134MUQkot8pvn Frug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ilScFmA5v9fzs5muI3HEIkUzwDEqqO456JgzUU0riEg=; fh=xzhH5+GhB8XgPQa5CPPDZLeAi8eUPiXgOWd4bGMfwMc=; b=AmMX8ALnSlhZHMgCBwh9XVby6yi0uZ1GZBEiErYseBQ+7eAQpRM6TcKd6WesbhKInN eRQ8lVI9OfZf1iUfTo6iQxUKTKaGgdxVo9sj/UXrdQCbAgnTaDIgkXKSdX8ZfQvvJVK0 pun6OI5uXFbCYZeFtzuk4GBlXzjmpEhb9+g7lD66scuBf50VisojXkBXuOTZQl7u1V1e ox0x5ytgPg7q9ooyG9YsJ1+QJLqZ0Dl/mhR2FEe8L5G9FC8chlUAcYyu/ucBVOX25Fxy rujkwakrSjtuBbSHD6+mBMM5UCLH6bbDKIOGZAnuelwDIUt6Xegq8sR1FdSB16j11z2+ m8kw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="d/xqvnii"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/loongson_ipi_common.h | 1 + hw/intc/loongson_ipi.c | 10 +++++++--- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/include/hw/intc/loongson_ipi_common.h b/include/hw/intc/loongson_ipi_common.h index e49c156db3..5447e9f650 100644 --- a/include/hw/intc/loongson_ipi_common.h +++ b/include/hw/intc/loongson_ipi_common.h @@ -41,6 +41,7 @@ struct LoongsonIPICommonClass { SysBusDeviceClass parent_class; AddressSpace *(*get_iocsr_as)(CPUState *cpu); + CPUState *(*cpu_by_arch_id)(int64_t id); }; /* Mainy used by iocsr read and write */ diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 4a7a1fa38d..603a88356d 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -128,12 +128,13 @@ static MemTxResult send_ipi_data(LoongsonIPICommonState *ipi, CPUState *cpu, static MemTxResult mail_send(LoongsonIPICommonState *ipi, uint64_t val, MemTxAttrs attrs) { + LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi); uint32_t cpuid; hwaddr addr; CPUState *cs; cpuid = extract32(val, 16, 10); - cs = cpu_by_arch_id(cpuid); + cs = licc->cpu_by_arch_id(cpuid); if (cs == NULL) { return MEMTX_DECODE_ERROR; } @@ -147,12 +148,13 @@ static MemTxResult mail_send(LoongsonIPICommonState *ipi, static MemTxResult any_send(LoongsonIPICommonState *ipi, uint64_t val, MemTxAttrs attrs) { + LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi); uint32_t cpuid; hwaddr addr; CPUState *cs; cpuid = extract32(val, 16, 10); - cs = cpu_by_arch_id(cpuid); + cs = licc->cpu_by_arch_id(cpuid); if (cs == NULL) { return MEMTX_DECODE_ERROR; } @@ -169,6 +171,7 @@ static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, { IPICore *s = opaque; LoongsonIPICommonState *ipi = s->ipi; + LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi); int index = 0; uint32_t cpuid; uint8_t vector; @@ -203,7 +206,7 @@ static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, cpuid = extract32(val, 16, 10); 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Wed, 17 Jul 2024 14:48:42 -0700 (PDT) Received: from localhost.localdomain ([176.187.208.21]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427c7840f95sm11377595e9.29.2024.07.17.14.48.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 17 Jul 2024 14:48:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Bibo Mao , Jiaxun Yang , qemu-devel@nongnu.org Cc: Xianglai Li , Paolo Bonzini , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Song Gao Subject: [PATCH v3 12/17] hw/intc/loongson_ipi: Expose loongson_ipi_core_read/write helpers Date: Wed, 17 Jul 2024 23:47:03 +0200 Message-ID: <20240717214708.78403-13-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240717214708.78403-1-philmd@linaro.org> References: <20240717214708.78403-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bibo Mao In order to access loongson_ipi_core_read/write helpers from loongson_ipi_common.c in the next commit, make their prototype declaration public. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/loongson_ipi_common.h | 6 ++++++ hw/intc/loongson_ipi.c | 10 ++++------ 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/include/hw/intc/loongson_ipi_common.h b/include/hw/intc/loongson_ipi_common.h index 5447e9f650..a75882f775 100644 --- a/include/hw/intc/loongson_ipi_common.h +++ b/include/hw/intc/loongson_ipi_common.h @@ -10,6 +10,7 @@ #include "qom/object.h" #include "hw/sysbus.h" +#include "exec/memattrs.h" #define IPI_MBX_NUM 4 @@ -44,6 +45,11 @@ struct LoongsonIPICommonClass { CPUState *(*cpu_by_arch_id)(int64_t id); }; +MemTxResult loongson_ipi_core_readl(void *opaque, hwaddr addr, uint64_t *data, + unsigned size, MemTxAttrs attrs); +MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, uint64_t val, + unsigned size, MemTxAttrs attrs); + /* Mainy used by iocsr read and write */ #define SMP_IPI_MAILBOX 0x1000ULL diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 603a88356d..227fd667d9 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -24,9 +24,8 @@ #endif #include "trace.h" -static MemTxResult loongson_ipi_core_readl(void *opaque, hwaddr addr, - uint64_t *data, - unsigned size, MemTxAttrs attrs) +MemTxResult loongson_ipi_core_readl(void *opaque, hwaddr addr, uint64_t *data, + unsigned size, MemTxAttrs attrs) { IPICore *s = opaque; uint64_t ret = 0; @@ -165,9 +164,8 @@ static MemTxResult any_send(LoongsonIPICommonState *ipi, return send_ipi_data(ipi, cs, val, addr, attrs); } -static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, - uint64_t val, unsigned size, - MemTxAttrs attrs) +MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, uint64_t val, + unsigned size, MemTxAttrs attrs) { IPICore *s = opaque; LoongsonIPICommonState *ipi = s->ipi; From patchwork Wed Jul 17 21:47:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813015 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp16802wro; Wed, 17 Jul 2024 14:49:30 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVK3EmlWkuILJ0BMCDAiff1VKM7TvJ8DbHlEgZ2ATzn/OpKzlRKJ04h+wdpIBUlnp/E0b39uNvNN6wLOzCVuyjn X-Google-Smtp-Source: AGHT+IGHsGP8WbAt6lb9P203NISn+5WvSxBNL5Qh7/cPk7C9y+xgZA0fQZPnN3JhtlTgekTt3lT8 X-Received: by 2002:a05:6122:1d0e:b0:4f2:f055:b7a0 with SMTP id 71dfb90a1353d-4f4df8a4b4fmr3702027e0c.12.1721252969844; Wed, 17 Jul 2024 14:49:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721252969; cv=none; d=google.com; s=arc-20160816; b=zaVJoupXG5tk9pA7Wm+YhaLmFFxCRptD6Ha2soA0R1OK+Z2nDSXTVVhNz/oP9NBN1E 7CcVCvJnqkXiBnu89zhB6apmS0So+EeC0i46OubOOYVTstDo3HnmOfdBgoLBcHv+CCv+ kEFc/0FcazXcf94/KF1RQFRMFBtJTHBIooa1ob+kynmqppeV7bCyHdi1qokjBNPdWVAU BwxAl8zAdcoxR2skGQK69kc3YJ9ADypHPZbypSMxGLb8+uD2jqP6BdWfvbtYMNxOYdvs ++4uRtYGjDT+/nMN4P6zJlUClg05sw44rfKn6f6n/v2ApGgFP8VmhAqNw2G4EHGVZRW6 EfDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9IDg/rPAHa/bhdLHHDdxe2erof0xyvkjFsdmQRlxiyY=; fh=UEXg5ey6+wtv9w37aXoXdQ4H/tBXm8ZdpPt2cAIM6Ms=; b=njNl40iTDc5bbHtH4b46/LCZ6NgfQdy9ecUgkLhOhxaxUlfGa89jSOOwkmAnx9ZyKP qWV0tw55goxKxjj14Ot02BlKtaUOvWIJR319KKZCS2w/7LJ6OzAx2AJ88MiSd1metebN L+/ufHvRQBRWs7MR8o9d62OxjurSlggxqbJavhGaP/YTSCk8FJOuVvlNyltCl2g+rbGe AxiWSF7iHuRC1SbdOgXfAYPywhncfuimxx0yoJIyHB68v7Y9dZFlIreB5V5lVEBkjYw6 WXuX7vR8QkMNMnAACszXYc+K24IdZ+FkXS0xGYghQhHDQRmBXNjzB9YBxz5URMxeYgwy ovDA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ISduKhuV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Wed, 17 Jul 2024 14:48:49 -0700 (PDT) Received: from localhost.localdomain ([176.187.208.21]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427c7840fa0sm11522925e9.30.2024.07.17.14.48.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 17 Jul 2024 14:48:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Bibo Mao , Jiaxun Yang , qemu-devel@nongnu.org Cc: Xianglai Li , Paolo Bonzini , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Song Gao Subject: [PATCH v3 13/17] hw/intc/loongson_ipi: Move common code to loongson_ipi_common.c Date: Wed, 17 Jul 2024 23:47:04 +0200 Message-ID: <20240717214708.78403-14-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240717214708.78403-1-philmd@linaro.org> References: <20240717214708.78403-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bibo Mao Move the common code from loongson_ipi.c to loongson_ipi_common.c, call parent_realize() instead of loongson_ipi_common_realize() in loongson_ipi_realize(). Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé --- hw/intc/loongson_ipi.c | 269 +-------------------------------- hw/intc/loongson_ipi_common.c | 272 ++++++++++++++++++++++++++++++++++ 2 files changed, 274 insertions(+), 267 deletions(-) diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 227fd667d9..464bb6b580 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -24,56 +24,6 @@ #endif #include "trace.h" -MemTxResult loongson_ipi_core_readl(void *opaque, hwaddr addr, uint64_t *data, - unsigned size, MemTxAttrs attrs) -{ - IPICore *s = opaque; - uint64_t ret = 0; - int index = 0; - - addr &= 0xff; - switch (addr) { - case CORE_STATUS_OFF: - ret = s->status; - break; - case CORE_EN_OFF: - ret = s->en; - break; - case CORE_SET_OFF: - ret = 0; - break; - case CORE_CLEAR_OFF: - ret = 0; - break; - case CORE_BUF_20 ... CORE_BUF_38 + 4: - index = (addr - CORE_BUF_20) >> 2; - ret = s->buf[index]; - break; - default: - qemu_log_mask(LOG_UNIMP, "invalid read: %x", (uint32_t)addr); - break; - } - - trace_loongson_ipi_read(size, (uint64_t)addr, ret); - *data = ret; - return MEMTX_OK; -} - -static MemTxResult loongson_ipi_iocsr_readl(void *opaque, hwaddr addr, - uint64_t *data, - unsigned size, MemTxAttrs attrs) -{ - LoongsonIPICommonState *ipi = opaque; - IPICore *s; - - if (attrs.requester_id >= ipi->num_cpu) { - return MEMTX_DECODE_ERROR; - } - - s = &ipi->cpu[attrs.requester_id]; - return loongson_ipi_core_readl(s, addr, data, size, attrs); -} - #ifdef TARGET_LOONGARCH64 static AddressSpace *get_iocsr_as(CPUState *cpu) { @@ -92,148 +42,6 @@ static AddressSpace *get_iocsr_as(CPUState *cpu) } #endif -static MemTxResult send_ipi_data(LoongsonIPICommonState *ipi, CPUState *cpu, - uint64_t val, hwaddr addr, MemTxAttrs attrs) -{ - LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi); - int i, mask = 0, data = 0; - AddressSpace *iocsr_as = licc->get_iocsr_as(cpu); - - if (!iocsr_as) { - return MEMTX_DECODE_ERROR; - } - - /* - * bit 27-30 is mask for byte writing, - * if the mask is 0, we need not to do anything. - */ - if ((val >> 27) & 0xf) { - data = address_space_ldl_le(iocsr_as, addr, attrs, NULL); - for (i = 0; i < 4; i++) { - /* get mask for byte writing */ - if (val & (0x1 << (27 + i))) { - mask |= 0xff << (i * 8); - } - } - } - - data &= mask; - data |= (val >> 32) & ~mask; - address_space_stl_le(iocsr_as, addr, data, attrs, NULL); - - return MEMTX_OK; -} - -static MemTxResult mail_send(LoongsonIPICommonState *ipi, - uint64_t val, MemTxAttrs attrs) -{ - LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi); - uint32_t cpuid; - hwaddr addr; - CPUState *cs; - - cpuid = extract32(val, 16, 10); - cs = licc->cpu_by_arch_id(cpuid); - if (cs == NULL) { - return MEMTX_DECODE_ERROR; - } - - /* override requester_id */ - addr = SMP_IPI_MAILBOX + CORE_BUF_20 + (val & 0x1c); - attrs.requester_id = cs->cpu_index; - return send_ipi_data(ipi, cs, val, addr, attrs); -} - -static MemTxResult any_send(LoongsonIPICommonState *ipi, - uint64_t val, MemTxAttrs attrs) -{ - LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi); - uint32_t cpuid; - hwaddr addr; - CPUState *cs; - - cpuid = extract32(val, 16, 10); - cs = licc->cpu_by_arch_id(cpuid); - if (cs == NULL) { - return MEMTX_DECODE_ERROR; - } - - /* override requester_id */ - addr = val & 0xffff; - attrs.requester_id = cs->cpu_index; - return send_ipi_data(ipi, cs, val, addr, attrs); -} - -MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, uint64_t val, - unsigned size, MemTxAttrs attrs) -{ - IPICore *s = opaque; - LoongsonIPICommonState *ipi = s->ipi; - LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi); - int index = 0; - uint32_t cpuid; - uint8_t vector; - CPUState *cs; - - addr &= 0xff; - trace_loongson_ipi_write(size, (uint64_t)addr, val); - switch (addr) { - case CORE_STATUS_OFF: - qemu_log_mask(LOG_GUEST_ERROR, "can not be written"); - break; - case CORE_EN_OFF: - s->en = val; - break; - case CORE_SET_OFF: - s->status |= val; - if (s->status != 0 && (s->status & s->en) != 0) { - qemu_irq_raise(s->irq); - } - break; - case CORE_CLEAR_OFF: - s->status &= ~val; - if (s->status == 0 && s->en != 0) { - qemu_irq_lower(s->irq); - } - break; - case CORE_BUF_20 ... CORE_BUF_38 + 4: - index = (addr - CORE_BUF_20) >> 2; - s->buf[index] = val; - break; - case IOCSR_IPI_SEND: - cpuid = extract32(val, 16, 10); - /* IPI status vector */ - vector = extract8(val, 0, 5); - cs = licc->cpu_by_arch_id(cpuid); - if (cs == NULL || cs->cpu_index >= ipi->num_cpu) { - return MEMTX_DECODE_ERROR; - } - loongson_ipi_core_writel(&ipi->cpu[cs->cpu_index], CORE_SET_OFF, - BIT(vector), 4, attrs); - break; - default: - qemu_log_mask(LOG_UNIMP, "invalid write: %x", (uint32_t)addr); - break; - } - - return MEMTX_OK; -} - -static MemTxResult loongson_ipi_iocsr_writel(void *opaque, hwaddr addr, - uint64_t val, unsigned size, - MemTxAttrs attrs) -{ - LoongsonIPICommonState *ipi = opaque; - IPICore *s; - - if (attrs.requester_id >= ipi->num_cpu) { - return MEMTX_DECODE_ERROR; - } - - s = &ipi->cpu[attrs.requester_id]; - return loongson_ipi_core_writel(s, addr, val, size, attrs); -} - static const MemoryRegionOps loongson_ipi_core_ops = { .read_with_attrs = loongson_ipi_core_readl, .write_with_attrs = loongson_ipi_core_writel, @@ -244,88 +52,15 @@ static const MemoryRegionOps loongson_ipi_core_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -static const MemoryRegionOps loongson_ipi_iocsr_ops = { - .read_with_attrs = loongson_ipi_iocsr_readl, - .write_with_attrs = loongson_ipi_iocsr_writel, - .impl.min_access_size = 4, - .impl.max_access_size = 4, - .valid.min_access_size = 4, - .valid.max_access_size = 8, - .endianness = DEVICE_LITTLE_ENDIAN, -}; - -/* mail send and any send only support writeq */ -static MemTxResult loongson_ipi_writeq(void *opaque, hwaddr addr, uint64_t val, - unsigned size, MemTxAttrs attrs) -{ - LoongsonIPICommonState *ipi = opaque; - MemTxResult ret = MEMTX_OK; - - addr &= 0xfff; - switch (addr) { - case MAIL_SEND_OFFSET: - ret = mail_send(ipi, val, attrs); - break; - case ANY_SEND_OFFSET: - ret = any_send(ipi, val, attrs); - break; - default: - break; - } - - return ret; -} - -static const MemoryRegionOps loongson_ipi64_ops = { - .write_with_attrs = loongson_ipi_writeq, - .impl.min_access_size = 8, - .impl.max_access_size = 8, - .valid.min_access_size = 8, - .valid.max_access_size = 8, - .endianness = DEVICE_LITTLE_ENDIAN, -}; - -static void loongson_ipi_common_realize(DeviceState *dev, Error **errp) -{ - LoongsonIPICommonState *s = LOONGSON_IPI_COMMON(dev); - SysBusDevice *sbd = SYS_BUS_DEVICE(dev); - int i; - - if (s->num_cpu == 0) { - error_setg(errp, "num-cpu must be at least 1"); - return; - } - - memory_region_init_io(&s->ipi_iocsr_mem, OBJECT(dev), - &loongson_ipi_iocsr_ops, - s, "loongson_ipi_iocsr", 0x48); - - /* loongson_ipi_iocsr performs re-entrant IO through ipi_send */ - s->ipi_iocsr_mem.disable_reentrancy_guard = true; - - sysbus_init_mmio(sbd, &s->ipi_iocsr_mem); - - memory_region_init_io(&s->ipi64_iocsr_mem, OBJECT(dev), - &loongson_ipi64_ops, - s, "loongson_ipi64_iocsr", 0x118); - sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem); - - s->cpu = g_new0(IPICore, s->num_cpu); - for (i = 0; i < s->num_cpu; i++) { - s->cpu[i].ipi = s; - - qdev_init_gpio_out(dev, &s->cpu[i].irq, 1); - } -} - static void loongson_ipi_realize(DeviceState *dev, Error **errp) { LoongsonIPICommonState *sc = LOONGSON_IPI_COMMON(dev); LoongsonIPIState *s = LOONGSON_IPI(dev); + LoongsonIPIClass *lic = LOONGSON_IPI_GET_CLASS(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); Error *local_err = NULL; - loongson_ipi_common_realize(dev, &local_err); + lic->parent_realize(dev, &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/intc/loongson_ipi_common.c b/hw/intc/loongson_ipi_common.c index 13b5ecef31..bdfae8343b 100644 --- a/hw/intc/loongson_ipi_common.c +++ b/hw/intc/loongson_ipi_common.c @@ -8,8 +8,279 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" #include "hw/intc/loongson_ipi_common.h" +#include "hw/irq.h" #include "hw/qdev-properties.h" +#include "qapi/error.h" +#include "qemu/log.h" #include "migration/vmstate.h" +#include "trace.h" + +MemTxResult loongson_ipi_core_readl(void *opaque, hwaddr addr, uint64_t *data, + unsigned size, MemTxAttrs attrs) +{ + IPICore *s = opaque; + uint64_t ret = 0; + int index = 0; + + addr &= 0xff; + switch (addr) { + case CORE_STATUS_OFF: + ret = s->status; + break; + case CORE_EN_OFF: + ret = s->en; + break; + case CORE_SET_OFF: + ret = 0; + break; + case CORE_CLEAR_OFF: + ret = 0; + break; + case CORE_BUF_20 ... CORE_BUF_38 + 4: + index = (addr - CORE_BUF_20) >> 2; + ret = s->buf[index]; + break; + default: + qemu_log_mask(LOG_UNIMP, "invalid read: %x", (uint32_t)addr); + break; + } + + trace_loongson_ipi_read(size, (uint64_t)addr, ret); + *data = ret; + + return MEMTX_OK; +} + +static MemTxResult loongson_ipi_iocsr_readl(void *opaque, hwaddr addr, + uint64_t *data, unsigned size, + MemTxAttrs attrs) +{ + LoongsonIPICommonState *ipi = opaque; + IPICore *s; + + if (attrs.requester_id >= ipi->num_cpu) { + return MEMTX_DECODE_ERROR; + } + + s = &ipi->cpu[attrs.requester_id]; + return loongson_ipi_core_readl(s, addr, data, size, attrs); +} + +static MemTxResult send_ipi_data(LoongsonIPICommonState *ipi, CPUState *cpu, + uint64_t val, hwaddr addr, MemTxAttrs attrs) +{ + LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi); + int i, mask = 0, data = 0; + AddressSpace *iocsr_as = licc->get_iocsr_as(cpu); + + if (!iocsr_as) { + return MEMTX_DECODE_ERROR; + } + + /* + * bit 27-30 is mask for byte writing, + * if the mask is 0, we need not to do anything. + */ + if ((val >> 27) & 0xf) { + data = address_space_ldl_le(iocsr_as, addr, attrs, NULL); + for (i = 0; i < 4; i++) { + /* get mask for byte writing */ + if (val & (0x1 << (27 + i))) { + mask |= 0xff << (i * 8); + } + } + } + + data &= mask; + data |= (val >> 32) & ~mask; + address_space_stl_le(iocsr_as, addr, data, attrs, NULL); + + return MEMTX_OK; +} + +static MemTxResult mail_send(LoongsonIPICommonState *ipi, + uint64_t val, MemTxAttrs attrs) +{ + LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi); + uint32_t cpuid; + hwaddr addr; + CPUState *cs; + + cpuid = extract32(val, 16, 10); + cs = licc->cpu_by_arch_id(cpuid); + if (cs == NULL) { + return MEMTX_DECODE_ERROR; + } + + /* override requester_id */ + addr = SMP_IPI_MAILBOX + CORE_BUF_20 + (val & 0x1c); + attrs.requester_id = cs->cpu_index; + return send_ipi_data(ipi, cs, val, addr, attrs); +} + +static MemTxResult any_send(LoongsonIPICommonState *ipi, + uint64_t val, MemTxAttrs attrs) +{ + LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi); + uint32_t cpuid; + hwaddr addr; + CPUState *cs; + + cpuid = extract32(val, 16, 10); + cs = licc->cpu_by_arch_id(cpuid); + if (cs == NULL) { + return MEMTX_DECODE_ERROR; + } + + /* override requester_id */ + addr = val & 0xffff; + attrs.requester_id = cs->cpu_index; + return send_ipi_data(ipi, cs, val, addr, attrs); +} + +MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, uint64_t val, + unsigned size, MemTxAttrs attrs) +{ + IPICore *s = opaque; + LoongsonIPICommonState *ipi = s->ipi; + LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_GET_CLASS(ipi); + int index = 0; + uint32_t cpuid; + uint8_t vector; + CPUState *cs; + + addr &= 0xff; + trace_loongson_ipi_write(size, (uint64_t)addr, val); + switch (addr) { + case CORE_STATUS_OFF: + qemu_log_mask(LOG_GUEST_ERROR, "can not be written"); + break; + case CORE_EN_OFF: + s->en = val; + break; + case CORE_SET_OFF: + s->status |= val; + if (s->status != 0 && (s->status & s->en) != 0) { + qemu_irq_raise(s->irq); + } + break; + case CORE_CLEAR_OFF: + s->status &= ~val; + if (s->status == 0 && s->en != 0) { + qemu_irq_lower(s->irq); + } + break; + case CORE_BUF_20 ... CORE_BUF_38 + 4: + index = (addr - CORE_BUF_20) >> 2; + s->buf[index] = val; + break; + case IOCSR_IPI_SEND: + cpuid = extract32(val, 16, 10); + /* IPI status vector */ + vector = extract8(val, 0, 5); + cs = licc->cpu_by_arch_id(cpuid); + if (cs == NULL || cs->cpu_index >= ipi->num_cpu) { + return MEMTX_DECODE_ERROR; + } + loongson_ipi_core_writel(&ipi->cpu[cs->cpu_index], CORE_SET_OFF, + BIT(vector), 4, attrs); + break; + default: + qemu_log_mask(LOG_UNIMP, "invalid write: %x", (uint32_t)addr); + break; + } + + return MEMTX_OK; +} + +static MemTxResult loongson_ipi_iocsr_writel(void *opaque, hwaddr addr, + uint64_t val, unsigned size, + MemTxAttrs attrs) +{ + LoongsonIPICommonState *ipi = opaque; + IPICore *s; + + if (attrs.requester_id >= ipi->num_cpu) { + return MEMTX_DECODE_ERROR; + } + + s = &ipi->cpu[attrs.requester_id]; + return loongson_ipi_core_writel(s, addr, val, size, attrs); +} + +static const MemoryRegionOps loongson_ipi_iocsr_ops = { + .read_with_attrs = loongson_ipi_iocsr_readl, + .write_with_attrs = loongson_ipi_iocsr_writel, + .impl.min_access_size = 4, + .impl.max_access_size = 4, + .valid.min_access_size = 4, + .valid.max_access_size = 8, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +/* mail send and any send only support writeq */ +static MemTxResult loongson_ipi_writeq(void *opaque, hwaddr addr, uint64_t val, + unsigned size, MemTxAttrs attrs) +{ + LoongsonIPICommonState *ipi = opaque; + MemTxResult ret = MEMTX_OK; + + addr &= 0xfff; + switch (addr) { + case MAIL_SEND_OFFSET: + ret = mail_send(ipi, val, attrs); + break; + case ANY_SEND_OFFSET: + ret = any_send(ipi, val, attrs); + break; + default: + break; + } + + return ret; +} + +static const MemoryRegionOps loongson_ipi64_ops = { + .write_with_attrs = loongson_ipi_writeq, + .impl.min_access_size = 8, + .impl.max_access_size = 8, + .valid.min_access_size = 8, + .valid.max_access_size = 8, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +static void loongson_ipi_common_realize(DeviceState *dev, Error **errp) +{ + LoongsonIPICommonState *s = LOONGSON_IPI_COMMON(dev); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + int i; + + if (s->num_cpu == 0) { + error_setg(errp, "num-cpu must be at least 1"); + return; + } + + memory_region_init_io(&s->ipi_iocsr_mem, OBJECT(dev), + &loongson_ipi_iocsr_ops, + s, "loongson_ipi_iocsr", 0x48); + + /* loongson_ipi_iocsr performs re-entrant IO through ipi_send */ + s->ipi_iocsr_mem.disable_reentrancy_guard = true; + + sysbus_init_mmio(sbd, &s->ipi_iocsr_mem); + + memory_region_init_io(&s->ipi64_iocsr_mem, OBJECT(dev), + &loongson_ipi64_ops, + s, "loongson_ipi64_iocsr", 0x118); + sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem); + + s->cpu = g_new0(IPICore, s->num_cpu); + for (i = 0; i < s->num_cpu; i++) { + s->cpu[i].ipi = s; + + qdev_init_gpio_out(dev, &s->cpu[i].irq, 1); + } +} static void loongson_ipi_common_finalize(Object *obj) { @@ -53,6 +324,7 @@ static void loongson_ipi_common_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + dc->realize = loongson_ipi_common_realize; device_class_set_props(dc, ipi_properties); dc->vmsd = &vmstate_loongson_ipi; } From patchwork Wed Jul 17 21:47:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813014 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp16774wro; 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Wed, 17 Jul 2024 14:48:55 -0700 (PDT) Received: from localhost.localdomain ([176.187.208.21]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427c77a56f3sm11695425e9.11.2024.07.17.14.48.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 17 Jul 2024 14:48:55 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Bibo Mao , Jiaxun Yang , qemu-devel@nongnu.org Cc: Xianglai Li , Paolo Bonzini , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Song Gao Subject: [PATCH v3 14/17] hw/intc/loongarch_ipi: Add loongarch IPI support Date: Wed, 17 Jul 2024 23:47:05 +0200 Message-ID: <20240717214708.78403-15-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240717214708.78403-1-philmd@linaro.org> References: <20240717214708.78403-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bibo Mao Loongarch IPI is added here, it inherits from class TYPE_LOONGSON_IPI_COMMON, and two interfaces get_iocsr_as() and cpu_by_arch_id() are added for Loongarch 3A5000 machine. It can be used when ipi is emulated in userspace with KVM mode. Signed-off-by: Bibo Mao [PMD: Rebased and simplified] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/loongarch_ipi.h | 25 ++++++++++++ hw/intc/loongarch_ipi.c | 71 +++++++++++++++++++++++++++++++++ hw/intc/Kconfig | 4 ++ hw/intc/meson.build | 1 + 4 files changed, 101 insertions(+) create mode 100644 include/hw/intc/loongarch_ipi.h create mode 100644 hw/intc/loongarch_ipi.c diff --git a/include/hw/intc/loongarch_ipi.h b/include/hw/intc/loongarch_ipi.h new file mode 100644 index 0000000000..d134c9d0c7 --- /dev/null +++ b/include/hw/intc/loongarch_ipi.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Loongarch ipi interrupt header files + * + * Copyright (C) 2024 Loongson Technology Corporation Limited + */ + +#ifndef HW_LOONGARCH_IPI_H +#define HW_LOONGARCH_IPI_H + +#include "qom/object.h" +#include "hw/intc/loongson_ipi_common.h" + +#define TYPE_LOONGARCH_IPI "loongarch_ipi" +OBJECT_DECLARE_TYPE(LoongarchIPIState, LoongarchIPIClass, LOONGARCH_IPI) + +struct LoongarchIPIState { + LoongsonIPICommonState parent_obj; +}; + +struct LoongarchIPIClass { + LoongsonIPICommonClass parent_class; +}; + +#endif diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c new file mode 100644 index 0000000000..277de7c4e4 --- /dev/null +++ b/hw/intc/loongarch_ipi.c @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Loongarch ipi interrupt support + * + * Copyright (C) 2024 Loongson Technology Corporation Limited + */ + +#include "qemu/osdep.h" +#include "hw/boards.h" +#include "hw/intc/loongarch_ipi.h" +#include "target/loongarch/cpu.h" + +static AddressSpace *get_iocsr_as(CPUState *cpu) +{ + return LOONGARCH_CPU(cpu)->env.address_space_iocsr; +} + +static int archid_cmp(const void *a, const void *b) +{ + CPUArchId *archid_a = (CPUArchId *)a; + CPUArchId *archid_b = (CPUArchId *)b; + + return archid_a->arch_id - archid_b->arch_id; +} + +static CPUArchId *find_cpu_by_archid(MachineState *ms, uint32_t id) +{ + CPUArchId apic_id, *found_cpu; + + apic_id.arch_id = id; + found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus, + ms->possible_cpus->len, + sizeof(*ms->possible_cpus->cpus), + archid_cmp); + + return found_cpu; +} + +static CPUState *loongarch_cpu_by_arch_id(int64_t arch_id) +{ + MachineState *machine = MACHINE(qdev_get_machine()); + CPUArchId *archid; + + archid = find_cpu_by_archid(machine, arch_id); + if (archid) { + return CPU(archid->cpu); + } + + return NULL; +} + +static void loongarch_ipi_class_init(ObjectClass *klass, void *data) +{ + LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_CLASS(klass); + + licc->get_iocsr_as = get_iocsr_as; + licc->cpu_by_arch_id = loongarch_cpu_by_arch_id; +} + +static const TypeInfo loongarch_ipi_info = { + .name = TYPE_LOONGARCH_IPI, + .parent = TYPE_LOONGSON_IPI_COMMON, + .class_init = loongarch_ipi_class_init, +}; + +static void loongarch_ipi_register_types(void) +{ + type_register_static(&loongarch_ipi_info); +} + +type_init(loongarch_ipi_register_types) diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index a2a0fdca85..dd405bdb5d 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -94,6 +94,10 @@ config LOONGSON_IPI bool select LOONGSON_IPI_COMMON +config LOONGARCH_IPI + bool + select LOONGSON_IPI_COMMON + config LOONGARCH_PCH_PIC bool select UNIMP diff --git a/hw/intc/meson.build b/hw/intc/meson.build index a09a527207..f4d81eb8e4 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -71,6 +71,7 @@ specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'], specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c')) specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c')) +specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c')) From patchwork Wed Jul 17 21:47:06 2024 Content-Type: text/plain; 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Wed, 17 Jul 2024 14:49:02 -0700 (PDT) Received: from localhost.localdomain ([176.187.208.21]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427c77a56f3sm11697835e9.11.2024.07.17.14.49.00 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 17 Jul 2024 14:49:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Bibo Mao , Jiaxun Yang , qemu-devel@nongnu.org Cc: Xianglai Li , Paolo Bonzini , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Song Gao Subject: [PATCH v3 15/17] hw/loongarch/virt: Replace loongson IPI with loongarch IPI Date: Wed, 17 Jul 2024 23:47:06 +0200 Message-ID: <20240717214708.78403-16-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240717214708.78403-1-philmd@linaro.org> References: <20240717214708.78403-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bibo Mao Loongarch IPI inherits from class LoongsonIPICommonClass, and it only contains Loongarch 3A5000 virt machine specific interfaces, rather than mix different machine implementations together. Signed-off-by: Bibo Mao [PMD: Rebased] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/loongarch/virt.h | 1 - hw/loongarch/virt.c | 4 ++-- hw/loongarch/Kconfig | 2 +- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h index 8fdfacf268..91216418c8 100644 --- a/include/hw/loongarch/virt.h +++ b/include/hw/loongarch/virt.h @@ -11,7 +11,6 @@ #include "target/loongarch/cpu.h" #include "hw/boards.h" #include "qemu/queue.h" -#include "hw/intc/loongson_ipi.h" #include "hw/block/flash.h" #include "hw/loongarch/boot.h" diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index e592b1b6b7..29040422aa 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -23,7 +23,7 @@ #include "net/net.h" #include "hw/loader.h" #include "elf.h" -#include "hw/intc/loongson_ipi.h" +#include "hw/intc/loongarch_ipi.h" #include "hw/intc/loongarch_extioi.h" #include "hw/intc/loongarch_pch_pic.h" #include "hw/intc/loongarch_pch_msi.h" @@ -788,7 +788,7 @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) */ /* Create IPI device */ - ipi = qdev_new(TYPE_LOONGSON_IPI); + ipi = qdev_new(TYPE_LOONGARCH_IPI); qdev_prop_set_uint32(ipi, "num-cpu", ms->smp.cpus); sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal); diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig index 89be737726..0de713a439 100644 --- a/hw/loongarch/Kconfig +++ b/hw/loongarch/Kconfig @@ -12,7 +12,7 @@ config LOONGARCH_VIRT select SERIAL select VIRTIO_PCI select PLATFORM_BUS - select LOONGSON_IPI + select LOONGARCH_IPI select LOONGARCH_PCH_PIC select LOONGARCH_PCH_MSI select LOONGARCH_EXTIOI From patchwork Wed Jul 17 21:47:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813020 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp16950wro; Wed, 17 Jul 2024 14:50:00 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXy29M3ioyR0nAc2lo8Hbs/6AFzoHot5ja4Gdq1PbwAvuPAKXatzSe5o3W0lFl2BKxDL70H4jFbxbiX6xIiHqYD X-Google-Smtp-Source: AGHT+IEhwswbRWYvNTwBPaeLQwjQ9S1vj8LcZvj8iwZercZIM6eWjQi+JnWDcIcVftZy4+2VGnFG X-Received: by 2002:a05:6808:1a25:b0:3d9:26d6:c706 with SMTP id 5614622812f47-3dad1f91002mr3735672b6e.42.1721253000155; Wed, 17 Jul 2024 14:50:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721253000; cv=none; d=google.com; s=arc-20160816; b=GO5dKmV4SvdQiRvUsBd2M+jBKWHL88YCrr/PCGniRB6UdnZjxplOmPerlYZhhsndGH SYacIAD5n/zdN30HUQjkji3TKXCaohPokLAPleBR44aZU31eAPyiRw810aJ4xTY8oo+J Ogng5UjuU9t7vopZvsQbmZZup8OXIPXe+SC8iY87H/AMCbW8XS6tcCESM6F1vYs9Y+qi QiwZ1VveEiClscFRpfZXomMPMIfVpYPzrXNDgyTMSR/0aSnslev3Q890STuJf5MinO77 31xTF2AiyCwE4w78KrilkzeIe+Ko3LvaY0W/m8wQDsiFzbu/KRLKfqNy6VhmA4CI2baA An9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=XbJOgH6dYyPN3e3bCfJ4gl/53nu9HSazmUaIUNR0ln4=; fh=xHVzdzBN6gAdBZzGgkSf+YW57Ho0vCt6xom67kRkRS0=; b=E0CLS+mR7X9FqBrOjFZj9kM046h9RHW3EMB/IUebhSnSn8T1lv51lnCwayWY98iYJC HjtsW4o0I324jOZoAFE30AHkd2pS0lTmdaF58XYt4r9LdqsFvO8D9iHlre3+3aku3CIq HpioY3d8TShqq9hsesm12K5nCYXCapgbo6O1gr0h12tHDdLAWuizw1XI6gBbl0bU3dGd 7f9cKeczkqqNMeCJ/QV/yODO7aDSzluxCodyF1NGfKl+vUsAb1/M0/svLrFxDUb52vhY IAxHdYu+7GQnsnmRMGFfuDac/oEsncr84AjmiA6AqgjKzTnyFtBexW46xssWwFrZAJp0 R3PQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="g/1HISjR"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Signed-off-by: Philippe Mathieu-Daudé --- hw/intc/loongson_ipi.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 464bb6b580..61375d89ff 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -16,22 +16,9 @@ #include "exec/address-spaces.h" #include "exec/memory.h" #include "migration/vmstate.h" -#ifdef TARGET_LOONGARCH64 -#include "target/loongarch/cpu.h" -#endif -#ifdef TARGET_MIPS #include "target/mips/cpu.h" -#endif #include "trace.h" -#ifdef TARGET_LOONGARCH64 -static AddressSpace *get_iocsr_as(CPUState *cpu) -{ - return LOONGARCH_CPU(cpu)->env.address_space_iocsr; -} -#endif - -#ifdef TARGET_MIPS static AddressSpace *get_iocsr_as(CPUState *cpu) { if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) { @@ -40,7 +27,6 @@ static AddressSpace *get_iocsr_as(CPUState *cpu) return NULL; } -#endif static const MemoryRegionOps loongson_ipi_core_ops = { .read_with_attrs = loongson_ipi_core_readl, From patchwork Wed Jul 17 21:47:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813023 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp17010wro; Wed, 17 Jul 2024 14:50:09 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVuIpz+hTAHPAyNnoreFjEioN42tjpocejCVdbizKQlUqPABrpj6LKqZt7MK6ujOleWYjpMofiWOtp5XdBbxsDy X-Google-Smtp-Source: AGHT+IFqlve/T8Wjq/obSuawDQfrHOukETyRQ7Xbe/E6bDDzmRJXRFfkv6M6PCLwagSqJ12VSUQE X-Received: by 2002:a05:6808:138e:b0:3d6:8fc:5273 with SMTP id 5614622812f47-3dad1f11f52mr3908510b6e.6.1721253008065; Wed, 17 Jul 2024 14:50:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721253008; cv=none; d=google.com; s=arc-20160816; b=Ak4NblVra1YiwuhVgYy7HfKwmuenJ9TsXtmSXlIqXiUteZGAoMvy+B5DeXPR5zi6gi gg/7t7a1l9KLQt81DvwLy4WbODedDXsz3/Imo1s9nsDdFMXxcoBSgjBM2UKwoywp0Zyn zJOOvCnv5FmfQmwKO/QqDOxHOCaLMZZmI+oS98ZPM/qbbphM4NLtOYiFJo5RpWrZ2Wt5 f+doW2ThLm8NBuPzTEgP2IRwQqu/pECuC8y7Z9qQmLuFLN/mg3trIpainjvwkRggSA66 I45MdzWU618KyHIH4I6WMBgny2dVMIoZoEWGb8zWC2Tk1YR6Q6+yX8ltdtHz4D4WzEKF 2CSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=b63oTaOp3REQziAQ8nukVjNE16sAzixcuu6r9oQJNfs=; fh=mYAsWPocAV/Y7wgZBz4o5d9rseA3Cf3/MK6phzlyxK8=; b=ceo7qTAPQ1o79SdaEriodDIAxEg8IVSj8o6bfmWQ9eL2hZVaiS4x83ZPmcvgM8/70h DTslmn5l9n/fx2FwQCzLNVi41qRUP1rNPwMKue0FhFnCSeAD+z/O1oWxELaNVtBc2hQA 65fcq9dWq2FfuOdYkpK+z8Q/o/9ytLW23Gp6HWxwy+mHlMBfXwCUwBcRTQG3MfGqOF/V YWkCfYeC4ipDwn7P1sA/Kblx3M81H5s9tcXeM6XjQTMaN4MgH30+kxgGNS9BU0FKVx1c o2ZV1rtxAcY6yX4I6VBKyNTcpfansd7REjqbLwzYFefceeUavv3SXt8mStIkZKc9nE22 9b7Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AOdEzIOv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Wed, 17 Jul 2024 14:49:16 -0700 (PDT) Received: from localhost.localdomain ([176.187.208.21]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427c779847asm11834755e9.8.2024.07.17.14.49.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 17 Jul 2024 14:49:16 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Bibo Mao , Jiaxun Yang , qemu-devel@nongnu.org Cc: Xianglai Li , Paolo Bonzini , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Song Gao Subject: [PATCH v3 17/17] hw/intc/loongson_ipi: Remove unused headers Date: Wed, 17 Jul 2024 23:47:08 +0200 Message-ID: <20240717214708.78403-18-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240717214708.78403-1-philmd@linaro.org> References: <20240717214708.78403-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- hw/intc/loongson_ipi.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 61375d89ff..6dd08aa9cb 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -6,18 +6,9 @@ */ #include "qemu/osdep.h" -#include "hw/boards.h" -#include "hw/sysbus.h" #include "hw/intc/loongson_ipi.h" -#include "hw/irq.h" -#include "hw/qdev-properties.h" #include "qapi/error.h" -#include "qemu/log.h" -#include "exec/address-spaces.h" -#include "exec/memory.h" -#include "migration/vmstate.h" #include "target/mips/cpu.h" -#include "trace.h" static AddressSpace *get_iocsr_as(CPUState *cpu) {