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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id e8sm9395910pga.17.2019.11.01.17.27.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Nov 2019 17:27:25 -0700 (PDT) From: Bjorn Andersson To: Bjorn Helgaas , Stanimir Varbanov , Lorenzo Pieralisi , Andrew Murray , Philipp Zabel Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] dt-bindings: PCI: qcom: Add support for SDM845 PCIe Date: Fri, 1 Nov 2019 17:27:20 -0700 Message-Id: <20191102002721.4091180-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191102002721.4091180-1-bjorn.andersson@linaro.org> References: <20191102002721.4091180-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add compatible and necessary clocks and resets definitions for the SDM845 PCIe controller. Signed-off-by: Bjorn Andersson --- Changes since v1: - Split out binding in separate patch .../devicetree/bindings/pci/qcom,pcie.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.23.0 diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt index ada80b01bf0c..981b4de12807 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt @@ -11,6 +11,7 @@ - "qcom,pcie-ipq4019" for ipq4019 - "qcom,pcie-ipq8074" for ipq8074 - "qcom,pcie-qcs404" for qcs404 + - "qcom,pcie-sdm845" for sdm845 - reg: Usage: required @@ -126,6 +127,18 @@ - "master_bus" AXI Master clock - "slave_bus" AXI Slave clock +-clock-names: + Usage: required for sdm845 + Value type: + Definition: Should contain the following entries + - "aux" Auxiliary clock + - "cfg" Configuration clock + - "bus_master" Master AXI clock + - "bus_slave" Slave AXI clock + - "slave_q2a" Slave Q2A clock + - "tbu" PCIe TBU clock + - "pipe" PIPE clock + - resets: Usage: required Value type: @@ -188,6 +201,12 @@ - "pwr" PWR reset - "ahb" AHB reset +- reset-names: + Usage: required for sdm845 + Value type: + Definition: Should contain the following entries + - "pci" PCIe core reset + - power-domains: Usage: required for apq8084 and msm8996/apq8096 Value type: